Electronic circuit, method of driving multi-gate element, and electronic system

Abstract

To provide an electronic circuit for reducing the turn-on loss of a multi-gate element, a method for driving the multi-gate element, and an electronic system.SOLUTION: The electronic circuit of this embodiment includes a control circuit that controls a rise timing of a first pulse signal applied to a first control-gate electrode of a multi-gate element, and a comparison circuit that acquires a comparison result between a voltage related to a voltage between a first electrode and a second electrode of the multi-gate element and a first voltage or a second voltage. The control circuit acquires a transition time from when a voltage related to a voltage between the first electrode and the second electrode when the multi-gate element is turned on falls below a first voltage to when the voltage falls below a second voltage based on the comparison result, and adjusts a rise timing of the second pulse signal so as to reduce the transition time.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present embodiment relates to an electronic circuit, a method for driving a multi-gate element, and an electronic system. [Background technology]

[0002] Multi-gate IGBTs (Insulated Gate Bipolar Transistors) are known, which have multiple gate electrodes and can reduce turn-on and turn-off losses by devising the pattern of pulse signals applied to each gate electrode. A multi-gate IGBT has a control gate electrode for increasing and decreasing the accumulated carrier density, in addition to the normal electrode for controlling conduction. By controlling the pattern of the pulse signal applied to the control gate electrode so that the accumulated carrier density increases instantaneously during turn-on, increasing the current flow, and gradually decreasing the accumulated carrier density during turn-off, the switching loss of the device can be reduced. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-141304 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present embodiment is to provide an electronic circuit, a method for driving a multi-gate element, and an electronic system that reduce the turn-on loss of a multi-gate element. [Means for solving the problem]

[0005] To solve the above problem, an electronic circuit according to this embodiment includes a control circuit that controls the rising timing of a first pulse signal applied to a first control gate electrode of a multi-gate element, and a comparison circuit that obtains a comparison result between a voltage related to the voltage between the first and second electrodes of the multi-gate element and the first voltage or a second voltage that is smaller than the first voltage. Based on the comparison result, the control circuit obtains a transition time from when the voltage related to the voltage between the first and second electrodes when the multi-gate element is turned on falls below the first voltage to when it falls below the second voltage, and adjusts the rising timing of the first pulse signal so as to shorten the transition time.

[0006] The method for driving a multi-gate element according to this embodiment obtains a comparison result between a voltage related to the voltage between the first electrode and the second electrode of the multi-gate element and a first voltage or a second voltage smaller than the first voltage, and based on the comparison result, obtains the transition time from when the voltage related to the voltage between the first electrode and the second electrode when the multi-gate element is turned on falls below the first voltage to when it falls below the second voltage, and adjusts the rising timing of a first pulse signal so that the transition time is shortened.

[0007] The electronic system according to this embodiment includes a multi-gate element, a control circuit that controls the rising edge timing of a first pulse signal applied to a first control gate electrode of the multi-gate element, and a comparison circuit that obtains a comparison result between a voltage related to the voltage between the first and second electrodes of the multi-gate element and the first voltage or a second voltage that is smaller than the first voltage. Based on the comparison result, the control circuit obtains a transition time from when the voltage related to the voltage between the first and second electrodes when the multi-gate element is turned on falls below the first voltage to when it falls below the second voltage, and adjusts the rising edge timing of the first pulse signal so as to shorten the transition time. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a diagram showing a configuration of a driving system for a multi-gate element according to a first embodiment. [Figure 2]3A and 3B are diagrams showing examples of patterns of pulse signals of a TG-IGBT. [Figure 3] FIG. 2 is a diagram showing a detailed configuration of a comparison circuit according to the first embodiment. [Figure 4] FIG. 10 is a diagram showing the change over time of voltage Vn when turned on. [Figure 5] FIG. 10 is a diagram showing the relationship between turn-on loss and transition time. [Figure 6] FIG. 10 is a diagram showing the relationship between turn-on loss and transition time. [Figure 7] FIG. 3 is a diagram illustrating details of feedback control according to the first embodiment. [Figure 8] FIG. 3 is a diagram illustrating details of feedback control according to the first embodiment. [Figure 9] FIG. 10 is a diagram showing the configuration of a driving system for a multi-gate element according to a second embodiment. [Figure 10] FIG. 10 is a diagram showing the configuration of a driving system for a multi-gate element according to a third embodiment. [Figure 11] FIG. 10 is a diagram illustrating a detailed configuration of a comparison circuit according to a third embodiment. [Figure 12] FIG. 10 is a diagram showing the relationship between turn-on loss and a second elapsed time. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, the present embodiment will be described with reference to the drawings. In the drawings, the same or corresponding elements are designated by the same reference numerals, and detailed descriptions thereof will be omitted as appropriate.

[0010] (Embodiment 1) 1 is a diagram showing the configuration of a multi-gate device drive system 100 (electronic system) according to embodiment 1. The drive system 100 includes a triple-gate IGBT 10 (TG-IGBT 10), which is an example of a multi-gate device, a control circuit 20, a voltage-dividing circuit 30, and a comparison circuit 40. The control circuit 20, the voltage-dividing circuit 30, and the comparison circuit 40 form an electronic circuit that drives the TG-IGBT 10. In addition to triple-gate IGBTs, the multi-gate device also includes, for example, double-gate IGBTs (DG-IGBTs).

[0011] The TG-IGBT10 has a main gate electrode MG, a primary control gate electrode CGp (second control gate electrode), a secondary control gate electrode CGs (first control gate electrode), a collector electrode C (first electrode), and an emitter electrode E (second electrode). The main gate electrode MG is used to control the conduction between the collector and emitter, similar to the gate electrode of a normal single-gate IGBT. The primary control gate electrode CGp and the secondary control gate electrode CGs are used to control the density of stored carriers. Specifically, the primary control gate electrode CGp is ​​used to extract charge in advance when turning off. The secondary control gate electrode CGs is used to supply charge when turning on.

[0012] The control circuit 20 is configured with, for example, an FPGA (Field Programmable Gate Array), a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit). The control circuit 20 applies a main pulse signal to the main gate electrode MG of the TG-IGBT 10 via a gate resistor 11. The control circuit 20 applies a primary pulse signal (second pulse signal) to the primary control gate electrode CGp of the TG-IGBT 10 via a gate resistor 12. The control circuit 20 applies a secondary pulse signal (first pulse signal) to the secondary control gate electrode CGs of the TG-IGBT 10 via a gate resistor 13. The control circuit 20 controls the rising and falling edges of each pulse signal to control the switching operation of the TG-IGBT 10.

[0013] The gate resistors 11 to 13 may have the same or different values. Separate gate resistors may be provided for when the pulse signal is a positive voltage and when it is a negative voltage. In this case, diodes are connected in series with the gate resistors. The diode connected in series with the gate resistor used in the current path when the voltage is positive is mounted with its anode on the control circuit 20 side and its cathode on the gate electrode side. The diode connected in series with the gate resistor used in the current path when the voltage is negative is mounted with its anode on the gate electrode side and its cathode on the control circuit 20 side. Because multi-gate devices generally have large gate capacitance, a current amplifier circuit may be added to the output of the control circuit 20 to quickly supply charge to each gate electrode of the TG-IGBT 10.

[0014] FIG. 2 shows an example of a pattern of pulse signals applied to each gate electrode of the TG-IGBT 10. The main pulse signal applied to the main gate electrode MG controls the conduction between the collector and emitter of the TG-IGBT 10. The high-voltage side of the main pulse signal is +15 V and the low-voltage side is −15 V. When the main pulse signal rises to +15 V, the collector and emitter of the TG-IGBT 10 are conductive. However, the value of the high-voltage side of the main pulse signal is not limited to +15 V as long as it is above a threshold voltage determined by the characteristics of the TG-IGBT 10. Similarly, the value of the low-voltage side of the main pulse signal is not limited to −15 V as long as it is below the threshold voltage.

[0015] The primary pulse signal applied to the primary gate electrode CGp is ​​controlled mainly to reduce turn-off loss. The high-voltage side of the primary pulse signal is +15 V and the low-voltage side is −15 V. However, the value of the high-voltage side of the primary pulse signal is not limited to +15 V as long as it is above the threshold voltage determined by the characteristics of the TG-IGBT 10. Similarly, the value of the low-voltage side of the primary pulse signal is not limited to −15 V as long as it is below the threshold voltage.

[0016] The rising timing ton1 and falling timing toff1 of the primary pulse signal are defined as relative delay times from the rising timing of the primary pulse signal. For example, when ton1 is 0 or greater, the primary pulse signal rises after the rising timing ton1 of the primary pulse signal and falls after the rising timing toff1 of the primary pulse signal. On the other hand, when ton1 is less than 0, the primary pulse signal rises before the rising timing ton1 of the primary pulse signal and falls before the rising timing toff1 of the primary pulse signal. However, ton1 and toff1 may be defined based on other timings. The falling timing toff1 of the primary pulse signal affects turn-off loss. The rising timing ton1 of the primary pulse signal affects turn-on loss.

[0017] The secondary pulse signal applied to the secondary control gate electrode CGs is controlled primarily to reduce turn-on loss. The high-voltage side of the secondary pulse signal is +15 V and the low-voltage side is 0 V. However, the high-voltage side value of the secondary pulse signal is not limited to +15 V as long as it is above the threshold voltage determined by the characteristics of the TG-IGBT 10. Similarly, the low-voltage side value of the secondary pulse signal is not limited to 0 V as long as it is below the threshold voltage.

[0018] The rising timing ton2 and falling timing toff2 of the secondary pulse signal are defined as relative delay times from the rising timing of the main pulse signal. For example, when ton2 is 0 or greater, the secondary pulse signal rises after the rising timing ton2 of the main pulse signal and falls after the rising timing toff of the main pulse signal. On the other hand, when ton2 is less than 0, the secondary pulse signal rises before the rising timing ton2 of the main pulse signal and falls before the rising timing toff2 of the main pulse signal. However, ton2 and toff2 may be defined based on other timings. The rising timing ton2 of the secondary pulse signal affects turn-on loss. To prevent a decrease in the short-circuit withstand capability of the TG-IGBT 10, it is preferable that the secondary pulse signal be +15 V for a short time only at turn-on and then immediately fall.

[0019] The control circuit 20 reduces the turn-on loss of the TG-IGBT 10 by adjusting two of the four parameters (ton1, toff1, ton2, toff2) shown in Fig. 2, specifically, the rising timing ton1 of the primary pulse signal and the rising timing ton2 of the secondary pulse signal. The control circuit 20 also reduces the turn-off loss of the TG-IGBT 10 by adjusting the falling timing toff1 of the primary pulse signal, and prevents a decrease in the short-circuit withstand capability of the TG-IGBT 10 by adjusting the falling timing toff2 of the secondary pulse signal. However, since the main purpose of this embodiment is to reduce the turn-on loss of the TG-IGBT 10, the description will be given assuming that toff1 and toff2 are fixed to predetermined values.

[0020] Returning to FIG. 1, the voltage divider circuit 30 is composed of resistors 31 and 32, and divides the collector-emitter voltage Vce of the TG-IGBT 10 at a predetermined ratio. The voltage division ratio is set so that the maximum value of the voltage Vn falls within the voltage level that can be input to the comparison circuit 40. As an example, when the resistance ratio is set to 9:1, a voltage Vn that is 1 / 10 of the collector-emitter voltage Vce appears at the node N of the voltage divider circuit 30.

[0021] At least one of the resistors 31 and 32, for example, the resistor 31 connected to the collector side of the TG-IGBT 10, may be configured as a variable resistor, such as a digital potentiometer, and configured by connecting a fixed resistor and a variable resistor in series. This makes it easier to adjust the voltage division ratio. Also, a capacitor may be used instead of the resistor.

[0022] The comparator circuit 40 obtains a comparison result between the voltage Vn divided by the voltage divider circuit 30 and the first voltage Vth1 or the second voltage Vth2. More specifically, the comparator circuit 40 compares the voltage Vn with the first voltage Vth1 or the second voltage Vth2, respectively, and outputs the comparison result. The first voltage Vth1 may be a voltage related to the start of turn-on, i.e., a first threshold voltage. The second voltage Vth2 may be a voltage related to the completion of turn-on, i.e., a second threshold voltage. FIG. 3 shows a detailed configuration of the comparator circuit 40. The comparator circuit 40 includes a first comparator 41, a second comparator 42, and three resistors 43 to 45 connected in series between the positive voltage V1 and the common voltage Vcom. The positive voltage V1 is, for example, +5 V, which is used in general electronic devices.

[0023] By appropriately setting the values ​​of resistors 43 to 45, the voltage of node N1 is set to a first voltage Vth1, and the voltage of node N2 is set to a second voltage Vth2. The voltage Vn is input to the negative input of the first comparator 41, and the first voltage Vth1 is input to the positive input. The voltage Vn is input to the negative input of the second comparator 42, and the second voltage Vth2 is input to the positive input.

[0024] The first comparator 41 outputs a low signal while the voltage Vn is above the first voltage Vth1, and outputs a high signal when the voltage Vn falls below the first voltage Vth1. The output of the first comparator 41 becomes a first comparison signal S1, which is input to the control circuit 20. The second comparator 42 outputs a low signal while the voltage Vn is above the second voltage Vth2, and outputs a high signal when the voltage Vn falls below the second voltage Vth2. The output of the second comparator 42 becomes a second comparison signal S2, which is input to the control circuit 20.

[0025] The first voltage Vth1 and the second voltage Vth2 are set so that the transition time T from when the voltage Vn falls below Vth1 to when it falls below Vth2 is approximately equal to the turn-on time of the TG-IGBT 10. Specifically, as shown in FIG. 4, the first voltage Vth1 is set to a value slightly lower than the voltage Vn when the TG-IGBT 10 is not conducting. This is to accurately determine the timing that can be considered as the start of turn-on while avoiding the influence of fluctuations in the voltage Vn immediately after the start of turn-on. As an example, the first voltage Vth1 is set to 0.91 times the maximum value of the voltage Vn.

[0026] The second voltage Vth2 is set to a value slightly higher than the voltage Vn when the TG-IGBT 10 is conducting. This is to accurately determine the timing at which turn-on can be considered complete while avoiding the effects of fluctuations in the voltage Vn immediately before turn-on is complete. As an example, the second voltage Vth2 is set to 0.16 times the maximum value of the voltage Vn.

[0027] By setting the first voltage Vth1 and the second voltage Vth2 as described above, the transition time T from when the voltage Vn falls below the first voltage Vth1 and the first comparison signal S1 changes from Low to High to when the voltage Vn falls below the second voltage Vth2 and the second comparison signal S2 changes from Low to High becomes approximately equal to the turn-on time of the TG-IGBT10.

[0028] The control circuit 20 measures the transition time T, for example, using its own built-in counter. Specifically, the control circuit 20 turns on the built-in counter at the timing (t1 in FIG. 4) when the first comparison signal S1 output from the comparison circuit 40 changes from low to high, and turns off the built-in counter at the timing (t2 in FIG. 4) when the second comparison signal S2 output from the comparison circuit 40 changes from low to high. Note that if the transition time T is short and a sampling frequency exceeding the operating frequency of the control circuit 20 is required, a component that can achieve higher time resolution, such as a TDC (Time to Digital Converter), may be used instead of the built-in counter.

[0029] Here, the relationship between the turn-on loss and the transition time T of the TG-IGBT 10 will be explained. The graph on the left side of FIG. 5 shows the relationship between ton1 and the turn-on loss when ton1 is manually changed. The graph on the right side of FIG. 5 shows the relationship between ton1 and the transition time T when ton1 is manually changed. Comparing the two graphs, a correlation exists between the two. Therefore, the control circuit 20 can minimize the turn-on loss of the TG-IGBT 10 by adjusting ton1 so as to minimize the transition time T. In the example of FIG. 5, the control circuit 20 simply sets ton1 equal to zero.

[0030] The graph on the left side of FIG. 6 shows the relationship between ton2 and the turn-on loss when ton2 is manually changed. The graph on the right side of FIG. 6 shows the relationship between ton2 and the transition time T when ton2 is manually changed. Comparing the two graphs, a correlation exists between the two. Therefore, the control circuit 20 can minimize the turn-on loss of the TG-IGBT 10 by adjusting ton2 so as to minimize the transition time T. In the example of FIG. 6, the control circuit 20 simply adjusts ton2 so that it is equal to ton2_* in the figure.

[0031] As described above, by utilizing the correlation between the turn-on loss of the TG-IGBT10 and the transition time T and adjusting ton1 and ton2 so as to minimize the transition time T, the turn-on loss can be minimized. However, the characteristics of the TG-IGBT10 change due to environmental fluctuations and aging degradation of the element. Environmental fluctuations include, for example, changes in the characteristics of the TG-IGBT10, the surrounding circuits, and the load due to changes in the outside temperature and heat generation of the element. In addition, there may be large differences in the characteristics of each component of the TG-IGBT10. When the characteristics of the TG-IGBT10 change, ton1 and ton2, which minimize the turn-on loss, also change.

[0032] In the first embodiment, even when ton1 and ton2 that minimize turn-on loss change due to environmental fluctuations or aging of the elements, feedback control is performed to adaptively adjust ton1 and ton2 in response to this. Feedback control here refers to a process of adjusting the next ton1 and ton2 based on the transition time T obtained using the current ton1 and ton2 so as to minimize the turn-on loss. Specifically, the transition time T is considered to be a function of ton1 and ton2, and the gradient descent method is used to search for ton1 and ton2 that minimize the transition time T.

[0033] Here, the feedback control according to the first embodiment will be described in detail. As an example, a use case is assumed in which the drive system 100 of the TG-IGBT 10 is incorporated into a power conversion device as a final product. The TG-IGBT 10 incorporated into the power conversion device repeats switching operations in accordance with each pulse signal applied from the control circuit 20.

[0034] The control circuit 20 constantly monitors the transition time T, which is correlated with the turn-on loss of the TG-IGBT 10, and when the transition time T exceeds a predetermined reference value and a deterioration in the turn-on loss is detected, the control circuit 20 starts the feedback control shown in the flowchart of FIG. 7.

[0035] In step S101, the control circuit 20 sets ton1 and ton2 to initial values ​​ton1(1) and ton2(1), respectively. Also, the number of trials n is set to the initial value 1. When feedback control is executed for the first time, for example, ton1 and ton2 are changed in advance at predetermined step intervals, and the value that minimizes turn-on loss is selected from the changes and set as the initial values ​​ton1(1) and ton2(1). When feedback control is executed for the second time or later, the current values ​​ton1 and ton2 are set as the initial values ​​ton1(1) and ton2(1).

[0036] In step S102, the control circuit 20 turns on the TG-IGBT 10 using ton1(n) and ton2(n) for the nth trial, taking advantage of the switching operation of the TG-IGBT 10 that continues even while feedback control is being executed (see FIG. 8). In detail, the control circuit 20 first raises the main pulse signal, then raises the primary pulse signal after ton1(n) has elapsed since the rise timing of the main pulse signal, and then raises the secondary pulse signal after ton2(n) has elapsed since the rise timing of the main pulse signal.

[0037] In step S103, the control circuit 20 acquires the first transition time T1(n) during the nth trial. Specifically, the control circuit 20 acquires the first transition time T1(n) as the time from when the first comparison signal S1 of the comparison circuit 40 changes from Low to High to when the second comparison signal S2 of the comparison circuit 40 changes from Low to High when the TG-IGBT 10 is turned on. Thereafter, as the switching operation of the TG-IGBT 10 continues even during execution of feedback control, the primary pulse signal and the secondary pulse signal fall at predetermined timings toff1 and toff2.

[0038] In step S104, the control circuit 20 turns on the TG-IGBT 10 by using ton1(n)+Δt1 and ton2(n)+Δt2, which are obtained by varying ton1(n) and ton2(n) by a small amount (a predetermined amount) during the nth trial, again taking advantage of the switching operation of the TG-IGBT 10 that continues during feedback control (see FIG. 8). Specifically, the control circuit 20 first raises the main pulse signal, then raises the primary pulse signal after ton1(n)+Δt1 has elapsed since the rise of the main pulse signal, and then raises the secondary pulse signal after ton2(n)+Δt2 has elapsed since the rise of the main pulse signal. Note that the small amounts Δt1 and Δt2 may be the same or different values. The small amounts Δt1 and Δt2 are set, for example, to a time corresponding to the operating speed of the circuit (e.g., FPGA), e.g., the time per sample of the operating speed. If the operating speed is 100 MHz, Δt1 and Δt2 are set to 10 nanoseconds. However, the method for setting Δt1 and Δt2 is not limited to this method, and they may be set to a time of two or more samples, or Δt1 and Δt2 may be set from a perspective other than the operation speed.

[0039] In step S105, the control circuit 20 acquires the second transition time T2(n) during the nth trial. Specifically, the control circuit 20 acquires the second transition time T2(n) as the time from when the first comparison signal S1 of the comparison circuit 40 changes from Low to High to when the second comparison signal S2 of the comparison circuit 40 changes from Low to High when the TG-IGBT 10 is turned on. Thereafter, as the switching operation of the TG-IGBT 10 continues even during execution of feedback control, the primary pulse signal and the secondary pulse signal fall at predetermined timings toff1 and toff2.

[0040] In step S106, the control circuit 20 updates ton1(n) and ton2(n) based on the first transition time T1(n) and second transition time T2(n) during the nth trial. In detail, the control circuit 20 calculates ton1(n+1) and ton1(n+1) from the first transition time T1(n) and second transition time T2(n) according to the following equations:

[0041] ton1(n+1)=ton1(n)-α(T2(n)-T1(n)) / Δt1 ton2(n+1)=ton2(n)-β(T2(n)-T1(n)) / Δt2

[0042] In the above equation, α and β are learning rates, which may be the same or different values, and may be changed for each trial.

[0043] In step 107, the control circuit 20 determines the search termination condition. For example, the control circuit 20 determines whether or not the following two conditional expressions are both satisfied:

[0044] |ton1(n+1)-ton1(n)|<ε1 |ton2(n+1)-ton2(n)|<ε2

[0045] In the above equation, ε1 and ε2 are values ​​(predetermined values) for determining convergence, and may be the same value or different values.

[0046] If the termination condition is met in step S107 (S107=YES), the control circuit 20 terminates the search (RET). Otherwise (S107=NO), the control circuit 20 adds 1 to the number of trials n (S108) and returns to step S102.

[0047] At the end of the search, ton1(n) and ton2(n) have been adjusted to reduce, for example minimize, the turn-on loss in the characteristics of the current TG-IGBT 10. The control circuit 20 uses ton1 and ton2 adjusted in this way to control the switching operation of the TG-IGBT 10, thereby reducing, for example minimizing, the turn-on loss.

[0048] As described above, when the turn-on loss of the TG-IGBT 10 deteriorates, the feedback control shown in FIG. 7 is executed. This allows ton1 and ton2, which minimize the turn-on loss, to be adaptively adjusted to track changes in ton1 and ton2 due to environmental fluctuations or aging of the elements. Feedback control may also be executed at regular time intervals, not just when the turn-on loss deteriorates. However, due to the nature of the gradient descent method, ton1 and ton2 at the end of the search may correspond to a local minimum rather than a global minimum of the turn-on loss. Even in this case, the turn-on loss can still be reduced.

[0049] As described above, in the multi-gate device driving system 100 according to the first embodiment, the control circuit 20 obtains the transition time T, which is the time from when the voltage Vn, which is related to the collector-emitter voltage Vce when the TG-IGBT 10 is turned on, falls below the first voltage Vth1 to when it falls below the second voltage Vth2, based on the comparison result of the comparator circuit 40. The control circuit 20 adjusts the rising timing ton1 of the primary pulse signal and the rising timing ton2 of the secondary pulse signal so as to shorten, preferably minimize, the transition time T. Due to these characteristics, the driving system 100 according to the first embodiment can reduce, preferably minimize, the turn-on loss even when the characteristics of the TG-IGBT 10 change due to environmental fluctuations or aging of the device.

[0050] Furthermore, in the first embodiment, the turn-on loss is not estimated from the product of the collector-emitter voltage and the collector current of the TG-IGBT 10, but rather the correlation between the turn-on loss and the transition time T is utilized to reduce the turn-on loss based on the transition time T. Typically, a current sense resistor, a wideband current sensor, or the like is required to measure the collector current of a TG-IGBT. The current sense resistor generates losses, and wideband current sensors are expensive. In contrast, in the first embodiment, the voltage divider circuit 30 and the comparator circuit 40 for acquiring the transition time T acquire the transition time T based on the voltage Vn obtained by dividing the collector-emitter voltage Vce, and are composed of only a small number of resistors and comparators. Therefore, the voltage divider circuit 30 and the comparator circuit 40 of the first embodiment are low-loss, small-sized, and low-cost. These features are particularly advantageous when the drive system 100 is incorporated into an end product incorporating the TG-IGBT 10.

[0051] Furthermore, when the feedback control according to the first embodiment is executed for the first time, in step S101 of FIG. 7, ton1 and ton2 are changed in advance at predetermined step intervals, and the value that minimizes the turn-on loss is selected from the changes and set as the initial values ​​ton1(1) and ton2(1). This allows the gradient descent search to start near the global minimum. As a result, ton1 and ton2 at the end of the search are likely to correspond to the global minimum of the turn-on loss.

[0052] If the goal is to reduce turn-on loss, under ideal conditions where there is no variation in the characteristics of elements or circuits, it is preferable for the voltage of the secondary pulse signal to begin rising from the time when the voltage of the main pulse signal reaches 0 V. In fact, referring to Figures 4 and 5, ton1, at which turn-on loss is at its smallest, is nearly zero, while ton2, at which turn-on loss is at its smallest, i.e., ton2_*, is a value greater than zero.

[0053] Therefore, when selecting ton1 and ton2 that will minimize the turn-on loss, it is preferable to first select ton2 and then select ton1. Specifically, ton1 is first fixed to zero and ton2 is varied at predetermined step intervals, and the value that minimizes the turn-on loss is selected and set as the initial value ton2(1). Next, ton2 is fixed to the initial value ton2(1) and ton1 is varied at predetermined step intervals, and the value that minimizes the turn-on loss is selected and set as the initial value ton1(1).

[0054] Furthermore, in the feedback control of the first embodiment, ton1 and ton2 are adjusted simultaneously, but ton1 and ton2 may also be adjusted independently. For example, ton2, which has a greater effect on turn-on loss, may be adjusted first, and then ton1 may be adjusted. In this case, ton1 may be fixed at zero while ton2 is being adjusted. Alternatively, ton1, which has a smaller effect on turn-on loss, may be fixed at zero, and only ton2, which has a greater effect on turn-on loss, may be adjusted.

[0055] (Embodiment 2) 9 is a diagram showing the configuration of a driving system 200 for a multi-gate element according to embodiment 2. The driving system 200 includes an A / D converter 250 that converts the voltage Vn divided by the voltage dividing circuit 30 into a digital signal. A comparison circuit 240 compares the voltage Vn converted into a digital signal by the A / D converter 250 with the quantized first voltage Vth1 (first voltage Vth1 of a digital signal) or the quantized second voltage Vth2 (second voltage Vth2 of a digital signal), and outputs the comparison result as a digital signal.

[0056] In the first embodiment, the comparison circuit 40 is configured as an analog circuit. In contrast, in the second embodiment, the comparison circuit 240 is configured as a digital circuit. As a result, all signals within the area surrounded by the dotted line in the figure are digital signals. This allows, for example, the control circuit 220 and the comparison circuit 240 to be configured using the same FPGA, CPU, ASIC, or the like.

[0057] (Embodiment 3) 10 is a diagram showing the configuration of a driving system 300 for a multi-gate element according to embodiment 3. The driving system 300 includes a switch 360 that selectively outputs either a first voltage Vth1 or a second voltage Vth2 in accordance with a switching signal input from a control circuit 320. The switch 360 may selectively generate and output the first voltage Vth1 or the second voltage Vth2 internally, or may selectively output the first voltage Vth1 or the second voltage Vth2 input from an external source.

[0058] The comparison circuit 340 compares the voltage Vn divided by the voltage divider circuit 30 with either the first voltage Vth1 or the second voltage Vth2 output from the switch 360, and outputs the comparison result. FIG. 11 is a diagram showing a detailed configuration of the comparison circuit 340. The comparison circuit 340 includes a third comparator 343, the negative input of which receives the voltage Vn, and the positive input of which receives either the first voltage Vth1 or the second voltage Vth2. The output of the third comparator 343 becomes a third comparison signal S3, which is input to the control circuit 320.

[0059] When acquiring the transition time T, the control circuit 320 first causes the switch 360 to output a first voltage Vth1, and acquires a first elapsed time Tp1 from a predetermined reference time until the output of the comparison circuit 340 changes. As an example, the reference time is set to the rising timing of the main pulse signal. Next, the control circuit 320 causes the switch 360 to output a second voltage Vth2, and acquires a second elapsed time Tp2 from the above reference time until the output of the comparison circuit 340 changes. The control circuit 340 calculates the transition time T from the difference between the second elapsed time Tp2 and the first elapsed time Tp1.

[0060] In the above-described Embodiment 1, the comparison circuit 40 was composed of two comparators 41 and 42 and three resistors 43 to 35. In contrast, in the third embodiment, the comparison circuit 340 is composed of only one comparator 343. Due to such a feature, the comparison circuit 340 of the third embodiment has fewer components, is smaller in size, and is less costly than the comparison circuit 40 of the first embodiment.

[0061] Also, in the third embodiment, when the reference time is set to the rising timing of the main gate signal, Tp1 << Tp2 holds. Also, ton2 has a greater impact on the turn-on loss than ton1. Therefore, when adjusting ton1, which has a small impact on the turn-on loss, the transition time T can be approximated to the second elapsed time Tp2.

[0062] Actually, as shown in FIG. 12, the relationship between ton1 and the second elapsed time Tp2 when ton1 is manually changed (the left graph in FIG. 12) and the relationship between ton1 and the turn-on loss when ton1 is manually changed (the right graph in FIG. 12) are extremely similar.

[0063] Therefore, when adjusting ton1 by feedback control, the control circuit 320 may approximate the transition time T by the second elapsed time Tp2 and adjust ton1 so that the second elapsed time Tp2 is shortened. This eliminates the need for a process to obtain Tp1 when adjusting ton1, thereby shortening the time required to adjust ton1 and speeding up feedback control. However, when adjusting ton2, which has a large impact on turn-on loss, the contribution of the first elapsed time Tp1 cannot be ignored, and adjustment must be made based on the transition time T = Tp2 - Tp1.

[0064] Although several embodiments have been described, these embodiments are presented as examples and are not intended to limit the scope of the embodiments. These embodiments can be implemented in various other forms, and various omissions, substitutions, modifications, combinations, etc. can be made without departing from the spirit of the embodiments. These embodiments and their modifications are included in the scope of the claims and their equivalents, as well as the scope and spirit of the embodiments.

[0065] This embodiment can also be configured as follows. [1] (Examples 1, 2, and 3) a control circuit that controls the rising timing of a first pulse signal applied to a first control gate electrode of the multi-gate element; a comparison circuit that obtains a comparison result between a voltage related to a voltage between a first electrode and a second electrode of the multi-gate element and a first voltage or a second voltage that is smaller than the first voltage; Equipped with the control circuit acquires a transition time from when a voltage related to a voltage between the first electrode and the second electrode at the time of turning on the multi-gate element falls below the first voltage to when the voltage falls below the second voltage based on the comparison result, and adjusts a rising timing of the first pulse signal so as to shorten the transition time. electronic circuit. [2] (Examples 1, 2, and 3) the control circuit further controls a rising timing of a second pulse signal applied to a second control gate electrode of the multi-gate element, and adjusts the rising timing of the second pulse signal so that the transition time is shortened. Item 1. The electronic circuit according to item 1. [3] (Examples 1, 2, and 3) the control circuit adjusts the rising timing of the first pulse signal and the second pulse signal so as to minimize the transition time. Item 1 or 2. An electronic circuit according to item 1 or 2. [4] (Examples 1, 2, and 3) the rising timings of the first pulse signal and the second pulse signal are relative delay times with respect to the rising timing of a main pulse signal applied to a main gate electrode of the multi-gate element; Item 2 or 3. The electronic circuit according to item 2 or 3. [5] (Examples 1, 2, and 3) further comprising a voltage dividing circuit that divides the voltage between the first electrode and the second electrode; The voltage divided by the voltage divider circuit is input to the comparator circuit. 2. The electronic circuit of claim 1. [6] (Examples 1, 2, and 3) the voltage divider circuit includes two resistors, at least one of which is a variable resistor; Item 5. The electronic circuit according to item 5. [7] (Example 1) The comparison circuit a first comparator that compares the divided voltage with the first voltage and outputs a comparison result; a second comparator that compares the divided voltage with the second voltage and outputs a comparison result; Including, the control circuit obtains the transition time based on outputs of the first comparator and the second comparator. Item 7. The electronic circuit according to item 5 or 6. [8] (Example 1) the control circuit acquires the transition time based on a time from when the output of the first comparator changes to when the output of the second comparator changes. Item 7. The electronic circuit according to item 7. [9] (Example 2) further comprising an A / D converter that converts the divided voltage into a digital signal; the comparison circuit compares the digital signal of the divided voltage with the first voltage of a digital signal or the second voltage of a digital signal to determine which is larger, and obtains the comparison result as a digital signal. Item 5. The electronic circuit according to item 5.

[10] (Examples 1, 2, and 3) the rising timings of the first pulse signal and the second pulse signal are adjusted in a direction such that the transition time is shortened when the rising timings of the first pulse signal and the second pulse signal are changed by a predetermined amount. 10. The electronic circuit according to any one of items 2 to 9.

[11] (Examples 1, 2, and 3) the adjustment of the timing of the rise of the first pulse signal and the second pulse signal is terminated when a change in the transition time when the rise timing of the first pulse signal and the second pulse signal is changed by the predetermined amount becomes equal to or less than a predetermined value. Item 11. The electronic circuit according to item 10.

[12] (Examples 1, 2, and 3) The rising timings of the first pulse signal and the second pulse signal are adjusted independently. 12. The electronic circuit according to any one of items 2 to 11.

[13] (Examples 1, 2, and 3) the initial values ​​of the rising timings of the first pulse signal and the second pulse signal are set to timings at which the transition time is minimized when the rising timings of the first pulse signal and the second pulse signal are changed at predetermined step intervals. 13. The electronic circuit according to any one of items 2 to 12.

[14] (Examples 1, 2, and 3) After the initial value of the rising timing of the second pulse signal is set, the initial value of the rising timing of the first pulse signal is set. Item 14. The electronic circuit according to item 13.

[15] (Example 3) The comparison circuit a switch that selectively outputs either the first voltage or the second voltage in accordance with a switching signal input from the control circuit; a third comparator that compares the divided voltage with either the first voltage or the second voltage output from the switch and outputs a comparison result; Including, the control circuit causes the switch to output the first voltage, acquires a first elapsed time from a predetermined reference time until the output of the third comparator changes, then causes the switch to output the second voltage, acquires a second elapsed time from the reference time until the output of the third comparator changes, and acquires the transition time from a difference between the first elapsed time and the second elapsed time. Item 5. The electronic circuit according to item 5.

[16] (Example 3) the reference time is a rising edge timing of a main pulse signal applied to a main gate electrode of the multi-gate element; Item 16. The electronic circuit according to item 15.

[17] (Example 3) the control circuit further controls a rising timing of a second pulse signal applied to a second control gate electrode of the multi-gate element, and adjusts the rising timing of the second pulse signal so that the second elapsed time is shortened. Item 17. The electronic circuit according to item 15 or 16.

[18] A method for driving a multi-gate device, comprising: obtaining a comparison result of a voltage related to a voltage between a first electrode and a second electrode of the multi-gate element with a first voltage or a second voltage less than the first voltage; obtaining a transition time, based on the comparison result, from when a voltage between the first electrode and the second electrode at the time of turning on the multi-gate device falls below the first voltage to when the voltage falls below the second voltage; adjusting the rising timing of the first pulse signal so that the transition time is reduced; method.

[19] a multi-gate element; a control circuit for controlling a rising edge timing of a first pulse signal applied to a first control gate electrode of the multi-gate element; a comparison circuit that obtains a comparison result between a voltage related to a voltage between the first electrode and the second electrode of the multi-gate element and a first voltage or a second voltage; Equipped with the control circuit acquires a transition time from when a voltage related to a voltage between the first electrode and the second electrode at the time of turning on the multi-gate element falls below the first voltage to when the voltage falls below the second voltage based on the comparison result, and adjusts a rising timing of the first pulse signal so as to shorten the transition time. Electronic systems. [Explanation of symbols]

[0066] 10 TG-IGBT (multi-gate device) 11 Gate resistor 12 Gate resistor 13 Gate resistor 20 Control circuit 30 Voltage divider circuit 31 Resistance 32 Resistance 40 Comparison circuit 41 First Comparator 42 Second Comparator 43 Resistance 44 Resistance 45 Resistance 100 Multi-gate element driving system (electronic system) 200 Multi-gate device driving system (electronic system) 220 Control circuit 240 Comparison circuit 250 A / D converters 300 Multi-gate device driving system (electronic system) 320 Control circuit 340 Comparison circuit 343 Third Comparator 360 Switch C Collector electrode (first electrode) CGp Primary control gate electrode (second control gate electrode) CGs Secondary control gate electrode (first control gate electrode) E Emitter electrode (second electrode) MG main gate electrode N-node N1 node N2 node S1 First comparison signal S2 2nd comparison signal S3 Third comparison signal T transition time Tp1 First elapsed time Tp2 Second elapsed time V1 positive voltage Vcc positive power supply Vcom Common voltage Vn Divided voltage Vee negative power supply Vth1 First voltage Vth2 Second voltage t1 The timing when the first comparison signal changes from Low to High t2 The timing when the second comparison signal changes from Low to High toff1 Falling timing of the first pulse signal toff2 Falling timing of the second pulse signal ton1 Rising timing of the first pulse signal ton2 Rising timing of the second pulse signal α learning rate β learning rate Δt1: minute amount (predetermined amount) Δt2 minute amount (predetermined amount) ε1 Value for determining convergence (predetermined value) ε2 Value for determining convergence (predetermined value)

Claims

1. a control circuit that controls a rising edge timing of a first pulse signal applied to a first control gate electrode of the multi-gate element; a comparison circuit that obtains a comparison result between a voltage related to a voltage between a first electrode and a second electrode of the multi-gate element and a first voltage or a second voltage that is smaller than the first voltage; Equipped with the control circuit acquires a transition time from when a voltage related to a voltage between the first electrode and the second electrode at the time of turning on the multi-gate element falls below the first voltage to when the voltage falls below the second voltage based on the comparison result, and adjusts a rising timing of the first pulse signal so as to shorten the transition time. electronic circuit.

2. the control circuit further controls a rising timing of a second pulse signal applied to a second control gate electrode of the multi-gate element, and adjusts the rising timing of the second pulse signal so that the transition time is shortened.

10. The electronic circuit of claim 1.

3. the control circuit adjusts the rising timing of the first pulse signal and the second pulse signal so as to minimize the transition time.

3. The electronic circuit of claim 2.

4. the rising timings of the first pulse signal and the second pulse signal are relative delay times with respect to the rising timing of a main pulse signal applied to a main gate electrode of the multi-gate element; 3. The electronic circuit of claim 2.

5. a voltage dividing circuit that divides the voltage between the first electrode and the second electrode; The voltage divided by the voltage divider circuit is input to the comparator circuit.

10. The electronic circuit of claim 1.

6. the voltage divider circuit includes two resistors, at least one of which is a variable resistor; 6. The electronic circuit of claim 5.

7. The comparison circuit a first comparator that compares the divided voltage with the first voltage and outputs a comparison result; a second comparator that compares the divided voltage with the second voltage and outputs a comparison result; Including, the control circuit obtains the transition time based on outputs of the first comparator and the second comparator.

6. The electronic circuit of claim 5.

8. the control circuit acquires the transition time based on a time from when the output of the first comparator changes to when the output of the second comparator changes.

8. The electronic circuit of claim 7.

9. further comprising an A / D converter that converts the divided voltage into a digital signal; the comparison circuit compares the digital signal of the divided voltage with the first voltage of a digital signal or the second voltage of a digital signal, and obtains the comparison result as a digital signal; 6. The electronic circuit of claim 5.

10. the rising timings of the first pulse signal and the second pulse signal are adjusted in a direction such that the transition time is shortened when the rising timings of the first pulse signal and the second pulse signal are changed by a predetermined amount; 3. The electronic circuit of claim 2.

11. the adjustment of the timing of the rise of the first pulse signal and the second pulse signal is terminated when a change in the transition time when the rise timing of the first pulse signal and the second pulse signal is changed by the predetermined amount becomes equal to or less than a predetermined value.

11. The electronic circuit of claim 10.

12. The rising timings of the first pulse signal and the second pulse signal are adjusted independently of each other.

3. The electronic circuit of claim 2.

13. the initial values ​​of the rising timings of the first pulse signal and the second pulse signal are set to timings at which the transition time is minimized when the rising timings of the first pulse signal and the second pulse signal are changed at predetermined step intervals.

3. The electronic circuit of claim 2.

14. the initial value of the rising timing of the second pulse signal is set, and then the initial value of the rising timing of the first pulse signal is set.

14. The electronic circuit of claim 13.

15. The comparison circuit a switch that selectively outputs either the first voltage or the second voltage in accordance with a switching signal input from the control circuit; a third comparator that compares the divided voltage with either the first voltage or the second voltage output from the switch and outputs a comparison result; Including, the control circuit causes the switch to output the first voltage, acquires a first elapsed time from a predetermined reference time until the output of the third comparator changes, then causes the switch to output the second voltage, acquires a second elapsed time from the reference time until the output of the third comparator changes, and acquires the transition time from a difference between the first elapsed time and the second elapsed time.

6. The electronic circuit of claim 5.

16. the reference time is a rising edge timing of a main pulse signal applied to a main gate electrode of the multi-gate element; 16. The electronic circuit of claim 15.

17. the control circuit further controls a rising timing of a second pulse signal applied to a second control gate electrode of the multi-gate element, and adjusts the rising timing of the second pulse signal so that the second elapsed time is shortened.

16. The electronic circuit of claim 15.

18. A method for driving a multi-gate device, comprising: obtaining a comparison result of a voltage related to a voltage between a first electrode and a second electrode of the multi-gate element with a first voltage or a second voltage less than the first voltage; obtaining a transition time, based on the comparison result, from when a voltage between the first electrode and the second electrode at the time of turning on the multi-gate device falls below the first voltage to when the voltage falls below the second voltage; adjusting a rising timing of the first pulse signal so as to reduce the transition time; method.

19. a multi-gate element; a control circuit for controlling a rising edge timing of a first pulse signal applied to a first control gate electrode of the multi-gate element; a comparison circuit for obtaining a comparison result between a voltage related to a voltage between the first electrode and the second electrode of the multi-gate element and a first voltage or a second voltage; Equipped with the control circuit acquires a transition time from when a voltage related to a voltage between the first electrode and the second electrode at the time of turning on the multi-gate element falls below the first voltage to when the voltage falls below the second voltage based on the comparison result, and adjusts a rising timing of the first pulse signal so as to shorten the transition time. Electronic systems.

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