Boost circuit and power supply

Abstract

To provide a boost circuit that can efficiently store energy in the preceding energy storage element. [Solution] The boost circuit 100, which receives a power storage detection signal from the power storage voltage detection circuit 13 when the power storage voltage of the power storage element 12 exceeds a predetermined voltage, includes a first boost unit 110 which has a buffer circuit pair 113, 114 with low leakage current and performs a first boost operation by the buffer circuit pair 113, 114 driven by the power stored in the power storage element 12 when the power storage detection signal is input, and outputs a first boost voltage, and a second boost unit 120 which has a buffer circuit pair 123, 124 with higher driving capability and higher leakage current than the buffer circuit pair 113, 114 and performs a second boost operation to generate a second boost voltage when the power stored in the power storage element 12 is supplied to the buffer circuit pair 123, 124 when the first boost voltage is input.

Description

Technical Field

[0001] The present invention relates to a boosting circuit and a power supply device.

Background Art

[0002] Energy harvesting technology is known that harvests various forms of minute energy such as heat and vibration around a person and converts it into electric power. As an example of realizing energy harvesting technology, a power supply device has been proposed in which a power storage element stores the generated power of a power generation element, and when the stored voltage due to the power storage becomes equal to or higher than the minimum operating voltage of a boosting circuit, the boosting circuit operates to apply a boosted voltage to a load (see, for example, Patent Document 1).

[0003] As a boosting circuit, for example, as a charge pump circuit that can be integrated, the Dickson type is widely known (see, for example, Non-Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Non-Patent Document 1

Non-Patent Document 2

[0005] One aspect of the present invention aims to provide a boost circuit that can efficiently store energy in the preceding energy storage element. [Means for solving the problem]

[0006] The boost circuit in one embodiment of the present invention is A boost circuit in which a charge detection signal is input from a charge voltage detection circuit when the charge voltage of a charge storage element exceeds a predetermined voltage, A first boost unit comprising a first buffer circuit pair with low leakage current, which, when the energy storage detection signal is input, performs a first boost operation using the first buffer circuit pair driven by the stored power of the energy storage element to output a first boosted voltage, and does not perform the first boost operation when the energy storage detection signal is not input, The second boost unit comprises a second buffer circuit pair having higher driving capability and larger leakage current than the first buffer circuit pair, wherein when the first boosted voltage is input from the first boost unit, the stored power of the energy storage element is supplied to the second buffer circuit pair to perform a second boost operation and generate a second boosted voltage, and when the first boosted voltage is not input, the stored power of the energy storage element is no longer supplied to the second buffer circuit pair. It holds. [Effects of the Invention]

[0007] According to one aspect of the present invention, it is possible to provide a boost circuit that can efficiently store energy in the preceding energy storage element. [Brief explanation of the drawing]

[0008] [Figure 1] Figure 1 is a block diagram showing a power supply device according to a first embodiment of the present invention. [Figure 2] Figure 2 is a block diagram showing a boost circuit in the first embodiment of the present invention. [Figure 3] Figure 3 is a circuit diagram showing the first boost unit in the first embodiment of the present invention. [Figure 4] Figure 4 is a circuit diagram showing the second boost unit in the first embodiment of the present invention. [Figure 5] Figure 5 is a block diagram showing a power supply device according to a second embodiment of the present invention. [Figure 6] Figure 6 is a block diagram showing a power supply unit using a conventional boost circuit. [Figure 7] Figure 7 is a circuit diagram showing the boost circuit of Figure 6. [Modes for carrying out the invention]

[0009] Below, we will first describe a conventional power supply device using a boost circuit, with reference to Patent Document 1 and Non-Patent Documents 1 and 2. Next, based on the configuration of this conventional power supply, we will describe several embodiments of a power supply using the boost circuit of the present invention.

[0010] Figure 6 is a block diagram showing a power supply unit using a conventional boost circuit. As shown in Figure 6, the conventional power supply unit 90 includes a power generation element 91, a power storage element 92, a power storage voltage detection circuit 93, and a boost circuit 900. In this power supply unit 90, the power generated by the power generation element 91 is stored in the power storage element 92, the power storage voltage detection circuit 93 detects the voltage resulting from the storage, and when the power storage voltage exceeds a predetermined voltage, the boost circuit 900 starts the boost operation and applies the boosted voltage to the load LD.

[0011] The power generation element 91 is a photoelectric conversion element such as a solar cell. This power generation element 91 outputs generated electric power from the output terminal to one end of the power storage element 92 via the node N1. Since the generated electric power of such a power generation element 91 is generally small, it is difficult to directly drive the load LD. Therefore, the power storage element 92 stores the generated electric power of the power generation element 91 and serves as a power source for the boost circuit 900.

[0012] The power storage element 92 is a capacitor that stores the generated electric power of the power generation element 91. One end of this power storage element 92 is connected to the node N1 and the other end is grounded. Connected to the node N1 are the output terminal of the power generation element 91, one end of the power storage element 92, the detection terminal of the power storage voltage detection circuit 93, and the boost circuit 900. The voltage at the node N1 is the stored voltage of the power storage element 92.

[0013] The power storage voltage detection circuit 93 detects whether or not the stored voltage of the power storage element 92 has reached a predetermined voltage or higher. Here, the predetermined voltage is the minimum operating voltage of the boost circuit 900, which means the lowest voltage among the voltages at which the boost circuit 900 can operate normally. When this power storage voltage detection circuit 93 detects that the stored voltage of the power storage element 92 has reached the minimum operating voltage of the boost circuit 900 or higher, it outputs a power storage detection signal to the boost circuit 900 via the node N2. Also, when the stored voltage of the power storage element 92 is lower than the minimum operating voltage of the boost circuit 900, the power storage voltage detection circuit 93 does not output a power storage detection signal to the boost circuit 900 and continues the detection operation until the stored voltage reaches the minimum operating voltage or higher.

[0014] When a power storage detection signal is input from the power storage voltage detection circuit 93, the boost circuit 900 starts a boosting operation using the power storage element 92 as a power source, and applies the generated boosted voltage to the load LD via the node N3 to drive the load LD. Also, if no power storage detection signal is input from the power storage voltage detection circuit 93, the boost circuit 900 waits until a power storage detection signal is input. Therefore, the boost circuit 900 intermittently applies a boosted voltage to the load LD, but the current consumption in the off state during this standby time may hinder efficient power storage operation.

[0015] FIG. 7 is a circuit diagram showing the boost circuit of FIG. 6. As shown in FIG. 7, the boost circuit 900 is a Dickson-type charge pump circuit that can be integrated. This boost circuit 900 includes a plurality of rectifying elements 901, a plurality of power storage elements 902, buffer circuits 903 and 904, a power storage element 905, and an oscillation circuit 906.

[0016] When a power storage detection signal is input from the power storage voltage detection circuit 93 of FIG. 6 to the boost circuit 900, complementary oscillation signals output from the oscillation circuit 906 to two nodes N5 and N6 are respectively output to the plurality of power storage elements 902 via the buffer circuits 903 and 904. Then, due to the charging and discharging of the plurality of power storage elements 902 while being rectified by the plurality of rectifying elements 901, power is stored in the power storage element 905, so the voltage at the node N3 is boosted. The voltage at this node N3 becomes the boosted voltage of the boost circuit 900.

[0017] The buffer circuits 903 and 904 and the oscillation circuit 906 are driven by the power storage voltage at the node N1, which has become a voltage equal to or higher than the minimum operating voltage of the boost circuit 900. Note that since the buffer circuits 903 and 904 operate in pairs, they may be referred to as the buffer circuit pair 903 and 904.

[0018] The plurality of rectifying elements 901 are formed by a plurality of diodes connected in series and are connected between the node N1 and the node N3.

[0019] The plurality of power storage elements 902 are formed by a plurality of capacitors, and one end of each capacitor is connected between each diode of the plurality of rectifying elements 901, respectively. The other ends of each capacitor are alternately connected to the output terminals of the buffer circuit pair 903 and 904, respectively.

[0020] The buffer circuit pair 903 and 904 is connected to node N1 and is powered by the energy storage element 92 shown in Figure 6. The complementary oscillation signal input from the oscillation circuit 906 is output to multiple energy storage elements 902 via the buffer circuit pair 903 and 904. This buffer circuit pair 903 and 904 may have internal MOS (Metal Oxide Semiconductor) transistors with high driving capability to enable high-speed charging and discharging of multiple energy storage elements 902. However, internal MOS transistors with high driving capability have low on-resistance values, resulting in large leakage currents, which makes it difficult to efficiently store energy in the energy storage elements 92 shown in Figure 6.

[0021] The energy storage element 905 is a capacitor that stores the boosted voltage from the boost circuit 900. One end of this energy storage element 905 is connected to node N3, and the other end is grounded. Multiple rectifier elements 901 have their output terminals connected to one end of a storage element 905 at node N3. The voltage at node N3 is the stored voltage of the storage element 905, and is also the boosted voltage of the boost circuit 900.

[0022] The oscillator circuit 906 is connected to the energy storage element 92 in Figure 6 via node N1. Furthermore, when the energy storage detection signal is output from the energy storage voltage detection circuit 93 via node N2, the oscillator circuit 906 starts a boost operation and outputs complementary oscillator signals to the buffer circuit pair 903 and 904 via the two nodes N5 and N6.

[0023] Next, we will explain the relationship between the on-resistance value and leakage current in the non-saturation region of a MOS transistor. The on-resistance Ron of a MOS transistor in the non-saturation region can be expressed by the following equation (1).

[0024]

number

[0025] Here, W is the gate width of the MOS transistor, and L is the channel length of the MOS transistor. Also, Vgs is the gate-source voltage of the MOS transistor, Vt is the threshold voltage of the MOS transistor, and Cox is the gate oxide capacitance per unit area.

[0026] From equation (1) above, by increasing the size ratio (W / L) of the MOS transistors, or by increasing the Vgs-Vt of the MOS transistors, the on-resistance value Ron can be reduced and the driving capability of the MOS transistors can be increased. On the other hand, even when a MOS transistor is in the off state, the leakage current flowing between the drain and source is proportional to the size ratio (W / L) of the MOS transistor, and therefore increases as the size ratio (W / L) of the MOS transistor increases. Furthermore, since this leakage current is proportional to the (Vgs-Vt) power of the natural logarithm, a low threshold voltage Vt is required to reduce the on-resistance value Ron, and as a result, the leakage current is known to increase (see Non-Patent Document 2, etc.).

[0027] In Figure 6, if Ig is the current generated by the power generation element 91, Is is the current consumed by the energy storage voltage detection circuit 93, and Ib(con) is the current consumed by the boost circuit 900 when it is off and in standby mode, then the energy storage current Ic(con) that the power generation element 91 uses to store energy in the energy storage element 92 can be expressed by the following equation (2).

[0028]

number

[0029] From equation (2) above, the stored current Ic(con) is the value obtained by subtracting the current consumption Is of the stored voltage detection circuit 93 and the current consumption Ib(con) of the boost circuit 900 in the off state during standby from the current Ig of the power generation current Ig of the power generation element 91. In other words, unless equation (3) below is satisfied, the stored element 92 cannot be charged with the power generated by the power generation element 91.

[0030]

number

[0031] Thus, in conventional boost circuits, if the internal MOS transistors of the buffer circuit pair have high driving capability, the leakage current increases, making it difficult to efficiently store energy in the energy storage element. This is even more difficult if the power generation element has low power generation capability and a small generated current Ig.

[0032] Therefore, in one embodiment of the boost circuit of the present invention, the boost section is divided into a front stage and a rear stage, and in the rear stage, which has a high boosting capacity, a pair of buffer circuits with high driving capacity is turned off when in standby mode, thereby preventing leakage current from flowing and enabling efficient storage of energy storage elements and voltage boosting. Furthermore, the boost section of the front stage only needs to have the capacity to boost the voltage to just enough to turn the switching elements connected to the power line of the buffer circuit pair in the rear stage on and off, and a pair of buffer circuits with low driving capacity is sufficient, thus reducing leakage current. As a result, one embodiment of the boost circuit in the present invention can reduce leakage current compared to conventional boost circuits, and therefore, even with a power generation element that has low power generation capacity and a small generated current Ig, it can efficiently store energy in the storage element, boost the voltage, and drive the load.

[0033] The embodiments for carrying out the present invention will be described in detail below with reference to the drawings. In drawings, identical components are denoted by the same reference numeral, and redundant explanations may be omitted.

[0034] (First Embodiment) Figure 1 is a block diagram showing a power supply device according to a first embodiment of the present invention. As shown in Figure 1, the power supply device 10 in this embodiment includes a power generation element 11, a power storage element 12, a power storage voltage detection circuit 13, and a boost circuit 100. Comparing this power supply device 10 with the conventional power supply device 90 shown in Figure 6, the boost circuit 100 differs from the boost circuit 900. Since the power generation element 11 is the same as the power generation element 91, the energy storage element 12 is the same as the energy storage element 92, and the energy storage voltage detection circuit 13 is the same as the energy storage voltage detection circuit 93, their descriptions will be omitted.

[0035] The load LD can be selected as appropriate without any particular limitations, but a wireless communication module is preferred, for example, because it can form a "self-generating remote sensor device". If the load LD is a wireless communication module, when the power generation element 11 is generating power, communication from the wireless communication module will be frequent, and when it is not generating power, communication from the wireless communication module will be interrupted, thus forming a "self-generating remote sensor device" where the frequency of communication becomes the sensor sensitivity. The power supply device 10 is provided in a portable device capable of wireless communication and supplies the power generated by the power generation element 11 to the wireless communication module.

[0036] Figure 2 is a block diagram showing a boost circuit in the first embodiment of the present invention. As shown in Figure 2, the boost circuit 100 in this embodiment includes a first boost unit 110 with low boosting capability, a second boost unit 120 with high boosting capability, and an oscillation circuit 130. The boost circuit 100 is driven by the stored power of the energy storage element 12 supplied from node N1.

[0037] When the boost circuit 100 receives a charge detection signal from the charge detection circuit 13 shown in Figure 1 via node N2, the oscillator circuit 130 outputs complementary oscillation signals via two nodes N4 and N5, causing the first boost unit 110 to perform a boost operation and generate a first boosted voltage. Next, when the first boost unit 110 outputs the first boosted voltage to the second boost unit 120 via node N6, the second boost unit 120 turns on and applies the generated second boosted voltage to the load LD shown in Figure 1 via node N3, driving the load LD.

[0038] The second boost unit 120 may be operated by an oscillation signal from an oscillation circuit separate from the oscillation circuit 130. However, by using the same oscillation circuit as the first boost unit 110, the number of oscillation circuits can be reduced, thereby reducing the current consumption of the boost circuit 100.

[0039] Figure 3 is a circuit diagram showing the first boost unit in the first embodiment of the present invention. As shown in Figure 3, the first boost unit 110 includes a plurality of rectifier elements 111, a plurality of energy storage elements 112, buffer circuits 113 and 114 as a first buffer circuit pair, and an energy storage element 115. Buffer circuits 113 and 114 are driven by the stored power of the energy storage element 12 supplied from node N1. Furthermore, buffer circuits 113 and 114 perform a first boost operation when they receive complementary oscillation signals output by the oscillation circuit 130 via nodes N4 and N5, generating a first boosted voltage using multiple rectifier elements 111, multiple energy storage elements 112, and energy storage element 115. Since buffer circuits 113 and 114 operate as a pair, they are sometimes referred to as the buffer circuit pair 113 and 114.

[0040] The multiple rectifier elements 111 and multiple energy storage elements 112 are smaller than the conventional multiple rectifier elements 901 and multiple energy storage elements 902. Furthermore, the energy storage element 115 is smaller than the conventional energy storage element 905. Furthermore, the oscillator circuit 906 shown in Figure 7 corresponds to the oscillator circuit 130 shown in Figure 2, and therefore is not shown in Figure 3.

[0041] When the first boost unit 110 receives a charge detection signal from the charge voltage detection circuit 13, it starts boosting the voltage using the charge storage element 12 as a power source and outputs the generated first boosted voltage to the second boost unit 120 via node N6. If the first boost unit 110 does not receive a charge detection signal from the charge voltage detection circuit 13, it waits until a charge detection signal is output. Therefore, the first boost unit 110 intermittently applies the first boosted voltage to the second boost unit 120. This first boosted voltage acts as a trigger to intermittently turn on the second boost unit 120.

[0042] Figure 4 is a circuit diagram showing the second boost unit in the first embodiment of the present invention. As shown in Figure 4, the second boost unit 120 includes a plurality of rectifier elements 121, a plurality of energy storage elements 122, buffer circuits 123 and 124 as a second buffer circuit pair, a switching element 125 as a first switching element, and an energy storage element 126. Buffer circuits 123 and 124 are driven by the stored power of the energy storage element 12 supplied from node N1. Furthermore, buffer circuits 123 and 124 perform a second boost operation when complementary oscillation signals output by the oscillation circuit 130 via nodes N4 and N5 are input, generating a second boosted voltage with multiple rectifier elements 121, multiple energy storage elements 122 and 126. Note that buffer circuits 123 and 124 operate as a pair and are sometimes referred to as buffer circuit pair 123 and 124.

[0043] Comparing this second boost unit 120 with the conventional boost circuit 900 shown in Figure 7, the difference is that a switching element 125 is connected between the grounding terminals of the buffer circuit pairs 123 and 124 and GND. Furthermore, the buffer circuit pairs 123 and 124 of the second boost unit 120 are identical to the conventional buffer circuit pairs 903 and 904, and the multiple rectifier elements 121 and multiple energy storage elements 122 are identical to the conventional multiple rectifier elements 901 and multiple energy storage elements 902, so this explanation will be omitted.

[0044] The switching element 125 is a MOS transistor, with its drain connected to the ground terminals of buffer circuit pairs 123 and 124, its gate connected to the output terminal of the first boost unit 110 in Figure 3 via node N6, and its source grounded. In other words, this switching element 125 is provided on the power lines of buffer circuit pairs 123 and 124 and can be switched on and off using the first boost voltage. Specifically, when the switching element 125 is turned on, the stored power of the energy storage element 12 is supplied to buffer circuit pairs 123 and 124, and when it is turned off, the stored power of the energy storage element 12 is no longer supplied to buffer circuit pairs 123 and 124. The MOS transistor used as the switching element 125 has a larger source-gate potential difference when turned on than the internal MOS transistors 123 and 124 in the buffer circuit. Therefore, the MOS transistor used as the switching element 125 can have a smaller leakage current than conventional MOS transistors.

[0045] When the first boosted voltage is input to the switching element 125 from the first boosted voltage unit 110 in Figure 3 via node N6, the switching element 125 of the second boosted voltage unit 120 turns on. Then, the buffer circuit pair 123 and 124 of the second boosted voltage unit 120 performs a second boost operation to generate a second boosted voltage, and the second boosted voltage is applied to the load LD in Figure 1 via node N3. Furthermore, when the first boosted voltage is not input to the second boosted voltage unit 120, the switching element 125 turns off, so almost no leakage current flows through the buffer circuit pair 123 and 124.

[0046] Furthermore, the first boosted voltage input to the switching element 125 only needs to be sufficient to turn the switching element 125 on or off, so the boosting capability of the first boost unit 110 can be lower than that of the second boost unit 120. This is because only a voltage sufficient to turn on the switching element 125 of the second boost unit 120 needs to be applied to the gate, requiring almost no current. In other words, the buffer circuits 113 and 114 can have a smaller driving capability than the conventional buffer circuits 903 and 904. A smaller driving capability for the buffer circuits allows for a smaller size ratio (W / L) of the MOS transistors within the buffer circuits, so the leakage current in the off state during standby can be significantly reduced compared to the conventional boost circuit 900.

[0047] Next, we will describe the leakage current of a conventional boost circuit and the leakage current of this embodiment. The leakage current Il(con) of the conventional boost circuit 900 is the sum of the leakage current Ilo of the oscillator circuit 906, the leakage current Ilb1 of the buffer circuit 903, and the leakage current Ilb2 of the buffer circuit 904, as shown in equation (4) below.

[0048]

number

[0049] On the other hand, the leakage current Il of the boost circuit 100 in this embodiment is the sum of the leakage current Ilo of the oscillator circuit 130, the leakage current Il1 of the buffer circuit pair 113 and 114, and the leakage current Il2 of the buffer circuit pair 123 and 124, as shown in equation (5) below. Note that the leakage current Ilo of the oscillator circuit 130 is the same as the leakage current Ilo(con) of the conventional oscillator circuit 906.

[0050]

number

[0051] Here, the leakage current Il2 of the buffer circuit pair 123, 124 of the second boost unit 120 is almost zero. Therefore, the leakage current Il1 of the buffer circuit pair 113, 114 of the first boost unit 110 is much smaller than the sum of the leakage currents of the buffer circuit pair 903, 904 of the conventional boost circuit 900, "Ilb1 + Ilb2", so the following equation holds: Il(con)≫Il.

[0052] Furthermore, if Ig is the generated current of the power generation element 11, Is is the current consumed by the storage voltage detection circuit 13, and Ib is the current consumed by the boost circuit 100 in the off state during standby, then the storage current Ic that the power generation element 11 uses to store energy in the storage element 12 can be expressed by the following equation (6).

[0053]

number

[0054] Thus, the boost circuit 100 of this embodiment has a first boost section 110 and a second boost section 120, which divide the boost section that uses the energy storage element 12 as a power source into a front and rear section. The first boost unit 110 is equipped with buffer circuits 113 and 114 that have lower driving capability and lower leakage current than conventional buffer circuits 903 and 904. When a charge detection signal is input from the charge voltage detection circuit 13, the first boost unit 110 performs a first boost operation and outputs a first boosted voltage to the second boost unit 120, and does not perform the first boost operation when no charge detection signal is input. The second boost unit 120 includes buffer circuit pairs 123 and 124, which have higher driving capability and larger leakage current than buffer circuit pairs 113 and 114. When the first boosted voltage is input from the first boost unit 110, the buffer circuit pairs 123 and 124 are turned on in the second boost unit 120 to generate a second boosted voltage, and when the first boosted voltage is not input, the buffer circuit pairs 123 and 124 are turned off.

[0055] As a result, this boost circuit 100 can reduce the leakage current of the first boost unit 110 and reduce the leakage current of the second boost unit 120 to almost zero. Therefore, the boost circuit 100 can reduce the leakage current compared to the conventional boost circuit 900, so even with a power generation element that has low power generation capacity and a small generated current Ig, it can efficiently store energy in the energy storage element 12, boost the voltage, and drive the load LD.

[0056] (Second embodiment) Figure 5 is a block diagram showing a power supply device according to a second embodiment of the present invention. As shown in Figure 5, the power supply unit 20 in the second embodiment is the same as the power supply unit 10 in the first embodiment shown in Figure 1, except that it further includes a boost voltage detection circuit 14 and a switching element 15. The difference between power supply unit 10 and power supply unit 20 is that the boost voltage detection circuit 14 detects a second boost voltage, and when it reaches a voltage that is above the voltage at which the load LD can operate normally, the switching element 15 is turned on to drive the load LD.

[0057] Node N7 is connected to the output terminal of the boost circuit 100, one end of the load LD, and the detection terminal of the boost voltage detection circuit 14. The voltage at node N7 is the second boost voltage generated by the second boost unit 120, and is monitored by the boost voltage detection circuit 14 until it reaches a voltage that allows the load LD to operate normally.

[0058] When the voltage at node N7 becomes a second boosted voltage above a predetermined voltage, the boost voltage detection circuit 14 outputs a power storage detection signal from its output terminal to the switching element 15 via node N8. Here, the specified voltage refers to the voltage at which the load LD can operate normally.

[0059] The switching element 15 is a MOS transistor, with its drain connected to the ground side of the load LD, its gate connected to the output terminal of the boost voltage detection circuit 14 via node N8, and its source grounded. This switching element 15 has a high threshold voltage, similar to the switching element 125 of the first embodiment.

[0060] Thus, in the second embodiment, the boost voltage detection circuit 14 detects the second boost voltage, and when it reaches a voltage that is above the voltage at which the load LD can operate normally, the switching element 15 is turned on to operate the load LD. In the first embodiment, if the leakage current of the load LD is large, it becomes difficult to boost the second boost voltage, but in the second embodiment, the switching element 15 blocks the leakage current of the load LD until the second boost voltage reaches a predetermined voltage or higher. As a result, the power supply unit 20 can efficiently operate the load even when the leakage current of the load LD is large.

[0061] As described above, in one embodiment of the present invention, the boost circuit receives a charge detection signal from the charge voltage detection circuit when the charge voltage of the charge storage element exceeds a predetermined voltage. This boost circuit has a first boost unit and a second boost unit. The first boost unit is equipped with a first buffer circuit pair having low driving capability and low leakage current. When the charge detection signal is input, the first buffer circuit pair performs a first boost operation driven by the charge storage power of the charge storage element and outputs a first boosted voltage, but does not perform the first boost operation when the charge detection signal is not input. The second boost unit is equipped with a second buffer circuit pair having higher driving capability and larger leakage current than the first buffer circuit pair. When the first boosted voltage is input from the first boost unit, the second boost unit performs a second boost operation by supplying the charge storage power of the charge storage element to the second buffer circuit pair and generates a second boosted voltage. Furthermore, if the first boosted voltage is not input, the stored power of the energy storage element will no longer be supplied to the second buffer circuit pair.

[0062] As a result, this boost circuit can reduce the leakage current of the first boost section and reduce the leakage current of the main second boost section to almost zero, allowing for efficient energy storage in the preceding energy storage element even if the power generation capacity of the power generation element is low.

[0063] Although various embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and various modifications are possible without departing from the spirit of the invention.

[0064] For example, in each embodiment, the stored voltage detection circuit and the boost circuit can all be integrated, and by integrating them, the boost circuit can be made smaller and lighter, making it easier to apply to IoT devices and the like. Furthermore, although the power generation element in each embodiment is a photoelectric conversion element, it is not limited to this as long as it is an element that can convert some kind of energy into electricity. For example, thermoelectric conversion elements such as Peltier elements, magnetoelectric conversion elements such as Hall elements, etc., may also be used. Furthermore, while the load was a wireless communication module in each embodiment, it is not limited to this. In Figure 3, a discharge element, such as a high-resistance resistor, may be connected between node N6, which is connected to the output terminal of the first boost unit 110, and GND. Furthermore, the stored voltage detection circuit and the boost voltage detection circuit may be configured to have hysteresis in the detected voltage and the release voltage. [Explanation of Symbols]

[0065] 10, 20 Power supply 11 Power generation element 12 Energy storage elements 13. Storage Voltage Detection Circuit 14. Boost Voltage Detection Circuit 15. Switching element (second switching element) 100 Boost Circuit 110 First boost section 111 Multiple rectifier elements 112 Multiple energy storage elements 113, 114 Buffer circuits (first buffer circuit pair) 115 Energy storage element 120 Second boost section 121 Multiple rectifier elements 122 Multiple energy storage elements 123, 124 Buffer circuits (second buffer circuit pair) 125 Switching element (first switching element) 130 Oscillator Circuit LD load N1, N2, N3, N4, N5, N6, N7, N8 nodes

Claims

1. A boost circuit in which a charge detection signal is input from a charge voltage detection circuit when the charge voltage of a charge storage element exceeds a predetermined voltage, A first boost unit comprising a first buffer circuit pair with low leakage current, which, when the energy storage detection signal is input, performs a first boost operation using the first buffer circuit pair driven by the stored power of the energy storage element to output a first boosted voltage, and does not perform the first boost operation when the energy storage detection signal is not input, The second boost unit comprises a second buffer circuit pair having higher driving capability and larger leakage current than the first buffer circuit pair, wherein when the first boost voltage is input from the first boost unit, the stored power of the energy storage element is supplied to the second buffer circuit pair to perform a second boost operation and generate a second boost voltage, and when the first boost voltage is not input, the stored power of the energy storage element is no longer supplied to the second buffer circuit pair. A boost circuit characterized by having the following features.

2. The boost circuit according to claim 1, further comprising a first switching element provided on the power line of the second buffer circuit pair, which is turned on by the first boost voltage to supply the stored power of the energy storage element.

3. The first switching element described above is a MOS transistor. The boost circuit according to claim 2, wherein the MOS transistor has a larger source-to-gate potential difference when turned on than the internal MOS transistors of the first buffer circuit pair and the second buffer circuit pair.

4. The boost circuit according to claim 3, wherein the first boost voltage is applied to the gate of the MOS transistor, which serves as the first switching element.

5. The boost circuit according to claim 1, wherein the first boost operation and the second boost operation are performed by an oscillation signal from a common oscillation circuit.

6. A power generation element that outputs generated power, A storage element for storing the power generated by the power generation element, A storage voltage detection circuit that outputs a storage detection signal when the storage voltage of the storage element is above a predetermined voltage, and does not output a storage detection signal when the storage voltage is below a predetermined voltage, A boost circuit according to any one of claims 1 to 5, wherein when the energy storage detection signal is input from the energy storage voltage detection circuit, the boost circuit generates a second boost voltage by a second boost operation triggered by the first boost voltage generated by the first boost operation, using the energy storage element as a power source, and when the energy storage detection signal is not input, the boost circuit does not perform the first boost operation. The load to which the second boosted voltage is applied, A power supply device characterized by having the following features.

7. A boost voltage detection circuit that outputs a boost detection signal when the second boost voltage is above a predetermined voltage, and does not output the boost detection signal when the second boost voltage is below a predetermined voltage, A second switching element connected in series with the load and capable of being switched on or off by the boost detection signal, The power supply device according to claim 6, further comprising the following:

8. The power supply device according to claim 6, wherein the load is a wireless communication module.

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