Electronic modules and electronic equipment

Abstract

This technology offers advantages in stabilizing the operation of analog circuits in semiconductor devices. [Solution] The electronic module comprises a semiconductor element having an analog circuit and a digital circuit, and a wiring unit having a mounting surface on which the semiconductor element is mounted, and including a first power wiring used to supply power to the analog circuit, a second power wiring used to supply power to the digital circuit, and a third power wiring used to supply power to the digital circuit. The first power wiring has two or more first power wiring patterns arranged on two or more wiring layers of the wiring unit. The second power wiring has two or more second power wiring patterns arranged on two or more wiring layers of the wiring unit. The distance between the first wiring pattern with the largest area among the two or more first power wiring patterns and the second wiring pattern with the largest area among the two or more second power wiring patterns is 500 μm or more.

Description

[Technical Field]

[0001] This disclosure relates to electronic modules and electronic devices comprising semiconductor elements having analog and digital circuits. [Background technology]

[0002] Patent Document 1 discloses an imaging device comprising a pixel circuit, an analog signal processing circuit, and a digital signal processing circuit as a semiconductor element having analog and digital circuits. It is disclosed that power supply potentials DVDD, SVDD, AVDD and reference potentials (ground potentials) DGND, SGND, AGND are supplied externally. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2015-126385 [Overview of the project] [Problems that the invention aims to solve]

[0004] If potential fluctuations in power wiring connected to one of the analog or digital circuits affect the potential of power wiring connected to the other of the analog or digital circuits, it may lead to unstable operation of semiconductor elements, such as performance degradation or malfunction of the analog and / or digital circuits.

[0005] This disclosure provides a technology that is advantageous for stabilizing the operation of semiconductor devices. [Means for solving the problem]

[0006] A first aspect of the present disclosure is an electronic module comprising: a semiconductor element having an analog circuit and a digital circuit; and a wiring unit having a mounting surface on which the semiconductor element is mounted, and including a first power wiring used to supply power to the analog circuit, a second power wiring used to supply power to the digital circuit, and a third power wiring used to supply power to the digital circuit, wherein the first power wiring has two or more first power wiring patterns arranged on two or more wiring layers of the wiring unit, the second power wiring has two or more second power wiring patterns arranged on two or more wiring layers of the wiring unit, and the distance between the first wiring pattern with the largest area among the two or more first power wiring patterns and the second wiring pattern with the largest area among the two or more second power wiring patterns is 500 μm or more.

[0007] A second aspect of the present disclosure is an electronic module comprising: a semiconductor element having an analog circuit and a digital circuit; and a wiring unit having a mounting surface on which the semiconductor element is mounted, and including a first power wiring used to supply power to the analog circuit and a second power wiring used to supply power to the digital circuit, wherein the first power wiring has two or more first power wiring patterns arranged on two or more wiring layers of the wiring unit, the second power wiring has two or more second power wiring patterns arranged on two or more wiring layers of the wiring unit, and the distance between the first wiring pattern with the largest area among the two or more first power wiring patterns and the second wiring pattern with the largest area among the two or more second power wiring patterns is 900 μm or more.

[0008] A third aspect of the present disclosure is an electronic module comprising: a semiconductor element having an analog circuit and a digital circuit; and a wiring unit having a mounting surface on which the semiconductor element is mounted, and including a first power wiring used to supply power to the analog circuit and a second power wiring used to supply power to the digital circuit, wherein the first power wiring has two or more first power wiring patterns arranged on two or more wiring layers of the wiring unit, the second power wiring has two or more second power wiring patterns arranged on two or more wiring layers of the wiring unit, the wiring unit has a first wiring board and a second wiring board stacked on top of each other, the first wiring pattern with the largest area among the two or more first power wiring patterns is provided on the first wiring board, and the second wiring pattern with the largest area among the two or more second power wiring patterns is provided on the second wiring board. [Effects of the Invention]

[0009] This disclosure provides a technology that is advantageous for stabilizing the operation of analog circuits in semiconductor devices. [Brief explanation of the drawing]

[0010] [Figure 1] This is an explanatory diagram of a digital camera, which is an example of a system to which the module according to the first embodiment is applied. [Figure 2] (a) is an explanatory diagram of the imaging module according to the first embodiment. (b) is an explanatory diagram of the imaging module according to the first embodiment. (c) is an explanatory diagram of the imaging module according to the first embodiment. [Figure 3] This is a schematic cross-sectional view of the imaging module according to the first embodiment. [Figure 4] (a) is an explanatory diagram of a semiconductor element according to the first embodiment. (b) is an explanatory diagram of the wiring configuration connected to the pixel according to the first embodiment. [Figure 5] This is a schematic perspective view of the connecting member according to the first embodiment. [Figure 6](a) is an explanatory diagram of a part of an analog power supply wiring according to the first embodiment. (b) is an explanatory diagram of a part of a digital power supply wiring according to the first embodiment. [Figure 7] (a) is an explanatory diagram of one wiring layer of the first wiring board according to Modification 1. (b) is a partial cross-sectional view of an imaging module according to Modification 1. [Figure 8] It is a schematic cross-sectional view of an imaging module according to Modification 2. [Figure 9] (a) is a perspective view of two connection members of a wiring unit of an imaging module according to the second embodiment. (b) is a perspective view of two connection members of a wiring unit of an imaging module according to Modification 4. [Figure 10] It is a schematic cross-sectional view of an imaging module according to the third embodiment. [Figure 11] (a) is a schematic cross-sectional view of an imaging module according to the fourth embodiment. (b) is a schematic cross-sectional view of an imaging module of Comparative Example 1.

Mode for Carrying Out the Invention

[0011] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the drawings. The embodiments shown below are examples, and for example, regarding the detailed configuration, those skilled in the art can appropriately change and implement it without departing from the gist of the present invention.

[0012] In the drawings referred to in the following description of the embodiments, unless otherwise specified, elements denoted by the same reference numerals have the same functions. In the drawings, when a plurality of the same elements are arranged, the assignment of reference numerals and their descriptions may be omitted. Also, for the convenience of illustration and explanation, the drawings may be schematically represented, so the shapes, sizes, and arrangements of the elements shown in the drawings do not necessarily exactly match the elements shown in other drawings and actual objects.

[0013] In the following embodiments, directions are indicated by the XYZ coordinate system, which is a Cartesian coordinate system. The X, Y, and Z axes are orthogonal to each other. The direction of the X axis is also called the X direction, the direction of the Y axis is also called the Y direction, and the direction of the Z axis is also called the Z direction. For example, when referring to the positive direction of the X axis, it refers to the same direction as indicated by the X-axis arrow in the illustrated coordinate system, and when referring to the negative direction of the X axis, it refers to the direction 180° opposite to the direction indicated by the X-axis arrow in the illustrated coordinate system. Furthermore, when simply referring to the X direction, it refers to the direction parallel to the X axis, regardless of whether it is the same as or different from the direction indicated by the X-axis arrow in the illustrated coordinate system. The same applies to the Y and Z axes other than the X axis. For example, a plane containing the X and Y axes is expressed as the XY plane. The same applies to the XZ plane and the YZ plane.

[0014] [First Embodiment] Figure 1 is an explanatory diagram of a digital camera 1000, which is an example of a system to which the electronic module according to the first embodiment is applied. In this example, the digital camera 1000 is a lens-interchangeable digital camera and comprises a camera body 1001, which is an electronic device. A lens unit 1002, including a lens, is detachable from the camera body 1001. Note that the digital camera 1000 is not limited to a lens-interchangeable digital camera, but may also be a lens-integrated digital camera in which the camera body 1001 and the lens unit 1002 are integrated. The camera body 1001 comprises an outer casing 1011 and an imaging module 100 and a processing module 700 arranged inside the outer casing 1011. The imaging module 100 is an example of a first electronic module, and the processing module 700 is an example of a second electronic module. The imaging module 100 and the processing module 700 are electrically connected via a wiring component 950. The wiring component 950 preferably has flexibility (flexibility), such as a flexible printed circuit board or a flexible flat cable. The signal indicating the image data generated in the imaging module 100 is transmitted to the processing module 700 via the wiring component 950.

[0015] The processing module 700 includes a printed circuit board 701 and an image processing device 702 mounted on the printed circuit board 701. The image processing device 702 is, for example, a digital signal processor. The image processing device 702 is a semiconductor element such as a semiconductor package, and is also an integrated circuit component. The image processing device 702 is configured to perform image processing on image data acquired from the imaging module 100.

[0016] Figures 2(a), 2(b), and 2(c) are explanatory diagrams of the imaging module 100 according to the first embodiment. Figure 3 is a schematic cross-sectional view of the imaging module 100 according to the first embodiment. Figure 3 shows a schematic cross-section of the imaging module 100 along a virtual plane parallel to the XZ plane, including line AA' in Figure 2(a). The configuration of the imaging module 100 will now be described.

[0017] Figure 2(a) is a perspective view of the imaging module 100. The imaging module 100 is an example of an electronic module and has a three-dimensional mounting structure. The imaging module 100 comprises a semiconductor element 10 which is an image sensor and a wiring unit 150 on which the semiconductor element 10 is mounted.

[0018] The wiring unit 150 comprises a wiring board 200, a wiring board 300, and at least one connecting member connecting the wiring boards 200 and 300. In the first embodiment, the at least one connecting member is a plurality (e.g., four) of connecting members 400. The connecting members 400 are wiring members. The semiconductor element 10 is also an integrated circuit component including a semiconductor chip. The semiconductor element 10 is mounted on the wiring board 200.

[0019] The wiring board 200 is a printed circuit board. The wiring board 200 is, for example, a rigid substrate. The wiring board 200 has two main surfaces 221 and 222. The semiconductor element 10 is mounted on the main surface 221 of the wiring board 200. That is, the main surface 221 is the mounting surface of the wiring unit 150 on which the semiconductor element 10 is mounted. The main surface 222 is the main surface opposite to the main surface 221. The main surface 222 is parallel to the main surface 221. The Z direction is perpendicular to the main surface 221. The X and Y directions are parallel to the main surface 221.

[0020] The wiring board 300 is a printed circuit board. The wiring board 300 is, for example, a rigid substrate. The wiring board 300 has two main surfaces 321 and 322. Main surface 321 is the main surface opposite to main surface 322. Main surface 322 is parallel to main surface 321. In the Z direction, at least a portion of the wiring board 200 and at least a portion of the wiring board 300 overlap. The wiring board 300 is positioned on the side of the main surface 222 of the wiring board 200. The main surface 321 of the wiring board 300 faces the side of the main surface 222 of the wiring board 200. In this way, the wiring board 200 is positioned between the semiconductor element 10 and the wiring board 300.

[0021] The wiring board 200 and the wiring board 300 are stacked on top of each other via multiple connecting members 400. In other words, the wiring unit 150 has a three-dimensional mounting structure in which the wiring board 200 and the wiring board 300 are stacked on top of each other in the Z direction via multiple connecting members 400.

[0022] Here, the Z direction is also the direction in which the imaging module 100 is viewed from above. Furthermore, viewing in the Z direction, i.e., viewing from above, includes looking through in the Z direction. Also, the expression "in the Z direction" may include "viewing in the Z direction".

[0023] Multiple connecting members 400 are arranged between the main surface 222 of the wiring board 200 and the main surface 321 of the wiring board 300. This creates a gap 15 between the wiring boards 200 and 300. Circuit components (not shown) may be placed in this gap 15.

[0024] The connecting member 400 is a plate-shaped member. The connecting member 400 is a printed circuit board smaller than the wiring boards 200 and 300. The connecting member 400 is, for example, a rigid substrate in the shape of a rectangular parallelepiped. The connecting member 400 is placed between the wiring boards 200 and 300 and is used for electrical and mechanical connections between them. The connecting member 400 also functions as a spacer between the wiring boards 200 and 300.

[0025] The semiconductor element 10 is rectangular in shape when viewed in the Z direction. On the main surface 222 of the wiring board 200 opposite to the main surface 221 on which the semiconductor element 10 is mounted, the connecting surface 431 on one end in the Z direction of the connecting member 400 is connected by a bonding member such as solder (not shown). The connecting surface 432 on the other end in the Z direction of the connecting member 400 is connected to the main surface 321 of the wiring board 300 by a bonding member such as solder (not shown).

[0026] On the main surface 221 of the wiring board 200 on which the semiconductor element 10 is mounted, a plurality of pads 12 are provided along the outer circumference of the semiconductor element 10. That is, the plurality of pads 12 are arranged along the four sides of the semiconductor element 10. The semiconductor element 10 is electrically connected to the plurality of pads 12 by a plurality of wires 11. Each of the plurality of wires 11 is a bonding wire that forms an air-to-air wiring. That is, the plurality of wires 11 are bonded to the semiconductor element 10 and the main surface 221. The semiconductor element 10 may include a chip and a package which is a container for housing the chip, and the chip may be wire-bonded to the package. In that case, the leads and lands of the package may be soldered to the pads on the main surface 221.

[0027] The semiconductor element 10 receives power from the wiring board 200 via corresponding pads 12 and corresponding wires 11. The semiconductor element 10 also exchanges signals with the wiring board 200 via corresponding pads 12 and corresponding wires 11.

[0028] Figure 4(a) is an explanatory diagram of the semiconductor element 10 according to the first embodiment. The semiconductor element 10 has an analog circuit 21 and a digital circuit 31. The semiconductor element 10 is an image sensor configured to, for example, convert an imaged optical image into photoelectric power. The semiconductor element 10 is an image sensor such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor or a CCD (Charge Coupled Device) image sensor.

[0029] The analog circuit 21 is a circuit that outputs a continuous change in charge or voltage, and is a circuit in which fluctuations in the power supply's potential directly affect the output of sensors, etc. The digital circuit 31 is a circuit other than the analog circuit 21, and is a circuit related to digital signals and logic circuits.

[0030] The semiconductor element 10 may be a stacked semiconductor element having two or more chips, where the two or more chips are stacked on top of each other in the Z direction. The analog circuit 21 is included in one of the two chips (the first chip), and the digital circuit 31 is included in the other chip (the second chip). By using two chips, the digital circuit 31 can be scaled up. However, as the functionality of the digital circuit increases, the circuit size tends to increase, and the amount of current flowing through the digital circuit tends to increase, so this embodiment is preferable. Of course, the semiconductor element 10 is not limited to a stacked type; it may also be an integrated analog circuit 21 and digital circuit 31 on a single semiconductor layer.

[0031] The analog circuit 21 of the semiconductor element 10 is connected to the analog power supply wiring 22 and the ground wiring 23 via the internal wiring of the semiconductor element 10. The analog power supply wiring 22 and the ground wiring 23 are used to supply power to the analog circuit 21. The power supply IC 40 supplies the power necessary for circuit operation to the analog circuit 21 via the analog power supply wiring 22 and the ground wiring 23.

[0032] Digital power supply wiring 32 and ground wiring 33 are connected to the digital circuit 31 of the semiconductor element 10 via the internal wiring of the semiconductor element 10. The digital power supply wiring 32 and ground wiring 33 are used to supply power to the digital circuit 31. Power required for circuit operation is supplied from the power supply IC 40 to the digital circuit 31 via the digital power supply wiring 32 and ground wiring 33. That is, analog power supply wiring 22 is used to supply power to the analog circuit 21, and digital power supply wiring 32 is used to supply power to the digital circuit 31. Analog power supply wiring 22 is an example of first power wiring. Digital power supply wiring 32 is an example of second power wiring. Ground wiring 33 is an example of third power wiring. Ground wiring 23 is an example of fourth power wiring.

[0033] The analog circuit 21 is supplied with a power supply potential (first power supply potential) via analog power supply wiring 22, and a reference potential is supplied via ground wiring 23. The reference potential supplied to the analog circuit 21 is, for example, the ground potential.

[0034] Furthermore, the digital circuit 31 is supplied with a power supply potential (second power supply potential) via the digital power supply wiring 32, and a reference potential is supplied via the ground wiring 33. The reference potential supplied to the digital circuit 31 is, for example, the ground potential. The potential of the analog power supply wiring 22 is different from the potential of the ground wiring 33.

[0035] The power supply potential supplied to the analog circuit 21 (the potential of the analog power supply wiring 22) may be greater than or equal to the power supply potential supplied to the digital circuit 31 (the potential of the digital power supply wiring 32). For example, the potential of the analog power supply wiring 22 is 3.3V, and the potential of the digital power supply wiring 32 is 1.8V. Typically, the potentials of the analog power supply wiring 22 and the digital power supply wiring 32 are different, but they may be the same. The power supply potential and reference potential transmitted by the wiring unit 150 may be converted in a boost or buck circuit within the semiconductor element 10 before being supplied to the analog circuit 21 and the digital circuit 31.

[0036] The reference potential supplied to the analog circuit 21 (the potential of the ground wiring 23) and the reference potential supplied to the digital circuit 31 (the potential of the ground wiring 33) may be different from or the same as each other.

[0037] Furthermore, the reference potential supplied to the analog circuit 21 and / or the reference potential supplied to the digital circuit 31 may be different from the ground potential of the entire camera. For example, in the analog circuit 21, the reference potential is the potential supplied to the wells of the photodiodes and transistors of the pixels, but this reference potential may be a different potential from the ground potential of the entire camera, for example, a negative potential.

[0038] Furthermore, if the third power line, the ground line 33, and the fourth power line, the ground line 23, are at the same potential, the ground line 33 and the ground line 23 may be composed of a single power line. In other words, the third power line used to supply power to the digital circuit 31 may also be used to supply power to the analog circuit 21.

[0039] The analog power supply wiring 22 and the digital power supply wiring 32 are arranged in the wiring unit 150 shown in Figure 2(a). Although the analog power supply wiring 22 and the digital power supply wiring 32 are connected to the same power supply IC 40, this is not the only option; for example, they may be connected to separate power supply ICs.

[0040] The analog circuit 21 of the semiconductor element 10 has a plurality of pixels 50 arranged in a matrix. The wiring configuration connected to one of the plurality of pixels 50 will be explained using Figure 4(b). The pixel 50 is connected to analog power supply wiring 22A, ground wiring 23A, signal wiring 24 for row reading and row selection, and reset wiring (not shown), which are necessary for the operation of the pixel 50. The analog power supply wiring 22A, ground wiring 23A, signal wiring 24, and reset wiring (not shown) are part of the internal wiring of the semiconductor element 10. Light imaged on the pixel 50 is photoelectrically converted by the pixel 50, and the electrical signal obtained by the photoelectric conversion is output to the outside of the analog circuit 21 via row signal wiring 25 and column signal wiring 26. The row signal wiring 25 and column signal wiring 26 are part of the internal wiring of the semiconductor element 10.

[0041] The digital circuit 31 of the semiconductor element 10 includes a horizontal scanning circuit, a vertical scanning circuit, and circuits related to data transfer. The digital circuit 31 outputs digital signals to the pixels 50 via signal wiring 24 that performs row reading and row selection, and converts the electrical signals output via column signal wiring 26 into digital signals and transfers them to the image processing device 702 shown in Figure 1.

[0042] As shown in Figure 3, semiconductor elements 10 are mounted on the main surface 221 of the wiring board 200, and circuit components 20 and connector components 30 are mounted on the main surface 322 of the wiring board 300.

[0043] The wiring board 200 is a multilayer substrate having multiple wiring layers 201 arranged at intervals from each other in the Z direction. In the example shown in Figure 3, there are four wiring board layers 200. The multiple wiring layers 201 are provided with signal wiring (not shown) used for exchanging signals with the semiconductor element 10, as well as power wiring and ground wiring used to supply power to the semiconductor element 10. Conductors arranged on the multiple wiring layers 201 are electrically connected by via conductors (not shown), etc.

[0044] The wiring board 300 is a multilayer substrate having multiple wiring layers 301 spaced apart from each other in the Z direction. In the example shown in Figure 3, there are four wiring layers 301. The multiple wiring layers 301 are provided with signal wiring (not shown) used for exchanging signals with the semiconductor element 10, as well as power wiring and ground wiring used to supply power to the semiconductor element 10. Conductors arranged on the multiple wiring layers 301 are electrically connected by via conductors (not shown), etc.

[0045] The four wiring layers 201 are arranged in the order of the first, second, third, and fourth layers, from the main surface 221 on which the semiconductor element 10 is mounted toward the main surface 222 in the negative Z-axis direction. The wiring layer 220 shown in Figure 2(b) is, for example, the third layer of the wiring board 200. The first layer of the wiring board 200 mainly has a plurality of pads 12 and signal wiring (not shown) connected to any of the plurality of pads 12. The wiring layer 240, which is the second layer of the wiring board 200 and is located between the first and third layers, has a solid ground pattern 233 with a larger area than the ground patterns of the ground wiring 23 of the other wiring layers in order to ensure the potential stability of the first layer. The wiring layer 245, which is the fourth layer of the wiring board 200, has wiring to which the connecting member 400 is connected.

[0046] The four wiring layers 301 are arranged in the order of the first, second, third, and fourth layers, from the main surface 321 connected to the connecting member 400 toward the main surface 322 in the negative Z-axis direction. The wiring layer 320 shown in Figure 2(c) is, for example, the third layer of the wiring board 300. The first layer of the wiring board 300, wiring layer 345, is mainly provided with wiring connected to the connecting member 400. The second layer of the wiring board 300, wiring layer 340, located between the first and third layers, has a solid ground pattern 333 with a larger area than the ground patterns of the ground wiring 33 of the other wiring layers. The fourth layer of the wiring board 300 has circuit components 20 and connector components 30 mounted on it, and is mainly provided with wiring connected to the circuit components 20 or connector components 30. Note that if the ground wiring 33 and ground wiring 23 are shared in a single power wiring, either the ground wiring 33 or the ground wiring 23 can be omitted. From the viewpoint of noise reduction in analog circuits, it is preferable for the common ground wiring to be closer to the power wiring pattern of the analog power wiring 22 than to the power wiring pattern of the digital power wiring 32. Therefore, it is preferable for the common ground wiring to be placed on one of the multiple wiring layers 201 of the same wiring board 200 as the power wiring pattern 211.

[0047] Multiple connecting members 400 are provided with a portion of the signal wiring used for signal exchange between the wiring board 200 and the wiring board 300, a portion of the analog power wiring 22 and the digital power wiring 32 used for power supply, and a portion of the ground wiring 23 and 33.

[0048] Figure 5 is a schematic perspective view of the connecting member 400 according to the first embodiment. Figure 5 shows one of the four connecting members 400, for example, the left connecting member 400 shown in Figure 3. In Figure 5, the longitudinal direction of the connecting member 400 is the Y direction, and the short direction of the connecting member 400 is the X direction.

[0049] The connecting member 400 has a rectangular parallelepiped insulating substrate 401 and a plurality of via conductors 402 arranged on the insulating substrate 401. Each of the plurality of via conductors 402 is a conductor. A plurality of through holes 420 are formed in the insulating substrate 401, and each of the plurality of via conductors 402 is a through-hole conductor arranged in a corresponding through hole 420 among the plurality of through holes 420.

[0050] The connecting member 400 has a pair of connecting surfaces 431 and 432 facing in the Z direction, and four side surfaces 441 to 444 perpendicular to the connecting surfaces 431 and 432. The connecting surface 431 is connected to the wiring board 200 by a connecting member (not shown), and the connecting surface 432 is connected to the wiring board 300 by a connecting member (not shown).

[0051] Each of the multiple via conductors 402 is part of either signal wiring, power wiring, or ground wiring. Each of the multiple via conductors 402 is formed in a through-hole 420 that extends in a straight line, as shown by the dashed line, from a connection surface 431 connected to the wiring board 200 to a connection surface 432 connected to the wiring board 300. This configuration allows the connecting member 400 to be made smaller. However, the connecting member 400 is not limited to this configuration and may be made of a multilayer substrate with conductors provided in the inner layers.

[0052] Although only one circuit component 20 is shown in Figure 3, the number of circuit components 20 is not limited to one, and multiple circuit components 20 may be mounted on the wiring board 300. These multiple circuit components 20 may include, for example, resistors, capacitors, components that constitute part of a power supply circuit, and noise filter components. The wiring component 950 shown in Figure 1 is connected to the connector component 30, and signals are exchanged between the processing module 700 and the imaging module 100, as well as power is supplied from the power supply IC 40 shown in Figure 4(a) to the imaging module 100 via the wiring component 950. The power supply IC 40 can also be mounted on the wiring unit 150, and multiple circuit components 20 may be power supply IC 40.

[0053] Furthermore, although only one connector component 30 is shown in Figure 3, the connector component 30 is not limited to one, and multiple connector components 30 may be mounted on the wiring board 300. Multiple connector components 30 can be used for various transmission applications, such as signal wiring and / or power wiring, which are not shown. Alternatively, the connector component 30 may be omitted, and the wiring component 950 may be directly joined to the wiring unit 150 with solder or anisotropic conductive material.

[0054] The imaging module 100 is supplied with power from outside the imaging module 100 via wiring components 950 and connector components 30. Power is then supplied to the semiconductor element 10 via the analog power supply wiring 22 and digital power supply wiring 32 of the wiring unit 150. As a result, current flows through the analog power supply wiring 22 and digital power supply wiring 32 in accordance with the operation of the analog circuit 21 and digital circuit 31. For example, a power supply IC 40 mounted on an external board (not shown) has a DC / DC converter circuit that generates an arbitrary voltage, and the power generated by the DC / DC converter circuit is supplied to the digital power supply wiring 32 via wiring components 950 and connector components 30. Similarly, power generated by the DC / DC converter circuit of the power supply IC 40 is supplied to the analog power supply wiring 22 via wiring components 950 and connector components 30, but an arbitrary voltage may also be supplied to the analog power supply wiring 22 via a circuit such as a linear regulator included in the circuit component 20. The linear regulator performs a step-down process, which generates a low-noise voltage, and this voltage is supplied to the analog power supply wiring 22.

[0055] Although the power supply to the analog power wiring 22 and the digital power wiring 32 is assumed to be provided by circuit components mounted on an external board (not shown), it is not limited to this, and may be provided by, for example, a power circuit mounted on the wiring board 300. Furthermore, as long as the power supply to the analog power wiring and the potential fluctuations are at a level that does not cause problems with operation, the power supply configuration may be one that does not use a linear regulator.

[0056] The analog power supply wiring 22 connected to the analog circuit 21 of the semiconductor element 10 and the digital power supply wiring 32 connected to the digital circuit 31 of the semiconductor element 10 will be described below.

[0057] The analog power wiring 22 has two or more power wiring patterns, each arranged on two or more wiring layers included in the wiring unit 150. Each of the two or more power wiring patterns of the analog power wiring 22 is an example of a first power wiring pattern. The two or more wiring layers on which the two or more power wiring patterns of the analog power wiring 22 are arranged are included in the plurality of wiring layers 201 and the plurality of wiring layers 301. Of the two or more power wiring patterns of the analog power wiring 22, the power wiring pattern with the largest area is the power wiring pattern 211 shown in Figure 2(b). The power wiring pattern 211 is an example of a first wiring pattern. The area of ​​a power wiring pattern is the area over which the conductor layers, such as copper foil, constituting each wiring layer extend continuously. When multiple power wiring patterns are arranged on one wiring layer, the wiring pattern with the largest area among those multiple power wiring patterns may be the power wiring pattern with the largest area among the two or more power wiring patterns of the analog power wiring 22. The area of ​​the power wiring pattern 211 with the largest area is, for example, 100 mm². 2 That's all, for example, 200mm 2 That's all, for example, 400mm 2 That's all, for example, 500mm 2 That's all, for example, 2000mm 2 The following, for example, 1000mm 2The following may be possible. In the first wiring layer where the power supply wiring pattern 211 with the largest area is arranged, power supply wiring patterns of the analog power supply wiring 22 other than the power supply wiring pattern 211 may be further arranged. That is, in the first wiring layer where the power supply wiring pattern 211 with the largest area is arranged, a plurality of power supply wiring patterns of the analog power supply wiring 22 may be arranged, and the power supply wiring pattern 211 is included in the plurality of power supply wiring patterns of the analog power supply wiring 22 in the first wiring layer. The total area of the power supply wiring patterns of the analog power supply wiring 22 arranged in each wiring layer may be the largest in the first wiring layer where the power supply wiring pattern 211 with the largest area is arranged.

[0058] The digital power supply wiring 32 has two or more power supply wiring patterns respectively arranged in two or more wiring layers included in the wiring unit 150. Each of the two or more power supply wiring patterns of the digital power supply wiring 32 is an example of the second power wiring pattern. The two or more wiring layers in which the two or more power supply wiring patterns of the digital power supply wiring 32 are respectively arranged are included in the plurality of wiring layers 201 and the plurality of wiring layers 301. Among the two or more power supply wiring patterns of the digital power supply wiring 32, the power supply wiring pattern with the largest area is the power supply wiring pattern 311 shown in Fig. 2(c). The power supply wiring pattern 311 is an example of the second wiring pattern. The area of the power supply wiring pattern is the area where the conductor layer such as copper foil constituting each wiring layer continuously extends. When a plurality of power supply wiring patterns are arranged in one wiring layer, the power supply wiring pattern with the largest area among the plurality of power supply wiring patterns can be the power supply wiring pattern with the largest area among the two or more power supply wiring patterns of the digital power supply wiring 32. The area of the power supply wiring pattern 311 with the largest area is, for example, 100 mm 2 or more, for example, 200 mm 2 or more, for example, 400 mm 2 or more, for example, 500 mm 2 or more, for example, 2000 mm 2 or less, for example, 1000 mm 2The following is possible: The second wiring layer on which the largest power wiring pattern 311 is located may also have other power wiring patterns of digital power wiring 32 besides power wiring pattern 311. In other words, the second wiring layer on which the largest power wiring pattern 311 is located may have multiple power wiring patterns of digital power wiring 32, and power wiring pattern 311 may be included among the multiple power wiring patterns of digital power wiring 32 in the second wiring layer. The total area of ​​the power wiring patterns of digital power wiring 32 located in each wiring layer may be maximized in the second wiring layer on which the largest power wiring pattern 311 is located.

[0059] The ground wiring 33 has two or more ground patterns, each placed on two or more wiring layers included in the wiring unit 150. Each of the two or more power wiring patterns of the ground wiring 33 is an example of a third power wiring pattern. The two or more wiring layers on which the two or more ground patterns of the ground wiring 33 are each placed are included in the plurality of wiring layers 201 and the plurality of wiring layers 301. Of the two or more ground patterns of the ground wiring 33, the ground pattern with the largest area is the ground pattern 333 shown in Figure 3. The ground pattern 333 is an example of a third wiring pattern. The area of ​​a ground pattern is the area over which the conductor layers, such as copper foil, constituting each wiring layer extend continuously. When multiple ground patterns are placed on one wiring layer, the wiring pattern with the largest area among those multiple ground patterns may be the ground pattern with the largest area among the two or more ground patterns of the ground wiring 33. The area of ​​the ground pattern 333 with the largest area is, for example, 100 mm². 2 That's all, for example, 200mm 2 That's all, for example, 400mm 2 That's all, for example, 500mm 2 That's all, for example, 2000mm 2 The following, for example, 1000mm 2The following is possible: In the third wiring layer where the largest ground pattern 333 is located, additional ground patterns of ground wiring 33 other than ground pattern 333 may be located. In other words, in the third wiring layer where the largest ground pattern 333 is located, multiple ground patterns of ground wiring 33 may be located, and ground pattern 333 may be included in multiple ground patterns of ground wiring 33 in the third wiring layer. The total area of ​​the ground patterns of ground wiring 33 located in each wiring layer may be maximized in the third wiring layer where the largest ground pattern 333 is located.

[0060] The ground wiring 23 has two or more ground patterns, each placed on two or more wiring layers included in the wiring unit 150. Each of the two or more ground patterns of the ground wiring 23 is an example of a fourth power wiring pattern. The two or more wiring layers on which the two or more ground patterns of the ground wiring 23 are each placed are included in the plurality of wiring layers 201 and the plurality of wiring layers 301. Of the two or more ground patterns of the ground wiring 23, the ground pattern with the largest area is the ground pattern 233 shown in Figure 3. Ground pattern 233 is an example of a fourth wiring pattern. The area of ​​a ground pattern is the area over which the conductor layers, such as copper foil, constituting each wiring layer extend continuously. When multiple ground patterns are placed on one wiring layer, the wiring pattern with the largest area among those multiple ground patterns may be the ground pattern with the largest area among the two or more ground patterns of the ground wiring 23. The area of ​​the ground pattern 233 with the largest area is, for example, 100 mm². 2 That's all, for example, 200mm 2 That's all, for example, 400mm 2 That's all, for example, 500mm 2 That's all, for example, 2000mm 2 The following, for example, 1000mm 2The following is possible: In the fourth wiring layer where the largest ground pattern 233 is located, additional ground patterns of ground wiring 23 other than ground pattern 233 may be located. That is, in the fourth wiring layer where the largest ground pattern 233 is located, multiple ground patterns of ground wiring 23 may be located, and ground pattern 233 may be included in multiple ground patterns of ground wiring 23 in the fourth wiring layer. The total area of ​​the ground patterns of ground wiring 23 located in each wiring layer may be greatest in the fourth wiring layer where the largest ground pattern 233 is located.

[0061] As described above, the analog circuit 21 is a circuit used to output continuous changes in charge and voltage, and potential fluctuations in the analog power supply wiring 22 directly affect the output of the analog circuit 21. For example, if the potential fluctuations in the analog power supply wiring 22 that supplies power to the pixels 50 of the analog circuit 21 are large, there is a risk that distortion will occur in the image generated by the semiconductor element 10, which is the image sensor. On the other hand, the digital circuit 31 is a circuit related to digital signals and logic circuits, and as the processing power of the digital circuit 31 is improved with increased functionality, the amount of current flowing through the digital circuit 31 increases, and the amount of noise generated in the digital circuit 31 also increases. For example, with increased functionality such as an increase in the number of pixels or an increase in the signal transfer speed, the amount of current supplied to the digital circuit 31 increases. As the amount of current supplied to the digital circuit 31 increases, the amount of current flowing through the digital power supply wiring 32 increases. As more current flows through the digital power supply wiring 32, the electromagnetic field noise radiated from the digital power supply wiring 32 tends to increase.

[0062] Among the multiple wiring layers 201 and 301 of the analog power supply wiring 22, the power supply wiring pattern with the largest area per layer is power supply wiring pattern 211. Power supply wiring pattern 211 is located on wiring layer 220 of the multiple wiring layers 201. Wiring layer 220 is an example of the first wiring layer. Power supply wiring pattern 211 is the wiring pattern that is most vulnerable to external noise among the analog power supply wiring 22. On wiring layer 220, power supply wiring pattern 211 consists of one or more wires, and in the example in Figure 2(b), it consists of one wire.

[0063] Furthermore, among the multiple wiring layers 201 and 301 of the digital power wiring 32, the power wiring pattern with the largest area per layer is power wiring pattern 311. Power wiring pattern 311 is located on wiring layer 320 among the multiple wiring layers 301. Wiring layer 320 is an example of a second wiring layer. Power wiring pattern 311 is the wiring pattern that radiates the most noise among the digital power wiring 32.

[0064] Figure 6(a) is an explanatory diagram of a part of the analog power wiring 22 according to the first embodiment. Of the two or more power wiring patterns of the analog power wiring 22, one or more power wiring patterns with a smaller area than power wiring pattern 211, in the example of Figure 6(a), multiple power wiring patterns 251, are arranged on the wiring layers other than wiring layer 220 among the multiple wiring layers 201 and multiple wiring layers 301, for example, wiring layer 240 which is the second layer of the wiring board 200. Note that the illustration of wiring patterns other than power wiring pattern 251 (for example, ground pattern 233) on wiring layer 240 is omitted.

[0065] Figure 6(b) is an explanatory diagram of a part of the digital power wiring 32 according to the first embodiment. Of the two or more power wiring patterns of the digital power wiring 32, one or more power wiring patterns with a smaller area than power wiring pattern 311, in the example of Figure 6(b), multiple power wiring patterns 351, are arranged on a wiring layer other than wiring layer 320 among the multiple wiring layers 201 and multiple wiring layers 301, for example, wiring layer 340 which is the second layer of the wiring board 300. Note that wiring patterns other than power wiring pattern 351 (for example, ground pattern 333) on wiring layer 340 are not shown.

[0066] Electromagnetic field noise radiated from power supply wiring pattern 311, upon reaching power supply wiring pattern 211, propagates through analog power supply wiring 22 and reaches the analog circuit 21 of semiconductor element 10.

[0067] Therefore, in the first embodiment, the power wiring pattern 211 is provided on the wiring board 200 and the power wiring pattern 311 is provided on the wiring board 300 so as to keep the power wiring pattern 211 and the power wiring pattern 311 far apart. That is, the wiring layer 220 is included in a plurality of wiring layers 201 of the wiring board 200, and the wiring layer 320 is included in a plurality of wiring layers 301 of the wiring board 300.

[0068] Thus, since the power wiring patterns 211 and 311 are arranged on different wiring boards 200 and 300, noise propagation between the power wirings 22 and 32 is reduced, potential fluctuations in the analog power wiring 22 are reduced, and the operation of the analog circuit 21 is stabilized. In other words, the occurrence of distortions such as streaks in the image generated by the multiple pixels 50 is reduced.

[0069] Furthermore, since the wiring board 200 and the wiring board 300 are connected via the connecting member 400, the connecting member 400 can be used to separate the wiring board 200 and the wiring board 300, thereby separating the power wiring pattern 211 and the power wiring pattern 311.

[0070] Furthermore, the distance D12 between the main surface 221 of the wiring board 200 on which the semiconductor element 10 is mounted and the wiring layer 320 on which the power supply wiring pattern 311 is located is longer than the distance D11 between the main surface 221 of the wiring board 200 on which the semiconductor element 10 is mounted and the wiring layer 220 on which the power supply wiring pattern 211 is located. In other words, the power supply wiring pattern 311 is located further away from the semiconductor element 10 than the power supply wiring pattern 211. In this way, the power supply wiring pattern 311, which radiates noise, can be kept away from the semiconductor element 10.

[0071] It is preferable that the power wiring pattern 211 is provided on the wiring board 200 and the power wiring pattern 311 is provided on the wiring board 300, but it is not limited to this. For example, the power wiring pattern 211 may be provided on the wiring board 300 and the power wiring pattern 311 may be provided on the wiring board 200. In this case, the wiring board 300 would be the first wiring board and the wiring board 200 would be the second wiring board.

[0072] Furthermore, the wiring unit 150 has a wiring board 200 and a wiring board 300 connected by a connecting member 400. The connecting member 400 forms an air gap 15 between the wiring board 200 and the wiring board 300. That is, the multiple wiring layers 201 of the wiring board 200 and the multiple wiring layers 301 of the wiring board 300 are arranged with the air gap 15 in between. Since the wiring layer 220 is included in the multiple wiring layers 201 and the wiring layer 320 is included in the multiple wiring layers 301, there is an air gap 15 between the wiring layer 220 and the wiring layer 320, in addition to the insulating substrate of the wiring board 200 and the insulating substrate of the wiring board 300.

[0073] The insulating substrates of wiring boards 200 and 300 have a dielectric constant higher than that of air. For example, if the insulating substrate is FR-4, the relative permittivity of the insulating substrate is about 4. Since the relative permittivity of air is 1, the presence of the air gap 15 lowers the dielectric constant between wiring layer 220 and wiring layer 320 compared to the case with only the insulating substrate. Because the dielectric constant between wiring layer 220 and wiring layer 320 is low, noise propagating from the power wiring pattern 311 of wiring layer 320 to the power wiring pattern 211 of wiring layer 220 can be further reduced.

[0074] As shown in Figures 2(a) and 3, a plurality of pads 12 are arranged on the main surface 221. The plurality of pads 12 are used for power supply and signal exchange to the semiconductor element 10. The main surface 221 includes a region R10 on which the semiconductor element 10 is mounted. The outline of region R10 corresponds to the outline of the semiconductor element 10 when viewed in the Z direction. The plurality of pads 12 are arranged along the outer periphery of region R10 with spacing between them. The analog power supply wiring 22 includes two or more pads 12 from the plurality of pads 12, and the digital power supply wiring 32 includes two or more pads 12 from the plurality of pads 12.

[0075] Here, each of the multiple pixels 50 arranged in a matrix is ​​connected to the analog power supply wiring 22A and ground wiring 23A, which are the internal wiring of the semiconductor element 10. At least two pads 12 of the analog power supply wiring 22 are distributed along the outer perimeter of region R10 so as not to be biased. For example, at least two pads 12 of the analog power supply wiring 22 are uniformly arranged to surround region R10. The semiconductor element 10 is then placed between at least two of the multiple wires 11, and at least two wires electrically connect the analog power supply wiring 22 and the semiconductor element 10. This makes it possible to reduce the difference in length of the multiple analog power supply wirings 22A, which are the internal wiring of the semiconductor element 10, and to reduce the variation in the power supplied (power supply voltage) to each pixel 50 of the semiconductor element 10. Similarly, for the digital power supply wiring 32, at least two pads 12 of the digital power supply wiring 32 are distributed along the outer perimeter of region R10 so as not to be biased.

[0076] In the Z-direction, the power supply wiring pattern 211 is positioned to overlap two or more pads 12 included in the analog power supply wiring 22. Similarly, in the Z-direction, the power supply wiring pattern 311 is positioned to overlap two or more pads 12 included in the digital power supply wiring 32. As a result, when viewed in the Z-direction, the power supply wiring patterns 211 and 311 are formed in an elongated shape along the outer contour of the semiconductor element 10.

[0077] In the Z-direction, the power wiring patterns 211 and 311 are arranged to overlap the pad 12, but this is not limited to that arrangement. For example, if there is no problem in increasing the area of ​​the wiring boards 200 and 300 in the XY plane, the power wiring patterns 211 and 311 may be arranged to be outside the pad 12 when viewed from region R10 in the Z-direction.

[0078] In the Z-direction, it is preferable that at least a portion of each of the power supply wiring pattern 211 and power supply wiring pattern 311 does not overlap with the semiconductor element 10. In the first embodiment, in the Z-direction, all of each of the power supply wiring pattern 211 and power supply wiring pattern 311 does not overlap with the semiconductor element 10. With this configuration, noise propagating from the power supply wiring pattern 211 and power supply wiring pattern 311 to the semiconductor element 10 can be effectively reduced.

[0079] Furthermore, in the Z direction, it is preferable that at least a portion of the power wiring pattern 211 overlaps with at least a portion of the power wiring pattern 311. This allows for miniaturization of the wiring boards 200 and 300. In a configuration where at least a portion of the power wiring pattern 211 and at least a portion of the power wiring pattern 311 overlap in the Z direction, it is preferable that the power wiring pattern 211 and the power wiring pattern 311 be arranged on different wiring boards 200 and 300 from the viewpoint of reducing electromagnetic coupling.

[0080] Furthermore, in the first embodiment, the power supply wiring pattern 211 is arranged along a plurality of pads 12 and may be arranged in an O-shape when viewed in the Z-direction, but it is preferable that it is arranged in a C-shape with a gap 212. Similarly, the power supply wiring pattern 311 is arranged along a plurality of pads 12 and may be arranged in an O-shape when viewed in the Z-direction, but it is preferable that it is arranged in a C-shape with a gap 312. In this way, the formation of closed loops is avoided in the power supply wiring patterns 211 and 311. Therefore, even if magnetic field noise is linked in the inner regions 215 and 315 of the power supply wiring patterns 211 and 311, the generation of induced electromotive force is reduced, and the generation of potential fluctuations in the power supply wiring patterns 211 and 311 is reduced.

[0081] The area 215, indicated by the dashed line inside the power wiring pattern 211, contains other power wiring, signal wiring, and via lands connected to via conductors. Similarly, the area 315, indicated by the dashed line inside the power wiring pattern 311, also contains other power wiring, signal wiring, and via lands connected to via conductors. In each of areas 215 and 315, the areas not containing other power wiring, signal wiring, and via lands are filled with ground wiring. The gaps 212 and 312 are formed offset from each other in the Z direction so as not to overlap.

[0082] The power wiring pattern 211 is connected to the pads 12 via via conductors 314 of the wiring board 300, connecting members 400, via conductors 213 of the wiring board 200, etc. The power wiring pattern 311 is also connected to the pads 12 via via conductors 313 of the wiring board 300, connecting members 400, via conductors 242 of the wiring board 200, etc. The power wiring pattern 311 includes two or more via conductors 242 arranged independently of each other on the wiring board 200. The two or more via conductors 242 are electrically connected outside the wiring board 200. The two or more via conductors 242 arranged independently of each other on the wiring board 200 are connected one-to-one to two or more pads 12 included in the digital power wiring 32.

[0083] In this embodiment, the power supply wiring patterns 211 and 311 are arranged in a C-shape by providing the cuts 212 and 312, but the embodiment is not limited to this. For example, if the intensity of magnetic field noise reaching the power supply wiring patterns 211 and 311 from the outside is low, each of the power supply wiring patterns 211 and 311 may be in a closed-loop O-shape (ring shape). Also, the power supply wiring pattern 211 may consist of multiple wires spaced apart from each other along the outer circumference of the region 215, and the power supply wiring pattern 311 may consist of multiple wires spaced apart from each other along the outer circumference of the region 315.

[0084] Furthermore, Figure 4(a) illustrates a case where the analog circuit 21 and the digital circuit 31 are connected to separate ground wires 23 and 33, with ground wire 23 serving as the return path for the current of the analog power supply wire 22 and ground wire 33 serving as the return path for the current of the digital power supply wire 32, but the design is not limited to this. Although not shown in the illustration, the analog circuit 21 and the digital circuit 31 may also be connected to a common ground wire. In this case, in the multiple wiring layers 201 and 301, areas without power supply wires or signal wires are filled with ground patterns. The ground patterns arranged in the multiple wiring layers 201 are connected by via conductors. Similarly, the ground patterns arranged in the multiple wiring layers 301 are connected by via conductors. The ground patterns of each wiring layer 201 and 301 can be made larger, and potential fluctuations due to noise in the common ground wire can be reduced.

[0085] As described above, according to the first embodiment, since the power supply wiring pattern 211 is provided on the wiring board 200 and the power supply wiring pattern 311 is provided on the wiring board 300, electromagnetic field noise propagating from the power supply wiring pattern 311 to the power supply wiring pattern 211 is reduced, thereby reducing malfunctions of the semiconductor element 10 and the occurrence of image distortion caused by the semiconductor element 10, which is an image sensor.

[0086] Furthermore, as shown in Figure 3, the distance D1 in the Z direction between the wiring layer 220 on which the power wiring pattern 211 is located and the wiring layer 320 on which the power wiring pattern 311 is located is preferably 500 μm or more, and more preferably 900 μm or more. Distance D1 is also the distance between the power wiring pattern 211 and the power wiring pattern 311. By increasing the distance D1 in this way, electromagnetic field noise propagating from the power wiring pattern 311 to the power wiring pattern 211 is effectively reduced, and malfunctions of the semiconductor element 10, such as image distortion caused by the semiconductor element 10 which is an image sensor, are effectively reduced.

[0087] Furthermore, wiring layers 245, 345, and 340 are placed between the wiring layer 220 on which the power wiring pattern 211 is located and the wiring layer 320 on which the power wiring pattern 311 is located. Each of the wiring layers 245, 345, and 340 is an example of a third wiring layer. By placing other wiring layers 245, 345, and 340 between the wiring layer 220 and the wiring layer 320, the distance between the wiring layer 220 and the wiring layer 320 can be increased, thereby effectively reducing electromagnetic field noise propagating from the power wiring pattern 311 to the power wiring pattern 211, and effectively reducing malfunctions of the semiconductor element 10, such as image distortion caused by the semiconductor element 10 which is an image sensor.

[0088] Here, the interference between the analog power supply wiring 22 connected to the analog circuit 21 and the ground wiring 23, and between the digital power supply wiring 32 connected to the digital circuit 31 and the ground wiring 33, is small. Furthermore, it is preferable to place the analog power supply wiring 22 and the ground wiring 23 as close together as possible in order to reduce radiated noise and linkage loops. Therefore, it is preferable that the distance between the ground pattern 233 and the power supply wiring pattern 211 is shorter than the distance between the power supply wiring pattern 211 and the power supply wiring pattern 311. In the first embodiment, the distance between the ground pattern 233 and the power supply wiring pattern 211 is the distance D2 in the Z direction between the wiring layer 240 on which the ground pattern 233 is located and the wiring layer 220 on which the power supply wiring pattern 211 is located. Also, the distance between the power supply wiring pattern 211 and the power supply wiring pattern 311 is the distance in the Z direction between the wiring layer 220 on which the power supply wiring pattern 211 is located and the wiring layer 320 on which the power supply wiring pattern 311 is located. In other words, it is preferable that the distance D2 is shorter than the distance D1.

[0089] [Example 1] Modification 1 is a modification of the first embodiment. Figure 7(a) is an explanatory diagram of the wiring layer 230 of the wiring board 200 according to Modification 1. Figure 7(b) is a cross-sectional view of a part of the imaging module 100A according to Modification 1.

[0090] The digital power wiring 32 has one or more power wiring patterns, or in modified example 1, multiple power wiring patterns 351, which are located on a wiring layer 230 separate from the wiring layer 220 among the multiple wiring layers 201 of the wiring board 200. Each of the multiple power wiring patterns 351 has a wire 231 and two or more wires 232. The wire 231 is a plain conductor pattern.

[0091] One of the multiple wires 231 is connected to two or more (e.g., three) via conductors 241. Also, one of the multiple wires 231 is connected to two or more (e.g., three) via conductors 242 via two or more (e.g., three) wires 231. Two or more via conductors 242 are each connected to two or more (e.g., three) pads 12 of the digital power wiring 32. In this way, two or more (e.g., three) pads 12 may be connected together to one wire 231 of the wiring layer 230. That is, all of the multiple pads 12 included in the digital power wiring 32 may be grouped into several groups and connected to multiple wires 231 of the wiring layer 230. The same applies to the multiple via conductors 241.

[0092] In this way, two or more adjacent via conductors 241 from among the multiple via conductors 241 are grouped together and connected to one wiring 231. Then, two or more wirings 232 are drawn out from wiring 231 according to the number of pads 12 connected to the semiconductor element 10, connected to two or more via conductors 242, and connected to two or more pads 12. Even with the above configuration of the imaging module 100A, noise propagating from the digital power wiring 32 to the analog power wiring 22 can be reduced, and the operation of the analog circuit 21 can be stabilized. Therefore, image distortion generated by the semiconductor element 10, which is the image sensor, can be reduced.

[0093] [Differentiation 2] Modification 2 is another modification of the first embodiment. Figure 8 is a schematic cross-sectional view of the imaging module 100B according to Modification 2. As shown in Figure 8, the shielding member 125 may be placed in the gap 15. The shielding member 125 is a conductive member, and preferably a metal member. The shielding effect of the shielding member 125 can reduce electromagnetic field noise propagating from the wiring layer 320 of the wiring board 300 to the wiring layer 220 of the wiring board 200.

[0094] The shielding member 125 is preferably placed on either the main surface 222 of the wiring board 200 or the main surface 321 of the wiring board 300. In this case, the shielding member 125 is preferably connected to the ground wiring (ground potential) of the wiring board on which the shielding member 125 is placed. With this configuration, the potential fluctuation of the shielding member 125 is reduced, and noise propagation can be further reduced. In the example of Figure 8, the shielding member 125 is placed on the main surface 321 of the wiring board 300. It is also placed between a plurality of connecting members 400.

[0095] Furthermore, in the Z direction, it is preferable that the shielding member 125 is positioned in the gap 15 so as to overlap at least one of the power wiring pattern 211 and the power wiring pattern 311. This configuration makes it possible to more effectively reduce electromagnetic field noise propagating from the power wiring pattern 311 to the power wiring pattern 211.

[0096] While it is preferable for the shielding member 125 to be connected to ground potential, it is not limited to this, and may be connected to power supply potential or floating potential, for example.

[0097] [Difference 3] Modification 3 is yet another modification of the first embodiment. In the first embodiment, modification 1 and modification 2, the wiring unit 150 was described as having a laminated structure in which wiring boards 200 and 300 are stacked via connecting members 400, but it is not limited to this. For example, wiring boards 200 and 300 may be joined with a joining member such as solder instead of connecting members 400. However, as in the first embodiment, modification 1 and modification 2, it is advantageous to use connecting members 400 in that the distance between wiring boards 200 and 300 can be widened.

[0098] [Second Embodiment] The imaging module according to the second embodiment will be described below. Elements denoted by the same reference numerals as those in the first embodiment will have substantially the same configuration and function as those described in the first embodiment unless otherwise specified. The differences from the first embodiment will be primarily described.

[0099] Figure 9(a) is a perspective view of the connecting members 500 and 600 of the wiring unit 150C of the imaging module according to the second embodiment. In the wiring unit 150C shown in Figure 9(a), the wiring boards 200 and 300 are not shown. Hereinafter, in the imaging module of the second embodiment, the same configuration as that of the imaging module of the first embodiment will not be described. In the second embodiment, two of the multiple connecting members 400 of the first embodiment are connecting members 500 and 600. Connecting member 500 is an example of a first connecting member, and connecting member 600 is an example of a second connecting member. In Figure 9(a), the longitudinal direction of the connecting members 500 and 600 is the Y direction, and the short direction of the connecting members 500 and 600 is the X direction.

[0100] The connecting member 500 has a pair of connecting surfaces 531 and 532 facing in the Z direction, and four side surfaces 541 to 544 perpendicular to the connecting surfaces 531 and 532. Connecting surface 531 is connected to the wiring board 200, and connecting surface 532 is connected to the wiring board 300.

[0101] The connecting member 600 has a pair of connecting surfaces 631 and 632 facing in the Z direction, and four side surfaces 641 to 644 perpendicular to the connecting surfaces 631 and 632. Connecting surface 631 is connected to the wiring board 200, and connecting surface 632 is connected to the wiring board 300.

[0102] The connecting member 500 and the connecting member 600 are spaced apart from each other in the X direction. One of the four sides 541 to 544 of the connecting member 500, side 541, faces one of the four sides 641 to 644 of the connecting member 600, in the X direction. Side 541 is an example of a first side, and side 641 is an example of a second side.

[0103] The analog power wiring 22 is not located on the connecting member 600, and a portion of the analog power wiring 22 is located on the connecting member 500. The digital power wiring 32 is not located on the connecting member 500, and a portion of the digital power wiring 32 is located on the connecting member 600. In this way, the analog power wiring 22 and the digital power wiring 32 are wired separately to the connecting members 500 and 600.

[0104] The connecting member 500 shown in Figure 9(a) has a power via conductor 510 which is part of the analog power wiring 22 shown in Figure 4(a), and the connecting member 600 has a power via conductor 610 which is part of the digital power wiring 32 shown in Figure 4(a). The connecting member 500 has a ground via conductor 520 which is an example of a first ground wire. The connecting member 600 has a ground via conductor 620 which is an example of a second ground wire. Specifically, the ground via conductor 520 is, for example, part of the ground wiring 23 shown in Figure 4(a), and the ground via conductor 620 is, for example, part of the ground wiring 33 shown in Figure 4(a).

[0105] Furthermore, the connecting member 500 has a signal via conductor 521 which is part of a signal wiring (not shown), and the connecting member 600 has a signal via conductor 621 which is part of a signal wiring (not shown). The power via conductor 510 of the analog power wiring 22 is located closer to the center of the connecting member 500 than the ground via conductor 520 and the signal via conductor 521 of the connecting member 500. The power via conductor 610 of the digital power wiring 32 is located closer to the center of the connecting member 600 than the ground via conductor 620 and the signal via conductor 621 of the connecting member 600.

[0106] The ground via conductor 520 is positioned in the X direction between the side surface 541 of the connecting member 500 and the power via conductor 510. As a result, the ground via conductor 520 is positioned in the X direction between the power via conductor 510 and the power via conductor 610. With this configuration, the propagation of noise from the power via conductor 610 of the digital power wiring 32 to the power via conductor 510 of the analog power wiring 22 is reduced by the ground via conductor 520.

[0107] Furthermore, the ground via conductor 620 is positioned in the X direction between the side surface 641 of the connecting member 600 and the power via conductor 610. As a result, the ground via conductor 620 is positioned in the X direction between the power via conductor 510 and the power via conductor 610. With this configuration, noise propagation from the power via conductor 610 of the digital power wiring 32 to the power via conductor 510 of the analog power wiring 22 is reduced by the ground via conductor 620.

[0108] A gap is formed between the connecting member 500 and the connecting member 600. Therefore, the propagation of noise from the connecting member 600 to the connecting member 500 is effectively reduced.

[0109] Furthermore, the power via conductor 510 is located approximately in the center of the connecting member 500, and the power via conductor 610 is located approximately in the center of the connecting member 600. In other words, the power via conductor 510 is surrounded by the ground via conductor 520 and the signal via conductor 521. Similarly, the power via conductor 610 is surrounded by the ground via conductor 620 and the signal via conductor 621. Therefore, due to the shielding effect of the signal via conductor 521, the signal via conductor 621, the ground via conductor 520, and the ground via conductor 620, electromagnetic field noise leaking from the connecting member 500 and the connecting member 600 to the outside is reduced, and electromagnetic field noise entering the connecting member 500 and the connecting member 600 from the outside is shielded.

[0110] The ground via conductor 520 and the ground via conductor 620 are provided on the connecting member 500 and the connecting member 600, respectively, so as to be located between the power via conductor 510 and the power via conductor 610 in the X direction. Therefore, the shielding effect of the electrically stable ground via conductors 520 and 620 can reduce noise leaking from the power via conductor 610 and noise entering from the power via conductor 510.

[0111] As described above, according to the second embodiment, among the multiple connecting members 400, the analog power supply wiring is connected to the connecting member 500 and the digital power supply wiring is connected to the connecting member 600. With this configuration, electromagnetic field noise propagating from the connecting member 500 to the connecting member 600 can be reduced, thereby reducing malfunctions of the semiconductor element 10 and the occurrence of image distortion caused by semiconductor elements such as image sensors.

[0112] Furthermore, electronic components and metal components (not shown) may be placed between the connecting member 500 and the connecting member 600. With this configuration, the shielding effect of the electronic components and metal components (not shown) can reduce noise leaking from the power via conductor 610 and noise entering from the power via conductor 510.

[0113] [Differentiation Example 4] Modification 4 is a modification of the second embodiment. Figure 9(b) is a perspective view of the connecting members 500 and 600 of the wiring unit 150D of the imaging module according to Modification 4. In the wiring unit 150D shown in Figure 9(b), the wiring boards 200 and 300 are not shown.

[0114] The insulating substrates of the connecting member 500 and the connecting member 600 are substantially rectangular parallelepiped-shaped organic substrates. It is preferable that a shielding member is placed on at least one of the side surfaces 541 of the connecting member 500 and 641 of the connecting member 600. In modified example 4, a shielding member 551 is placed on side surface 541 and a shielding member 651 is placed on side surface 641. These shielding members 551 and 651 are electrically connected to a ground wiring (ground potential) not shown. The shielding members 551 and 651 may be metal members, or they may be made of conductive paint or magnetic material. With this configuration, noise propagating from the power via conductor 610 to the power via conductor 510 can be reduced more effectively.

[0115] Furthermore, if a shielding member is further arranged on any of the sides 542, 543, and 544 other than side 541, it is preferable that the shielding member 551 has a higher conductivity than the shielding member. For example, it is preferable that the shielding member 551 is thicker than the shielding member. With this configuration, noise propagating from the power via conductor 610 to the power via conductor 510 can be effectively reduced.

[0116] Furthermore, if a shielding member is further arranged on any of the sides 642, 643, and 644 other than side 641, it is preferable that the shielding member 651 has a higher conductivity than the shielding member. For example, it is preferable that the shielding member 651 is thicker than the shielding member. With this configuration, noise propagating from the power via conductor 610 to the power via conductor 510 can be effectively reduced. In addition, electronic components or metal members (not shown) may be arranged between the connecting member 500 and the connecting member 600.

[0117] Furthermore, while the shield member 551 is preferably connected to ground potential, it is not limited thereto, and may be connected to power supply potential or floating potential, for example. Similarly, while the shield member 651 is preferably connected to ground potential, it is not limited thereto, and may be connected to power supply potential or floating potential, for example.

[0118] [Third Embodiment] The imaging module according to the third embodiment will now be described. Hereinafter, elements denoted by reference numerals common to the first or second embodiment will have substantially the same configuration and function as those described in the first or second embodiment unless otherwise specified. The differences from the first and second embodiments will be primarily described.

[0119] Figure 10 is a schematic cross-sectional view of the imaging module 100E according to the third embodiment. In the third embodiment, at least one electronic component, for example, two electronic components 410 and 450, is placed between the wiring board 200 and the wiring board 300, instead of the multiple connecting members 400 of the first embodiment. Electronic component 410 is an example of a first electronic component, and electronic component 450 is an example of a second electronic component. The wiring board 200 and the wiring board 300 are connected via the two electronic components 410 and 450.

[0120] Electronic component 410 has terminals 411 and 412 and is joined to the wiring boards 200 and 300 with joining members 421 and 422 such as solder. Electronic component 450 has terminals 451 and 452 and is joined to the wiring boards 200 and 300 with joining members 461 and 462 such as solder. Terminal 411 is an example of a first terminal, and terminal 412 is an example of a second terminal. Terminal 451 is an example of a third terminal, and terminal 452 is an example of a fourth terminal. Jointing member 421 is part of the analog power supply wiring 22 in Figure 4(a). Joining member 461 is part of the digital power supply wiring 32 in Figure 4(a). Joining members 422 and 462 are part of the ground wiring.

[0121] Electronic components 410 and 450 are passive components, such as capacitive elements. Electronic components 410 and 450 are chip components and are surface-mounted on the main surface 222 of the wiring board 200 and the main surface 321 of the wiring board 300. As a result, the distance in the Z direction between the wiring board 200 and the wiring board 300 is set to be greater than or equal to the Z-direction thickness of electronic components 410 and 450.

[0122] Terminal 411 of electronic component 410 is connected to the connecting member 421 of the analog power supply wiring 22. Terminal 451 of electronic component 450 is connected to the connecting member 461 of the digital power supply wiring 32. Terminal 412 of electronic component 410 is connected to the connecting member 422 of the ground wiring. Terminal 452 of electronic component 450 is connected to the connecting member 462 of the ground wiring.

[0123] With the above configuration, power is supplied to the analog circuit 21 via the wiring board 300, terminal 411 of the electronic component 410, and wiring board 200, and power is supplied to the digital circuit 31 via the wiring board 300, terminal 451 of the electronic component 450, and wiring board 200. Terminal 412 of the electronic component 410 and terminal 452 of the electronic component 450 are connected to the analog circuit 21 and the digital circuit 31 via the ground wiring of wiring boards 200 and 300.

[0124] As described above, instead of a connecting member 400, a wiring board 200 having a wiring layer 220 and a wiring board 300 having a wiring layer 320 are stacked via electronic components 410 and 450. Therefore, the wiring layers 220 and 320 can be separated by the electronic components 410 and 450, and the propagation of electromagnetic field noise from the power wiring pattern 311 of the wiring layer 320 to the power wiring pattern 211 of the wiring layer 220 can be reduced. Furthermore, by utilizing surface-mount electronic components 410 and 450, the wiring boards 200 and 300 can be connected at low cost.

[0125] As shown in Figure 10, electronic components 410 and 450 are arranged side by side in the X direction such that terminal 411 of electronic component 410 and terminal 452 of electronic component 450 face each other in the X direction. Furthermore, terminal 411 of electronic component 410 connected to the analog power supply wiring 22 is closer to terminal 452 of electronic component 450, which is connected to the ground wiring. With this configuration, terminal 452 connected to the ground wiring is positioned between terminal 451 connected to the digital power supply wiring 32 and terminal 411 connected to the analog power supply wiring 22, thereby reducing the propagation of electromagnetic field noise from terminal 451 to terminal 411.

[0126] While the arrangement of electronic component 410 has been described, the propagation of electromagnetic field noise can be reduced by arranging electronic component 450 in a similar manner.

[0127] As described above, according to the third embodiment, even in a configuration in which the wiring boards 200 and 300 are connected via electronic components 410 and 450, electromagnetic field noise propagating from the power wiring pattern 311 to the power wiring pattern 211 can be reduced, similar to the first embodiment, and malfunctions of the semiconductor element 10, such as image distortion caused by the semiconductor element 10 which is an image sensor, can be reduced.

[0128] [Fourth Embodiment] The imaging module according to the fourth embodiment will now be described. Hereinafter, elements denoted by reference numerals common to the first to third embodiments will have substantially the same configuration and function as those described in the first to third embodiments unless otherwise specified. The differences from the first to third embodiments will be primarily described.

[0129] Figure 11(a) is a schematic cross-sectional view of the imaging module 100F according to the fourth embodiment. Figure 11(b) is a schematic cross-sectional view of the imaging module 100X of Comparative Example 1. The difference between the imaging module 100F of the fourth embodiment shown in Figure 11(a) and the imaging module 100 of the first embodiment is that the connecting member 400 is not provided, and the imaging module 100F has one wiring board 800 instead of the wiring boards 200 and 300. That is, the wiring unit 150F of the imaging module 100F is the wiring board 800. The wiring board 800 is a printed circuit board, for example, a rigid substrate. The wiring board 800 is a multilayer substrate having a plurality of wiring layers 801. The plurality of wiring layers 801 have the same configuration as the plurality of wiring layers 201 and plurality of wiring layers 301 of the first embodiment. The semiconductor element 10 is mounted on the mounting surface 821 of the wiring board 800. The wiring board 800 has eight layers 811 to 818. Each of the eight layers 811 to 818 is a wiring layer. The eight layers 811 to 818 are arranged in this order from the mounting surface 821 toward the negative Z-axis direction.

[0130] Therefore, in the imaging module 100F of the fourth embodiment, the power wiring pattern 211 and the power wiring pattern 311 are provided on the same wiring board 800. In the fourth embodiment, the distance D1 in the Z direction between the third layer 813 on which the power wiring pattern 211 (Figure 2(b)) is arranged and the seventh layer 817 on which the power wiring pattern 311 (Figure 2(c)) is arranged is 500 μm or more, preferably 900 μm or more. The third layer 813 corresponds to the wiring layer 220 of the first embodiment, and the seventh layer 817 corresponds to the wiring layer 320 of the first embodiment. The third layer 813 is an example of a first wiring layer, and the seventh layer 817 is an example of a second wiring layer. The configuration of the wiring layer 220 and the wiring layer 320 are as described in the first embodiment, and a detailed explanation of the configuration of the third layer 813 corresponding to the wiring layer 220 and the seventh layer 817 corresponding to the wiring layer 330 is omitted.

[0131] The imaging module 100X of Comparative Example 1 shown in Figure 11(b) is equipped with a wiring board 900 instead of a wiring board 800. The wiring board 900 is an 8-layer substrate with a thickness of 0.8 mm. The thickness of the semiconductor element 10 is 0.8 mm. Pads 12 to which wires 11 drawn out from the semiconductor element 10 are connected are arranged on the first layer 911 on which the semiconductor element 10 is mounted. Signal wiring and power wiring are also provided on the first layer 911. A solid ground pattern is provided on the second layer 912 to ensure the potential stability of the wiring provided on the first layer 911. The solid ground pattern in ground wiring 33 and ground wiring 23 is common to this solid ground pattern provided on the second layer 912. In other words, this solid ground pattern 233 provided on the second layer 912 also serves as the ground pattern for ground wiring 33 and ground wiring 23. The eighth layer 918 of the wiring board 900, located opposite the first layer 911, is provided with circuit components 20 and connector components 30. Therefore, in order to separate the power supply wiring pattern 211 and the power supply wiring pattern 311, the power supply wiring pattern 211 is placed on the third layer 913 and the power supply wiring pattern 311 is placed on the seventh layer 917. In this case, for a wiring board 900 with a thickness of 0.8 mm, the distance D1X between the third layer 913 on which the power supply wiring pattern 211 is placed and the seventh layer 917 on which the power supply wiring pattern 311 is placed is approximately 450 μm.

[0132] In the imaging module 100F of the fourth embodiment shown in Figure 11(a), the wiring board 800 is an 8-layer substrate with a thickness of 1.6 mm. The semiconductor element 10 has a thickness of 0.8 mm. Pads 12 to which wires 11 drawn out from the semiconductor element 10 are connected are arranged on the first layer 811 on which the semiconductor element 10 is mounted. Signal wiring and power wiring are also provided on the first layer 811. A solid ground pattern 233 is provided on the second layer 812 to ensure the potential stability of the wiring provided on the first layer 811. The solid ground pattern in the ground wiring 33 and ground wiring 23 is common to this solid ground pattern 233 provided on the second layer 812. In other words, this solid ground pattern 233 provided on the second layer 812 also serves as the ground pattern for the ground wiring 33 and ground wiring 23. The eighth layer 818 of the wiring board 800, located opposite the first layer 811, is provided with circuit components 20 and connector components 30. Therefore, in order to separate the power supply wiring pattern 211 and the power supply wiring pattern 311, the power supply wiring pattern 211 is placed on the third layer 813 and the power supply wiring pattern 311 is placed on the seventh layer 817.

[0133] In the fourth embodiment, the distance D1 in the Z direction between the third layer 813 on which the power wiring pattern 211 is arranged and the seventh layer 817 on which the power wiring pattern 311 is arranged is 500 μm or more, which is greater than the distance D1X, and preferably 900 μm or more.

[0134] The effect of making the distance D1 between power wiring pattern 211 and power wiring pattern 311 twice the distance D1X of Comparative Example 1, which is 900 μm, will be explained. When a current I flows through a linear conductor, the magnetic flux density B at a point P at a distance a from the linear conductor is expressed by the following equation (1). μ0 is the permeability of vacuum.

number

[0135] As can be seen from equation (1), the magnitude of the magnetic flux density B is inversely proportional to the distance a from the linear conductor. Therefore, in the imaging module 100F of the fourth embodiment, the amount of noise propagation from the power wiring pattern 311 to the power wiring pattern 211 is reduced to approximately half that of Comparative Example 1. In the imaging device, the reduction in noise propagation by half doubles the sensitivity of the imaging device.

[0136] As described above, according to the fourth embodiment, by setting the distance D1 in the Z direction between the third layer 813 on which the power wiring pattern 211 is arranged and the seventh layer 817 on which the power wiring pattern 311 is arranged to 500 μm or more, preferably 900 μm or more, electromagnetic field noise propagating from the power wiring pattern 311 to the power wiring pattern 211 is reduced. This reduces malfunctions of the semiconductor element 10, such as image distortion caused by the semiconductor element 10 which is an image sensor.

[0137] Furthermore, the distance D12 in the Z direction between the mounting surface 821 of the wiring board 800 on which the semiconductor element 10 is mounted and the seventh layer 817 on which the power supply wiring pattern 311 is located is longer than the distance D11 in the Z direction between the mounting surface 821 on which the semiconductor element 10 is mounted and the third layer 813 on which the power supply wiring pattern 211 is located. In other words, the power supply wiring pattern 311 is located further away from the semiconductor element 10 than the power supply wiring pattern 211. In this way, the power supply wiring pattern 311, which radiates noise, can be kept away from the semiconductor element 10.

[0138] Furthermore, the fourth layer 814, the fifth layer 815, and the sixth layer 816 are arranged between the third layer 813 and the seventh layer 817. Each of layers 814, 815, and 816 is an example of a third wiring layer. By arranging other layers 814, 815, and 816 between the third layer 813 and the seventh layer 817, the distance between the wiring layer 220 and the wiring layer 320 can be increased, thereby effectively reducing electromagnetic field noise propagating from the power wiring pattern 311 to the power wiring pattern 211, and effectively reducing malfunctions of the semiconductor element 10, such as image distortion caused by the semiconductor element 10 which is an image sensor.

[0139] Furthermore, in the fourth embodiment, as in the first embodiment, it is preferable that distance D2 is shorter than distance D1.

[0140] Furthermore, in the Z direction, it is preferable that at least a portion of the power wiring pattern 211 overlaps with at least a portion of the power wiring pattern 311. This makes it possible to miniaturize the wiring board 800.

[0141] In the fourth embodiment, the case where the thickness of the wiring board 800 is 1.6 mm was described as an example, but it is not limited to this. If it is possible to set the distance D1 between the power wiring pattern 211 and the power wiring pattern 311 to 900 μm or more, the thickness of the wiring board 800 may be less than 1.6 mm.

[0142] Furthermore, although the fourth embodiment described an example where the power wiring pattern 211 is located on the third layer 813 and the power wiring pattern 311 is located on the seventh layer 817, the invention is not limited to this, and the power wiring pattern 211 and the power wiring pattern 311 may be located on different layers. In addition, a core layer of an insulating substrate may be placed between the power wiring pattern 211 and the power wiring pattern 311.

[0143] [Other variations] This disclosure is not limited to the embodiments described above, and many modifications are possible within the technical concept of this disclosure. For example, at least two of the embodiments and modifications described above may be combined. Furthermore, the effects described in this embodiment are merely a list of the most preferred effects arising from the embodiments of this disclosure, and the effects of the embodiments of this disclosure are not limited to those described in this embodiment.

[0144] In the above-described embodiment, the case in which the power wiring pattern 211 and the power wiring pattern 311 are arranged on different wiring layers has been explained, but the invention is not limited to this. For example, the power wiring pattern 211 and the power wiring pattern 311 may be arranged on the same wiring layer. In this case, the distance D1 between the power wiring pattern 211 and the power wiring pattern 311 should be 500 μm or more, preferably 900 μm or more. This reduces electromagnetic coupling (capacitive coupling and / or inductive coupling) between the power wiring pattern 211 and the power wiring pattern 311, and reduces electromagnetic field noise propagating from the power wiring pattern 311 to the power wiring pattern 211.

[0145] However, from the viewpoint of reducing the area of ​​the wiring board, it is preferable that the power wiring pattern 211 and the power wiring pattern 311 are arranged on different wiring layers, as described in the above embodiment. Furthermore, from the viewpoint of reducing noise propagating from the power wiring pattern 211 and the power wiring pattern 311 to the semiconductor element 10, it is preferable that the power wiring pattern 211 and the power wiring pattern 311 do not overlap with the semiconductor element 10 in the Z direction. Also, from the viewpoint of further miniaturizing the wiring board, it is preferable that at least a part of the power wiring pattern 211 overlaps with at least a part of the power wiring pattern 311 in the Z direction. In this configuration in which at least a part of the power wiring pattern 211 and at least a part of the power wiring pattern 311 overlap in the Z direction, from the viewpoint of reducing electromagnetic coupling, it is preferable that the power wiring pattern 211 and the power wiring pattern 311 are arranged on different wiring boards 200 and 300, and it is also preferable that another wiring layer is arranged between the wiring layer 220 (813) and the wiring layer 320 (817).

[0146] Furthermore, although the above-described embodiment explained using the case where the analog power supply wiring 22 is the first power supply wiring, the digital power supply wiring 32 is the second power supply wiring, the ground wiring 33 is the third power supply wiring, and the ground wiring 23 is the fourth power supply wiring as an example, it is not limited to this. For example, the analog power supply wiring 22 may be the first power supply wiring, the ground wiring 33 may be the second power supply wiring, the digital power supply wiring 32 may be the third power supply wiring, and the ground wiring 23 may be the fourth power supply wiring. Also, for example, the ground wiring 23 may be the first power supply wiring, the ground wiring 33 may be the second power supply wiring, the digital power supply wiring 32 may be the third power supply wiring, and the analog power supply wiring 22 may be the fourth power supply wiring.

[0147] Furthermore, although the above-described embodiment was explained using the case where the electronic module is applied to an imaging module as an example, the invention is not limited to this, and the electronic module of this disclosure may also be applied to a processing module.

[0148] Furthermore, while the above embodiments described the application of the electronic module of this disclosure to an imaging device such as a digital camera, the invention is not limited to this. The electronic module of this disclosure can also be applied to information devices such as smartphones and personal computers, communication devices such as modems and routers, or to office equipment such as printers and copiers, medical equipment such as X-ray machines and endoscopes, industrial equipment such as robots and semiconductor manufacturing equipment, and transportation equipment such as vehicles, airplanes, and ships.

[0149] The disclosures in this specification include not only what is explicitly stated herein, but also all matters that can be inferred from this specification and the drawings attached thereto. Furthermore, the disclosures in this specification include the complement of the individual concepts described herein. That is, if this specification states, for example, "A is B," then even if it omits the statement "A is not B," it can be said that this specification discloses "A is not B." This is because the statement "A is B" presupposes that the case "A is not B" is being considered.

[0150] The above disclosure of embodiments includes the following sections.

[0151] (Section 1) A semiconductor device having analog and digital circuits, The wiring unit includes a mounting surface on which the semiconductor element is mounted, and includes a first power wiring used to supply power to the analog circuit, a second power wiring used to supply power to the digital circuit, and a third power wiring used to supply power to the digital circuit, The first power wiring has two or more first power wiring patterns arranged in two or more wiring layers of the wiring unit, The second power wiring has two or more second power wiring patterns arranged in two or more wiring layers of the wiring unit, The distance between the first power wiring pattern with the largest area among the two or more first power wiring patterns and the second power wiring pattern with the largest area among the two or more second power wiring patterns is 500 μm or more. An electronic module characterized by the following features.

[0152] (Section 2) A semiconductor device having analog and digital circuits, The wiring unit includes a mounting surface on which the semiconductor element is mounted, and includes a first power wiring used to supply power to the analog circuit, and a second power wiring used to supply power to the digital circuit, The first power wiring has two or more first power wiring patterns arranged in two or more wiring layers of the wiring unit, The second power wiring has two or more second power wiring patterns arranged in two or more wiring layers of the wiring unit, The distance between the first power wiring pattern with the largest area among the two or more first power wiring patterns and the second power wiring pattern with the largest area among the two or more second power wiring patterns is 900 μm or more. An electronic module characterized by the following features.

[0153] (Section 3) A semiconductor device having analog and digital circuits, The wiring unit includes a mounting surface on which the semiconductor element is mounted, and includes a first power wiring used to supply power to the analog circuit, and a second power wiring used to supply power to the digital circuit, The first power wiring has two or more first power wiring patterns arranged in two or more wiring layers of the wiring unit, The second power wiring has two or more second power wiring patterns arranged in two or more wiring layers of the wiring unit, The wiring unit has a first wiring board and a second wiring board stacked on top of each other, Of the two or more first power wiring patterns, the first wiring pattern with the largest area is provided on the first wiring board. Of the two or more second power wiring patterns, the second wiring pattern with the largest area is provided on the second wiring board. An electronic module characterized by the following features.

[0154] (Section 4) The distance between the first wiring layer on which the first wiring pattern is arranged and the second wiring layer on which the second wiring pattern is arranged is 500 μm or more. The electronic module according to item 1, 2, or 3, characterized in that it is an electronic module according to item 1, 2, or 3.

[0155] (Section 5) The wiring unit includes a third wiring layer disposed between a first wiring layer on which the first wiring pattern is arranged and a second wiring layer on which the second wiring pattern is arranged. The electronic module according to item 1, 2, or 3, characterized in that it is an electronic module according to item 1, 2, or 3.

[0156] (Section 6) In a direction perpendicular to the mounting surface, at least a portion of the first wiring pattern overlaps with at least a portion of the second wiring pattern. An electronic module according to any one of claims 1 to 4, characterized in that it is an electronic module according to any one of claims 1 to 4.

[0157] (Section 7) The distance between the mounting surface and the second wiring pattern is longer than the distance between the mounting surface and the first wiring pattern. An electronic module according to any one of claims 1 to 5, characterized in that

[0158] (Section 8) The potential of the first power wiring is greater than or equal to the potential of the second power wiring. An electronic module according to any one of claims 1 to 6, characterized in that it is an electronic module according to any one of claims 1 to 6.

[0159] (Section 9) A gap is formed between the first wiring board and the second wiring board, and / or The device further comprises a shielding member disposed between the first wiring board and the second wiring board. The electronic module according to item 3, characterized in that

[0160] (Section 10) The wiring unit is positioned between the first wiring board and the second wiring board and has at least one connecting member that connects the first wiring board and the second wiring board. The electronic module according to item 3, characterized in that

[0161] (Section 11) A portion of the first power wiring is arranged on the first connecting member among the at least one connecting member, A portion of the second power wiring is located on the second connecting member among the at least one connecting member. The electronic module according to item 10, characterized in that

[0162] (Section 12) The first side surface of the first connecting member and the second side surface of the second connecting member face each other. The device further comprises a shielding member disposed on at least one of the first side surface of the first connecting member and the second side surface of the second connecting member. The electronic module according to item 11, characterized in that

[0163] (Section 13) The first side surface of the first connecting member and the second side surface of the second connecting member face each other. The first connecting member has a first ground wire, The first ground wire is located between the portion of the first power wiring and the first side surface of the first connecting member, and / or The first side surface of the first connecting member and the second side surface of the second connecting member face each other. The second connecting member has a second ground wire, The second ground wire is positioned between the portion of the second power wiring and the second side surface of the second connecting member. The electronic module according to item 11 or 12, characterized in that

[0164] (Section 14) Each of the two or more first power wiring patterns is composed of one or more wirings arranged in the corresponding wiring layer among the two or more wiring layers on which the two or more first power wiring patterns are arranged, and / or Each of the two or more second power wiring patterns is composed of one or more wirings arranged in the corresponding wiring layer among the two or more wiring layers on which the two or more second power wiring patterns are arranged. An electronic module according to any one of claims 1 to 13, characterized in that it is an electronic module according to any one of claims 1 to 13.

[0165] (Section 15) The present invention further comprises at least one electronic component disposed between the first wiring board and the second wiring board. An electronic module according to any one of claims 3, 9, 10, 11, 12, and 13, characterized in that it is an electronic module according to any one of claims 3, 9, 10, 11, 12, and 13.

[0166] (Section 16) The first wiring board and the second wiring board are connected via the at least one electronic component. The electronic module according to item 15, characterized in that

[0167] (Section 17) The aforementioned at least one electronic component comprises a first electronic component and a second electronic component, The first electronic component includes a first terminal and a second terminal, The second electronic component includes a third terminal and a fourth terminal, The first power wiring is connected to the first terminal of the first electronic component, The second power wiring is connected to the third terminal of the second electronic component. The electronic module according to item 15 or 16, characterized in that

[0168] (Section 18) The first terminal of the first electronic component is the terminal closest to the fourth terminal among the third and fourth terminals of the second electronic component. The electronic module according to item 17, characterized in that it is an electronic module.

[0169] (Section 19) The wiring unit has a plurality of pads arranged on the mounting surface and electrically connected to the semiconductor element, The plurality of pads are arranged on the mounting surface at intervals from each other along the outer periphery of the area on which the semiconductor element is mounted. An electronic module according to any one of claims 1 to 18, characterized in that it is an electronic module according to any one of claims 1 to 18.

[0170] (Section 20) The first power wiring includes at least two of the plurality of pads, In a direction perpendicular to the mounting surface, the first wiring pattern overlaps with at least two pads of the first power wiring, and / or The second power wiring includes at least two of the plurality of pads, In a direction perpendicular to the mounting surface, the second wiring pattern overlaps with at least two pads of the second power wiring. The electronic module according to item 19, characterized in that it is an electronic module according to item 19.

[0171] (Section 21) In a direction perpendicular to the mounting surface, at least a portion of the first wiring pattern does not overlap with the semiconductor element, and / or In a direction perpendicular to the mounting surface, at least a portion of the second wiring pattern does not overlap with the semiconductor element. An electronic module according to any one of claims 1 to 20, characterized in that it is an electronic module according to any one of claims 1 to 20.

[0172] (Section 22) The first wiring pattern is arranged in a C-shape, and / or The second wiring pattern is arranged in a C-shape. An electronic module according to any one of claims 1 to 21, characterized in that

[0173] (Section 23) The semiconductor element and the plurality of wires bonded to the mounting surface are provided. An electronic module according to any one of claims 1 to 22, characterized in that it is an electronic module according to any one of claims 1 to 22.

[0174] (Section 24) The semiconductor element comprises a plurality of wires bonded to it, the semiconductor element being positioned between at least two of the plurality of wires, and the at least two wires electrically connecting the first power line and the semiconductor element. An electronic module according to any one of claims 1 to 22, characterized in that it is an electronic module according to any one of claims 1 to 22.

[0175] (Section 25) The first wiring board is positioned between the semiconductor element and the second wiring board. The electronic module according to any one of claims 3, 9, 10, 11, 12, 13, 15, 16, 17, and 18, characterized in that it is an electronic module according to any one of claims 3, 9, 10, 11, 12, 13, 15, 16, 17, and 18.

[0176] (Section 26) The wiring unit comprises a wiring board on which the semiconductor elements are mounted, The first wiring pattern and the second wiring pattern are provided on the wiring board. The potential of the first power wiring is different from the potential of the third power wiring. The electronic module according to item 1, characterized in that it is an electronic module according to item 1.

[0177] (Section 27) The wiring unit includes a fourth power wiring used to supply power to the analog circuit. The fourth power wiring has two or more fourth power wiring patterns arranged in two or more wiring layers of the wiring unit, The distance between the fourth power wiring pattern with the largest area among the two or more fourth power wiring patterns and the first wiring pattern is shorter than the distance between the first wiring pattern and the second wiring pattern. An electronic module according to any one of claims 1 to 26, characterized in that it is an electronic module according to any one of claims 1 to 26.

[0178] (Section 28) The semiconductor element is a stacked semiconductor element in which a first chip having the analog circuit and a second chip having the digital circuit are stacked on top of each other. An electronic module according to any one of claims 1 to 27, characterized in that it is an electronic module according to any one of claims 1 to 27.

[0179] (Section 29) The aforementioned semiconductor element is an imaging sensor. An electronic module according to any one of claims 1 to 28, characterized in that it is an electronic module according to any one of claims 1 to 28.

[0180] (Section 30) Exterior and A first electronic module, which is an electronic module described in any one of items 1 to 29, is disposed inside the exterior of the aforementioned exterior. A flexible wiring component connected to the aforementioned wiring unit, The system comprises a second electronic module electrically connected to the first electronic module via the aforementioned wiring components, An electronic device characterized by the following features. [Explanation of symbols]

[0181] 10…Semiconductor element, 21…Analog circuit, 22…Analog power supply wiring (first power supply wiring), 31…Digital circuit, 32…Digital power supply wiring (second power supply wiring), 100…Imaging module (electronic module), 150…Wiring unit, 200…Wiring board (first wiring board), 211…Power supply wiring pattern (first wiring pattern), 300…Wiring board (second wiring board), 311…Power supply wiring pattern (second wiring pattern)

Claims

1. A semiconductor device having analog and digital circuits, A wiring unit having a mounting surface on which the semiconductor element is mounted, and including a first power wiring used to supply power to the analog circuit, a second power wiring used to supply power to the digital circuit, and a third power wiring used to supply power to the digital circuit, The first power wiring has two or more first power wiring patterns arranged in two or more wiring layers of the wiring unit, The second power wiring has two or more second power wiring patterns arranged in two or more wiring layers of the wiring unit, The distance between the first power wiring pattern with the largest area among the two or more first power wiring patterns and the second power wiring pattern with the largest area among the two or more second power wiring patterns is 500 μm or more. An electronic module characterized by the following features.

2. A semiconductor device having analog and digital circuits, The wiring unit includes a mounting surface on which the semiconductor element is mounted, a first power wiring used to supply power to the analog circuit, and a second power wiring used to supply power to the digital circuit, The first power wiring has two or more first power wiring patterns arranged in two or more wiring layers of the wiring unit, The second power wiring has two or more second power wiring patterns arranged in two or more wiring layers of the wiring unit, The distance between the first power wiring pattern with the largest area among the two or more first power wiring patterns and the second power wiring pattern with the largest area among the two or more second power wiring patterns is 900 μm or more. An electronic module characterized by the following features.

3. A semiconductor device having analog and digital circuits, The wiring unit includes a mounting surface on which the semiconductor element is mounted, a first power wiring used to supply power to the analog circuit, and a second power wiring used to supply power to the digital circuit, The first power wiring has two or more first power wiring patterns arranged in two or more wiring layers of the wiring unit, The second power wiring has two or more second power wiring patterns arranged in two or more wiring layers of the wiring unit, The wiring unit has a first wiring board and a second wiring board stacked on top of each other, Of the two or more first power wiring patterns, the first wiring pattern with the largest area is provided on the first wiring board. Of the two or more second power wiring patterns, the second wiring pattern with the largest area is provided on the second wiring board. An electronic module characterized by the following features.

4. The distance between the first wiring layer on which the first wiring pattern is arranged and the second wiring layer on which the second wiring pattern is arranged is 500 μm or more. The electronic module according to claim 1, 2, or 3, characterized by the above.

5. The wiring unit includes a third wiring layer disposed between a first wiring layer on which the first wiring pattern is arranged and a second wiring layer on which the second wiring pattern is arranged. The electronic module according to claim 1, 2, or 3, characterized by the above.

6. In a direction perpendicular to the mounting surface, at least a portion of the first wiring pattern overlaps with at least a portion of the second wiring pattern. The electronic module according to claim 1, 2, or 3, characterized by the above.

7. The distance between the mounting surface and the second wiring pattern is longer than the distance between the mounting surface and the first wiring pattern. The electronic module according to claim 1, 2, or 3, characterized by the above.

8. The potential of the first power wiring is greater than or equal to the potential of the second power wiring. The electronic module according to claim 1, 2, or 3, characterized by the above.

9. A gap is formed between the first wiring board and the second wiring board, and / or The device further comprises a shielding member disposed between the first wiring board and the second wiring board. The electronic module according to feature 3.

10. The wiring unit is positioned between the first wiring board and the second wiring board and has at least one connecting member that connects the first wiring board and the second wiring board. The electronic module according to feature 3.

11. A portion of the first power wiring is arranged on the first connecting member among the at least one connecting member, A portion of the second power wiring is located on the second connecting member among the at least one connecting member. The electronic module according to feature 10.

12. The first side surface of the first connecting member and the second side surface of the second connecting member face each other. The device further comprises a shielding member disposed on at least one of the first side surface of the first connecting member and the second side surface of the second connecting member. The electronic module according to feature 11.

13. The first side surface of the first connecting member and the second side surface of the second connecting member face each other. The first connecting member has a first ground wire, The first ground wire is located between the portion of the first power wiring and the first side surface of the first connecting member, and / or The first side surface of the first connecting member and the second side surface of the second connecting member face each other. The second connecting member has a second ground wire, The second ground wire is positioned between the portion of the second power wiring and the second side surface of the second connecting member. The electronic module according to feature 11.

14. Each of the two or more first power wiring patterns is composed of one or more wirings arranged in the corresponding wiring layer among the two or more wiring layers on which the two or more first power wiring patterns are arranged, and / or Each of the two or more second power wiring patterns is composed of one or more wirings arranged in the corresponding wiring layer among the two or more wiring layers on which the two or more second power wiring patterns are arranged. The electronic module according to claim 1, 2, or 3, characterized by the above.

15. The present invention further comprises at least one electronic component disposed between the first wiring board and the second wiring board. The electronic module according to feature 3.

16. The first wiring board and the second wiring board are connected via the at least one electronic component. The electronic module according to feature 15.

17. The aforementioned at least one electronic component comprises a first electronic component and a second electronic component, The first electronic component includes a first terminal and a second terminal, The second electronic component includes a third terminal and a fourth terminal, The first power wiring is connected to the first terminal of the first electronic component, The second power wiring is connected to the third terminal of the second electronic component. The electronic module according to feature 15.

18. The first terminal of the first electronic component is the terminal closest to the fourth terminal among the third and fourth terminals of the second electronic component. The electronic module according to feature 17.

19. The wiring unit has a plurality of pads arranged on the mounting surface and electrically connected to the semiconductor element, The plurality of pads are arranged on the mounting surface at intervals from each other along the outer periphery of the area on which the semiconductor element is mounted. The electronic module according to claim 1, 2, or 3, characterized by the above.

20. The first power wiring includes at least two of the plurality of pads, In a direction perpendicular to the mounting surface, the first wiring pattern overlaps with at least two pads of the first power wiring, and / or The second power wiring includes at least two of the plurality of pads, In a direction perpendicular to the mounting surface, the second wiring pattern overlaps with at least two pads of the second power wiring. The electronic module according to feature 19.

21. In a direction perpendicular to the mounting surface, at least a portion of the first wiring pattern does not overlap with the semiconductor element, and / or In a direction perpendicular to the mounting surface, at least a portion of the second wiring pattern does not overlap with the semiconductor element. The electronic module according to claim 1, 2, or 3, characterized by the above.

22. The first wiring pattern is arranged in a C-shape, and / or The second wiring pattern is arranged in a C-shape. The electronic module according to claim 1, 2, or 3, characterized by the above.

23. The semiconductor element and the plurality of wires bonded to the mounting surface are provided. The electronic module according to claim 1, 2, or 3, characterized by the above.

24. The semiconductor element comprises a plurality of wires bonded to it, the semiconductor element is positioned between at least two of the plurality of wires, and the at least two wires electrically connect the first power line and the semiconductor element. The electronic module according to claim 1, 2, or 3, characterized by the above.

25. The first wiring board is positioned between the semiconductor element and the second wiring board. The electronic module according to feature 3.

26. The wiring unit comprises a wiring board on which the semiconductor elements are mounted, The first wiring pattern and the second wiring pattern are provided on the wiring board. The potential of the first power wiring is different from the potential of the third power wiring. The electronic module according to feature 1.

27. The wiring unit includes a fourth power wiring used to supply power to the analog circuit. The fourth power wiring has two or more fourth power wiring patterns arranged in two or more wiring layers of the wiring unit, The distance between the fourth power wiring pattern with the largest area among the two or more fourth power wiring patterns and the first wiring pattern is shorter than the distance between the first wiring pattern and the second wiring pattern. The electronic module according to claim 1, 2, or 3, characterized by the above.

28. The semiconductor element is a stacked semiconductor element in which a first chip having the analog circuit and a second chip having the digital circuit are stacked on top of each other. The electronic module according to claim 1, 2, or 3, characterized by the above.

29. The aforementioned semiconductor element is an imaging sensor. The electronic module according to claim 1, 2, or 3, characterized by the above.

30. Exterior and A first electronic module, which is an electronic module according to claim 1, 2, or 3, is disposed inside the exterior of the exterior, A flexible wiring component connected to the aforementioned wiring unit, The system comprises a second electronic module electrically connected to the first electronic module via the aforementioned wiring components, An electronic device characterized by the following features.

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