Method for manufacturing silicon carbide semiconductor device

Abstract

To provide a manufacturing method for SiC semiconductor devices that can suppress particle generation when a polysilicon layer is used.SOLUTION: The width Wa of the edge cut area of a polysilicon layer 11 should be larger than the width Wb of the edge cut area of an insulating film 12. This can prevent the polysilicon layer 11 from being exposed at the outer edge of the SiC wafer 10 and can suppress the generation of particles due to reaction products of the polysilicon layer 11 and ohmic material 14.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a silicon carbide (hereinafter referred to as SiC) semiconductor device in which a polysilicon layer is used. [Background technology]

[0002] Patent Document 1 discloses a technology related to edge cutting after resist coating. Specifically, after forming an underlying insulating film made of a silicon oxide film on a silicon substrate, resist is coated on the underlying insulating film, and then edge cutting is performed by removing the resist at the outer edge of the wafer by edge rinsing processing or the like. Then, after edge cutting, a resist pattern for forming contact holes in the underlying insulating film is formed by exposure, and at this time, the exposed area is prevented from overlapping the edge cut area.

[0003] In this way, by ensuring that the exposed area of ​​the resist corresponding to the area where the contact hole is to be formed does not overlap the edge cut area, the generation of particles due to exposure of the plug conductor portion formed in the contact hole is suppressed. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2011-35196 A Summary of the Invention [Problem to be solved by the invention]

[0005] In the case of manufacturing a power semiconductor element such as a MOSFET in a SiC semiconductor device, a gate wiring layer including a gate electrode is formed from polysilicon, and then the polysilicon is covered with an insulating film such as an oxide film. After this process, a contact hole is provided in the insulating film, and an ohmic material such as Ni is deposited in the region, and a heat treatment is then performed to form an ohmic electrode in ohmic contact with the SiC.

[0006] In the manufacture of such a SiC semiconductor device, it is possible to apply the edge cut technique shown in the above-mentioned Patent Document 1. However, when the edge cut technique shown in Patent Document 1 is applied, the insulating film is removed in the edge cut region, so that polysilicon may be exposed. If the polysilicon is exposed, the ohmic material reacts with the polysilicon when forming the ohmic electrode, and the reaction product becomes particles, which is a problem. In SiC, the heat treatment temperature when forming the ohmic electrode is high, so the polysilicon reacts with the ohmic material. For example, when nickel (Ni) is used as the ohmic material, Ni silicide is formed, which causes the above problem.

[0007] In the technology of Patent Document 1, the edge cut region is formed up to a position inside the outer edge of the base insulating film, and the contact hole is formed further inside, but only the formation position of the contact hole is considered, and the outside is not considered. Therefore, when polysilicon is arranged in the edge cut region, the resist on it is removed, so that when the insulating film in the edge cut region is removed when the contact hole is formed, the polysilicon is exposed. In particular, when chips are formed as close to the outer edge of the wafer as possible in order to reduce unnecessary areas on the outer edge of the wafer that are not taken out as chips, the polysilicon is formed close to the outer periphery of the wafer, so that the possibility of exposure is high. And this problem is determined by the positional relationship between the formation position of the polysilicon and the edge cut region of the insulating film on it, so it cannot be solved even if the technology shown in Patent Document 1 is simply applied.

[0008] In view of the above, an object of the present invention is to provide a method for manufacturing a SiC semiconductor device that can suppress the generation of particles when a polysilicon layer is used. [Means for solving the problem]

[0009] In order to achieve the above object, the present invention provides a method for manufacturing a SiC semiconductor device, comprising: Preparing a SiC wafer (10) on which a semiconductor element is formed; forming a polysilicon layer (11) on a SiC wafer; forming an insulating film (12) covering the polysilicon layer; forming a resist (13) on the insulating film, and then patterning the resist to form a resist pattern; etching the insulating film using the resist pattern as a mask to form contact holes that open desired portions of the semiconductor element, and removing the insulating film at the outer edge of the SiC wafer to perform edge cutting, thereby patterning the insulating film; forming an ohmic material (14) on the insulating film including inside the contact hole, and then performing a heat treatment to bring the ohmic material into ohmic contact with a desired portion of the semiconductor element; In forming the polysilicon layer, the polysilicon layer is removed from the outer edge of the SiC wafer to perform edge cutting of the polysilicon layer; By forming a resist pattern, the resist is removed from the outer edge of the SiC wafer to perform edge cutting. In the patterning of the insulating film, the edge of the insulating film is cut by using a resist pattern made of the edge-cut resist as a mask; The width (Wa) of the edge-cut region of the polysilicon layer is made larger than the width (Wb) of the edge-cut region of the insulating film.

[0010] In this way, the width of the edge cut region of the polysilicon layer is made larger than the width of the edge cut region of the insulating film, which prevents the polysilicon layer from being exposed at the outer edge of the SiC wafer and suppresses the generation of particles caused by the reaction product of the polysilicon layer and the ohmic material.

[0011] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and specific components described in the embodiments described below. [Brief description of the drawings]

[0012] [Figure 1] 1A to 1C are cross-sectional views showing a manufacturing process of the SiC semiconductor device according to the first embodiment of the present invention. [Diagram 2] 5A to 5C are cross-sectional views showing a manufacturing process of a SiC semiconductor device shown as a comparative example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other will be denoted by the same reference numerals.

[0014] (First embodiment) A first embodiment will be described. The manufacturing method of the SiC semiconductor device described in this embodiment can be applied to a SiC semiconductor device in which a power semiconductor element such as a MOSFET is formed, but can also be applied to other SiC semiconductor devices that are provided with a polysilicon layer. For example, a polysilicon layer can be arranged on SiC via an insulating film, and a p-type layer and an n-type layer can be formed in the polysilicon layer to form a PN diode, thereby forming a temperature sensing device using a PN diode. The present invention can also be applied to a SiC semiconductor device provided with such a temperature sensing device. Note that, here, as an example, a SiC semiconductor device provided with a MOSFET is taken as an example to describe the manufacturing method of the SiC semiconductor device according to this embodiment.

[0015] First, the element formation process in Fig. 1 is performed. Specifically, a SiC wafer 10 is prepared, and an element formation process (not shown) is performed to form each part for forming a MOSFET on the SiC wafer 10. For example, each part of the MOSFET made of SiC is formed by epitaxially growing a drift layer, forming a base region, a source region, and a contact region for the base region by ion implantation, etc.

[0016] Then, a polysilicon layer 11 doped with impurities is formed on the SiC wafer 10 on which the portion of the MOSFET made of SiC is formed, via a gate insulating film (not shown). After that, a mask (not shown) is placed on the polysilicon layer 11, and anisotropic etching is performed to pattern the polysilicon layer 11 to form a gate wiring layer including a gate electrode. At this time, the polysilicon layer 11 is removed at the outer edge of the SiC wafer 10 to perform edge cutting of the polysilicon layer 11. The range of the edge cut is arbitrary, but the width Wa of the edge cut region is set to a predetermined width so that as many chips as possible can be taken out, while the polysilicon layer 11 is not exposed near the outer edge of the SiC wafer 10 in a later process. Here, the edge cut region is set to cover the entire circumference of the SiC wafer 10 within a range of 3±0.5 mm from the outer edge of the SiC wafer 10.

[0017] Next, as an insulating film forming step in FIG. 1, an insulating film 12 made of an oxide film or the like is formed so as to cover the SiC wafer 10 and the polysilicon layer 11 after patterning. Then, as a resist coating step in FIG. 1, a resist 13 is coated on the insulating film 12, and the resist 13 is patterned by performing a photolithography step, i.e., exposure, development, etc., to form a resist pattern. As a result, a region in which a contact hole (not shown) is to be formed in the insulating film 12 is opened in the resist 13, and a portion of the resist 13 corresponding to the outer edge of the SiC wafer 10 is also removed to perform edge cutting. At this time, the width Wb of the edge cut region of the resist 13 is set to a predetermined width, but the width Wa of the edge cut range of the polysilicon layer 11 is made larger than the width Wb. In other words, the outer edge of the polysilicon layer 11 is covered by the resist 13 when viewed from the normal direction to the surface of the SiC wafer 10. As long as this condition is satisfied, the width Wb of the edge cut range of the resist 13 can be any width, but here the edge cut region is set to encompass the entire circumference of the SiC wafer 10 within a range of 1.5±0.5 mm from the outer edge of the SiC wafer 10.

[0018] 1, anisotropic etching is performed using a resist pattern as a mask to pattern the insulating film 12. As a result, the insulating film 12 is removed at the outer edge of the SiC wafer 10 to perform edge cutting, and contact holes are formed to open desired portions of the MOSFET, specifically, contact regions of the source region and base region.

[0019] Then, as the resist removal step in FIG. 1, the resist 13 is removed, and then an ohmic formation step is performed. That is, an ohmic material 14 made of, for example, Ni is formed so as to cover the insulating film 12 including the inside of a contact hole (not shown), and a heat treatment is further performed. As a result, the contact portion between the ohmic material 14 and SiC is brought into ohmic contact, and at least a part of the ohmic electrode is formed. For example, the ohmic material 14 reacts with SiC in a silicide reaction to form a metal silicide, and the contact portion between the ohmic material 14 and SiC is brought into ohmic contact. When Ni is used as the ohmic material 14, the Ni silicide is formed to realize ohmic contact.

[0020] Although the subsequent steps are not shown in the figure, after processes such as forming a film of electrode material such as Al and forming an interlayer insulating film, the SiC semiconductor device equipped with a MOSFET is completed by dividing and singulating the substrate into chip units.

[0021] In the manner described above, a SiC semiconductor device can be manufactured. Here, the effects of applying the method for manufacturing a SiC semiconductor device according to this embodiment will be described.

[0022] First, a case where the edge cut range of the polysilicon layer 11 is cut without taking into consideration the relationship with the edge cut region of the resist 13 will be described with reference to FIG.

[0023] In this case, when the same process as in this embodiment is performed, the state shown in Fig. 2 is obtained, and as shown in the resist application process in Fig. 2, the width Wb of the edge cut region of the resist 13 can be larger than the width Wa of the edge cut region of the polysilicon layer 11. In particular, such a relationship is obtained when the unnecessary region on the outer edge of the SiC wafer 10 is reduced and the polysilicon layer 11 is formed up to the vicinity of the outer edge of the SiC wafer 10 so that as many chips as possible can be extracted.

[0024] For this reason, when the insulating film 12 is patterned by anisotropic etching using a resist pattern as a mask in the insulating film etching process, the end of the polysilicon layer 11 protrudes from the end of the insulating film 12, exposing the polysilicon layer 11. Therefore, when the ohmic formation process is performed after the resist removal process, the exposed polysilicon layer 11 and the ohmic material 14 come into contact with each other, and react with each other during heat treatment. The reaction product generated by this, for example, Ni silicide is formed when the ohmic material 14 is Ni, and this may become particles and adversely affect the element characteristics.

[0025] In contrast, in the manufacturing method of this embodiment, as described above, the width Wa of the edge cut range of the polysilicon layer 11 is made larger than the width Wb of the edge cut region of the resist 13. Therefore, the width Wa of the edge cut region of the polysilicon layer 11 is made larger than the width Wb of the edge cut region of the insulating film 12 formed using the resist pattern as a mask, and the end of the polysilicon layer 11 can be covered with the insulating film 12. Therefore, since the polysilicon layer 11 is not exposed at the outer edge of the SiC wafer 10, the ohmic material 14 does not come into contact with the polysilicon layer 11, and no reaction products are formed during heat treatment, so that the generation of particles can be suppressed. Therefore, deterioration of element characteristics due to adhesion of particles can be suppressed, and it is possible to manufacture SiC semiconductor devices with a high yield.

[0026] As described above, according to the manufacturing method of this embodiment, the width Wa of the edge cut region of the polysilicon layer 11 is made larger than the width Wb of the edge cut region of the insulating film 12. This prevents the polysilicon layer 11 from being exposed at the outer edge of the SiC wafer 10, making it possible to suppress the generation of particles due to reaction products between the polysilicon layer 11 and the ohmic material 14.

[0027] (Other embodiments) Although the present disclosure has been described based on the above-described embodiment, it is not limited to the embodiment, and includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and concept of the present disclosure.

[0028] For example, in the above embodiment, a power semiconductor element such as a MOSFET or a temperature sensing device is formed as an example of a SiC semiconductor device having a polysilicon layer, but other devices may be used. For example, the present invention can be applied to a case where a Zener diode for peripheral breakdown voltage formed on SiC via an insulating film, like a temperature sensing device, is formed of a polysilicon layer.

[0029] In addition, in the above embodiment, examples of the width of the edge cut region of the polysilicon layer 11 and the width of the edge cut region of the resist 13, i.e., the width of the edge cut region of the insulating film 12, are shown, but these are merely examples and other dimensions may be used.

[0030] Furthermore, in the above embodiment, Ni is used as an example of an ohmic material, but the present invention can also be applied to the case where other ohmic materials that can react with the polysilicon layer 11 to generate particles, such as titanium (Ti), platinum (Pt), cobalt (Co), tantalum (Ta), molybdenum (Mo), etc. are used.

[0031] Although the above has been described as a method for manufacturing a SiC semiconductor device in which the polysilicon layer 11 is formed on the SiC wafer 10, the present invention can also be applied to a case in which a polysilicon layer is formed on a silicon (Si) wafer. [Explanation of symbols]

[0032] 10 SiC wafer 11 Polysilicon layer 12 Insulating film 13. Resist 14 Ohmic Materials

Claims

1. A method for manufacturing a silicon carbide semiconductor device, comprising: Preparing a silicon carbide wafer (10) on which a semiconductor element is formed; forming a polysilicon layer (11) on the silicon carbide wafer; forming an insulating film (12) covering the polysilicon layer; forming a resist (13) on the insulating film, and then patterning the resist to form a resist pattern; Etching the insulating film using the resist pattern as a mask to form contact holes that open desired portions of the semiconductor element, and removing the insulating film at an outer edge portion of the silicon carbide wafer to perform edge cutting, thereby patterning the insulating film; forming an ohmic material (14) on the insulating film including inside the contact hole, and then performing a heat treatment to bring the ohmic material into ohmic contact with a desired portion of the semiconductor element; In the step of forming the polysilicon layer, an edge cut of the polysilicon layer is performed by removing the polysilicon layer at an outer edge portion of the silicon carbide wafer; In forming the resist pattern, an edge cut is performed by removing a portion of the resist around an outer edge of the silicon carbide wafer, In the patterning of the insulating film, the edge-cut of the insulating film is performed by using the resist pattern of the resist having been subjected to the edge-cut as a mask; a width of the edge-cut region of the polysilicon layer being wider than a width of the edge-cut region of the insulating film;

2. 2 . The method for manufacturing a silicon carbide semiconductor device according to claim 1 , wherein said ohmic contact comprises using nickel as said ohmic material, and forming nickel silicide between said silicon carbide constituting said semiconductor element by said heat treatment.

3. The width of the edge-cut region of the insulating film is set to 1.5±0.5 mm, 3. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein a width of the edge-cut region of the polysilicon layer is set to 3±0.5 mm.

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