Semiconductor device and its manufacturing method

Abstract

To provide a semiconductor device with satisfactory reliability of the joint layer in a sintered joint technique using metal nanoparticles, and a manufacturing method thereof.SOLUTION: A semiconductor device (1) includes: an insulating substrate (2); an electrode (3) formed over the insulating substrate (2); a junction layer (5) formed on the electrode (3) and consists of a sintered body of metal grains with the average particle size of nano order; and a semiconductor element (6) joined to the electrode (3) via the junction layer (5). The thickness of the junction layer (5) is 220 μm or more and 700 μm or less.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] Semiconductor devices for power conversion used for inverter control of vehicle-mounted chargers are equipped with vertical semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), and diodes. Electrodes made of metallization are formed on the front and back surfaces of these semiconductor elements, and in the case of a typical semiconductor device, the back surface electrode on the back surface side of the semiconductor element is connected to a circuit board via a solder joint.

[0003] Since the amount of heat generated by semiconductor elements tends to increase, high heat resistance is desired for the bonding material used in the power conversion semiconductor device. However, at present, no lead-free solder material with high heat resistance has been found. Therefore, as a material bonding technology to replace solder bonding, the application of sintering bonding technology utilizing the sintering phenomenon of metal particles to the power conversion semiconductor device is being considered. The sintering bonding material used in the sintering bonding technology is composed of metal particles and an organic component. In the sintering bonding technology, the bonding to the bonded member is performed by a porous bonding layer formed by the sintering phenomenon of metal particles contained in the sintering bonding material.

[0004] It is generally known that when the particle size of metal particles is reduced to nanometer size and the number of constituent atoms per particle is reduced, the effect of the surface area on the volume of the particle increases rapidly, and the melting point and sintering temperature are significantly lower than in the bulk state. Various sintering bonding techniques that take advantage of the low-temperature sintering property of such metal nanoparticles have been reported.

[0005] For example, Patent Document 1 discloses a bonding material structure suitable for ensuring metallic bonding when the substrate is made of metal, in a bonding material having a particle layer made of ultrafine metal particles provided on the surface of the substrate. Patent Document 2 discloses a semiconductor device in which electronic components are electrically connected to each other via a bonding layer, the bonding layer including an Ag matrix containing crystal grains smaller than 100 nm and a dispersed phase made of metal X having a harderness than Ag dispersed in the Ag matrix. Patent Document 3 discloses a semiconductor device including an insulating plate, an electrode provided on the insulating plate and having a recess, a bonding layer provided on the electrode and made of a sintered body of metal grains having an average grain size of 10 nm to 150 nm, and a semiconductor element bonded to the electrode via the bonding layer, in which the recess does not reach the end of the bonding surface between the electrode and the bonding layer. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2007-214340 A [Patent Document 2] JP 2012-124497 A [Patent Document 3] Patent No. 6632686 Summary of the Invention [Problem to be solved by the invention]

[0007] In the conventional semiconductor devices disclosed in Patent Documents 1 and 2 above, thermal stress between the electrodes and bonding layer of the circuit board caused by repeated exposure to high and low temperatures, such as 175°C to 300°C, could cause cracks in the bonding layer, making it difficult to obtain good bonding reliability.

[0008] In the conventional semiconductor device disclosed in Patent Document 3, cracks are intentionally generated in localized positions to relieve the stress applied to the entire bonding layer. However, the presence of cracks can cause crack propagation, which can prevent good bonding reliability from being obtained.

[0009] The present disclosure has been made to solve the problems described above, and aims to provide a semiconductor device and a manufacturing method thereof that have a highly reliable bonding layer using sintering bonding technology that uses metal nanoparticles. [Means for solving the problem]

[0010] In order to achieve the above object, a semiconductor device according to an embodiment of the present disclosure includes: An insulating substrate; An electrode provided on the insulating substrate; a bonding layer provided on the electrode and made of a sintered body of metal grains having an average grain size on the nano-order; a semiconductor element bonded to the electrode via the bonding layer; The thickness of the bonding layer is not less than 220 μm and not more than 700 μm.

[0011] A method for manufacturing a semiconductor device according to an embodiment of the present disclosure includes: A step of printing a first sintered bonding material containing metal nanoparticles on an electrode bonded to an insulating substrate; A step of placing a second bonding layer made of a sintered body of metal grains having an average grain size of nano-order on the first sintered bonding material; Printing a third sintered bonding material containing metal nanoparticles on the second bonding layer; placing a semiconductor element on the third sintered joining material; a step of heating the semiconductor element while applying pressure thereto after the semiconductor element is placed, sintering the first sintered bonding material and the third sintered bonding material to form a sintered bonding layer including the second bonding layer, and bonding the electrode and the semiconductor element via the sintered bonding layer; Includes. Effect of the Invention

[0012] According to an embodiment of the present disclosure, it is possible to provide a semiconductor device having a highly reliable bonding layer in a sintering bonding technique using metal nanoparticles, and a method for manufacturing the same. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present disclosure. [Diagram 2] FIG. 2 is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present disclosure. [Diagram 3] FIG. 3 is a plan view showing a configuration of a semiconductor device according to an embodiment of the present disclosure. [Figure 4] 4(a) to (f) are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present disclosure. [Diagram 5] 5(a) to (f) are diagrams illustrating a method for manufacturing the second bonding layer according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] In the semiconductor device according to the embodiment of the present disclosure, the thickness of the bonding layer made of a sintered body of metal grains having an average grain size on the nano-order is thicker than in the past, and therefore, even when used in a high-temperature environment, cracks that may occur in the bonding layer can be suppressed and bonding reliability can be improved.

[0015] It was difficult to obtain a thick bonding layer by simply printing a sintered bonding material containing metal nanoparticles on an electrode and heating it, as in the conventional techniques disclosed in Patent Documents 1 to 3. This is because, when the sintered bonding material contains metal nanoparticles, even if a metal mask is placed on the electrode and the sintered bonding material is printed thickly as described below, when the metal mask is removed after heating, the formed bonding layer sags outward.

[0016] The present inventors have conducted extensive research in light of the above circumstances, and have completed a semiconductor device using a sintering bonding technique that uses metal nanoparticles, in which the thickness of the bonding layer is thicker than in the past.

[0017] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. However, the semiconductor device of the present disclosure is not limited to the embodiments shown in the drawings, and various embodiments may be adopted without departing from the scope of the present disclosure. Note that the same components are given the same reference numerals, and descriptions thereof may be omitted.

[0018] 1 and 2 are cross-sectional views of a semiconductor device 1 according to an embodiment of the present disclosure, and Fig. 3 is a plan view of the semiconductor device 1 according to an embodiment of the present disclosure.

[0019] <1. Configuration> As shown in Figures 1 to 3, a semiconductor device 1 according to an embodiment of the present disclosure includes an insulating substrate 2, an electrode 3 and an electrode 4 provided on the insulating substrate 2, a bonding layer (sintered bonding layer) 5 provided on the electrode 3 and made of a sintered body of metal grains having an average grain size on the nano-order, and a semiconductor element 6 bonded to the electrode 3 via the bonding layer 5.

[0020] <1-1. Insulating substrate> The insulating substrate 2 supports the electrodes 3 and 4, the bonding layer 5, and the semiconductor element 6. The insulating substrate 2 is not particularly limited, but a ceramic substrate such as silicon nitride or aluminum oxide can be used.

[0021] <1-2. Electrode> The electrode 3 is a patterned wiring electrode. The electrode 4 is an electrode on which a heat dissipation member (not shown) such as a heat spreader is provided at the bottom. The materials of the electrodes 3 and 4 are preferably copper (Cu) and aluminum (Al). By using a material such as copper or aluminum having excellent conductivity, the electrical characteristics of the semiconductor device 1 are improved. The electrode 3 may be plated or sputtered with any of Au, Pt, Pd, Ag, Cu, Ti, and Ni. That is, a metal layer (not shown) different from the metal material of the electrode 3 is provided on the electrode 3, and the material of this metal layer may be any of Au, Pt, Pd, Ag, Cu, Ti, and Ni. This improves the bonding between the electrode 3 and the bonding layer 5, and the semiconductor device 1 having excellent bonding reliability even in a high-temperature environment can be obtained. The electrodes may be provided on both sides of the insulating substrate 2 or on one surface of the insulating substrate 2, as shown in FIG. 1 and FIG. 2. Therefore, for example, the electrode 4 may be omitted, and a heat dissipation member (not shown) may be directly bonded to the insulating substrate 2.

[0022] <1-3. Bonding layer> The bonding layer (sintered bonding layer) 5 bonds the electrode 3 and the semiconductor element 6. The bonding layer 5 is formed by printing a sintered bonding material, in which metal nanoparticles are dispersed in an organic solvent, on the electrode 3, and then heating the material while applying pressure to sinter and bond a plurality of metal nanoparticles. As a result, the bonding layer 5 is made of a sintered body of metal grains with an average grain size on the nanometer order.

[0023] The material of the metal particles is preferably Ag. By sintering the sintered bonding material containing Ag nanoparticles to form a porous bonding layer, the thermal stress between the electrode 3 and the bonding layer 5 caused by repeated exposure to high and low temperatures, such as 175 to 300°C, can be alleviated, and good bonding reliability can be obtained.

[0024] The average particle size of the metal particles is preferably 10 nm or more and 100 nm or less. By reducing the average particle size of the metal particles of the sintered body, the deformability of the bonding layer 5 is increased, and sufficient elongation can be obtained even in a high-temperature environment, resulting in good bonding reliability. On the other hand, if the average particle size of the metal particles of the sintered body is excessively small, the sintering bonding of the metal particles becomes insufficient, resulting in insufficient bonding strength. Therefore, the average particle size is preferably 10 nm or more. To reduce the average particle size of the metal particles, the average particle size of the metal nanoparticles before sintering contained in the sintered bonding material used must be small. It is particularly desirable that the average particle size of the metal nanoparticles before sintering is 50 nm or less. The average particle size of the metal particles can be measured using a device with high magnification and high resolution, such as a SEM (scanning electron microscope) or a TEM (transmission electron microscope). Specifically, for example, a straight line is drawn arbitrarily in an SEM image or a TEM image, the areas of the multiple metal particles that are the subject of the straight line are calculated, and each circle equivalent diameter is calculated from each area, and the sum is calculated. This is performed for any five fields of view, and a total of 200 or more circle equivalent diameters are calculated. It is preferable to define the average grain size of the metal grains as the sum of the equivalent circle diameters in the five fields of view divided by the number of metal grains to be measured. Alternatively, the average grain size of the metal grains can also be measured, for example, by electron backscatter diffraction (EBSD). In this case, the grain boundary is defined as having a crystal orientation of 5° or more, the area of ​​each metal grain is determined, and the equivalent circle diameter is determined from the area. It is preferable to define the average of the determined equivalent circle diameters as the average grain size of the metal grains.

[0025] The thickness of the bonding layer 5 is 220 μm or more and 700 μm or less. By having the thickness of the bonding layer 5 of 220 μm or more, the thermal stress between the electrode 3 and the bonding layer 5 caused by repeated high and low temperatures, such as 175° C. to 300° C., can be alleviated, and good bonding reliability can be obtained. By having the thickness of the bonding layer 5 of 700 μm or less, the generation of bubbles when printing the sintered bonding material or the sagging of the peripheral part immediately after printing can be prevented, and a stable shape can be maintained, thereby obtaining good bonding reliability. In order to more effectively exert the above-mentioned effects, the thickness of the bonding layer 5 is preferably 290 μm or more, more preferably 350 μm or more. In addition, the thickness of the bonding layer 5 is preferably 520 μm or less, more preferably 460 μm or less.

[0026] The form of the bonding layer (sintered bonding layer) 5 is not particularly limited as long as the layer thickness is large and the bonding reliability can be improved. For example, the side of the bonding layer 5 may be tapered in cross section. For example, as shown in FIG. 1, the side of the bonding layer 5 may have a step-like step in cross section. For example, the bonding layer 5 may have a plurality of bonding layers stacked. For example, as shown in FIG. 2, the bonding layer 5 may have a form in which a plurality of bonding layers are stacked, and the side of the bonding layer 5 may have a step-like step. In FIG. 2, as one embodiment of the bonding layer, the bonding layer 5 includes a first bonding layer 7 provided on the electrode 3, a second bonding layer 8 provided on the first bonding layer 7, and a third bonding layer 9 provided on the second bonding layer 8. The semiconductor device 1 shown in FIG. 2 will be described in detail below.

[0027] The thickness of the first bonding layer 7 and the third bonding layer 9 is preferably 10 μm or more and 100 μm or less. When the thickness of the first bonding layer 7 and the third bonding layer 9 is 10 μm or more, the thermal stress between the electrode 3 and the bonding layer 5 caused by repeated low and high temperatures during use in a high temperature environment can be alleviated, and good bonding reliability can be obtained. When the thickness of the first bonding layer 7 and the third bonding layer 9 is 100 μm or less, the amount of contraction of the sintered body is alleviated during sintering of the first sintered bonding material and the third sintered bonding material before sintering the first bonding layer 7 and the third bonding layer 9. This can alleviate the stress generated between the electrode 3 and the bonding layer 5 and maintain a stable shape. In order to more effectively exert the above-mentioned effect, the thickness of the first bonding layer 7 and the third bonding layer 9 is more preferably 40 μm or more, and even more preferably 50 μm or more. Moreover, the thickness of each of the first bonding layer 7 and the third bonding layer 9 is more preferably 70 μm or less, and even more preferably 60 μm or less.

[0028] The thickness of the second bonding layer 8 is preferably 200 μm or more and 500 μm or less. By having the thickness of the second bonding layer of 200 μm or more, the thermal stress between the electrode of the circuit board and the bonding layer caused by repeated high and low temperatures, such as 175° C. to 300° C., can be alleviated, and good bonding reliability can be obtained. By having the thickness of the second bonding layer of 500 μm or less, the amount of contraction of the sintered body can be alleviated and a stable shape can be maintained during sintering of the second sintered bonding material before sintering of the second bonding layer 8. In order to more effectively exert the above-mentioned effect, the thickness of the second bonding layer 8 is more preferably 250 μm or more, and even more preferably 300 μm or more. Moreover, the thickness of the second bonding layer 8 is more preferably 450 μm or less, and even more preferably 400 μm or less. The thickness of the second bonding layer 8 is preferably larger than the thicknesses of the first bonding layer 7 and the third bonding layer 9. This allows the thickness of the bonding layer 5 to be increased, thereby improving the bonding reliability.

[0029] As shown in Fig. 3, each of the first bonding layer 7, the second bonding layer 8, and the third bonding layer 9 is rectangular in plan view. In Fig. 2, they are square. It is preferable that the areas of the first bonding layer 7, the second bonding layer 8, and the third bonding layer 9 in plan view satisfy the following formula (1). First bonding layer ≧ Second bonding layer ≧ Third bonding layer (1) This makes it possible to suppress protrusion due to variations in positional accuracy and size when forming the second bonding layer 8 on the first bonding layer 7. Similarly, when forming the third bonding layer 9 on the second bonding layer 8, protrusion due to variations in positional accuracy and size can be suppressed.

[0030] Furthermore, when the above formula (1) is satisfied, as shown in Fig. 2, it is preferable that the semiconductor device 1 has a step-like step formed by the side surfaces of the first bonding layer 7, the second bonding layer 8, and the third bonding layer 9. This prevents the upper layer from protruding from the lower layer, and allows the layers to be stacked more reliably.

[0031] In addition, if the interlayers of bonding layer 5 in Figure 2 (i.e., the interface between first bonding layer 7 and second bonding layer 8, and the interface between second bonding layer 8 and third bonding layer 9) cannot be recognized, it may correspond to Figure 1.

[0032] <1-4. Semiconductor elements> The material of the semiconductor element 6 is preferably any one of silicon carbide, gallium nitride, gallium arsenide, and diamond. The semiconductor element 6 formed of these wide band gap semiconductor materials has a higher operating limit junction temperature than a semiconductor element formed of silicon, and can be used in a high temperature environment. A semiconductor device using a semiconductor element formed of silicon can only be used at temperatures of approximately 150°C or less, but a semiconductor device 1 using a semiconductor element 6 formed of these wide band gap semiconductor materials can be used at high temperatures of 250°C to 300°C.

[0033] <1-5.Dimensions> The sizes of the above-mentioned components are not particularly limited, but a preferred example is insulating substrate 2 of 24 mm x 24 mm x 0.3 mm thick, electrodes 3 and 4 of 22 mm x 22 mm x 0.8 mm thick, first bonding layer 7 of 7 mm x 7 mm x 0.05 mm thick, second bonding layer 8 of 6 mm x 6 mm x 0.25 mm thick, third bonding layer 9 of 5 mm x 5 mm x 0.05 mm thick, and semiconductor element 6 of 5 mm x 5 mm x 0.3 mm thick.

[0034] <1-6. Effects> According to the above-mentioned configuration, since the thickness of the bonding layer 5 is thicker than before, it is possible to reduce the stress generated by the difference in thermal expansion between the electrode 3 and the bonding layer 5, and it is possible to suppress cracks that may occur in the bonding layer 5 and provide a semiconductor device 1 with high bonding reliability. Specifically, the thermal stress between the electrode 3 and the bonding layer 5 generated by repeated switching between high and low temperatures, such as 175°C to 300°C, can be alleviated, and good bonding reliability can be obtained. As a more specific example, even if repeated switching between low and high temperatures between -40°C to 200°C is performed 1000 cycles, the thermal stress that may occur in the bonding layer can be suppressed, and the occurrence of cracks can be suppressed, improving the bonding reliability.

[0035] <2. Manufacturing method> Next, a method for manufacturing the semiconductor device 1 according to the embodiment of the present disclosure will be described.

[0036] First, as shown in Fig. 4(a), a DBC (Direct Bonded Copper) substrate is prepared, which includes an insulating substrate 2 and electrodes 3 and 4 bonded to the insulating substrate 2. Then, a metal mask 34 is placed on the electrode 3, and a first sintered bonding material 31 containing metal nanoparticles is printed. The thickness of the metal mask 34 is, for example, 0.1 mm.

[0037] Next, as shown in FIG. 4(b), after the solvent component of the first sintering bonding material 31 is dried, the metal mask 34 is removed.

[0038] 4(c), a second bonding layer 8 made of a sintered body of metal grains having an average grain size of nano-order is placed on the first sintered bonding material 31. A manufacturing method of the second bonding layer 8 will be described later.

[0039] 4(d), a metal mask 35 is placed on the second bonding layer 8, and a third sintered bonding material 33 containing metal nanoparticles is printed on the metal mask 35. The thickness of the metal mask 35 is, for example, 0.1 mm.

[0040] Next, as shown in FIG. 4(e), the solvent component of the third sintering bonding material 33 is dried, and then the metal mask 35 is removed.

[0041] Next, as shown in FIG. 4(f), the semiconductor element 6 is placed on the third sintered bonding material 33. After that, the first sintered bonding material 31 and the third sintered bonding material 33 are sintered by heating while applying pressure. As a result, a bonding layer (sintered bonding layer) 5 including a second bonding layer 8 is formed. In FIG. 4(f), the first sintered bonding material 31 and the third sintered bonding material 33 are sintered to form a first bonding layer 7 and a third bonding layer 9, respectively. As a result, the first bonding layer 7, the second bonding layer 8, and the third bonding layer 9 are laminated to form a bonding layer (sintered bonding layer) 5. At this time, the first sintered bonding material 31 and the third sintered bonding material 33 may shrink by 5% in the planar direction and 50% in the thickness direction due to sintering. The heating conditions are preferably a preheating at 60° C. for 30 minutes, followed by heating to 270° C. in 70 minutes and holding at 270° C. for 60 minutes.

[0042] In this manner, the electrode 3 and the semiconductor element 6 are bonded via the bonding layer 5 (the first bonding layer 7, the second bonding layer 8, and the third bonding layer 9), thereby manufacturing the semiconductor device 1. Note that, although Fig. 4(f) shows the semiconductor device 1 in which the bonding layer 5 is made up of a plurality of laminated bonding layers, if the layers of the bonding layer 5 cannot be recognized, the semiconductor device 1 as shown in Fig. 1 is manufactured.

[0043] Next, a method for manufacturing the second bonding layer 8 according to an embodiment of the present disclosure will be described. Fig. 5 is a diagram showing a method for manufacturing the second bonding layer 8 according to an embodiment of the present disclosure.

[0044] 5(a), a support base 41 is prepared. The support base 41 is preferably made of glass, copper, brass, or the like.

[0045] 5(b), a first release agent 43a is spray-coated on the support base 41 and dried at 100° C. for 60 minutes. The first release agent 43a is preferably made of, for example, boron nitride. The thickness of the first release agent 43a is, for example, 10 μm to 20 μm.

[0046] Next, as shown in FIG. 5(c), the second release agent 43b is spray-coated on the first release agent 43a and dried at 100°C for 60 minutes. Similarly, it is preferable to use boron nitride or the like for the second release agent 43b. The total thickness of the first release agent 43a and the second release agent 43b is, for example, 15 μm to 30 μm. By applying the release agent twice in this manner, gaps such as pinholes are filled, and the releasability of the second bonding layer 8 is improved.

[0047] 5(d), a metal mask 44 is placed on the second release agent 43b, and the second sintered bonding material 42 containing metal nanoparticles is printed on the metal mask 44. The thickness of the metal mask 44 is, for example, 0.5 mm.

[0048] Next, as shown in FIG. 5(e), the solvent component of the second sintering bonding material 42 is dried, and then the metal mask 44 is removed.

[0049] Next, as shown in FIG. 5(f), the second sintered bonding material 42 is heated and sintered to form the second bonding layer 8, and then the second bonding layer 8 is released from the support base 41. At this time, the second sintered bonding material 42 may shrink by 5% in the planar direction and 50% in the thickness direction due to sintering. The heating conditions are preferably such that preheating is performed at 60° C. for 30 minutes, followed by heating to 270° C. in 70 minutes and then holding at 270° C. for 60 minutes. In this manner, the second bonding layer 8 is manufactured.

[0050] According to the above-mentioned manufacturing method of the semiconductor device 1, the second bonding layer 8 having a large thickness is prepared in advance. Then, the first sintered bonding material 31 is printed on the electrode 3, the second bonding layer 8 prepared in advance is placed thereon, and the third sintered bonding material 33 is further printed thereon, thereby obtaining the bonding layer (sintered bonding layer) 5 having a large thickness after heating.

[0051] As described above, in the conventional method, it was difficult to print the sintered bonding material thickly and obtain a bonding layer with a large film thickness at one time. Furthermore, if the sintered bonding material is printed thickly, it is expected that the dimensional shrinkage during sintering will be large, and the stress applied to the bonding layer at this point will be large. According to the manufacturing method of the semiconductor device 1 described above, when the second bonding layer 8 is placed on the first sintered bonding material 31, the second bonding layer 8 has already shrunk in size, so that the stress applied to the bonding layer 5 after sintering of the first sintered bonding material 31 and the third sintered bonding material 33 is small. As a result, the bonding reliability can be improved.

[0052] According to the above-mentioned manufacturing method of the second bonding layer 8, the second sintered bonding material 42 shrinks during sintering, but by using a release agent to improve the releasability, it is possible to accommodate the shrinkage and form a single bonding layer with a large thickness without cracking. The disclosure of this specification may include the following aspects. (Aspect 1) An insulating substrate; An electrode provided on the insulating substrate; a bonding layer provided on the electrode and made of a sintered body of metal grains having an average grain size on the nano-order; a semiconductor element bonded to the electrode via the bonding layer; The semiconductor device, wherein the bonding layer has a thickness of 220 μm or more and 700 μm or less. (Aspect 2) 2. The semiconductor device of claim 1, wherein a side surface of the bonding layer has a stepped portion in a cross-sectional view. (Aspect 3) The bonding layer is a first bonding layer provided on the electrode; a second bonding layer provided on the first bonding layer; a third bonding layer provided on the second bonding layer; 2. The semiconductor device of embodiment 1, wherein the second bonding layer has a thickness greater than a thickness of each of the first bonding layer and the third bonding layer. (Aspect 4) 4. The semiconductor device according to aspect 3, wherein the second bonding layer has a thickness of 200 μm or more and 500 μm or less. (Aspect 5) 5. The semiconductor device according to aspect 3 or 4, wherein the first bonding layer and the third bonding layer each have a thickness of 10 μm or more and 100 μm or less. (Aspect 6) 6. The semiconductor device according to any one of aspects 3 to 5, wherein the areas of the first bonding layer, the second bonding layer, and the third bonding layer in a plan view satisfy the following formula (1): Area of ​​the first bonding layer ≧ Area of ​​the second bonding layer ≧ Area of ​​the third bonding layer (1) (Aspect 7) 7. The semiconductor device of claim 6, wherein in a cross-sectional view, the semiconductor device has a stepped structure formed by side surfaces of the first bonding layer, the second bonding layer, and the third bonding layer. (Aspect 8) 8. The semiconductor device according to any one of aspects 1 to 7, wherein the metal particles have an average particle size of 10 nm or more and 100 nm or less. (Aspect 9) 9. The semiconductor device according to any one of aspects 1 to 8, wherein the material of the metal particles is Ag. (Aspect 10) 10. The semiconductor device according to any one of aspects 1 to 9, wherein the material of the electrodes is Cu or Al. (Aspect 11) 11. The semiconductor device according to any one of aspects 1 to 10, wherein a metal layer different from the metal material of the electrode is provided on the electrode, and the material of the metal layer is any one of Au, Pt, Pd, Ag, Cu, Ti, and Ni. (Aspect 12) 12. The semiconductor device according to any one of aspects 1 to 11, wherein a material of the semiconductor element is any one of silicon carbide, gallium nitride, gallium arsenide, and diamond. (Aspect 13) A step of printing a first sintered bonding material containing metal nanoparticles on an electrode bonded to an insulating substrate; A step of placing a second bonding layer made of a sintered body of metal grains having an average grain size of nano-order on the first sintered bonding material; Printing a third sintered bonding material containing metal nanoparticles on the second bonding layer; placing a semiconductor element on the third sintered joining material; a step of heating the semiconductor element while applying pressure thereto after the semiconductor element is placed, sintering the first sintered bonding material and the third sintered bonding material to form a sintered bonding layer including the second bonding layer, and bonding the electrode and the semiconductor element via the sintered bonding layer; A method for manufacturing a semiconductor device comprising the steps of: (Aspect 14) The second bonding layer is Providing a support base; applying a first release agent onto the support base and drying it; applying a second release agent onto the first release agent and drying it; Printing a second sintered bonding material containing metal nanoparticles on the second release agent; Heating and sintering the second sintered bonding material to form a second bonding layer; Releasing the second bonding layer from the support base; 14. The method for producing a semiconductor device according to claim 13, wherein the semiconductor device is previously prepared by a method comprising the steps of: [Industrial Applicability]

[0053] The semiconductor device disclosed herein can reduce stress caused by the difference in thermal expansion between the electrodes on the substrate and the bonding layer, improving the reliability of the bonding layer even when used in a high-temperature environment, and can be applied to high-performance power modules used for inverter control in on-board chargers and the like. [Explanation of symbols]

[0054] 1 Semiconductor device 2. Insulating substrate 3, 4 electrodes 5 Bonding layer 6. Semiconductor elements 7 First bonding layer 8 Second bonding layer 9 Third bonding layer 31 First sintered bonding material 33 The third sintering material 34, 35, 44 Metal Mask 41 Support Base 42 Second sintered bonding material 43a, 43b Release agent

Claims

1. An insulating substrate; An electrode provided on the insulating substrate; a bonding layer provided on the electrode and made of a sintered body of metal grains having an average grain size on the nano-order; a semiconductor element bonded to the electrode via the bonding layer; The semiconductor device, wherein the bonding layer has a thickness of 290 μm or more and 700 μm or less.

2. The semiconductor device according to claim 1 , wherein a side surface of the bonding layer has a stepped portion in a cross-sectional view.

3. The bonding layer is a first bonding layer provided on the electrode; a second bonding layer provided on the first bonding layer; a third bonding layer provided on the second bonding layer; The semiconductor device according to claim 1 , wherein the second bonding layer has a thickness greater than a thickness of each of the first bonding layer and the third bonding layer.

4. The semiconductor device according to claim 3 , wherein the second bonding layer has a thickness of 200 μm or more and 500 μm or less.

5. 5. The semiconductor device according to claim 3, wherein the first bonding layer and the third bonding layer each have a thickness of 10 [mu]m or more and 100 [mu]m or less.

6. 6. The semiconductor device according to claim 3, wherein the areas of the first bonding layer, the second bonding layer, and the third bonding layer in a plan view satisfy the following formula (1): Area of ​​the first bonding layer ≧ Area of ​​the second bonding layer ≧ Area of ​​the third bonding layer (1)

7. 7. The semiconductor device according to claim 6, wherein in a cross-sectional view, there is a step-like difference formed by side surfaces of said first bonding layer, said second bonding layer, and said third bonding layer.

8. 8. The semiconductor device according to claim 1, wherein the average grain size of the metal grains is 10 nm or more and 100 nm or less.

9. 9. The semiconductor device according to claim 1, wherein the material of the metal particles is Ag.

10. 10. The semiconductor device according to claim 1, wherein the material of the electrodes is Cu or Al.

11. The semiconductor device according to any one of claims 1 to 10, wherein a metal layer different from a metal material of the electrode is provided on the electrode, and the material of the metal layer is any one of Au, Pt, Pd, Ag, Cu, Ti and Ni.

12. 12. The semiconductor device according to claim 1, wherein the material of the semiconductor element is any one of silicon carbide, gallium nitride, gallium arsenide, and diamond.

13. A step of printing a first sintered bonding material containing metal nanoparticles on an electrode bonded to an insulating substrate; A step of placing a second bonding layer made of a sintered body of metal grains having an average grain size of nano-order on the first sintered bonding material; printing a third sintered bonding material containing metal nanoparticles on the second bonding layer; placing a semiconductor element on the third sintered joining material; a step of heating the semiconductor element while applying pressure thereto after the semiconductor element is placed, sintering the first sintered bonding material and the third sintered bonding material to form a sintered bonding layer including the second bonding layer, and bonding the electrode and the semiconductor element via the sintered bonding layer; A method for manufacturing a semiconductor device comprising the steps of:

14. The second bonding layer is Providing a support base; applying a first release agent onto the support base and drying it; applying a second release agent onto the first release agent and drying it; Printing a second sintered bonding material containing metal nanoparticles on the second release agent; Heating and sintering the second sintered bonding material to form a second bonding layer; Releasing the second bonding layer from the support base; The method for manufacturing a semiconductor device according to claim 13, wherein the semiconductor device is prepared in advance by a method comprising:

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