Semiconductor Device

Abstract

A semiconductor device according to the present invention comprises: a substrate having a substrate main face and a substrate rear face; wirings, including a first drive wiring and a second drive wiring, disposed on the substrate main face; a semiconductor element connected to the first and second drive wirings; a first drive conductor that is disposed in a portion to the outside of the semiconductor element and on the same side of the substrate as the semiconductor element as viewed in a through-thickness direction, and that is connected to the first drive wiring; a second drive conductor that is disposed in a portion to the outside of the semiconductor element and on the same side of the substrate as the semiconductor element as viewed in the through-thickness direction, and that is connected to the second drive wiring; and a sealing resin that seals the wirings and the semiconductor element and covers the first drive conductor and the second drive conductor so as to expose the faces, of the first drive conductor and the second drive conductor, that are on the side opposite to the substrate in the through-thickness direction. The first drive conductor and the second drive conductor are separated from each other in a prescribed direction along the substrate main face. The volume of the first drive conductor is less than the volume of the second drive conductor.

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] A known semiconductor device has a configuration including a semiconductor element having a plurality of electrodes, an insulating layer covering a back surface of the semiconductor element on which the plurality of electrodes are formed, and a plurality of wirings formed in the insulating layer and electrically connected to the plurality of electrodes (see, for example, Patent Document 1).

[0003] Furthermore, in recent years, micromachines (MEMS: Micro Electro Mechanical Systems) are becoming more widespread. In the manufacturing process, a Si (silicon) substrate is microfabricated, and various semiconductor elements are mounted on the Si substrate. For example, the semiconductor device disclosed in Patent Document 2 includes a Si substrate (base), a semiconductor element (light-emitting element), and a wiring layer (wiring pattern), and the semiconductor element is mounted on the Si substrate. The wiring layer is formed on the Si substrate and is electrically connected to the semiconductor element. The wiring layer serves as a terminal when the semiconductor device is mounted on a circuit board of an electronic device or the like. The wiring layer is formed on the upper surface of the Si substrate.

[0004] A method for manufacturing a semiconductor device having the above configuration includes, for example, the following steps: forming a wiring layer on a Si wafer, mounting a plurality of semiconductor elements on the Si wafer, and dicing the Si wafer into individual pieces for each semiconductor element. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2013-239740 A [Patent Document 2] JP 2009-94409 A Summary of the Invention [Problem to be solved by the invention]

[0006] One example of the above-mentioned semiconductor device (paragraph

[0002] ) is a configuration including a substrate made of Si (silicon), a plurality of wirings formed on a main surface of the substrate which is one surface in the thickness direction of the substrate, a semiconductor element disposed in the center of the main surface of the substrate and formed on the plurality of wirings, a plurality of conductors disposed outward from the semiconductor element and formed on the plurality of wirings, and a sealing resin that seals the semiconductor element and the plurality of conductors. The plurality of conductors are exposed from the surface of the sealing resin opposite to the substrate in the thickness direction.

[0007] The multiple conductors include multiple drive conductors that drive the semiconductor element and multiple control conductors that control the driving of the semiconductor element. When viewed in the thickness direction, the multiple drive conductors are arranged on both sides of the semiconductor element in a predetermined direction and are arranged in a direction perpendicular to the predetermined direction and the thickness direction. The multiple control conductors are arranged on both sides of the semiconductor element in the direction in which the multiple drive conductors are arranged and are arranged in the predetermined direction.

[0008] It is preferable that the drive conductors carry a relatively large current, and therefore the volume of each drive conductor is made larger than the volume of a control conductor, for example, which only needs to carry a relatively small current, thereby reducing the electrical resistance of the drive conductors.

[0009] However, if the volume of each driving conductor is increased, there is a risk that, in the manufacturing process of the semiconductor device, after each driving conductor is formed on the wiring formed on the main surface of the base material before it is diced into individual substrates, the base material may be warped due to heating caused by forming a sealing resin, etc. This may make it difficult to transport the base material, to accurately diced the base material, and so on, which may make it difficult to stably manufacture semiconductor devices.

[0010] In addition, in the conventional manufacturing method described above (paragraph

[0004] ), after the wiring layer is formed, the semiconductor device is diced into individual pieces for each semiconductor element, so that the wiring layer is not formed on the side surface of the Si substrate formed by dicing. Therefore, when mounting the semiconductor device on the circuit board of an electronic device or the like using solder, it is necessary to use an X-ray inspection device or the like to check the state of the solder joint.

[0011] In view of the above circumstances, one object of the present disclosure is to provide a semiconductor device that can be stably manufactured. Another object of the present disclosure is to provide a semiconductor device that allows easy confirmation of the solder joint state when mounted on a circuit board. Yet another object of the present disclosure is to provide a manufacturing method suitable for manufacturing such a semiconductor device. [Means for solving the problem]

[0012] A semiconductor device provided according to an embodiment of a first aspect of the present disclosure includes a substrate having a substrate main surface and a substrate back surface facing opposite each other in a thickness direction, wiring arranged on the substrate main surface and including a first drive wiring and a second drive wiring, a semiconductor element electrically connected to the first drive wiring and the second drive wiring, a first drive conductor arranged on the same side of the substrate as the semiconductor element in a portion outer than the semiconductor element in the thickness direction and electrically connected to the first drive wiring, a second drive conductor arranged on the same side of the substrate as the semiconductor element in a portion outer than the semiconductor element in the thickness direction and electrically connected to the second drive wiring, and a sealing resin that seals the wiring and the semiconductor element and covers the first drive conductor and the second drive conductor such that surfaces of the first drive conductor and the second drive conductor opposite the substrate in the thickness direction are exposed, wherein the first drive conductor and the second drive conductor are arranged at a distance from each other in a predetermined direction along the substrate main surface, and a volume of the first drive conductor is smaller than a volume of the second drive conductor.

[0013] The present inventors have discovered that as the volume of the first driving conductor and the volume of the second driving conductor increase, the base material constituting the multiple substrates becomes more susceptible to warping when heated during the manufacturing process of the semiconductor device, for example, due to the formation of sealing resin.

[0014] Therefore, in the present semiconductor device, the volume of the first driving conductor is made smaller than the volume of the second driving conductor. This makes it possible to reduce warping of the base material constituting the multiple substrates even if the base material is heated during the manufacturing process of the semiconductor device due to the formation of sealing resin, etc. Therefore, the semiconductor device can be manufactured stably.

[0015] A semiconductor device provided according to another embodiment of the first aspect of the present disclosure includes a substrate having a substrate main surface and a substrate back surface facing opposite each other in a thickness direction, wiring arranged on the substrate main surface and including a first drive wiring and a second drive wiring, a semiconductor element mounted on the substrate main surface and electrically connected to the first drive wiring and the second drive wiring, a first drive conductor penetrating the substrate in the thickness direction so as to be exposed at the substrate main surface and the substrate back surface and electrically connected to the first drive wiring, a second drive conductor penetrating the substrate in the thickness direction so as to be exposed at the substrate main surface and the substrate back surface and electrically connected to the second drive wiring, and a sealing resin that seals the wiring and the semiconductor element, wherein the first drive conductor and the second drive conductor are arranged spaced apart from each other in a predetermined direction when viewed from the substrate back surface, and a volume of the first drive conductor is smaller than a volume of the second drive conductor.

[0016] The present inventors have discovered that as the volume of the first driving conductor and the volume of the second driving conductor increase, the base material constituting the multiple substrates becomes more susceptible to warping when heated during the manufacturing process of the semiconductor device, for example, due to the formation of sealing resin.

[0017] Therefore, in the present semiconductor device, the volume of the first driving conductor is made smaller than the volume of the second driving conductor. This makes it possible to reduce warping of the base material constituting the multiple substrates even if the base material is heated during the manufacturing process of the semiconductor device due to the formation of sealing resin, etc. Therefore, the semiconductor device can be manufactured stably.

[0018] A semiconductor device provided according to an embodiment of a second aspect of the present disclosure includes a semiconductor element having an element electrode formed thereon, a wiring layer located on one side of the semiconductor element in a thickness direction of the semiconductor element and conductive to the element electrode, a first columnar electrode protruding from the wiring layer to the other side in the thickness direction, and a resin member covering the semiconductor element, the resin member having a resin main surface and a resin back surface spaced apart in the thickness direction, a first resin side surface connected to the resin main surface, and a second resin side surface connected to the resin back surface, the first resin side surface being spaced apart from the The first columnar electrode is located inward from a second resin side surface, and has a first exposed side surface exposed from the resin member, a first covered side surface covered by the resin member, and a first top surface connected to the first exposed side surface and flush with the resin main surface, the first exposed side surface is located inward from the first covered side surface when viewed in the thickness direction and is flush with the first resin side surface, the first covered side surface and the second resin side surface each face in a first direction perpendicular to the thickness direction, and the first covered side surface overlaps the second resin side surface when viewed in the first direction.

[0019] A method for manufacturing a semiconductor device provided according to another embodiment of the second aspect of the present disclosure includes a substrate preparation step of preparing a substrate having a substrate main surface and a substrate back surface spaced apart from each other in a thickness direction, a wiring layer formation step of forming a wiring layer on the substrate main surface, a first columnar electrode formation step of forming a first columnar electrode on the wiring layer, an element mounting step of mounting a semiconductor element, a resin formation step of forming a resin member that covers the semiconductor element and is formed on the substrate, a first cutting step of making cuts in the first columnar electrode and the resin member up to a middle of the thickness direction of the first columnar electrode and the resin member to form first cut portions, and a second cutting step of cutting the resin member at the first cut portions to a depth of about 100 mm. and a second cutting process of cutting all of the first columnar electrode in a first direction, wherein a first exposed side surface exposed from the resin member and a first coated side surface covered by the resin member are formed on the first columnar electrode by the first cutting process, and a first resin side surface is formed on the resin member by the second cutting process, and a second resin side surface is formed on the resin member by the second cutting process, the first resin side surface is located inward from the second resin side surface when viewed in the thickness direction, the first exposed side surface is located inward from the first coated side surface when viewed in the thickness direction and is flush with the first resin side surface, the first coated side surface and the second resin side surface each face in a first direction perpendicular to the thickness direction, and the first coated side surface overlaps the second resin side surface when viewed in the first direction. Effect of the Invention

[0020] According to the above-mentioned configuration, for example, a semiconductor device can be stably manufactured, and when the semiconductor device is mounted on a circuit board, the state of solder joints can be easily checked visually. [Brief description of the drawings]

[0021] [Figure 1] 1 is a perspective view of a semiconductor device according to a first embodiment of a first side surface; [Diagram 2] 2 is a perspective view of the semiconductor device as viewed from a different direction than in FIG. 1. [Diagram 3] 2 is a bottom view of the semiconductor device of FIG. 1. [Figure 4] 4 is a bottom view of the semiconductor device in a state where the sealing resin is removed from FIG. 3. [Diagram 5] 5 is a bottom view of the semiconductor device in a state where a semiconductor element is removed from FIG. 4. [Figure 6] FIG. 6 is an enlarged view of a portion of FIG. [Figure 7] FIG. 6 is an enlarged view of a portion of FIG. [Figure 8] 8 is a cross-sectional view taken along line 8-8 of FIG. 4 in a state in which a sealing resin and terminals are provided. [Figure 9] 9 is a cross-sectional view taken along line 9-9 of FIG. 4 in a state in which a sealing resin and terminals are provided. [Figure 10] 5 is a cross-sectional view taken along line 10-10 of FIG. 4 in a state where a sealing resin and terminals are provided. [Figure 11] 9 is an enlarged view of a joint between one element electrode and a wiring of the semiconductor element of FIG. 8 and its surroundings. [Figure 12] 11 is an enlarged view of a joint between one element electrode and a wiring of the semiconductor element of FIG. 10 and its surroundings. [Figure 13] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 14] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 15] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 16] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 17] FIG. 17 is a plan view of FIG. 16. [Figure 18] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 19] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 20] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 21]FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 22] FIG. 22 is a plan view of FIG. 21. [Figure 23] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 24] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Diagram 25] FIG. 4 is an explanatory diagram showing one example of a step of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 26] FIG. 11 is a bottom view of the semiconductor device according to the second embodiment of the first side. [Figure 27] 27 is a bottom view of the semiconductor device in a state where the sealing resin is removed from FIG. 26. FIG. [Figure 28] 28 is a bottom view of the semiconductor device in a state where a semiconductor element is removed from FIG. 27. [Figure 29] FIG. 13 is a bottom view of a semiconductor device according to a modified example, from which a sealing resin, terminals, and a semiconductor element have been removed. [Diagram 30] FIG. 13 is a bottom view of a semiconductor device according to a modified example, from which a sealing resin, terminals, and a semiconductor element have been removed. [Diagram 31] FIG. 13 is a bottom view of a portion of a semiconductor device according to a modified example. [Diagram 32] FIG. 13 is a bottom view of a portion of a semiconductor device according to a modified example. [Diagram 33] FIG. 13 is a bottom view of a portion of a semiconductor device according to a modified example. [Diagram 34] FIG. 13 is a bottom view of a portion of a semiconductor device according to a modified example. [Diagram 35] FIG. 13 is a bottom view of a portion of a semiconductor device according to a modified example. [Diagram 36] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Figure 37] FIG. 13 is a bottom view of a semiconductor device according to a modified example. [Figure 38]This is a cross-sectional view taken along line 38-38 in Figure 37. [Figure 39] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Diagram 40] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Diagram 41] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Diagram 42] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Diagram 43] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Diagram 44] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Diagram 45] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Diagram 46] 11 is an explanatory diagram showing an example of a process of a manufacturing method of a semiconductor device according to a modified example. [Figure 47] FIG. 13 is a bottom view of a portion of a semiconductor device according to a modified example. [Figure 48] FIG. 13 is a bottom view of a portion of a semiconductor device according to a modified example. [Figure 49] 11 is a perspective view showing a semiconductor device based on the first embodiment from a second side surface. FIG. [Figure 50] FIG. 2 is a plan view showing the semiconductor device (a second side surface). [Figure 51] In the plan view of FIG. 50, external electrodes are omitted, and the semiconductor element and resin member are shown by imaginary lines. [Figure 52] 4 is a front view showing the semiconductor device (a second side surface). FIG. [Figure 53] 4 is a side view (left side view) showing the semiconductor device (second side surface). FIG. [Figure 54] A cross-sectional view taken along line 54-54 in Figure 51. [Figure 55] FIG. 55 is a partially enlarged cross-sectional view of a portion of FIG. 54. [Figure 56]A cross-sectional view taken along line 56-56 in Figure 51. [Figure 57] FIG. 57 is a partially enlarged cross-sectional view of a portion of FIG. 56. [Figure 58] A cross-sectional view taken along line 58-58 in Figure 51. [Figure 59] FIG. 59 is a partially enlarged cross-sectional view of a portion of FIG. 58. [Figure 60] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 61] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 62] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 63] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 64] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 65] 4 is a cross-sectional view showing a step of a manufacturing method for the semiconductor device (second side surface). [Figure 66] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 67] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 68] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 69] FIG. 69 is a partially enlarged cross-sectional view of a portion of FIG. 68. [Figure 70] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 71] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 72] 5 is a cross-sectional view showing a step of a method for manufacturing the semiconductor device (second side surface). [Figure 73] FIG. 73 is a partially enlarged cross-sectional view of a portion of FIG. 72. [Figure 74]11 is a cross-sectional view showing a semiconductor device according to a second embodiment of the present invention from a second side. FIG. [Figure 75] FIG. 11 is a cross-sectional view showing a semiconductor device according to a third embodiment of the present invention from a second side. [Figure 76] FIG. 11 is a partially enlarged cross-sectional view showing a joint according to a modified example of the second side surface. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, a semiconductor device (and a manufacturing method) based on various embodiments and modifications of the first aspect of the present disclosure will be described with reference to FIGS. 1 to 48. A semiconductor device (and a manufacturing method) based on various embodiments and modifications of the second aspect of the present disclosure will be described with reference to FIGS. 49 to 76. The reference symbols in FIGS. 1 to 48 (first aspect) and the reference symbols in FIGS. 49 to 76 (second aspect) are used independently of each other, and the same symbol may indicate different components, or different symbols may indicate the same (or similar) components. In embodiments relating to the same aspect, the same or similar components may be given the same symbol and their description may be omitted as appropriate. Each of the embodiments and modifications relating to the first and second aspects shown below exemplifies a configuration and method for embodying a technical idea, and does not limit the material, shape, structure, arrangement, dimensions, etc. of each component to those described below. Various modifications can be made to each of the following embodiments and modifications.

[0023] <First embodiment (first aspect)> The configuration of a semiconductor device 1A based on a first embodiment of the first side will be described with reference to Figs. 1 to 11. As shown in Figs. 1 and 2, the semiconductor device 1A is formed in a rectangular flat plate shape. The semiconductor device 1A includes a flat plate-shaped substrate 10, a plurality of terminals 20, and a sealing resin 30. The plurality of terminals 20 are provided on the surface of the sealing resin 30 opposite to the surface on which the substrate 10 is arranged. As shown in Figs. 2 and 3, the plurality of terminals 20 are provided inside the periphery of the surface of the sealing resin 30 on which the plurality of terminals 20 are provided. Thus, the semiconductor device 1A of this embodiment is a surface-mounted semiconductor device.

[0024] 3 and 4, the semiconductor device 1A includes a plurality of wirings 40, a plurality of conductors 50, and a semiconductor element 60. The plurality of wirings 40 and the plurality of conductors 50 form a conductive path that electrically connects the semiconductor element 60 and a plurality of terminals 20. The plurality of wirings 40 are electrically connected to the semiconductor element 60, and the plurality of conductors 50 are electrically connected to the plurality of wirings 40 and the plurality of terminals 20, respectively. The plurality of wirings 40, the plurality of conductors 50, and the semiconductor element 60 are sealed with a sealing resin 30.

[0025] 4, the semiconductor device 60 has a first circuit 61 including a plurality of switching circuits that perform power conversion, and a second circuit 62 including a control circuit for controlling the switching circuits of the first circuit 61. The second circuit 62 controls the switching circuits of the first circuit 61 based on an electrical signal input from outside the semiconductor device 1A.

[0026] The semiconductor device 1A constitutes a part of a power conversion device such as a DC / DC converter. The semiconductor device 1A is in a resin package format that is surface-mounted on a wiring board of the target power conversion device. This package format is a QFN (Quad Flat Non-leaded) package.

[0027] In the following description, the thickness direction of the substrate 10 is the z direction, and two mutually perpendicular directions among directions perpendicular to the z direction are the x direction and the y direction, respectively. In this embodiment, the semiconductor device 1A is rectangular having a long side direction and a short side direction when viewed in the z direction. Here, in this embodiment, the long side direction of the semiconductor device 1A is the x direction, and the short side direction is the y direction. For convenience, the direction from the substrate 10 toward the sealing resin 30 in the z direction is referred to as "upward", and the direction from the sealing resin 30 toward the substrate 10 is referred to as "downward".

[0028] As shown in FIG. 1, the substrate 10 is made of a single-crystal intrinsic semiconductor material. In this embodiment, Si (silicon) is used as the substrate 10. The substrate 10 has a substrate main surface 11 and a substrate back surface 12 facing opposite sides in the z direction. Four substrate side surfaces 13, 14, 15, and 16 are provided between the substrate main surface 11 and the substrate back surface 12 in the z direction. As shown in FIG. 4, the substrate side surfaces 13 and 14 are spaced apart from each other in the x direction and facing opposite sides in the x direction. The substrate side surfaces 13 and 14 each extend along the y direction. The substrate side surfaces 15 and 16 are spaced apart from each other in the y direction and facing opposite sides in the y direction. The substrate side surfaces 15 and 16 each extend along the x direction. As shown in FIG. 4, the shape of the substrate 10 viewed in the z direction is a rectangle with the x direction being the long side direction and the y direction being the short side direction. Therefore, substrate side surfaces 13 and 14 form the short sides of substrate 10 when viewed in the z direction, and substrate side surfaces 15 and 16 form the long sides. In this manner, the x direction can be said to be a first direction forming the long side direction of substrate 10, and the y direction can be said to be a second direction forming the short side direction of substrate 10.

[0029] As shown in FIG. 4 and FIG. 8 to FIG. 10, a plurality of wirings 40, a plurality of conductors 50, and a semiconductor element 60 are arranged on the substrate main surface 11. As shown in FIG. 8 to FIG. 10, a sealing resin 30 is provided on the substrate main surface 11 so as to seal the plurality of wirings 40, the plurality of conductors 50, and the semiconductor element 60. In this embodiment, as shown in FIG. 1 and FIG. 2, the sealing resin 30 is formed over the entire substrate main surface 11. The substrate back surface 12 is a surface that constitutes the upper surface when the semiconductor device 1A is mounted on the wiring board. As shown in FIG. 8, an insulating film 17 is formed on the end of the substrate 10 on the sealing resin 30 side in the z direction. The insulating film 17 is composed of an oxide film (SiO2) and a nitride film (Si3N4) laminated on the oxide film. The substrate main surface 11 refers to the surface of the insulating film 17. Therefore, the plurality of wirings 40 are formed on the surface of the insulating film 17.

[0030] As shown in FIG. 11 and FIG. 12, each of the wirings 40 is composed of an underlayer 40A and a plating layer 40B. The underlayer 40A is in contact with the insulating film 17 (substrate main surface 11). The underlayer 40A is composed of a barrier layer in contact with the substrate main surface 11 and a seed layer laminated on the barrier layer. The barrier layer is made of, for example, Ti (titanium). The seed layer is made of, for example, Cu (copper). The plating layer 40B is laminated on the underlayer 40A. The thickness of the plating layer 40B is thicker than the thickness of the underlayer 40A. In each of the wirings 40, the plating layer 40B serves as a main conductive path. The plating layer 40B is made of, for example, Cu.

[0031] 5, the multiple wirings 40 include first power supply wirings 41A, 41B, first output wirings 42A, 42B, a first ground wiring 43, second power supply wirings 44A, 44B, second output wirings 45A, 45B, a second ground wiring 46, and multiple control wirings 47. In this embodiment, the first power supply wirings 41A, 41B and the second power supply wiring 44A, 44B correspond to the first drive wirings, and the first output wirings 42A, 42B, the first ground wiring 43, the second output wirings 45A, 45B, and the second ground wiring 46 correspond to the second drive wirings.

[0032] The first power supply wirings 41A, 41B, the first output wirings 42A, 42B, the first ground wiring 43, the second power supply wirings 44A, 44B, the second output wirings 45A, 45B, and the second ground wiring 46 are each electrically connected to the first circuit 61 (see FIG. 4). The first power supply wirings 41A, 41B, and the second power supply wirings 44A, 44B are each wires for supplying a current to the first circuit 61 of the semiconductor element 60. The first output wirings 42A, 42B, and the second output wirings 45A, 45B are each wires for supplying a current output from the first circuit 61 of the semiconductor element 60 to the outside of the semiconductor device 1A. The first ground wiring 43 and the second ground wiring 46 are wires for setting the ground of the first circuit 61. The control wirings 47 are each electrically connected to the second circuit 62 of the semiconductor element 60 (see FIG. 4). The multiple control wirings 47 are wirings for inputting electrical signals from outside the semiconductor device 1A to the second circuit 62, or wirings for outputting electrical signals output from the second circuit 62 to outside the semiconductor device 1A.

[0033] As shown in FIG. 5, the first power supply wirings 41A and 41B, the first output wirings 42A and 42B, and the first ground wiring 43 are arranged near the substrate side surface 13 in the x direction. The first power supply wirings 41A and 41B, the first output wirings 42A and 42B, and the first ground wiring 43 are arranged in a state where they are aligned with each other in the x direction and spaced apart from each other in the y direction. The first ground wiring 43 is arranged in the center of the first power supply wirings 41A and 41B, the first output wirings 42A and 42B, and the first ground wiring 43 in the y direction. In this embodiment, the first ground wiring 43 is arranged in the center of the substrate 10 in the y direction. The first output wirings 42A and 42B are arranged in a distributed manner on both sides of the first ground wiring 43 in the y direction. In this embodiment, the first output wiring 42A is arranged near the substrate side surface 15 with respect to the first ground wiring 43 in the y direction. The first output wiring 42B is disposed closer to the substrate side surface 16 than the first ground wiring 43 in the y direction. The first power supply wiring 41A is disposed on the opposite side of the first ground wiring 43 than the first output wiring 42A in the y direction. The first power supply wiring 41B is disposed on the opposite side of the first ground wiring 43 than the first output wiring 42B in the y direction. In this way, the first power supply wirings 41A, 41B are disposed distributed outward in the y direction relative to the first output wirings 42A, 42B and the first ground wiring 43.

[0034] The first power supply wirings 41A, 41B, the first output wirings 42A, 42B, and the first ground wiring 43 each extend along the x direction. More specifically, the first power supply wirings 41A, 41B, the first output wirings 42A, 42B, and the first ground wiring 43 each extend along the x direction from an end of the substrate 10 that is closer to the substrate side surface 13 among both ends in the x direction toward the center of the substrate 10 in the x direction. As shown in FIG. 5, the first power supply wirings 41A, 41B, the first output wirings 42A, 42B, and the first ground wiring 43 each extend from the outside of the semiconductor element 60 to the inside of the semiconductor element 60 in the x direction. Therefore, the first power supply wirings 41A, 41B, the first output wirings 42A, 42B, and the first ground wiring 43 each have a portion that overlaps with the semiconductor element 60 when viewed in the z direction.

[0035] As shown in FIG. 5, the second power supply wiring 44A, 44B, the second output wiring 45A, 45B, and the second ground wiring 46 are arranged near the substrate side surface 14 in the x direction. The second power supply wiring 44A, 44B, the second output wiring 45A, 45B, and the second ground wiring 46 are arranged in a state where they are aligned with each other in the x direction and spaced apart from each other in the y direction. The second ground wiring 46 is arranged in the center of the second power supply wiring 44A, 44B, the second output wiring 45A, 45B, and the second ground wiring 46 in the y direction. In this embodiment, the second ground wiring 46 is arranged in the center of the substrate 10 in the y direction. The second output wiring 45A, 45B are distributed and arranged on both sides of the second ground wiring 46 in the y direction. In this embodiment, the second output wiring 45A is arranged near the substrate side surface 15 with respect to the second ground wiring 46 in the y direction. The second output wiring 45B is disposed closer to the substrate side surface 16 than the second ground wiring 46 in the y direction. The second power supply wiring 44A is disposed on the opposite side of the second output wiring 45A than the second ground wiring 46 in the y direction. The second power supply wiring 44B is disposed on the opposite side of the second output wiring 45B than the second ground wiring 46 in the y direction. In this manner, the second power supply wirings 44A, 44B are disposed distributed outward in the y direction relative to the second output wiring 45A, 45B and the second ground wiring 46.

[0036] The second power supply wirings 44A, 44B, the second output wirings 45A, 45B, and the second ground wiring 46 each extend along the x direction. More specifically, the second power supply wirings 44A, 44B, the second output wirings 45A, 45B, and the second ground wiring 46 each extend along the x direction from an end of the substrate 10 that is closer to the substrate side surface 14 among both ends in the x direction toward the center of the substrate 10 in the x direction. As shown in FIG. 5, the second power supply wirings 44A, 44B, the second output wirings 45A, 45B, and the second ground wiring 46 each extend from the outside of the semiconductor element 60 to the inside of the semiconductor element 60 in the x direction. Therefore, the second power supply wirings 44A, 44B, the second output wirings 45A, 45B, and the second ground wiring 46 each have a portion that overlaps with the semiconductor element 60 when viewed in the z direction.

[0037] 5, the first power supply wiring 41A, 41B, the first output wiring 42A, 42B, and the first ground wiring 43, and the second power supply wiring 44A, 44B, the second output wiring 45A, 45B, and the second ground wiring 46 are arranged to be spaced apart from each other in the x direction. When viewed in the x direction, the first power supply wiring 41A is arranged to overlap the second power supply wiring 44A, and the first power supply wiring 41B is arranged to overlap the second power supply wiring 44B. When viewed in the x direction, the first output wiring 42A is arranged to overlap the second output wiring 45A, and the first output wiring 42B is arranged to overlap the second output wiring 45B. When viewed in the x direction, the first ground wiring 43 is arranged to overlap the second ground wiring 46. Moreover, as shown in FIG. 5, when viewed in the x-direction, the first power supply wiring 41A, 41B, the first output wiring 42A, 42B, and the first ground wiring 43, and the second power supply wiring 44A, 44B, the second output wiring 45A, 45B, and the second ground wiring 46 are each arranged to overlap the semiconductor element 60.

[0038] As shown in FIG. 5, the control wirings 47 are arranged at intervals in the x direction at both ends of the substrate 10 in the y direction. The control wirings 47 are distributed and arranged on both sides of the first power supply wirings 41A, 41B, the first output wirings 42A, 42B, and the first ground wiring 43 in the y direction. The control wirings 47 are also distributed and arranged on both sides of the second power supply wirings 44A, 44B, the second output wirings 45A, 45B, and the second ground wiring 46 in the y direction. For convenience, the control wirings 47 arranged at the ends of the substrate 10 in the y direction that are closer to the substrate side surface 15 are referred to as "control wirings 47A," and the control wirings 47 arranged at the ends of the substrate 10 in the y direction that are closer to the substrate side surface 16 are referred to as "control wirings 47B." The control wiring 47A has a rectangular wiring end 47a arranged at the end closer to the substrate side surface 15 among both ends in the y direction of the substrate 10, a connection wiring portion 47b extending from the wiring end 47a toward the inside of the substrate 10, and a connection end 47c provided at the tip of the connection wiring portion 47b. The control wiring 47B has a rectangular wiring end 47a arranged at the end closer to the substrate side surface 16 among both ends in the y direction of the substrate 10, a connection wiring portion 47b extending from the wiring end 47a toward the inside of the substrate 10, and a connection end 47c provided at the tip of the connection wiring portion 47b. As shown in FIG. 5, the wiring ends 47a of the control wirings 47A and 47B are each located outside the semiconductor element 60 in the y direction. The wiring end 47a of the control wiring 47A is arranged between the semiconductor element 60 and the substrate side surface 15 in the y direction when viewed in the z direction. Wiring end 47a of control wiring 47B is disposed between semiconductor element 60 and substrate side surface 16 in the y direction when viewed in the z direction. Connection wiring portions 47b of control wirings 47A, 47B each extend from the outside of semiconductor element 60 toward the inside of semiconductor element 60 when viewed in the z direction. Connection end portions 47c of control wirings 47A, 47B each are disposed at positions overlapping with semiconductor element 60 when viewed in the z direction.

[0039] In this manner, the semiconductor device 1A is a so-called Fan-Out type semiconductor device in which the multiple wirings 40 extend outward from the portion where they overlap with the semiconductor element 60 in the z-direction, and the multiple conductors 50 are arranged outward from the semiconductor element 60.

[0040] As shown in Fig. 4 and Fig. 8, the semiconductor element 60 is mounted on a plurality of wirings 40. As shown in Fig. 8, the semiconductor element 60 has an element main surface 60s and an element back surface 60r that face in opposite directions in the z direction. The element main surface 60s faces the same side as the substrate main surface 11 in the z direction, and the element back surface 60r faces the same side as the substrate back surface 12 in the z direction. An insulating film 60x and a plurality of element electrodes 60a are formed on the element back surface 60r. As shown in Fig. 4 and Fig. 8, in this embodiment, the semiconductor element 60 is a flip-chip mounted semiconductor element.

[0041] As shown in FIG. 8, FIG. 11, and FIG. 12, a plurality of element electrodes 60a are joined to a plurality of wirings 40 via a solder layer 48. The plurality of element electrodes 60a include a conductive portion 60b and a barrier layer 60c. The conductive portion 60b is made of, for example, Cu. The barrier layer 60c is made of a Ni layer. The barrier layer 60c is laminated on the conductive portion 60b so as to cover the line end surface of the conductive portion 60b. The barrier layer 60c is provided in the element electrode 60a, so that the conductive portion 60b made of Cu can be prevented from penetrating into the solder layer 48. The barrier layer 60c may be made of a Ni layer, a Pd (palladium) layer, and an Au layer that are laminated on each other.

[0042] The insulating film 60x covers the back surface 60r of the element and also covers the periphery of the element electrode 60a. The insulating film 60x is made of, for example, polyimide resin. The insulating film 60x covers a part of the element electrode 60a, and a part of the surface of the element electrode 60a is exposed as a connection terminal. The insulating film 60x may be made of SiN (silicon nitride).

[0043] As shown in Figs. 4 to 10, the conductors 50 are disposed on the wirings 40 individually. As shown in Fig. 4, the conductors 50 are disposed outside the semiconductor element 60 as viewed in the z direction. It can also be said that the semiconductor element 60 is surrounded by the conductors 50. As shown in Figs. 8 to 10, the conductors 50 are laminated on the surface of the wiring 40 opposite the substrate 10 in the z direction. Therefore, it can also be said that the conductors 50 protrude in a direction away from the substrate main surface 11 in the z direction. As shown in Figs. 4 and 5, the conductors 50 are located inward from the substrate side surfaces 13 to 16 as viewed in the z direction. That is, the conductors 50 are disposed at positions overlapping with the substrate main surface 11 as viewed in the z direction. Therefore, as shown in Fig. 3, the conductors 50 are located inward from the periphery of the sealing resin 30 as viewed in the z direction. Each of the conductors 50 is made of, for example, Cu. Each of the multiple conductors 50 has a top surface 50A facing the same side in the z direction as the substrate main surface 11. Each of the top surfaces 50A of the multiple conductors 50 is a surface exposed from the sealing resin 30 in the z direction.

[0044] 4, the plurality of conductors 50 includes first power supply conductors 51A, 51B, first output conductors 52A, 52B, a first ground conductor 53, second power supply conductors 54A, 54B, second output conductors 55A, 55B, a second ground conductor 56, and a plurality of control conductors 57. The first power supply conductors 51A, 51B, the first output conductors 52A, 52B, the first ground conductor 53, the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 are each electrically connected to a first circuit 61 of a semiconductor element 60. The plurality of control conductors 57 are electrically connected to a second circuit 62 of the semiconductor element 60. In this embodiment, the first power supply conductors 51A, 51B and the second power supply conductors 54A, 54B correspond to the first drive conductors, and the first output conductors 52A, 52B, the first ground conductor 53, the second output conductors 55A, 55B and the second ground conductor 56 correspond to the second drive conductors.

[0045] 4, when viewed in the z direction, the shape of each of the top surfaces 50A of the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, the first ground conductor 53, the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 is a rectangle whose longer side extends in the x direction and whose shorter side extends in the y direction. Also, when viewed in the z direction, each control conductor 57 is a rectangle whose sides extend along the x direction and the y direction.

[0046] The shapes of the top surfaces 50A of the first power supply conductors 51A and 51B, the first output conductors 52A and 52B, the first ground conductor 53, the second power supply conductors 54A and 54B, the second output conductors 55A and 55B, and the second ground conductor 56 as viewed in the z direction can be changed as desired. In one example, the shapes of the top surfaces 50A of the first power supply conductors 51A and 51B, the first output conductors 52A and 52B, the first ground conductor 53, the second power supply conductors 54A and 54B, the second output conductors 55A and 55B, and the second ground conductor 56 as viewed in the z direction are each elliptical with the major axis in the x direction and the minor axis in the y direction. The shape of each control conductor 57 as viewed in the z direction is circular or elliptical.

[0047] The first power supply conductor 51A is electrically connected to the first power supply wiring 41A of the wiring 40. That is, the first power supply conductor 51A is electrically connected to the first circuit 61 via the first power supply wiring 41A. The first power supply conductor 51B is electrically connected to the first power supply wiring 41B of the wiring 40. That is, the first power supply conductor 51B is electrically connected to the first circuit 61 via the first power supply wiring 41B.

[0048] The first output conductor 52A is electrically connected to the first output wiring 42A of the wiring 40. That is, the first output conductor 52A is electrically connected to the first circuit 61 via the first output wiring 42A. The first output conductor 52B is electrically connected to the first output wiring 42B of the wiring 40. That is, the first output conductor 52B is electrically connected to the first circuit 61 via the first output wiring 42B.

[0049] The first ground conductor 53 is electrically connected to the first ground wiring 43 of the wiring 40. That is, the first ground conductor 53 is electrically connected to the first circuit 61 via the first ground wiring 43.

[0050] The second power supply conductor 54A is electrically connected to the second power supply wiring 44A of the wiring 40. That is, the second power supply conductor 54A is electrically connected to the first circuit 61 via the second power supply wiring 44A. The second power supply conductor 54B is electrically connected to the second power supply wiring 44B of the wiring 40. That is, the second power supply conductor 54B is electrically connected to the first circuit 61 via the second power supply wiring 44B.

[0051] The second output conductor 55A is electrically connected to the second output wiring 45A of the wiring 40. That is, the second output conductor 55A is electrically connected to the first circuit 61 via the second output wiring 45A. The second output conductor 55B is electrically connected to the second output wiring 45B of the wiring 40. That is, the second output conductor 55B is electrically connected to the first circuit 61 via the second output wiring 45B.

[0052] The second ground conductor 56 is electrically connected to the second ground wiring 46 of the wiring 40. In other words, the second ground conductor 56 is electrically connected to the first circuit 61 via the second ground wiring 46.

[0053] The multiple control conductors 57 are individually and electrically connected to the multiple control wirings 47 of the wiring 40. That is, the multiple control conductors 57 are electrically connected to the second circuit 62 via the multiple control wirings 47.

[0054] The first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 are disposed at an end of the main surface 11 of the board in the x direction near the side surface 13 of the board. The first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 are arranged spaced apart from each other in the y direction while being aligned with each other in the x direction. The second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 are disposed at an end of the main surface 11 of the board in the x direction near the side surface 14 of the board. The second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 are arranged spaced apart from each other in the y direction while being aligned with each other in the x direction.

[0055] In this manner, the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 are arranged in the y direction, which is the direction of the short sides of the substrate 10, and extend in the x direction, which is the direction of the long sides of the substrate 10. The second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 are arranged in the y direction, which is the direction of the short sides of the substrate 10, and extend in the x direction, which is the direction of the long sides of the substrate 10.

[0056] As shown in Figs. 1 and 2, the sealing resin 30 is formed in a rectangular plate shape in contact with the main surface 11 of the substrate. The thickness of the sealing resin 30 is thinner than the thickness of the substrate 10. In other words, the thickness of the substrate 10 is thicker than the thickness of the sealing resin 30. The sealing resin 30 is made of a resin material having electrical insulation properties. For example, a thermosetting resin is used as the sealing resin 30. In this embodiment, a black epoxy resin is used as the sealing resin 30.

[0057] As shown in FIG. 2, FIG. 3, and FIG. 8 to FIG. 10, the sealing resin 30 has a mounting surface 31 facing the same side as the substrate main surface 11 in the z direction, and four resin side surfaces 32 to 35. As shown in FIG. 3, the resin side surfaces 32 and 33 are spaced apart from each other in the x direction and are surfaces facing opposite sides to each other in the x direction. The resin side surfaces 32 and 33 each extend along the y direction. The resin side surfaces 34 and 35 are spaced apart from each other in the y direction and are surfaces facing opposite sides to each other in the y direction. The resin side surfaces 34 and 35 each extend along the x direction. As shown in FIG. 3, the shape of the sealing resin 30 as viewed in the z direction is a rectangle whose long side direction is the x direction and whose short side direction is the y direction. Therefore, the resin side surfaces 32 and 33 constitute the short sides of the sealing resin 30 as viewed in the z direction, and the resin side surfaces 34 and 35 constitute the long sides. In this embodiment, as shown in Fig. 9, the substrate side surface 13 and the resin side surface 32 are flush with each other, and the substrate side surface 14 and the resin side surface 33 are flush with each other. As shown in Fig. 10, the substrate side surface 15 and the resin side surface 34 are flush with each other, and the substrate side surface 16 and the resin side surface 35 are flush with each other.

[0058] 3 and 8 to 10, mounting surface 31 is a surface that faces the wiring board when semiconductor device 1A is mounted on the wiring board. Top surfaces 50A of the multiple conductors 50 are exposed from mounting surface 31. Multiple terminals 20 are individually arranged on top surfaces 50A of the multiple conductors 50 exposed from mounting surface 31. Note that top surface 50A of each conductor 50 faces the same direction as mounting surface 31 (substrate main surface 11) in the z direction.

[0059] As shown in Figures 2 and 3, each of the multiple terminals 20 is exposed to the outside of the semiconductor device 1A. In other words, as shown in Figures 3 and 8 to 10, the top surfaces 50A of the multiple conductors 50 are exposed from the mounting surface 31, but are not exposed to the outside of the semiconductor device 1A because they are individually covered by the multiple terminals 20. The multiple terminals 20 are bonded to the wiring board via solder, for example, to mount the semiconductor device 1A on the wiring board. Each of the multiple terminals 20 is composed of multiple metal layers that are laminated in the order of a Ni layer, a Pd layer, and an Au (gold) layer from the side closest to the top surfaces 50A of the multiple conductors 50.

[0060] Next, a detailed configuration of the semiconductor element 60 and a detailed connection configuration of the semiconductor element 60, the wirings 40, the conductors 50, and the terminals 20 will be described. As shown in FIG. 4, in this embodiment, the first circuit 61 has a first switching unit 61A, a second switching unit 61B, a third switching unit 61C, and a fourth switching unit 61D. Each of the switching units 61A to 61D has two switching elements connected in series as a plurality of switching circuits for performing power conversion, and two driver circuits for driving the two switching elements. The second circuit 62 has, for example, a control circuit for controlling each of the switching units 61A to 61D. For example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are used as these switching elements. In this case, each of the switching units 61A to 61D has a configuration in which the source of the MOSFET constituting the upper arm and the drain of the MOSFET constituting the lower arm are connected. When a MOSFET is used as the switching element, each driver circuit supplies an electric signal to the gate of the MOSFET for controlling the driving of the MOSFET. The switching element is not limited to a MOSFET, and may be another transistor such as an IGBT (Insulated Gate Bipolar Transistor). The driver circuit of the first switching unit 61A may be configured such that a driver circuit for driving one of the two switching elements of the first switching unit 61A and a driver circuit for driving the other switching element are separately provided. The driver circuits of the switching units 61B to 61D may also be modified in the same manner as the driver circuit of the first switching unit 61A.

[0061] 4, in this embodiment, the circuit region RD in which the second circuit 62 is formed is formed in an H-shape having two recesses RD1, RD2 recessed on opposite sides in the x direction when viewed in the z direction. The circuit region RD is formed over substantially the entire semiconductor element 60 when viewed in the z direction. The recess RD1 is a rectangular recess recessed from one of both ends of the circuit region RD in the x direction that is closer to the substrate side surface 13 toward the center of the semiconductor element 60 in the x direction. The recess RD2 is a rectangular recess recessed from one of both ends of the circuit region RD in the x direction that is closer to the substrate side surface 14 toward the center of the semiconductor element 60 in the x direction.

[0062] The circuit region in which the first switching section 61A is formed is referred to as circuit region RSA, the circuit region in which the second switching section 61B is formed is referred to as circuit region RSB, the circuit region in which the third switching section 61C is formed is referred to as circuit region RSC, and the circuit region in which the fourth switching section 61D is formed is referred to as circuit region RSD. In this embodiment, the circuit regions RSA to RSD each have a rectangular shape when viewed in the z direction. The circuit regions RSA to RSD each have the same size when viewed in the z direction.

[0063] The circuit regions RSA and RSB are each disposed within a recess RD1 in the circuit region RD. The circuit regions RSA and RSB are arranged spaced apart from each other in the y direction while being aligned with each other in the x direction. The circuit region RSA is disposed closer to the substrate side surface 15 in the x direction than the circuit region RSB. In other words, the circuit region RSB is disposed closer to the substrate side surface 16 in the x direction than the circuit region RSA.

[0064] The circuit regions RSC and RSD are each disposed in a recess RD2 of the circuit region RD. The circuit regions RSC and RSD are arranged spaced apart from each other in the y direction while being aligned with each other in the x direction. The circuit region RSC is disposed closer to the substrate side surface 15 in the x direction than the circuit region RSD. In other words, the circuit region RSD is disposed closer to the substrate side surface 16 in the x direction than the circuit region RSC. When viewed in the x direction, the circuit region RSC overlaps with the circuit region RSA, and the circuit region RSD overlaps with the circuit region RSB.

[0065] 4, the second circuit 62 is electrically connected to a plurality of control wirings 47 at four corners of the semiconductor element 60 when viewed in the z direction. Here, of the circuit region RD in which the second circuit 62 is formed, the regions close to the substrate side surfaces 13 and 15 are defined as a first region R1, the regions close to the substrate side surfaces 13 and 16 are defined as a second region R2, the regions close to the substrate side surfaces 14 and 15 are defined as a third region R3, and the regions close to the substrate side surfaces 15 and 16 are defined as a fourth region R4.

[0066] The control wiring 47A is connected to the second circuit 62 in the first region R1 and the third region R3. The control wiring 47A arranged closer to the substrate side surface 13 is connected to the second circuit 62 in the first region R1, and the control wiring 47A arranged closer to the substrate side surface 14 is connected to the second circuit 62 in the third region R3. The control wiring 47B is connected to the second circuit 62 in the second region R2 and the fourth region R4. The control wiring 47B arranged closer to the substrate side surface 13 is connected to the second circuit 62 in the second region R2, and the control wiring 47B arranged closer to the substrate side surface 14 is connected to the second circuit 62 in the fourth region R4.

[0067] 4, the first switching unit 61A is electrically connected to the first power supply wiring 41A, the first output wiring 42A, and the first ground wiring 43. The second switching unit 61B is electrically connected to the first power supply wiring 41B, the first output wiring 42B, and the first ground wiring 43.

[0068] As shown in FIG. 6, the first ground wiring 43 extends along the x direction. In this embodiment, the width of the first ground wiring 43 is constant in the x direction. The width of the first ground wiring 43 is greater than the width of the connection wiring portion 47b of the control wiring 47. Here, the width of the first ground wiring 43 refers to the length of the first ground wiring 43 in a direction perpendicular to the direction in which the first ground wiring 43 extends as viewed in the z direction. In this embodiment, the width of the first ground wiring 43 is the length of the first ground wiring 43 in the y direction. A slit 43a extending along the x direction is formed in the center of the first ground wiring 43 in the y direction. The slit 43a is formed in the x direction from the edge of the first ground wiring 43 on the center side of the x direction of the substrate 10 to the portion on the substrate side surface 13 side. The first ground wiring 43 divided by the slit 43a so as to be spaced apart in the y direction is referred to as a first wiring portion 43b and a second wiring portion 43c. The first wiring portion 43b is disposed closer to the first output wiring 42A than the second wiring portion 43c. In other words, the second wiring portion 43c is disposed closer to the first output wiring 42B than the first wiring portion 43b.

[0069] A plurality of element electrodes 60a (five in this embodiment) are joined to a portion of the first wiring portion 43b that overlaps with the semiconductor element 60 when viewed in the z direction. These element electrodes 60a are aligned with each other in the y direction and spaced apart from each other in the x direction.

[0070] A plurality of (five in this embodiment) element electrodes 60a are joined to a portion of the second wiring portion 43c that overlaps with the semiconductor element 60 as viewed in the z direction. These element electrodes 60a are arranged in a state where they are aligned with each other in the y direction and spaced apart from each other in the x direction.

[0071] The first output wiring 42A has a wide wiring portion 42a and a narrow wiring portion 41b. The width of the first output wiring 42A is greater than the width of the connection wiring portion 47b of the control wiring 47. The width of the first output wiring 42A is the length of the first output wiring 42A in a direction perpendicular to the direction in which the first output wiring 42A extends, as viewed in the z direction.

[0072] The wide wiring portion 42a is disposed closer to the substrate side surface 13 in the x direction than the narrow wiring portion 42b. In other words, the narrow wiring portion 42b is disposed closer to the semiconductor element 60 in the x direction than the wide wiring portion 42a. The wide wiring portion 42a is disposed closer to the substrate side surface 13 than the semiconductor element 60 when viewed in the z direction. The narrow wiring portion 42b overlaps with the semiconductor element 60 when viewed in the z direction.

[0073] The narrow wiring portion 42b extends along the x direction. A plurality of (ten in this embodiment) element electrodes 60a are joined to the narrow wiring portion 42b. As shown in Fig. 5, among the ten element electrodes 60a, five element electrodes 60a are aligned in the y direction and spaced apart from each other in the x direction, and are arranged in rows spaced apart from each other in the y direction.

[0074] In a portion of the wide wiring portion 42a near the narrow wiring portion 42b, an inclined portion 42c is formed, in which the width of the wide wiring portion 42a narrows toward the narrow wiring portion 42b in the x direction. The inclined portion 42c is formed on the wide wiring portion 42a on the first power supply wiring 41A side in the y direction. In this manner, the first output wiring 42A has a recessed region 42d recessed in the y direction by the inclined portion 42c and the narrow wiring portion 42b.

[0075] The first power supply wiring 41A has a wide wiring portion 41a, a narrow wiring portion 41b, and a connection wiring portion 41c that connects the wide wiring portion 41a and the narrow wiring portion 41b. The width of the first power supply wiring 41A is greater than the width of the connection wiring portion 47b of the control wiring 47. Here, the width of the first power supply wiring 41A is the length of the first power supply wiring 41A in a direction perpendicular to the direction in which the first power supply wiring 41A extends, as viewed in the z direction. The width of the connection wiring portion 47b is the length of the connection wiring portion 47b in a direction perpendicular to the direction in which the connection wiring portion 47b extends, as viewed in the z direction.

[0076] The wide wiring portion 41a is disposed closer to the substrate side surface 13 in the x direction than the narrow wiring portion 41b. In other words, the narrow wiring portion 41b is disposed closer to the semiconductor element 60 in the x direction than the wide wiring portion 41a. The wide wiring portion 41a is located closer to the substrate side surface 13 than the semiconductor element 60. The wide wiring portion 41a extends along the x direction at the end of the substrate main surface 11 on the substrate side surface 13 side. The width of the wide wiring portion 41a is smaller than the width of the wide wiring portion 42a of the first output wiring 42A. In other words, the width of the wide wiring portion 42a is larger than the width of the wide wiring portion 41a of the first power supply wiring 41A. The width of the wide wiring portion 41a is the length of the wide wiring portion 41a in a direction perpendicular to the direction in which the wide wiring portion 41a extends, as viewed in the z direction. In this embodiment, the width of the wide wiring portion 41a is the length of the wide wiring portion 41a in the y direction. The width of the wide wiring portion 42a is the length of the wide wiring portion 42a in a direction perpendicular to the direction in which the wide wiring portion 42a extends as viewed in the z direction. In this embodiment, the width of the wide wiring portion 42a is the length of the wide wiring portion 42a in the y direction.

[0077] The narrow wiring portion 41b is disposed closer to the first output wiring 42A than the wide wiring portion 41a in the y direction. The narrow wiring portion 41b overlaps with the semiconductor element 60 when viewed in the z direction. The narrow wiring portion 41b extends along the x direction. The width of the narrow wiring portion 41b is smaller than the width of the narrow wiring portion 42b of the first output wiring 42A. In other words, the width of the narrow wiring portion 42b is larger than the width of the narrow wiring portion 41b of the first power supply wiring 41A. The width of the narrow wiring portion 41b is the length of the narrow wiring portion 41b in a direction perpendicular to the direction in which the narrow wiring portion 41b extends when viewed in the z direction. In this embodiment, the width of the narrow wiring portion 41b is the length of the narrow wiring portion 41b in the y direction. The width of the narrow wiring portion 42b is the length of the narrow wiring portion 42b in a direction perpendicular to the direction in which the narrow wiring portion 42b extends when viewed in the z direction. In this embodiment, the width of the narrow wiring portion 42b is the length of the narrow wiring portion 42b in the y direction.

[0078] A plurality of (five in this embodiment) element electrodes 60a are joined to the narrow wiring portion 41b. These element electrodes 60a are arranged in alignment with one another in the y direction and spaced apart from one another in the x direction.

[0079] The connection wiring portion 41c extends obliquely in the x direction from the wide wiring portion 41a toward the narrow wiring portion 41b so as to approach the first output wiring 42A in the y direction. A part of the connection wiring portion 41c overlaps with the semiconductor element 60 when viewed in the z direction. When viewed in the y direction, the connection wiring portion 41c overlaps with the inclined portion 42c of the first output wiring 42A. The width of the connection wiring portion 41c (the length of the connection wiring portion 41c in the y direction) is larger than the width of the narrow wiring portion 41b.

[0080] The first power supply wiring 41A has a recessed region 41d recessed in the y direction by the narrow wiring portion 41b and the connection wiring portion 41c. The recessed region 41d is a region overlapping with the semiconductor element 60 when viewed in the z direction. The connection ends 47c of the five control wirings 47A near the substrate side surface 13 are arranged in the recessed region 41d. In this way, the recessed region 41d is provided to secure a space for arranging the connection ends 47c of the control wirings 47A, thereby narrowing the width of the portion of the first power supply wiring 41A near the center of the substrate 10 in the x direction. In this way, the narrow wiring portion 41b of the first power supply wiring 41A is formed.

[0081] The narrow wiring portion 41b and the connection wiring portion 41c are recessed into the recessed region 42d of the first output wiring 42A. This allows the narrow wiring portion 41b to be disposed closer to the center of the substrate 10 in the y direction than the wide wiring portion 41a, so that the connection ends 47c of the five control wirings 47A that are located near the substrate side surface 13 among the control wirings 47A can be disposed at positions that overlap with the first region R1 (see FIG. 4) of the semiconductor element 60 when viewed in the z direction.

[0082] The first output wiring 42B is symmetrical to the first output wiring 42A with respect to a virtual center line extending along the x direction at the center in the y direction of the substrate main surface 11. Therefore, like the first output wiring 42A, the first output wiring 42B has a wide wiring portion 42a, a narrow wiring portion 42b, and an inclined portion 42c. In addition, a recessed region 42d is formed in the first output wiring 42B. Ten element electrodes 60a are joined to the narrow wiring portion 42b. The arrangement of the ten element electrodes 60a is the same as the arrangement of the ten element electrodes 60a of the narrow wiring portion 42b of the first output wiring 42A.

[0083] The first power supply wiring 41B is symmetrical to the first power supply wiring 41A with respect to a virtual center line extending along the x direction at the center of the substrate main surface 11 in the y direction. Therefore, the first power supply wiring 41B has a wide wiring portion 41a, a narrow wiring portion 41b, and a connection wiring portion 41c, similar to the first power supply wiring 41A. Five element electrodes 60a are joined to the narrow wiring portion 41b. The arrangement of the five element electrodes 60a is similar to the arrangement of the five element electrodes 60a of the narrow wiring portion 41b of the first power supply wiring 41A. The narrow wiring portion 41b and the connection wiring portion 41c, similar to the narrow wiring portion 41b and the connection wiring portion 41c of the first power supply wiring 41A, are inserted into the recessed region 42d of the first output wiring 42B. This allows the connection ends 47c of the four control wirings 47B near the substrate side surface 13 to be positioned so as to overlap the second region R2 (see FIG. 4) of the semiconductor element 60 when viewed in the z direction.

[0084] 6, the area of ​​first output wiring 42A viewed in the z direction and the area of ​​first ground wiring 43 viewed in the z direction are larger than the area of ​​first power supply wiring 41A viewed in the z direction. The area of ​​first output wiring 42B viewed in the z direction and the area of ​​first ground wiring 43 viewed in the z direction are larger than the area of ​​first power supply wiring 41B viewed in the z direction.

[0085] 4, the third switching unit 61C is electrically connected to the second power supply wiring 44A, the second output wiring 45A, and the second ground wiring 46. The fourth switching unit 61D is electrically connected to the second power supply wiring 44B, the second output wiring 45B, and the second ground wiring 46.

[0086] As shown in FIG. 7, the second ground wiring 46 extends along the x direction. More specifically, the shape of the second ground wiring 46 as viewed in the z direction is symmetrical to the shape of the first ground wiring 43 as viewed in the z direction with respect to a virtual line extending along the y direction at the center of the substrate 10 in the x direction. Therefore, the second ground wiring 46 has a slit 46a corresponding to the slit 43a of the first ground wiring 43, and a first wiring portion 46b and a second wiring portion 46c corresponding to the first wiring portion 43b and the second wiring portion 43c. The first wiring portion 46b is disposed closer to the second output wiring 45A than the second wiring portion 46c. In other words, the second wiring portion 46c is disposed closer to the second output wiring 45B than the first wiring portion 46b.

[0087] A plurality of element electrodes 60a (five in this embodiment) are joined to a portion of the first wiring portion 46b that overlaps with the semiconductor element 60 when viewed in the z direction. These element electrodes 60a are aligned with each other in the y direction and spaced apart from each other in the x direction.

[0088] A plurality of element electrodes 60a (five in this embodiment) are joined to a portion of the second wiring portion 46c that overlaps with the semiconductor element 60 when viewed in the z direction. These element electrodes 60a are aligned with each other in the y direction and spaced apart from each other in the x direction.

[0089] The second output wiring 45A extends along the x direction. More specifically, the shape of the second output wiring 45A as viewed in the z direction is symmetrical to the shape of the first output wiring 42A as viewed in the z direction with respect to a virtual line extending along the y direction at the center of the substrate 10 in the x direction. Therefore, the second output wiring 45A has a wide wiring portion 45a, a narrow wiring portion 45b, and an inclined portion 45c corresponding to the wide wiring portion 42a, the narrow wiring portion 42b, and the inclined portion 42c of the first output wiring 42A. In addition, the second output wiring 45A has a recessed region 45d corresponding to the recessed region 42d of the first output wiring 42A.

[0090] The wide wiring portion 45a is disposed closer to the substrate side surface 14 in the x direction than the narrow wiring portion 45b. In other words, the narrow wiring portion 45b is disposed closer to the semiconductor element 60 (see FIG. 4) in the x direction than the wide wiring portion 45a. The wide wiring portion 45a is disposed closer to the substrate side surface 14 than the semiconductor element 60 as viewed in the z direction. The narrow wiring portion 45b overlaps with the semiconductor element 60 as viewed in the z direction.

[0091] A plurality of (ten in this embodiment) element electrodes 60a are joined to the narrow wiring portion 45b. The arrangement of the element electrodes 60a is similar to the arrangement of the ten element electrodes 60a of the first output wiring 42A.

[0092] The second power supply wiring 44A extends along the x direction. More specifically, the shape of the second power supply wiring 44A as viewed in the z direction is symmetrical to the shape of the first power supply wiring 41A as viewed in the z direction with respect to a virtual line extending along the y direction at the center of the substrate 10 in the x direction. Therefore, the second power supply wiring 44A has a wide wiring portion 44a, a narrow wiring portion 44b, and a connection wiring portion 44c corresponding to the wide wiring portion 41a, the narrow wiring portion 41b, and the connection wiring portion 41c of the first power supply wiring 41A. In addition, the second power supply wiring 44A has a recessed region 44d formed therein, which corresponds to the recessed region 41d of the first power supply wiring 41A.

[0093] The wide wiring portion 44a is disposed closer to the substrate side surface 14 in the x direction than the narrow wiring portion 44b. In other words, the narrow wiring portion 44b is disposed closer to the semiconductor element 60 in the x direction than the wide wiring portion 44a. The wide wiring portion 44a has a portion located closer to the substrate side surface 14 than the semiconductor element 60.

[0094] The narrow wiring portion 44b is disposed closer to the second output wiring 45A in the y direction than the wide wiring portion 44a. A plurality of (five in this embodiment) element electrodes 60a are joined to the narrow wiring portion 44b. These element electrodes 60a are arranged in a state where they are aligned with each other in the y direction and spaced apart from each other in the x direction.

[0095] The connection wiring portion 44c extends obliquely in the x direction from the wide wiring portion 44a toward the narrow wiring portion 44b so as to approach the second output wiring 45A in the y direction. The connection ends 47c of the four control wirings 47A near the substrate side surface 14 are disposed in the recessed region 44d. In this manner, the recessed region 44d is provided to secure a space for disposing the connection ends 47c of the control wirings 47A, thereby narrowing the width of the portion of the second power supply wiring 44A near the center of the substrate 10 in the x direction. In this manner, the narrow wiring portion 44b of the second power supply wiring 44A is formed.

[0096] The narrow wiring portion 44b and the connection wiring portion 44c are disposed in the recessed region 44d of the second output wiring 45A. This allows the narrow wiring portion 44b to be disposed closer to the center of the substrate 10 in the y direction than the wide wiring portion 44a, so that the connection ends 47c of the four control wirings 47A near the substrate side surface 14 can be disposed at positions overlapping with the third region R3 (see FIG. 4) of the semiconductor element 60 when viewed in the z direction.

[0097] The second output wiring 45B is symmetrical to the second output wiring 45A with respect to a virtual center line extending along the x direction at the center in the y direction of the substrate main surface 11. Therefore, like the second output wiring 45A, the second output wiring 45B has a wide wiring portion 45a, a narrow wiring portion 45b, and an inclined portion 45c. In addition, a recessed region 45d is formed in the second output wiring 45B. Ten element electrodes 60a are joined to the narrow wiring portion 45b. The arrangement of the ten element electrodes 60a is the same as the arrangement of the ten element electrodes 60a of the narrow wiring portion 45b of the second output wiring 45A.

[0098] The second power supply wiring 44B is symmetrical to the second power supply wiring 44A with respect to an imaginary center line extending along the x direction at the center in the y direction of the substrate main surface 11. Therefore, like the second power supply wiring 44A, the second power supply wiring 44B has a wide wiring portion 44a, a narrow wiring portion 44b, and a connection wiring portion 44c. The wide wiring portion 44a is disposed closer to the substrate side surface 14 than the semiconductor element 60 when viewed in the z direction. The narrow wiring portion 44b overlaps with the semiconductor element 60 when viewed in the z direction.

[0099] Five element electrodes 60a are joined to the narrow wiring portion 44b. The arrangement of the five element electrodes 60a is the same as the arrangement of the five element electrodes 60a of the narrow wiring portion 44b of the second power supply wiring 44B. The narrow wiring portion 44b and the connection wiring portion 44c are arranged in the recessed region 45d of the second output wiring 45B, similar to the narrow wiring portion 44b and the connection wiring portion 44c of the second power supply wiring 44A. This allows the connection ends 47c of the four control wirings 47B near the substrate side surface 14 to be arranged at positions overlapping with the fourth region R4 (see FIG. 4) of the semiconductor element 60 when viewed in the z direction.

[0100] 7, the area of ​​the second output wiring 45A viewed in the z direction and the area of ​​the second ground wiring 46 viewed in the z direction are larger than the area of ​​the second power supply wiring 44A viewed in the z direction. The area of ​​the second output wiring 45B viewed in the z direction and the area of ​​the second ground wiring 46 viewed in the z direction are larger than the area of ​​the second power supply wiring 44B viewed in the z direction.

[0101] 5, the area of ​​the wiring ends 47a of the control wirings 47A arranged at both ends in the x direction as viewed in the z direction is larger than the area of ​​the wiring ends 47a of the other control wirings 47A as viewed in the z direction. The area of ​​the wiring end 47a of the control wiring 47A arranged at the center in the x direction as viewed in the z direction is larger than the area of ​​the wiring ends 47a of the control wirings 47A other than the control wirings 47A arranged at both ends in the y direction as viewed in the z direction. The shape of the wiring end 47a of the control wiring 47A arranged at the center in the x direction as viewed in the z direction is a rectangle with the long side in the x direction and the short side in the y direction.

[0102] The control wiring 47A arranged at the center in the x direction and the control wiring 47A adjacent to the substrate side surface 13 in the x direction have two connection wiring parts 47b and two connection ends 47c. The control wiring 47A has an extension wiring part 47d extending from one connection end 47c toward the second power supply wiring 44B, a connection end 47e provided at the tip of the extension wiring part 47d, an extension wiring part 47f extending from another connection end 47c toward the first power supply wiring 41B, and a connection end 47g provided at the tip of the extension wiring part 47f. The element electrode 60a of the fourth region R4 (see FIG. 4) of the semiconductor element 60 is joined to the connection end 47e by the solder layer 48. The element electrode 60a of the second region R2 (see FIG. 4) of the semiconductor element 60 is joined to the connection end 47g by the solder layer 48.

[0103] 6, the first power supply conductor 51A is disposed in the wide wiring portion 41a of the first power supply wiring 41A. In this embodiment, the first power supply conductor 51A is disposed at an end of the wide wiring portion 41a of the first power supply wiring 41A that is close to the substrate side surface 13 in the x direction. Specifically, as viewed in the z direction, of both ends of the first power supply conductor 51A in the x direction, the end edge closer to the substrate side surface 13 is aligned with the end edge of the wide wiring portion 41a of the first power supply wiring 41A that is closer to the substrate side surface 13 in the x direction.

[0104] The length in the y direction of the top surface 50A of the first power supply conductor 51A is shorter than the width of the wide wiring portion 41a of the first power supply wiring 41A. The first power supply conductor 51A is disposed close to the edge closer to the substrate side surface 16 (first output wiring 42A) among both ends in the y direction of the wide wiring portion 41a of the first power supply wiring 41A. Therefore, the distance between the first power supply conductor 51A and the edge closer to the substrate side surface 16 (first output wiring 42A) among both ends in the y direction of the wide wiring portion 41a of the first power supply wiring 41A is smaller than the distance between the first power supply conductor 51A and the edge closer to the substrate side surface 15 among both ends in the y direction of the wide wiring portion 41a of the first power supply wiring 41A. In this embodiment, when viewed in the z direction, the edge of the first power supply conductor 51A in the y direction that is closer to the substrate side surface 16 is aligned with the edge of the wide wiring portion 41a in the first power supply wiring 41A in the y direction that is closer to the substrate side surface 16.

[0105] The length in the x direction of the top surface 50A of the first power supply conductor 51A is shorter than the length in the x direction of the wide wiring portion 41a of the first power supply wiring 41A. In this embodiment, the length in the x direction of the top surface 50A of the first power supply conductor 51A is equal to or less than half the length in the x direction of the wide wiring portion 41a of the first power supply wiring 41A.

[0106] The first power supply conductor 51B is disposed in the wide wiring portion 41a of the first power supply wiring 41B. In this embodiment, the first power supply conductor 51B is disposed at an end of the wide wiring portion 41a of the first power supply wiring 41B in the x direction that is close to the substrate side surface 13. Specifically, as viewed in the z direction, of both ends of the first power supply conductor 51B in the x direction, the end edge closer to the substrate side surface 13 is aligned with the end edge of the wide wiring portion 41a of the first power supply wiring 41B in the x direction that is closer to the substrate side surface 13.

[0107] The length in the y direction of the top surface 50A of the first power source conductor 51B is shorter than the width of the wide wiring portion 41a of the first power source wiring 41B. The first power source conductor 51B is disposed closer to the edge closer to the substrate side surface 15 among both ends in the y direction of the wide wiring portion 41a of the first power source wiring 41B. Therefore, the distance between the first power source conductor 51B and the edge closer to the substrate side surface 15 among both ends in the y direction of the wide wiring portion 41a of the first power source wiring 41B is smaller than the distance between the first power source conductor 51B and the edge closer to the substrate side surface 16 among both ends in the y direction of the wide wiring portion 41a of the first power source wiring 41B. In this embodiment, as viewed in the z direction, the edge closer to the substrate side surface 15 among both ends in the y direction of the first power source conductor 51B is aligned with the edge closer to the substrate side surface 15 among both ends in the y direction of the wide wiring portion 41a of the first power source wiring 41B.

[0108] The length in the x direction of the top surface 50A of the first power supply conductor 51B is shorter than the length in the x direction of the wide wiring portion 41a of the first power supply wiring 41B. In this embodiment, the length in the x direction of the top surface 50A of the first power supply conductor 51B is equal to or less than half the length in the x direction of the wide wiring portion 41a of the first power supply wiring 41B.

[0109] The length in the x direction of the top surface 50A of the first power supply conductor 51B is equal to the length in the x direction of the top surface 50A of the first power supply conductor 51A, and the length in the y direction of the top surface 50A of the first power supply conductor 51B is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51A. Therefore, the area of ​​the top surface 50A of the first power supply conductor 51B is equal to the area of ​​the top surface 50A of the first power supply conductor 51A. Here, if the difference between the area of ​​the top surface 50A of the first power supply conductor 51B and the area of ​​the top surface 50A of the first power supply conductor 51A is within 5% of the area of ​​the top surface 50A of the first power supply conductor 51A, for example, it can be said that the area of ​​the top surface 50A of the first power supply conductor 51B is equal to the area of ​​the top surface 50A of the first power supply conductor 51A. Here, since first power supply conductors 51A, 51B are both rectangular parallelepipeds, the x-direction length and y-direction length of the portion of first power supply conductor 51A closer to substrate 10 than top surface 50A are equal to the x-direction length and y-direction length of top surface 50A of first power supply conductor 51A, and the x-direction length and y-direction length of the portion of first power supply conductor 51B closer to substrate 10 than top surface 50A are equal to the x-direction length and y-direction length of top surface 50A of first power supply conductor 51A.

[0110] Although not shown, the thickness of first power supply conductor 51B is equal to the thickness of first power supply conductor 51A. Therefore, the volume of first power supply conductor 51B is equal to the volume of first power supply conductor 51A. Here, if the difference between the volumes of first power supply conductor 51B and first power supply conductor 51A is within 5% of the volume of first power supply conductor 51A, for example, it can be said that the volume of first power supply conductor 51B is equal to the volume of first power supply conductor 51A.

[0111] 6, the first output conductor 52A is disposed in the wide wiring portion 42a of the first output wiring 42A. In this embodiment, the first output conductor 52A is disposed at an end portion of the wide wiring portion 42a of the first output wiring 42A that is closer to the substrate side surface 13 in the x direction. Specifically, as viewed in the z direction, the end edge closer to the substrate side surface 13 of both end edges of the first output conductor 52A in the x direction is aligned with the end edge closer to the substrate side surface 13 in the wide wiring portion 42a of the first output wiring 42A in the x direction.

[0112] The length in the y direction of the top surface 50A of the first output conductor 52A is shorter than the width of the wide wiring portion 42a of the first output wiring 42A. The length in the y direction of the top surface 50A of the first output conductor 52A is 1 / 2 or more and 2 / 3 or less of the width of the wide wiring portion 42a of the first output wiring 42A. The first output conductor 52A is disposed close to the edge closer to the substrate side surface 16 (first ground wiring 43) among both ends in the y direction of the wide wiring portion 42a of the first output wiring 42A. Therefore, the distance between the first output conductor 52A and the edge closer to the substrate side surface 16 (first ground wiring 43) among both ends in the y direction of the wide wiring portion 42a of the first output wiring 42A is smaller than the distance between the first output conductor 52A and the edge closer to the substrate side surface 15 (first power supply wiring 41A) among both ends in the y direction of the wide wiring portion 42a of the first output wiring 42A.

[0113] The length in the x direction of the first output conductor 52A is shorter than the length in the x direction of the wide wiring portion 42a of the first output wiring 42A. The first output conductor 52A is disposed closer to the substrate side surface 13 in the x direction than the inclined portion 42c of the first output wiring 42A.

[0114] The length in the x direction of the top surface 50A of the first output conductor 52A is longer than the length in the x direction of the top surface 50A of the first power supply conductor 51A. In other words, the length in the x direction of the top surface 50A of the first power supply conductor 51A is shorter than the length in the x direction of the top surface 50A of the first output conductor 52A. In this embodiment, the length in the x direction of the top surface 50A of the first power supply conductor 51A is 1 / 2 or more and 2 / 3 or less of the length in the x direction of the top surface 50A of the first output conductor 52A. The length in the y direction of the top surface 50A of the first output conductor 52A is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51A. Therefore, the area of ​​the top surface 50A of the first power supply conductor 51A is smaller than the area of ​​the top surface 50A of the first output conductor 52A. Since the area of ​​the top surface 50A of the first power supply conductor 51A is equal to the area of ​​the top surface 50A of the first power supply conductor 51B, the area of ​​the top surface 50A of the first power supply conductor 51B is smaller than the area of ​​the top surface 50A of the first output conductor 52A. In other words, the area of ​​the top surface 50A of the first output conductor 52A is larger than the area of ​​the top surface 50A of the first power supply conductor 51A, and is larger than the area of ​​the top surface 50A of the first power supply conductor 51B. Here, since the first output conductor 52A is a rectangular parallelepiped, the length in the x direction and the length in the y direction of the portion of the first output conductor 52A closer to the substrate 10 than the top surface 50A are equal to the length in the x direction and the length in the y direction of the top surface 50A of the first output conductor 52A.

[0115] Although not shown, the thickness of the first output conductor 52A is equal to the thickness of the first power supply conductor 51A. Therefore, the volume of the first output conductor 52A is larger than the volume of the first power supply conductor 51A. In other words, the volume of the first power supply conductor 51A is smaller than the volume of the first output conductor 52A. Here, if the difference between the volume of the first output conductor 52A and the volume of the first power supply conductor 51A is, for example, within 5% of the volume of the first power supply conductor 51A, it can be said that the volume of the first output conductor 52A is equal to the volume of the first power supply conductor 51A. Since the volume of the first power supply conductor 51A is equal to the volume of the first power supply conductor 51B, it can be said that the volume of the first power supply conductor 51B is smaller than the volume of the first output conductor 52A.

[0116] 6, the first output conductor 52B is disposed in the wide wiring portion 42a of the first output wiring 42B. In this embodiment, the first output conductor 52B is disposed at an end portion of the wide wiring portion 42a of the first output wiring 42B that is closer to the substrate side surface 13 in the x direction. Specifically, as viewed in the z direction, the end edge closer to the substrate side surface 13 of both end edges of the first output conductor 52B in the x direction is aligned with the end edge closer to the substrate side surface 13 of the wide wiring portion 42a of the first output wiring 42B in the x direction.

[0117] The length in the y direction of the top surface 50A of the first output conductor 52B is shorter than the width of the wide wiring portion 42a of the first output wiring 42B. The length in the y direction of the top surface 50A of the first output conductor 52B is 1 / 2 or more and 2 / 3 or less of the width of the wide wiring portion 42a of the first output wiring 42B. The first output conductor 52B is disposed close to the edge closer to the substrate side surface 15 (first ground wiring 43) among both ends in the y direction of the wide wiring portion 42a of the first output wiring 42B. Therefore, the distance between the first output conductor 52B and the edge closer to the substrate side surface 15 (first ground wiring 43) among both ends in the y direction of the wide wiring portion 42a of the first output wiring 42B is smaller than the distance between the first output conductor 52B and the edge closer to the substrate side surface 16 (first power supply wiring 41B) among both ends in the y direction of the wide wiring portion 42a of the first output wiring 42B.

[0118] The length in the x direction of the first output conductor 52B is shorter than the length in the x direction of the wide wiring portion 42a of the first output wiring 42B. The first output conductor 52B is disposed closer to the substrate side surface 13 in the x direction than the inclined portion 42c of the first output wiring 42B.

[0119] The length in the x direction of the top surface 50A of the first output conductor 52B is equal to the length in the x direction of the top surface 50A of the first output conductor 52A, and the length in the y direction of the top surface 50A of the first output conductor 52B is equal to the length in the y direction of the top surface 50A of the first output conductor 52A. Therefore, the area of ​​the top surface 50A of the first output conductor 52B is equal to the area of ​​the top surface 50A of the first output conductor 52A. Here, if the difference between the area of ​​the top surface 50A of the first output conductor 52B and the area of ​​the top surface 50A of the first output conductor 52A is within 5% of the area of ​​the top surface 50A of the first output conductor 52A, for example, it can be said that the area of ​​the top surface 50A of the first output conductor 52B is equal to the area of ​​the top surface 50A of the first output conductor 52A. Since the area of ​​the top surface 50A of the first output conductor 52B is equal to the area of ​​the top surface 50A of the first output conductor 52A, the area of ​​the top surface 50A of the first output conductor 52B is larger than the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B are each smaller than the area of ​​the top surface 50A of the first output conductor 52B. Here, since the first output conductor 52B is a rectangular parallelepiped, the length in the x direction and the length in the y direction of the portion of the first output conductor 52B closer to the substrate 10 than the top surface 50A are equal to the length in the x direction and the length in the y direction of the top surface 50A of the first output conductor 52B.

[0120] Although not shown, the thickness of the first output conductor 52B is equal to the thickness of the first output conductor 52A. Therefore, the volume of the first output conductor 52B is equal to the volume of the first output conductor 52A. Here, if the difference between the volume of the first output conductor 52B and the volume of the first output conductor 52A is, for example, within 5% of the volume of the first output conductor 52A, it can be said that the volume of the first output conductor 52B is equal to the volume of the first output conductor 52A. Since the volume of the first output conductor 52B is equal to the volume of the first output conductor 52A, the volume of the first output conductor 52B is larger than the volume of the first power supply conductor 51A and the volume of the first power supply conductor 51B. In other words, each of the volumes of the first power supply conductor 51A and the first power supply conductor 51B is smaller than the volume of the first output conductor 52B.

[0121] 6, the first ground conductor 53 is disposed at one of both ends in the x direction of the first ground wiring 43 that is closer to the board side surface 13. Specifically, when viewed in the z direction, one of both ends of the first ground conductor 53 in the x direction that is closer to the board side surface 13 is aligned with one of both ends of the first ground wiring 43 in the x direction that is closer to the board side surface 13.

[0122] The length in the y direction of the top surface 50A of the first ground conductor 53 is shorter than the width of the first ground wiring 43. The length in the y direction of the top surface 50A of the first ground conductor 53 is greater than or equal to ½ and less than or equal to ⅔ of the width of the first ground wiring 43. The first ground conductor 53 is disposed in the center of the first ground wiring 43 in the y direction.

[0123] The length in the x direction of the top surface 50A of the first ground conductor 53 is equal to the length in the x direction of the top surface 50A of the first output conductor 52A. The length in the y direction of the top surface 50A of the first ground conductor 53 is equal to the length in the y direction of the top surface 50A of the first output conductor 52A. Therefore, the area of ​​the top surface 50A of the first ground conductor 53 is equal to the area of ​​the top surface 50A of the first output conductor 52A. Here, if the difference between the area of ​​the top surface 50A of the first ground conductor 53 and the area of ​​the top surface 50A of the first output conductor 52A is within 5% of the area of ​​the top surface 50A of the first output conductor 52A, for example, it can be said that the area of ​​the top surface 50A of the first ground conductor 53 is equal to the area of ​​the top surface 50A of the first output conductor 52A. In this manner, since the area of ​​the top surface 50A of the first ground conductor 53 is equal to the area of ​​the top surface 50A of the first output conductor 52A, the area of ​​the top surface 50A of the first ground conductor 53 is greater than the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B are each smaller than the area of ​​the top surface 50A of the first ground conductor 53. Here, since the first ground conductor 53 is a rectangular parallelepiped, the length in the x direction and the length in the y direction of a portion of the first ground conductor 53 closer to the substrate 10 than the top surface 50A are equal to the length in the x direction and the length in the y direction of the top surface 50A of the first ground conductor 53.

[0124] Although not shown, the thickness of the first ground conductor 53 is equal to the thickness of the first output conductor 52A. Therefore, the volume of the first ground conductor 53 is equal to the volume of the first output conductor 52A. Here, if the difference between the volume of the first ground conductor 53 and the volume of the first output conductor 52A is, for example, within 5% of the volume of the first output conductor 52A, it can be said that the volume of the first ground conductor 53 is equal to the volume of the first output conductor 52A. In this way, since the volume of the first ground conductor 53 is equal to the volume of the first output conductor 52A, the volume of the first ground conductor 53 is larger than the volume of the first power supply conductor 51A and the volume of the first power supply conductor 51B. In other words, the volume of the first power supply conductor 51A and the volume of the first power supply conductor 51B are each smaller than the volume of the first ground conductor 53.

[0125] 7, the second power supply conductor 54A is disposed in the wide wiring portion 44a of the second power supply wiring 44A. In this embodiment, the second power supply conductor 54A is disposed at an end of the wide wiring portion 44a of the second power supply wiring 44A that is close to the substrate side surface 14 in the x direction. Specifically, as viewed in the z direction, of both end edges of the second power supply conductor 54A in the x direction, the end edge closer to the substrate side surface 14 is aligned with the end edge of the wide wiring portion 44a of the second power supply wiring 44A that is close to the substrate side surface 14 in the x direction.

[0126] The length in the y direction of the top surface 50A of the second power supply conductor 54A is shorter than the width of the wide wiring portion 44a of the second power supply wiring 44A. The width of the wide wiring portion 44a of the second power supply wiring 44A is the size of the wide wiring portion 44a of the second power supply wiring 44A in a direction perpendicular to the direction in which the wide wiring portion 44a of the second power supply wiring 44A extends as viewed in the z direction. In this embodiment, the width of the wide wiring portion 44a of the second power supply wiring 44A is the length in the y direction of the wide wiring portion 44a of the second power supply wiring 44A. The second power supply conductor 54A is disposed close to the end edge closer to the substrate side surface 16 (the second output wiring 45A) among both ends in the y direction of the wide wiring portion 44a of the second power supply wiring 44A. For this reason, the distance between the second power supply conductor 54A and one of both y-direction edges of the wide wiring portion 44a of the second power supply wiring 44A that is closer to the substrate side surface 16 (second output wiring 45A) is smaller than the distance between the second power supply conductor 54A and one of both y-direction edges of the wide wiring portion 44a of the second power supply wiring 44A that is closer to the substrate side surface 15. In this embodiment, as viewed in the z direction, the edge closer to the substrate side surface 16 of both y-direction edges of the second power supply conductor 54A is aligned with the edge closer to the substrate side surface 16 (second output wiring 45A) of both y-direction edges of the wide wiring portion 44a of the second power supply wiring 44A.

[0127] The length in the x direction of the second power supply conductor 54A is shorter than the length in the x direction of the wide wiring portion 44a of the second power supply wiring 44A. In this embodiment, the length in the x direction of the second power supply conductor 54A is equal to or less than half the length in the x direction of the wide wiring portion 44a of the second power supply wiring 44A.

[0128] 5, the length in the x direction of the top surface 50A of the second power source conductor 54A is equal to the length in the x direction of the top surface 50A of the first power source conductor 51A, and the length in the y direction of the top surface 50A of the second power source conductor 54A is equal to the length in the y direction of the top surface 50A of the first power source conductor 51A. Therefore, the area of ​​the top surface 50A of the second power source conductor 54A is equal to the area of ​​the top surface 50A of the first power source conductor 51A. Here, if the difference between the area of ​​the top surface 50A of the second power source conductor 54A and the area of ​​the top surface 50A of the first power source conductor 51A is within 5% of the area of ​​the top surface 50A of the first power source conductor 51A, it can be said that the area of ​​the top surface 50A of the second power source conductor 54A is equal to the area of ​​the top surface 50A of the first power source conductor 51A. For this reason, the area of ​​top surface 50A of second power supply conductor 54A is smaller than the area of ​​top surface 50A of first output conductor 52A, the area of ​​top surface 50A of first output conductor 52B, and the area of ​​top surface 50A of first ground conductor 53. Here, since second power supply conductor 54A is a rectangular parallelepiped, the length in the x direction and the length in the y direction of a portion of second power supply conductor 54A closer to substrate 10 than top surface 50A are equal to the length in the x direction and the length in the y direction of top surface 50A of second power supply conductor 54A.

[0129] Although not shown, the thickness of the second power supply conductor 54A is equal to the thickness of the first power supply conductor 51A. Therefore, the volume of the second power supply conductor 54A is equal to the volume of the first power supply conductor 51A. Here, if the difference between the volumes of the second power supply conductor 54A and the first power supply conductor 51A is, for example, within 5% of the volume of the first power supply conductor 51A, it can be said that the volume of the second power supply conductor 54A is equal to the volume of the first power supply conductor 51A. Therefore, the volume of the second power supply conductor 54A is smaller than the volume of the first output conductor 52A, the volume of the first output conductor 52B, and the volume of the first ground conductor 53.

[0130] 7, the second power supply conductor 54B is disposed in the wide wiring portion 44a of the second power supply wiring 44B. In this embodiment, the second power supply conductor 54B is disposed at an end of the wide wiring portion 44a of the second power supply wiring 44B in the x direction that is close to the substrate side surface 14. Specifically, as viewed in the z direction, of both ends of the second power supply conductor 54B in the x direction, the end edge closer to the substrate side surface 14 is aligned with the end edge of the wide wiring portion 44a of the second power supply wiring 44B that is closer to the substrate side surface 14 in the x direction.

[0131] The length in the y direction of the top surface 50A of the second power supply conductor 54B is shorter than the width of the wide wiring portion 44a of the second power supply wiring 44B. The width of the wide wiring portion 44a of the second power supply wiring 44B is the size of the wide wiring portion 44a of the second power supply wiring 44B in a direction perpendicular to the direction in which the wide wiring portion 44a of the second power supply wiring 44B extends as viewed in the z direction. In this embodiment, the width of the wide wiring portion 44a of the second power supply wiring 44B is the length in the y direction of the wide wiring portion 44a of the second power supply wiring 44B. The second power supply conductor 54B is disposed close to the edge closer to the substrate side surface 15 (second output wiring 45B) of both ends in the y direction of the wide wiring portion 44a of the second power supply wiring 44B. For this reason, the distance between the second power supply conductor 54B and one of both y-direction edges of the wide wiring portion 44a of the second power supply wiring 44B that is closer to the substrate side surface 15 (second output wiring 45) is smaller than the distance between the second power supply conductor 54B and one of both y-direction edges of the wide wiring portion 44a of the second power supply wiring 44B that is closer to the substrate side surface 16. In this embodiment, as viewed in the z direction, the edge closer to the substrate side surface 15 (second output wiring 45) of both y-direction edges of the second power supply conductor 54B is aligned with the edge closer to the substrate side surface 15 (second output wiring 45) of both y-direction edges of the wide wiring portion 44a of the second power supply wiring 44B.

[0132] The length in the x direction of the second power supply conductor 54B is shorter than the length in the x direction of the wide wiring portion 44a of the second power supply wiring 44B. In this embodiment, the length in the x direction of the second power supply conductor 54B is equal to or less than half the length in the x direction of the wide wiring portion 44a of the second power supply wiring 44B.

[0133] 5, the length in the x direction of the top surface 50A of the second power supply conductor 54B is equal to the length in the x direction of the top surface 50A of the second power supply conductor 54A, and the length in the y direction of the top surface 50A of the second power supply conductor 54B is equal to the length in the y direction of the top surface 50A of the second power supply conductor 54A. Therefore, the area of ​​the top surface 50A of the second power supply conductor 54B is equal to the area of ​​the top surface 50A of the second power supply conductor 54A. Here, if the difference between the area of ​​the top surface 50A of the second power supply conductor 54B and the area of ​​the top surface 50A of the second power supply conductor 54A is within 5% of the area of ​​the top surface 50A of the second power supply conductor 54A, for example, it can be said that the area of ​​the top surface 50A of the second power supply conductor 54B is equal to the area of ​​the top surface 50A of the second power supply conductor 54A. Because the area of ​​top surface 50A of second power supply conductor 54A is equal to the area of ​​top surface 50A of first power supply conductor 51A, the area of ​​top surface 50A of second power supply conductor 54A is smaller than the area of ​​top surface 50A of first output conductor 52A, the area of ​​top surface 50A of first output conductor 52B, and the area of ​​top surface 50A of first ground conductor 53. Here, because second power supply conductor 54B is a rectangular parallelepiped, the lengths in the x and y directions of a portion of second power supply conductor 54B closer to substrate 10 than top surface 50A are equal to the lengths in the x and y directions of top surface 50A of second power supply conductor 54B.

[0134] Although not shown, the thickness of the second power source conductor 54B is equal to the thickness of the second power source conductor 54A. Therefore, the volume of the second power source conductor 54B is equal to the volume of the second power source conductor 54A. Here, if the difference between the volume of the second power source conductor 54B and the volume of the second power source conductor 54A is, for example, within 5% of the volume of the second power source conductor 54A, it can be said that the volume of the second power source conductor 54B is equal to the volume of the second power source conductor 54A. Since the volume of the second power source conductor 54A is equal to the volume of the first power source conductor 51A, the volume of the second power source conductor 54B is smaller than the volume of the first output conductor 52A, the volume of the first output conductor 52B, and the volume of the first ground conductor 53.

[0135] The second output conductor 55A is disposed in the wide wiring portion 45a of the second output wiring 45A. In this embodiment, the second output conductor 55A is disposed in an end portion of the wide wiring portion 45a of the second output wiring 45A that is closer to the substrate side surface 14 in the x direction. Specifically, as viewed in the z direction, the end edge closer to the substrate side surface 14 of both end edges of the second output conductor 55A in the x direction is aligned with the end edge closer to the substrate side surface 14 of the wide wiring portion 45a of the second output wiring 45A in the x direction.

[0136] The length in the y direction of the top surface 50A of the second output conductor 55A is shorter than the width of the wide wiring portion 45a of the second output wiring 45A. The length in the y direction of the top surface 50A of the second output conductor 55A is 1 / 2 or more and 2 / 3 or less of the width of the wide wiring portion 45a of the second output wiring 45A. The width of the wide wiring portion 45a of the second output wiring 45A is the size of the wide wiring portion 45a of the second output wiring 45A in a direction perpendicular to the direction in which the wide wiring portion 45a of the second output wiring 45A extends as viewed in the z direction. In this embodiment, the width of the wide wiring portion 45a of the second output wiring 45A is the length in the y direction of the wide wiring portion 45a of the second output wiring 45A. The second output conductor 55A is disposed close to the end edge closer to the substrate side surface 16 among both ends in the y direction of the wide wiring portion 45a of the second output wiring 45A. Therefore, the distance between the second output conductor 55A and the edge closer to the substrate side surface 16 of both y-direction edges of the wide wiring portion 45a in the second output wiring 45A is smaller than the distance between the second output conductor 55A and the edge closer to the substrate side surface 15 of both y-direction edges of the wide wiring portion 45a in the second output wiring 45A.

[0137] The length in the x direction of the second output conductor 55A is shorter than the length in the x direction of the wide wiring portion 45a of the second output wiring 45A. The second output conductor 55A is disposed closer to the substrate side surface 14 in the x direction than the inclined portion 45c of the second output wiring 45A.

[0138] The length in the x direction of the top surface 50A of the second output conductor 55A is longer than the length in the x direction of the top surface 50A of the second power supply conductor 54A. In other words, the length in the x direction of the top surface 50A of the second power supply conductor 54A is shorter than the length in the x direction of the top surface 50A of the second output conductor 55A. The length in the x direction of the top surface 50A of the second power supply conductor 54A is 1 / 2 or more and 2 / 3 or less of the length in the x direction of the top surface 50A of the second output conductor 55A. The length in the y direction of the top surface 50A of the second output conductor 55A is equal to the length in the y direction of the top surface 50A of the second power supply conductor 54A. Therefore, the area of ​​the top surface 50A of the second power supply conductor 54A is smaller than the area of ​​the top surface 50A of the second output conductor 55A. Since the area of ​​the top surface 50A of the second power supply conductor 54A is equal to the area of ​​the top surface 50A of the second power supply conductor 54B, the area of ​​the top surface 50A of the second power supply conductor 54B is smaller than the area of ​​the top surface 50A of the second output conductor 55A. In other words, the area of ​​the top surface 50A of the second output conductor 55A is larger than the area of ​​the top surface 50A of the second power supply conductor 54A and the area of ​​the top surface 50A of the second power supply conductor 54B. Here, since the second output conductor 55A is a rectangular parallelepiped, the length in the x direction and the length in the y direction of the portion of the second output conductor 55A closer to the substrate 10 than the top surface 50A are equal to the length in the x direction and the length in the y direction of the top surface 50A of the second output conductor 55A.

[0139] Although not shown, the thickness of the second output conductor 55A is equal to the thickness of the second power supply conductor 54A. Therefore, the volume of the second output conductor 55A is larger than the volume of the second power supply conductor 54A. In other words, the volume of the second power supply conductor 54A is smaller than the volume of the second output conductor 55A. Here, if the difference between the volume of the second output conductor 55A and the volume of the second power supply conductor 54A is within 5% of the volume of the second power supply conductor 54A, for example, it can be said that the volume of the second output conductor 55A is equal to the volume of the second power supply conductor 54A. Since the volume of the second power supply conductor 54A is equal to the volume of the second power supply conductor 54B, it can be said that the volume of the second power supply conductor 54B is smaller than the volume of the second output conductor 55A.

[0140] 5, the length in the x direction of the top surface 50A of the second output conductor 55A is equal to the length in the x direction of the top surface 50A of the first output conductor 52A, and the length in the y direction of the top surface 50A of the second output conductor 55A is equal to the length in the y direction of the top surface 50A of the first output conductor 52A. Therefore, the area of ​​the top surface 50A of the second output conductor 55A is equal to the area of ​​the top surface 50A of the first output conductor 52A. Here, if the difference between the area of ​​the top surface 50A of the second output conductor 55A and the area of ​​the top surface 50A of the first output conductor 52A is within 5% of the area of ​​the top surface 50A of the first output conductor 52A, it can be said that the area of ​​the top surface 50A of the second output conductor 55A is equal to the area of ​​the top surface 50A of the first output conductor 52A. Therefore, the area of ​​the top surface 50A of the second output conductor 55A is larger than the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B are each smaller than the area of ​​the top surface 50A of the second output conductor 55A.

[0141] Although not shown, the thickness of the second output conductor 55A is equal to the thickness of the first output conductor 52A. Therefore, the volume of the second output conductor 55A is equal to the volume of the first output conductor 52A. Here, if the difference between the volume of the second output conductor 55A and the volume of the first output conductor 52A is, for example, within 5% of the volume of the first output conductor 52A, it can be said that the volume of the second output conductor 55A is equal to the volume of the first output conductor 52A. Therefore, the volume of the second output conductor 55A is larger than the volume of the first power supply conductor 51A and the volume of the first power supply conductor 51B. In other words, the volume of the first power supply conductor 51A and the volume of the first power supply conductor 51B are each smaller than the volume of the second output conductor 55A.

[0142] The second output conductor 55B is disposed in the wide wiring portion 45a of the second output wiring 45B. In this embodiment, the second output conductor 55B is disposed at an end of the wide wiring portion 45a of the second output wiring 45B that is closer to the substrate side surface 14 in the x direction. Specifically, as viewed in the z direction, the end edge closer to the substrate side surface 14 of both end edges of the second output conductor 55B in the x direction is aligned with the end edge closer to the substrate side surface 14 of the wide wiring portion 45a of the second output wiring 45B in the x direction.

[0143] The length in the y direction of the top surface 50A of the second output conductor 55B is smaller than the width of the wide wiring portion 45a of the second output wiring 45B. The length in the y direction of the top surface 50A of the second output conductor 55B is 1 / 2 or more and 2 / 3 or less of the width of the wide wiring portion 45a of the second output wiring 45B. The width of the wide wiring portion 45a of the second output wiring 45B is the size of the wide wiring portion 45a of the second output wiring 45B in a direction perpendicular to the direction in which the wide wiring portion 45a of the second output wiring 45B extends as viewed in the z direction. In this embodiment, the width of the wide wiring portion 45a of the second output wiring 45B is the length in the y direction of the wide wiring portion 45a of the second output wiring 45B. The second output conductor 55B is disposed close to the end edge closer to the substrate side surface 15 among both ends in the y direction of the wide wiring portion 45a of the second output wiring 45B. Therefore, the distance between the second output conductor 55B and the edge closer to the substrate side surface 15 of both y-direction edges of the wide wiring portion 45a in the second output wiring 45B is smaller than the distance between the second output conductor 55B and the edge closer to the substrate side surface 16 of both y-direction edges of the wide wiring portion 45a in the second output wiring 45B.

[0144] The length in the x direction of the second output conductor 55B is shorter than the length in the x direction of the wide wiring portion 45a of the second output wiring 45B. The second output conductor 55B is disposed closer to the substrate side surface 14 in the x direction than the inclined portion 45c of the second output wiring 45B.

[0145] The length in the x direction of the top surface 50A of the second output conductor 55B is equal to the length in the x direction of the top surface 50A of the second output conductor 55A, and the length in the y direction of the top surface 50A of the second output conductor 55B is equal to the length in the y direction of the top surface 50A of the second output conductor 55A. Therefore, the area of ​​the top surface 50A of the second output conductor 55B is equal to the area of ​​the top surface 50A of the second output conductor 55A. Here, if the difference between the area of ​​the top surface 50A of the second output conductor 55B and the area of ​​the top surface 50A of the second output conductor 55A is within 5% of the area of ​​the top surface 50A of the second output conductor 55A, for example, it can be said that the area of ​​the top surface 50A of the second output conductor 55B is equal to the area of ​​the top surface 50A of the second output conductor 55A. Since the area of ​​the top surface 50A of the second output conductor 55B is equal to the area of ​​the top surface 50A of the second output conductor 55A, the area of ​​the top surface 50A of the second output conductor 55B is larger than the area of ​​the top surface 50A of the second power supply conductor 54A and the area of ​​the top surface 50A of the second power supply conductor 54B. In other words, the area of ​​the top surface 50A of the second power supply conductor 54A and the area of ​​the top surface 50A of the second power supply conductor 54B are each smaller than the area of ​​the top surface 50A of the second output conductor 55B. Here, since the second output conductor 55B is a rectangular parallelepiped, the length in the x direction and the length in the y direction of the portion of the second output conductor 55B closer to the substrate 10 than the top surface 50A are equal to the length in the x direction and the length in the y direction of the top surface 50A of the second output conductor 55B.

[0146] Although not shown, the thickness of the second output conductor 55B is equal to the thickness of the second output conductor 55A. Therefore, the volume of the second output conductor 55B is equal to the volume of the second output conductor 55A. Here, if the difference between the volume of the second output conductor 55B and the volume of the second output conductor 55A is, for example, within 5% of the volume of the second output conductor 55A, it can be said that the volume of the second output conductor 55B is equal to the volume of the second output conductor 55A. Since the volume of the second output conductor 55B is equal to the volume of the second output conductor 55A, the volume of the second output conductor 55B is larger than the volume of the second power supply conductor 54A and the volume of the second power supply conductor 54B. In other words, the volume of the second power supply conductor 54A and the volume of the second power supply conductor 54B are each smaller than the volume of the second output conductor 55B.

[0147] 5, the length in the x direction of the top surface 50A of the second output conductor 55B is equal to the length in the x direction of the top surface 50A of the first output conductor 52B, and the length in the y direction of the top surface 50A of the second output conductor 55B is equal to the length in the y direction of the top surface 50A of the first output conductor 52B. Therefore, the area of ​​the top surface 50A of the second output conductor 55B is equal to the area of ​​the top surface 50A of the first output conductor 52B. Here, if the difference between the area of ​​the top surface 50A of the second output conductor 55B and the area of ​​the top surface 50A of the first output conductor 52B is within 5% of the area of ​​the top surface 50A of the first output conductor 52B, it can be said that the area of ​​the top surface 50A of the second output conductor 55B is equal to the area of ​​the top surface 50A of the first output conductor 52B. Therefore, the area of ​​the top surface 50A of the second output conductor 55B is larger than the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B are each smaller than the area of ​​the top surface 50A of the second output conductor 55B.

[0148] Although not shown, the thickness of the second output conductor 55B is equal to the thickness of the first output conductor 52B. Therefore, the volume of the second output conductor 55B is equal to the volume of the first output conductor 52B. Here, if the difference between the volume of the second output conductor 55B and the volume of the first output conductor 52B is, for example, within 5% of the volume of the first output conductor 52B, it can be said that the volume of the second output conductor 55B is equal to the volume of the first output conductor 52B. Therefore, the volume of the second output conductor 55B is larger than the volume of the first power supply conductor 51A and the volume of the first power supply conductor 51B. In other words, the volume of the first power supply conductor 51A and the volume of the first power supply conductor 51B are each smaller than the volume of the second output conductor 55B.

[0149] 7, the second ground conductor 56 is disposed at one of the two ends in the x direction of the second ground wiring 46 that is closer to the board side surface 14. Specifically, when viewed in the z direction, one of the two edges of the second ground conductor 56 in the x direction that is closer to the board side surface 14 is aligned with one of the two edges of the second ground wiring 46 in the x direction that is closer to the board side surface 14.

[0150] The length in the y direction of the top surface 50A of the second ground conductor 56 is smaller than the width of the second ground wiring 46. The length in the y direction of the top surface 50A of the second ground conductor 56 is between ½ and ⅔ of the width of the second ground wiring 46. The width of the second ground wiring 46 is the size of the second ground wiring 46 in a direction perpendicular to the direction in which the second ground wiring 46 extends as viewed in the z direction. In this embodiment, the width of the second ground wiring 46 is the length of the second ground wiring 46 in the y direction. The second ground conductor 56 is disposed in the center of the second ground wiring 46 in the y direction.

[0151] The length in the x direction of the top surface 50A of the second ground conductor 56 is equal to the length in the x direction of the top surface 50A of the second output conductor 55A. The length in the y direction of the top surface 50A of the second ground conductor 56 is equal to the length in the y direction of the top surface 50A of the second output conductor 55A. Therefore, the area of ​​the top surface 50A of the second ground conductor 56 is equal to the area of ​​the top surface 50A of the second output conductor 55A. Here, if the difference between the area of ​​the top surface 50A of the second ground conductor 56 and the area of ​​the top surface 50A of the second output conductor 55A is within 5% of the area of ​​the top surface 50A of the second output conductor 55A, for example, it can be said that the area of ​​the top surface 50A of the second ground conductor 56 is equal to the area of ​​the top surface 50A of the second output conductor 55A. In this manner, since the area of ​​the top surface 50A of the second ground conductor 56 is equal to the area of ​​the top surface 50A of the second output conductor 55A, the area of ​​the top surface 50A of the second ground conductor 56 is greater than the area of ​​the top surface 50A of the second power supply conductor 54A and the area of ​​the top surface 50A of the second power supply conductor 54B. In other words, the area of ​​the top surface 50A of the second power supply conductor 54A and the area of ​​the top surface 50A of the second power supply conductor 54B are each smaller than the area of ​​the top surface 50A of the second ground conductor 56. Here, since the second ground conductor 56 is a rectangular parallelepiped, the length in the x direction and the length in the y direction of a portion of the second ground conductor 56 closer to the substrate 10 than the top surface 50A are equal to the length in the x direction and the length in the y direction of the top surface 50A of the second ground conductor 56.

[0152] Although not shown, the thickness of the second ground conductor 56 is equal to the thickness of the second output conductor 55A. Therefore, the volume of the second ground conductor 56 is equal to the volume of the second output conductor 55A. Here, if the difference between the volume of the second ground conductor 56 and the volume of the second output conductor 55A is, for example, within 5% of the volume of the second output conductor 55A, it can be said that the volume of the second ground conductor 56 is equal to the volume of the second output conductor 55A. In this way, since the volume of the second ground conductor 56 is equal to the volume of the second output conductor 55A, the volume of the second ground conductor 56 is larger than the volume of the second power supply conductor 54A and the volume of the second power supply conductor 54B. In other words, the volume of the second power supply conductor 54A and the volume of the second power supply conductor 54B are each smaller than the volume of the second ground conductor 56.

[0153] 5, the length in the x direction of the top surface 50A of the second ground conductor 56 is equal to the length in the x direction of the top surface 50A of the first ground conductor 53, and the length in the y direction of the top surface 50A of the second ground conductor 56 is equal to the length in the y direction of the top surface 50A of the first ground conductor 53. Therefore, the area of ​​the top surface 50A of the second ground conductor 56 is equal to the area of ​​the top surface 50A of the first ground conductor 53. Here, if the difference between the area of ​​the top surface 50A of the second ground conductor 56 and the area of ​​the top surface 50A of the first ground conductor 53 is within 5% of the area of ​​the top surface 50A of the first ground conductor 53, for example, it can be said that the area of ​​the top surface 50A of the second ground conductor 56 is equal to the area of ​​the top surface 50A of the first ground conductor 53. For this reason, the area of ​​the top surface 50A of the second ground conductor 56 is larger than the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A and the area of ​​the top surface 50A of the first power supply conductor 51B are each smaller than the area of ​​the top surface 50A of the second ground conductor 56.

[0154] Although not shown, the thickness of the second ground conductor 56 is equal to the thickness of the first ground conductor 53. Therefore, the volume of the second ground conductor 56 is equal to the volume of the first ground conductor 53. Here, if the difference between the volumes of the second ground conductor 56 and the first ground conductor 53 is, for example, within 5% of the volume of the first ground conductor 53, it can be said that the volume of the second ground conductor 56 is equal to the volume of the first ground conductor 53. Therefore, the volume of the second ground conductor 56 is larger than the volumes of the first power supply conductor 51A and the first power supply conductor 51B. In other words, the volumes of the first power supply conductor 51A and the first power supply conductor 51B are each smaller than the volume of the second ground conductor 56.

[0155] 5, the control conductors 57 include a plurality of (nine in this embodiment) control conductors 57A individually arranged at the wiring ends 47a of the control wirings 47A, and a plurality of (nine in this embodiment) control conductors 57B individually arranged at the wiring ends 47a of the control wirings 47B. The numbers of the control conductors 57A and 57B can be changed arbitrarily. In one example, the number of the control conductors 57A and the number of the control conductors 57B may be different from each other.

[0156] The control conductors 57A include two end control conductors 57C, one central control conductor 57D, and six intermediate control conductors 57E. Each of the end control conductors 57C, the central control conductor 57D, and each of the intermediate control conductors 57E is formed as a rectangular parallelepiped. The shape of the top surface 50A of the end control conductor 57C when viewed in the z direction is a rectangle having sides along the x direction and sides along the y direction, which is a square in this embodiment. The shape of the top surface 50A of the central control conductor 57D when viewed in the z direction is a rectangle having sides along the x direction and sides along the y direction, which is a substantially rectangular shape with the long side direction being the x direction and the short side direction being the y direction in this embodiment. The shape of the top surface 50A of the intermediate control conductor 57E when viewed in the z direction is a rectangle having sides along the x direction and sides along the y direction, which is a square in this embodiment.

[0157] The shapes of the top surfaces 50A of the end control conductors 57C, the central control conductors 57D, and the middle control conductors 57E as viewed in the z direction can each be changed as desired. In one example, the shapes of the top surfaces 50A of the end control conductors 57C, the central control conductors 57D, and the middle control conductors 57E as viewed in the z direction are each circular or elliptical.

[0158] The two end control conductors 57C are located at both ends of the multiple control conductors 57A in the x direction. The end control conductor 57C closer to the substrate side surface 13 in the x direction is aligned with the first power supply conductor 51A in the x direction and spaced apart from the first power supply conductor 51A in the y direction. The length in the x direction of the top surface 50A of the end control conductor 57C is equal to the length in the x direction of the top surface 50A of the first power supply conductor 51A, and the length in the y direction of the top surface 50A of the end control conductor 57C is longer than the length in the y direction of the top surface 50A of the first power supply conductor 51A. Therefore, the area of ​​the top surface 50A of the end control conductor 57C is larger than the area of ​​the top surface 50A of the first power supply conductor 51A. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A is smaller than the area of ​​the top surface 50A of the end control conductor 57C. The area of ​​top surface 50A of end control conductor 57C is smaller than the area of ​​top surface 50A of first output conductor 52A, the area of ​​top surface 50A of first output conductor 52B, and the area of ​​top surface 50A of first ground conductor 53. Since each end control conductor 57C is a rectangular parallelepiped, the length in the x direction and the length in the y direction of the portion of end control conductor 57C closer to substrate 10 than top surface 50A are equal to the length in the x direction and the length in the y direction of top surface 50A of end control conductor 57C.

[0159] Although not shown, the thickness of the end control conductor 57C is equal to the thickness of the first power supply conductor 51A. Therefore, the volume of the end control conductor 57C is larger than the volume of the first power supply conductor 51A. In other words, the volume of the first power supply conductor 51A is smaller than the volume of the end control conductor 57C. Furthermore, the volume of the end control conductor 57C near the substrate side surface 13 in the y direction is smaller than the volume of the first output conductor 52A, the volume of the first output conductor 52B, and the volume of the first ground conductor 53.

[0160] The end control conductor 57C, which is closer to the substrate side surface 14 in the x direction, is aligned with the second power supply conductor 54A in the x direction and spaced apart from the second power supply conductor 54A in the y direction. The length in the x direction of the top surface 50A of the end control conductor 57C is equal to the length in the x direction of the top surface 50A of the second power supply conductor 54A, and the length in the y direction of the top surface 50A of the end control conductor 57C is longer than the length in the y direction of the top surface 50A of the second power supply conductor 54A. Therefore, the area of ​​the top surface 50A of the end control conductor 57C is larger than the area of ​​the top surface 50A of the second power supply conductor 54A. The area of ​​the top surface 50A of the end control conductor 57C is smaller than the area of ​​the top surface 50A of the second output conductor 55A, the area of ​​the top surface 50A of the second output conductor 55B, and the area of ​​the top surface 50A of the second ground conductor 56.

[0161] Although not shown, the thickness of the end control conductor 57C is equal to the thickness of the first power supply conductor 51B. Therefore, the volume of the end control conductor 57C is larger than the volume of the first power supply conductor 51B. In other words, the volume of the first power supply conductor 51B is smaller than the volume of the end control conductor 57C. Furthermore, the volume of the end control conductor 57C near the substrate side surface 14 in the y direction is smaller than the volume of the first output conductor 52A, the volume of the first output conductor 52B, and the volume of the first ground conductor 53.

[0162] The central control conductor 57D is disposed in the x direction between the power supply conductors 51A, 51B, the output conductors 52A, 52B, and the first ground conductor 53 and the power supply conductors 54A, 54B, the output conductors 55A, 55B, and the second ground conductor 56. The central control conductor 57D has a notch 57x for indicating the orientation of the semiconductor device 1B. The length in the x direction of the top surface 50A of the central control conductor 57D is longer than the length in the x direction of the top surface 50A of the first power supply conductor 51A, and the length in the y direction of the top surface 50A of the central control conductor 57D is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51A. Therefore, the area of ​​the top surface 50A of the central control conductor 57D is larger than the area of ​​the top surface 50A of the first power supply conductor 51A. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A is smaller than the area of ​​the top surface 50A of the central control conductor 57D. The area of ​​the top surface 50A of the central control conductor 57D is also smaller than the areas of the top surface 50A of the first output conductor 52A, the top surface 50A of the first output conductor 52B, and the top surface 50A of the first ground conductor 53. Here, since the central control conductor 57D is a rectangular parallelepiped, the lengths in the x and y directions of a portion of the central control conductor 57D closer to the substrate 10 than the top surface 50A are equal to the lengths in the x and y directions of the top surface 50A of the central control conductor 57D.

[0163] Although not shown, the thickness of the central control conductor 57D is equal to the thickness of the first power supply conductor 51A. Therefore, the volume of the central control conductor 57D is larger than the volume of the first power supply conductor 51A. In other words, the volume of the first power supply conductor 51A is smaller than the volume of the central control conductor 57D. The volume of the central control conductor 57D is also smaller than the volumes of the first output conductor 52A, the first output conductor 52B, and the first ground conductor 53.

[0164] Of the six intermediate control conductors 57E, three intermediate control conductors 57E are arranged spaced apart from each other in the x direction while being aligned with each other in the y direction between the end control conductor 57C near the substrate side 13 in the x direction and the central control conductor 57D.

[0165] The remaining three intermediate control conductors 57E are arranged spaced apart from one another in the x direction, aligned with one another in the y direction, between the end control conductor 57C near the substrate side 14 in the x direction and the central control conductor 57D.

[0166] The length in the x direction of the top surface 50A of each intermediate control conductor 57E is shorter than the length in the x direction of the top surface 50A of the first power supply conductor 51A, and the length in the y direction of the top surface 50A of each intermediate control conductor 57E is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51A. Therefore, the area of ​​the top surface 50A of each intermediate control conductor 57E is smaller than the area of ​​the top surface 50A of the first power supply conductor 51A. In other words, the area of ​​the top surface 50A of the first power supply conductor 51A is larger than the area of ​​the top surface 50A of each intermediate control conductor 57E. Here, since each intermediate control conductor 57E is a rectangular parallelepiped, the length in the x direction and the length in the y direction of a portion of the intermediate control conductor 57E closer to the substrate 10 than the top surface 50A of the intermediate control conductor 57E are equal to the length in the x direction and the length in the y direction of the top surface 50A of the intermediate control conductor 57E.

[0167] Although not shown, the thickness of each intermediate control conductor 57E is equal to the thickness of the first power supply conductor 51A. Therefore, the volume of each intermediate control conductor 57E is smaller than the volume of the first power supply conductor 51A. In other words, the volume of the first power supply conductor 51A is smaller than the volume of each intermediate control conductor 57E.

[0168] The plurality of control conductors 57B includes two end control conductors 57C and seven intermediate control conductors 57E. Each of the end control conductors 57C and each of the intermediate control conductors 57E is formed as a rectangular parallelepiped. The two end control conductors 57C are located at both ends of the plurality of control conductors 57A in the x direction. The seven intermediate control conductors 57E are disposed between the two end control conductors 57C in the x direction. The seven intermediate control conductors 57E are arranged spaced apart from each other in the x direction while being aligned with each other in the y direction.

[0169] The area of ​​the top surface 50A of the end control conductor 57C of the control conductor 57B is equal to the area of ​​the top surface 50A of the end control conductor 57C of the control conductor 57A. Therefore, the area of ​​the top surface 50A of the end control conductor 57C of the control conductor 57B arranged near the board side surface 13 is larger than the area of ​​the top surface 50A of the first power supply conductor 51B. Also, the area of ​​the top surface 50A of the end control conductor 57C of the control conductor 57B arranged near the board side surface 14 is larger than the area of ​​the top surface 50A of the second power supply conductor 54B. Also, the area of ​​the top surface 50A of the end control conductor 57C near the board side surface 13 is smaller than the area of ​​the top surface 50A of the first output conductor 52A, the area of ​​the top surface 50A of the first output conductor 52B, and the area of ​​the top surface 50A of the first ground conductor 53. In addition, the area of ​​the top surface 50A of the end control conductor 57C near the board side 14 is smaller than the area of ​​the top surface 50A of the second output conductor 55A, the area of ​​the top surface 50A of the second output conductor 55B, and the area of ​​the top surface 50A of the second ground conductor 56.

[0170] Although not shown, the thickness of each end control conductor 57C is equal to the thickness of the first power supply conductor 51B and the thickness of the second power supply conductor 54B. Therefore, the volume of each end control conductor 57C is larger than the volume of the first power supply conductor 51B and the volume of the second power supply conductor 54B. In other words, the volume of the first power supply conductor 51B and the volume of the second power supply conductor 54B are each smaller than the volume of each end control conductor 57C. In addition, the volume of the end control conductor 57C near the board side surface 13 is smaller than the volume of the first output conductor 52A, the volume of the first output conductor 52B, and the volume of the first ground conductor 53. In addition, the volume of the end control conductor 57C near the board side surface 14 is smaller than the volume of the second output conductor 55A, the volume of the second output conductor 55B, and the volume of the second ground conductor 56.

[0171] The area of ​​top surface 50A of each intermediate control conductor 57E of control conductor 57B is equal to the area of ​​top surface 50A of each intermediate control conductor 57E of control conductor 57A. Therefore, the area of ​​top surface 50A of each intermediate control conductor 57E of control conductor 57B is smaller than the area of ​​top surface 50A of first power supply conductor 51A.

[0172] Although not shown, the thickness of each intermediate control conductor 57E of control conductor 57B is equal to the thickness of each intermediate control conductor 57E of control conductor 57A. Therefore, the volume of each intermediate control conductor 57E of control conductor 57B is equal to the volume of each intermediate control conductor 57E of control conductor 57A. Therefore, the volume of each intermediate control conductor 57E of control conductor 57B is smaller than the volume of first power supply conductor 51A.

[0173] 3, the multiple terminals 20 include first power supply terminals 21A, 21B, first output terminals 22A, 22B, a first ground terminal 23, second power supply terminals 24A, 24B, second output terminals 25A, 25B, a second ground terminal 26, and multiple control terminals 27. In this embodiment, the first power supply terminals 21A, 21B and the second power supply terminals 24A, 24B correspond to first drive terminals, and the first output terminals 22A, 22B, the first ground terminal 23, the second output terminals 25A, 25B, and the second ground terminal 26 correspond to second drive terminals.

[0174] The first power terminal 21A covers the top surface 50A of the first power conductor 51A of the multiple conductors 50. The first power terminal 21B covers the top surface 50A of the first power conductor 51B. The first output terminal 22A covers the top surface 50A of the first output conductor 52A of the multiple conductors 50. The first output terminal 22B covers the top surface 50A of the first output conductor 52B of the multiple conductors 50. The first ground terminal 23 covers the top surface 50A of the first ground conductor 53 of the multiple conductors 50. The second ground terminal 26 covers the top surface 50A of the second ground conductor 56 of the multiple conductors 50. The multiple control terminals 27 individually cover the top surfaces 50A of the multiple control conductors 57.

[0175] The relationship in area among the first power supply terminals 21A, 21B, the first output terminals 22A, 22B, the first ground terminal 23, the second power supply terminals 24A, 24B, the second output terminals 25A, 25B, the second ground terminal 26 and the multiple control terminals 27 when viewed in the z direction is the same as the relationship in area among the top surfaces 50A of the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, the first ground conductor 53, the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, the second ground conductor 56 and the multiple control conductors 57 when viewed in the z direction.

[0176] An example of a manufacturing method of the semiconductor device 1A will be described with reference to FIG. 13 to FIG. 25. As shown in FIG. 13, the manufacturing method of the semiconductor device 1A includes a step of forming an insulating film 817 on a substrate 810. More specifically, a flat substrate 810 is first prepared. In this embodiment, a silicon wafer is used as the substrate 810. Next, an insulating film 817 is formed on one surface of the substrate 810 in the thickness direction of the substrate 810. The insulating film 817 is formed by forming an oxide film on one surface of the substrate 810 in the thickness direction of the substrate 810 by a thermal oxidation method, and then forming a nitride film on the oxide film by plasma CVD (Chemical Vapor Deposition). The surface of the insulating film 817 formed in this step facing the thickness direction is called a substrate main surface 811. The surface of the substrate 810 facing the opposite side to the substrate main surface 811 in the thickness direction is called a substrate back surface 812.

[0177] As shown in FIG. 14 and FIG. 15, the manufacturing method of the semiconductor device 1A includes a step of forming a plurality of wirings 840. More specifically, first, as shown in FIG. 14, a base layer 840A is formed to cover the base main surface 811. The base layer 840A is formed by forming a barrier layer on the entire base main surface 811 by a sputtering method, and then forming a seed layer on the barrier layer by a sputtering method. The barrier layer is made of Ti having a thickness of 100 nm or more and 300 nm or less. The seed layer is made of Cu having a thickness of 200 nm or more and 600 nm or less. Next, as shown in FIG. 15, a plurality of plating layers 840B are formed on the base layer 840A. The plurality of plating layers 840B are formed by electrolytic plating using the base layer 840A as a conductive path after lithography patterning is performed on the base layer 840A. The plurality of plating layers 840B are formed by electrolytic plating using the base layer 840A as a conductive path. The plurality of plating layers 840B are made of Cu having a thickness of 5 μm or more and 25 μm or less.

[0178] 16, the manufacturing method of semiconductor device 1A includes a step of forming a plurality of conductors 850. More specifically, the plurality of conductors 850 are formed on a plurality of plating layers 840B. The conductors 850 are made of, for example, Cu. The plurality of conductors 850 are formed by electrolytic plating using base layer 840A and plating layer 840B as a conductive path after lithographic patterning of the plurality of plating layers 840B.

[0179] The multiple conductors 850 have the same dimensions in the thickness direction. As shown in Fig. 17, the multiple conductors 850 are shaped like a rectangle having long and short sides when viewed in the thickness direction. The length of the long sides of some of the multiple conductors 850 is shorter than the length of the long sides of the remaining conductors 850. In this manner, the multiple conductors 850 are formed as a rectangular parallelepiped.

[0180] 17, the plurality of conductors 850 include first power supply conductors 851A, 851B, first output conductors 852A, 852B, a first ground conductor 853, second power supply conductors 854A, 854B, second output conductors 855A, 855B, a second ground conductor 856, and a plurality of control conductors 857. The plurality of wirings 840 include first power supply wirings 841A, 841B, first output wirings 842A, 842B, a first ground wiring 843, second power supply wirings 844A, 844B, second output wirings 845A, 845B, a second ground wiring 846, and a plurality of control wirings 847. The first power supply conductor 851A is connected to the first power supply wiring 841A, and the first power supply conductor 851B is connected to the first power supply wiring 841B. The first output conductor 852A is connected to the first output wiring 842A, and the first output conductor 852B is connected to the first output wiring 842B. The first ground conductor 853 is connected to the first ground wiring 843. The second power supply conductor 854A is connected to the second power supply wiring 844A, and the second power supply conductor 854B is connected to the second power supply wiring 844B. The second output conductor 855A is connected to the second output wiring 845A, and the second output conductor 855B is connected to the second output wiring 845B. The second ground conductor 856 is connected to the second ground wiring 846. The multiple control conductors 857 are individually connected to the multiple control wirings 847. For this reason, the arrangement of the first power supply conductors 851A, 851B, the first output conductors 852A, 852B, and the first ground conductor 853 is similar to the arrangement of the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 shown in Fig. 3. The arrangement of the second power supply conductors 854A, 854B, the second output conductors 855A, 855B, and the second ground conductor 856 is similar to the arrangement of the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 shown in Fig. 3.

[0181] As shown in FIG. 17, when viewed in the z direction, the first power supply conductors 851A, 851B, the first output conductors 852A, 852B, the first ground conductor 853, the second power supply conductors 854A, 854B, the second output conductors 855A, 855B, and the second ground conductor 856 each have a rectangular shape whose longer side is in the x direction and whose shorter side is in the y direction.

[0182] The length in the x direction of the top surface 850A of the first power supply conductors 851A and 851B is shorter than the length in the x direction of the top surface 850A of the first output conductors 852A and 852B and the length in the x direction of the top surface 850A of the first ground conductor 853. The length in the y direction of the top surface 850A of the first power supply conductors 851A and 851B is equal to the length in the y direction of the top surface 850A of the first output conductors 852A and 852B and the length in the y direction of the top surface 850A of the first ground conductor 853. Although not shown, the thicknesses of the multiple conductors 850 are equal to each other. Therefore, the volumes of the first power supply conductors 851A and 851B are smaller than the volumes of the first output conductors 852A and 852B and the first ground conductor 853.

[0183] The length in the x direction of the top surface 850A of the second power supply conductors 854A, 854B is shorter than the length in the x direction of the top surface 850A of the second output conductors 855A, 855B and the length in the x direction of the top surface 850A of the second ground conductor 856. The length in the y direction of the top surface 850A of the second power supply conductors 854A, 854B is equal to the length in the y direction of the top surface 850A of the second output conductors 855A, 855B and the length in the y direction of the top surface 850A of the second ground conductor 856. In addition, since the thicknesses of the multiple conductors 850 are equal to each other as described above, the volumes of the second power supply conductors 854A, 854B are smaller than the volumes of the second output conductors 855A, 855B and the second ground conductor 856.

[0184] As shown in FIG. 18, the manufacturing method of the semiconductor device 1A includes a process of removing a part of the base layer 840A. More specifically, the part of the base layer 840A that is not covered by the plating layer 840B is removed. The base layer 840A that is not covered by the plating layer 840B is removed by wet etching using a mixed solution of H2SO4 (sulfuric acid) and H2O2 (hydrogen peroxide). As a result, the remaining base layer 840A and the multiple plating layers 840B stacked on the base layer 840A become the multiple wirings 40 of the semiconductor device 1A.

[0185] As shown in FIG. 19, the manufacturing method of the semiconductor device 1A includes a step of mounting a semiconductor element 60. More specifically, the semiconductor element 60 is bonded onto the wirings 40 via a solder layer 48. In this embodiment, the semiconductor element 60 is bonded to the wirings 40 by flip-chip bonding. Specifically, first, a solder layer 48 (see FIG. 12) is applied to each element electrode 60a of the semiconductor element 60. Next, a collet (not shown) is used to temporarily attach the element electrodes 60a of the semiconductor element 60 to the wirings 40 individually via the solder layer 48. Next, the solder layers 48 are melted by a reflow process. Finally, the solder layers 48 are cooled and solidified, thereby bonding the semiconductor element 60 to the wirings 40.

[0186] 20, the manufacturing method of the semiconductor device 1A includes a step of forming a resin layer 830. More specifically, the resin layer 830 is formed so as to contact the substrate main surface 811 and cover the wirings 40, the semiconductor element 60, and the conductors 850. The resin layer 830 is made of, for example, a thermosetting resin, and in this embodiment, a black epoxy resin is used. The resin layer 830 is formed by compression molding.

[0187] 21, the manufacturing method of semiconductor device 1A includes a step of removing resin layer 830 in the thickness direction. More specifically, a portion of resin layer 830 on the opposite side to substrate main surface 11 in the thickness direction is removed by mechanical grinding. At this time, a portion of multiple conductors 850 on the opposite side to base material main surface 811 in the thickness direction is also removed by mechanical grinding. As a result, the thickness of resin layer 830 becomes thinner and multiple conductors 50 are formed.

[0188] 22, the multiple conductors 50 are exposed from a mounting surface 831 of a resin layer 830. That is, the top surfaces 50A of the multiple first power supply conductors 51A, 51B, the multiple first output conductors 52A, 52B, the multiple first ground conductors 53, the multiple second power supply conductors 54A, 54B, the multiple second output conductors 55A, 55B, the multiple second ground conductors 56, and the multiple control conductors 57 are each exposed from the mounting surface 831. Here, the mounting surface 831 is a surface that is formed when the resin layer 830 is removed by mechanical grinding, and is a surface that faces the same side as the substrate main surface 811 (see FIG. 21).

[0189] 23, the manufacturing method of semiconductor device 1A includes a step of removing base material 810 in a thickness direction. More specifically, a portion of base material 810 including base material rear surface 812 is removed by mechanical grinding. This reduces the thickness of base material 810.

[0190] 24, the manufacturing method of semiconductor device 1A includes a process of forming a plurality of terminals 20. More specifically, a plurality of terminals 20 are formed in the plurality of conductors 50 so as to individually contact top surfaces 50A exposed from mounting surface 831 of resin layer 830. Each of the plurality of terminals 20 is formed by electroless plating.

[0191] As shown in Fig. 25, the manufacturing method of the semiconductor device 1A includes a step of dividing the semiconductor device 1A. More specifically, the base material 810 and the resin layer 830 are cut along cutting lines CL using a dicing blade to divide the substrate 810 and the resin layer 830 into a plurality of individual pieces. Each of these individual pieces includes one semiconductor element 60, and constitutes the semiconductor device 1A. Through the above steps, the semiconductor device 1A is manufactured.

[0192] In the manufacturing method of semiconductor device 1A, each of the plurality of conductors 850 is made of Cu. In this manufacturing method, after the plurality of conductors 850 are individually formed on the plurality of wirings 840, resin layer 830 is molded. Resin layer 830 is formed by compression molding using black epoxy resin.

[0193] When the resin layer 830 is formed, warping may occur in an assembly in which the base material 810 and the resin layer 830 are laminated in the z direction. The warping of the assembly refers to a deformation in which the outer periphery of the assembly rises in the z direction relative to the center of the assembly. In a later process, the assembly is sucked and transported by a suction device, but the assembly may not be sucked properly due to the warping of the assembly. In addition, when the assembly is diced into individual pieces using a dicing blade, the assembly may not be accurately diced due to the warping of the assembly. In this way, there is a risk that the semiconductor device 1A cannot be stably manufactured.

[0194] In this embodiment, the warpage of the assembly in the x direction, which is the direction in which the first group consisting of the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 and the second group consisting of the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 are arranged, is larger than the warpage of the assembly in the y direction, which is the direction in which the control conductors 57A, 57B are arranged. In view of this, the inventor of the present application has found that the warpage of the assembly increases as the total volume of the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, the first ground conductor 53, the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 increases. The reason for this is considered to be as follows.

[0195] During compression molding, the temperature in the cavity of the mold becomes high when the epoxy resin constituting the resin layer 830 is filled and when the epoxy resin is cured. This causes the Cu of the multiple conductors 850 to recrystallize. Since the Cu condenses during this recrystallization, the assembly is warped due to the stress applied to the base material 810 and the resin layer 830 when the multiple conductors 50 condense. Note that the multiple wirings 40 are also made of Cu, but are smaller in volume than the multiple conductors 50, and therefore are considered to have less impact on the warping of the assembly than the multiple conductors 50.

[0196] Therefore, a configuration is adopted in which the total volume of the first power supply conductors 851A, 851B, the first output conductors 852A, 852B, the first ground conductor 853, the second power supply conductors 854A, 854B, the second output conductors 855A, 855B, and the second ground conductor 856, which are the components of the multiple conductors 850 that cause large warping of the assembly, is reduced. Specifically, the volumes of the first power supply conductors 851A, 851B and the second power supply conductors 854A, 854B are made smaller than the volumes of the first output conductors 852A, 852B, the first ground conductor 853, the second output conductors 855A, 855B, and the second ground conductor 856, respectively. This reduces stress due to condensation of the multiple conductors 850 when the resin layer 830 is formed, thereby reducing warping of the assembly.

[0197] According to the semiconductor device 1A of this embodiment, the following effects can be obtained. (1-1) The current flowing through the first circuit 61 of the semiconductor element 60 is larger than the current flowing through the second circuit 62. For this reason, in order to reduce the electrical resistance in the conductive path between the first circuit 61 and the terminal 20 connected to the first circuit 61, the volumes of the first power supply conductors 51A, 51A, the first output conductors 52A, 52B, the first ground conductor 53, the second power supply conductors 54A, 54B, the second output conductors 55A, 55B and the second ground conductor 56, which are electrically connected to the first circuit 61 among the multiple conductors 50, are made larger than the volume of the control conductor 57. On the other hand, as described above in terms of action, if the volumes of first power supply conductors 51A, 51A, first output conductors 52A, 52B, first ground conductor 53, second power supply conductors 54A, 54B, second output conductors 55A, 55B and second ground conductor 56 are increased, warping of the assembly of base material 810 and resin layer 830 becomes greater when resin layer 830 is formed in the manufacturing process of semiconductor device 1A.

[0198] Therefore, in this embodiment, the volume of each of the first power supply conductors 51A, 51B is made smaller than the volume of the first output conductors 52A, 52B and the volume of the first ground conductor 53. The volume of each of the second power supply conductors 54A, 54B is made smaller than the volume of the second output conductors 55A, 55B and the volume of the second ground conductor 56. According to this configuration, in the step of forming the plurality of conductors 850 in the manufacturing process of the semiconductor device 1A, the volume of the first power supply conductors 851A, 851B is smaller than the volume of the first output conductors 852A, 852B and the volume of the first ground conductor 853, and the volume of the second power supply conductors 854A, 854B is smaller than the volume of the second output conductors 855A, 855B and the volume of the second ground conductor 856. Therefore, when the resin layer 830 is formed, warping of the assembly of the base material 810 and the resin layer 830 can be reduced. This makes it easy to transport the assembly in the later process, and also makes it easy to perform dicing when dividing the assembly into individual pieces. This makes it possible to reduce the electrical resistance in the conductive path between the first circuit 61 and the terminal 20 connected to the first circuit 61, and to stably manufacture the semiconductor device 1A.

[0199] (1-2) The areas of the top surfaces 50A of the first power supply conductors 51A, 51B exposed in the z direction to the sealing resin 30 are smaller than the areas of the top surfaces 50A of the first output conductors 52A, 52B and the top surface 50A of the first ground conductor 53 exposed in the z direction to the sealing resin 30. The areas of the top surfaces 50A of the second power supply conductors 54A, 54B exposed in the z direction to the sealing resin 30 are smaller than the areas of the top surfaces 50A of the second output conductors 55A, 55B and the top surface 50A of the second ground conductor 56 exposed in the z direction to the sealing resin 30. According to this configuration, in the process of forming the multiple conductors 850 in the manufacturing process of the semiconductor device 1A, the volume of the first power supply conductors 851A, 851B is made smaller than the volume of the first output conductors 852A, 852B and the volume of the first ground conductor 853, and the volume of the second power supply conductors 854A, 854B is made smaller than the volume of the second output conductors 855A, 855B and the volume of the second ground conductor 856. Furthermore, by reducing the thickness of resin layer 830 in the process of cutting out resin layer 830, the areas of top faces 50A of first power supply conductors 51A, 51B exposed in the z direction to sealing resin 30 become smaller than the areas of top faces 50A of first output conductors 52A, 52B and top face 50A of first ground conductor 53 exposed in the z direction to sealing resin 30, respectively, and the areas of top faces 50A of second power supply conductors 54A, 54B exposed in the z direction to sealing resin 30 become smaller than the areas of top faces 50A of second output conductors 55A, 55B and top face 50A of second ground conductor 56 exposed in the z direction to sealing resin 30. In this way, as a result of grinding resin layer 830, a structure is realized that reduces warping of the assembly due to the area relationship of conductors 850 exposed in the z direction from resin layer 830, so that the shape of each conductor 850 can be simplified and each conductor 850 is easy to form.

[0200] (1-3) The volumes of first output conductors 52A and 52B, first ground conductor 53, second output conductors 55A and 55B, and second ground conductor 56 are each larger than the volume of control conductor 57. This configuration can reduce the electrical resistance in the conductive path between first circuit 61, through which a relatively large current flows, and terminal 20 electrically connected to first circuit 61, thereby improving the heat dissipation properties of semiconductor device 1A.

[0201] (1-4) The areas of the top surface 50A of the first output conductors 52A and 52B, the top surface 50A of the first ground conductor 53, the top surface 50A of the second output conductors 55A and 55B, and the top surface 50A of the second ground conductor 56 are larger than the area of ​​the top surface 50A of the control conductor 57. According to this configuration, the first output conductors 52A and 52B, the first ground conductor 53, the second output conductors 55A and 55B, and the second ground conductor 56 are each configured to be suitable for passing a larger current than the control conductor 57.

[0202] In addition, the areas of the first output terminals 22A and 22B, the first ground terminal 23, the second output terminals 25A and 25B, and the second ground terminal 26 viewed in the z direction are larger than the area of ​​the control terminal 27 viewed in the z direction. As a result, when the semiconductor device 1A is mounted on a wiring board (not shown), the joint areas between the wiring pattern of the wiring board and the first output terminals 22A and 22B, the first ground terminal 23, the second output terminals 25A and 25B, and the second ground terminal 26 are larger than the joint area between the wiring pattern of the wiring board and the control terminal 27. Therefore, the electrical resistance between the wiring board and the first output terminals 22A and 22B, the first ground terminal 23, the second output terminals 25A and 25B, and the second ground terminal 26 is smaller than the electrical resistance between the wiring board and the control terminal 27. Therefore, the first output terminals 22A and 22B, the first ground terminal 23, the second output terminals 25A and 25B, and the second ground terminal 26 are each configured to be suitable for passing a larger current than the control terminal 27.

[0203] (1-5) The multiple control conductors 57 are disposed outward in the y direction from the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, the first ground conductor 53, the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56. With this configuration, the lengths in the x direction of the first output conductors 52A, 52B, the first ground conductor 53, the second output conductors 55A, 55B, and the second ground conductor 56 are each increased, thereby making it possible to increase the volumes of the first output conductors 52A, 52B, the first ground conductor 53, the second output conductors 55A, 55B, and the second ground conductor 56. Therefore, the volumes of the first output conductors 52A, 52B, the first ground conductor 53, the second output conductors 55A, 55B and the second ground conductor 56 can be increased while preventing the size of the semiconductor device 1A in the y direction from becoming large.

[0204] In addition, when viewed in the y direction, multiple control conductors 57 can be arranged at positions overlapping with the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53, and multiple control conductors 57 can be arranged at positions overlapping with the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56, thereby ensuring space in the x direction for arranging the multiple control conductors 57.

[0205] (1-6) The control conductor 57 has four end control conductors 57C provided at the four corners of the substrate 10, and an intermediate control conductor 57E provided between two end control conductors 57C spaced apart in the x-direction. The area of ​​the top surface 50A of the end control conductor 57C is larger than the area of ​​the top surface 50A of the intermediate control conductor 57E. With this configuration, by increasing the area of ​​the end control conductor 57C, the bonding strength between the control conductor 57 at the four corners of the substrate 10 and the wiring substrate is increased when the semiconductor device 1A is mounted on the wiring substrate by solder or the like. Therefore, it is possible to reduce the concentration of thermal stress at the four corners of the substrate 10 due to the effect of heat generated during use of the semiconductor device 1A. As a result, it is possible to suppress the occurrence of cracks in the solder interposed between the semiconductor device 1A and the wiring substrate.

[0206] (1-7) The length in the x direction of the top surface 50A of the first output conductors 52A, 52B, the first ground conductor 53, the second output conductors 55A, 55B, and the second ground conductor 56 is longer than the length in the x direction of the top surface 50A of the control conductor 57. In other words, the length in the x direction of the top surface 50A of the first output conductors 52A, 52B, and the first ground conductor 53 is longer, which is perpendicular to the y direction in which the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 are arranged. The length in the x direction of the top surface 50A of the second output conductors 55A, 55B, and the second ground conductor 56 is longer, which is perpendicular to the y direction in which the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 are arranged. According to this configuration, the electrical resistance of the first output conductors 52A, 52B, the first ground conductor 53, the second output conductors 55A, 55B, and the second ground conductor 56 can be reduced while preventing the semiconductor device 1A from becoming larger in size in the y direction.

[0207] Furthermore, by increasing the length in the x direction of the first output conductors 52A, 52B and the first ground conductor 53 that face the first circuit 61 in the x direction, the first output conductors 52A, 52B and the first ground conductor 53 can be brought closer to the first circuit 61. This shortens the conductive paths between the first output terminals 22A, 22B and the first ground terminal 23 and the first circuit 61, and therefore reduces the electrical resistance between the first output terminals 22A, 22B and the first ground terminal 23 and the first circuit 61.

[0208] Similarly, by increasing the length in the x direction of the second output conductors 55A, 55B and the second ground conductor 56 that face the first circuit 61 in the x direction, the second output conductors 55A, 55B and the second ground conductor 56 can be brought closer to the first circuit 61. This shortens the conductive paths between the second output terminals 25A, 25B and the second ground terminal 26 and the first circuit 61, and therefore reduces the electrical resistance between the second output terminals 25A, 25B and the second ground terminal 26 and the first circuit 61.

[0209] (1-8) Of the multiple wirings 40, the widths of the first power supply wirings 41A, 41B, the first output wirings 42A, 42B, the first ground wiring 43, the second power supply wirings 44A, 44B, the second output wirings 45A, 45B and the second ground wiring 46 are larger than the width of the connection wiring portion 47b of the control wiring 47. With this configuration, it is possible to reduce the electrical resistance of the wiring 40 connected to the first circuit 61, through which a larger current flows than the second circuit 62.

[0210] (1-9) The width of the wiring 40 connected to the conductor 50 having a large volume among the multiple conductors 50 arranged in the y direction at both ends in the x direction of the substrate 10 is larger than the width of the wiring 40 connected to the conductor 50 having a small volume. In this embodiment, the width of the first output wirings 42A, 42B and the width of the first ground wiring 43 are each larger than the width of the first power supply wirings 41A, 41B. The width of the second output wirings 45A, 45B and the width of the second ground wiring 46 are each larger than the width of the second power supply wirings 44A, 44B. According to this configuration, by increasing the width of the wiring 40 close to the first circuit 61, the electrical resistance of the conductive path between the first circuit 61 and the terminal 20 can be reduced.

[0211] (1-10) Each of the multiple control conductors 57 is located outward in the y direction from the semiconductor element 60. With this configuration, it is possible to ensure space in the x direction to arrange the multiple control conductors 57. Therefore, it is possible to ensure space between adjacent control conductors 57 in the x direction, and it is possible to prevent short circuits between the control conductors 57 when the semiconductor device 1A is mounted on a wiring board.

[0212] (1-11) The first output wirings 42A, 42B each have an inclined portion 42c, and the second output wirings 45A, 45B each have an inclined portion 45c. With this configuration, the reduction in area of ​​the end portion of the wide wiring portion 42a of the first output wirings 42A, 42B near the narrow wiring portion 42b in the x direction can be reduced, and the reduction in area of ​​the end portion of the wide wiring portion 45a of the second output wirings 45A, 45B near the narrow wiring portion 45b in the x direction can be reduced. Therefore, the electrical resistance of the first output wirings 42A, 42B and the second output wirings 45A, 45B can be reduced.

[0213] (1-12) The narrow wiring portion 41b of the first power supply wiring 41A, 41B is disposed closer to the center of the substrate 10 in the y direction than the wide wiring portion 41a, and the narrow wiring portion 44b of the second power supply wiring 44A, 44B is disposed closer to the center of the substrate 10 in the y direction than the wide wiring portion 44a. With this configuration, the width of the wide wiring portion 42a of the first output wiring 42A, 42B can be increased, and the width of the wide wiring portion 45a of the second output wiring 45A, 45B can be increased. Therefore, the electrical resistance of each of the first output wiring 42A, 42B and the electrical resistance of each of the second output wiring 45A, 45B can be reduced.

[0214] (1-13) The semiconductor element 60 is bonded to the multiple wirings 40 by flip-chip bonding. With this configuration, the thickness of the sealing resin 30 can be made thinner than in a configuration in which the element main surface 60s of the semiconductor element 60 and the multiple wirings 40 are connected by, for example, wires. Therefore, the height of the semiconductor device 1A can be reduced.

[0215] (1-14) The first ground wiring 43 has a slit 43a. The element electrodes 60a of the semiconductor element 60 are bonded to both sides of the slit 43a in the first ground wiring 43. According to this configuration, the element electrode 60a of the first switching unit 61A of the semiconductor element 60 is bonded to a portion of the first ground wiring 43 that is closer to the substrate side surface 15 than the slit 43a, and the element electrode 60a of the second switching unit 61B is bonded to a portion of the first ground wiring 43 that is closer to the substrate side surface 16 than the slit 43a. This makes it possible to prevent noises generated from both the first switching unit 61A and the second switching unit 61B from interfering with each other during use of the semiconductor device 1A.

[0216] The second ground wiring 46 has a slit 46a. The element electrodes 60a of the semiconductor element 60 are joined to both sides of the slit 46a in the second ground wiring 46. According to this configuration, the element electrode 60a of the third switching unit 61C of the semiconductor element 60 is joined to a portion of the second ground wiring 46 that is closer to the substrate side surface 15 than the slit 46a, and the element electrode 60a of the fourth switching unit 61D is joined to a portion of the second ground wiring 46 that is closer to the substrate side surface 16 than the slit 46a. This makes it possible to prevent noises generated from both the third switching unit 61C and the fourth switching unit 61D from interfering with each other when the semiconductor device 1A is in use.

[0217] (1-15) When viewed in the z direction, the plurality of conductors 50 are located inward from the periphery of the sealing resin 30. As a result, in the process of cutting the resin layer 830 and the base material 810 into individual pieces during the manufacturing process of the semiconductor device 1A, the dicing blade does not cut the plurality of conductors 50, thereby preventing the plurality of conductors 50 from being damaged.

[0218] <Second embodiment (first aspect)> A semiconductor device 1B based on a second embodiment of the first aspect will be described with reference to Figures 26 to 28. The semiconductor device 1B of this embodiment is different from the semiconductor device 1A of the first embodiment in the configuration of the multiple terminals, multiple wirings, multiple conductors, and semiconductor elements. In the following description, components common to the semiconductor device 1A of the first embodiment are denoted by the same reference numerals, and description thereof may be omitted.

[0219] As shown in FIG. 27 and FIG. 28, the semiconductor device 1B includes a plurality of wirings 40X, a plurality of conductors 50X, and a semiconductor element 60X. The semiconductor element 60X includes a first circuit 61 and a second circuit 62. The first circuit 61 has a smaller number of switching units than the first circuit 61 of the first embodiment (see FIG. 4). The first circuit 61 includes a first switching unit 61A and a second switching unit 61B. In other words, the first circuit 61 of the present embodiment does not include a third switching unit 61C and a fourth switching unit 61D. The configuration of each of the switching units 61A, 61B is the same as the configuration of each of the switching units 61A, 61B of the first embodiment. The second circuit 62 includes a control circuit that controls each of the switching units 61A, 61B.

[0220] 27, in this embodiment, the circuit region RD in which the second circuit 62 is formed has the same size and shape as the circuit region RD in the first embodiment. That is, the circuit region RD in this embodiment has two recesses RD1 and RD2 and each of the regions R1 to R4.

[0221] The circuit area RSA, which is the circuit area in which the first switching unit 61A of the present embodiment is formed, is larger than the circuit area RSA of the first embodiment. The area of ​​the circuit area RSA of the present embodiment is approximately twice as large as the area of ​​the circuit area RSA of the first embodiment. The shape of the circuit area RSA of the present embodiment as viewed in the z direction is a rectangle with its long side in the y direction and its short side in the x direction.

[0222] The circuit region RSB in this embodiment, which is the circuit region in which the second switching unit 61B is formed, is larger than the circuit region RSB in the first embodiment. The area of ​​the circuit region RSB in this embodiment is about twice the area of ​​the circuit region RSB in the first embodiment. The shape of the circuit region RSB in this embodiment as viewed in the z direction is a rectangle with the long side in the y direction and the short side in the x direction. The size of the circuit region RSB is equal to the size of the circuit region RSA.

[0223] The circuit region RSA is disposed in a recess RD1 of the circuit region RD, and the circuit region RSB is disposed in a recess RD2 of the circuit region RD. The circuit region RSA is disposed aligned with the circuit region RSB in the y direction but spaced apart from them in the x direction.

[0224] The multiple wirings 40X include a first power supply wiring 41, a first output wiring 42, a first ground wiring 43, a second power supply wiring 44, a second output wiring 45, and a second ground wiring 46. That is, the multiple wirings 40X of this embodiment are different from the multiple wirings 40 of the first embodiment in that the number of the first power supply wiring, the first output wiring, the second power supply wiring, and the second output wiring is one. The multiple wirings 40X also include multiple control wirings 47. The number of the multiple control wirings 47 is equal to the number of the multiple control wirings 47 of the multiple wirings 40 of the first embodiment. In this embodiment, the first power supply wiring 41 and the second power supply wiring 44 correspond to the first drive wiring, and the first output wiring 42, the first ground wiring 43, the second output wiring 45, and the second ground wiring 46 correspond to the second drive wiring.

[0225] The first power supply wiring 41, the first output wiring 42, and the first ground wiring 43 are electrically connected to the first switching section 61A. That is, the first power supply wiring 41 is a wiring for supplying a current from an external power supply (not shown) to the first switching section 61A, the first output wiring 42 is a wiring for outputting a current from the first switching section 61A to the outside of the semiconductor device 1B, and the first ground wiring 43 is a wiring for setting the ground of the first switching section 61A.

[0226] The first power supply wiring 41, the first output wiring 42, and the first ground wiring 43 are arranged closer to the substrate side surface 13 in the y direction. The first power supply wiring 41, the first output wiring 42, and the first ground wiring 43 are arranged spaced apart from each other in the y direction while being aligned with each other in the x direction. The first ground wiring 43 is arranged in the center of the substrate main surface 11 in the y direction. The first power supply wiring 41 and the first output wiring 42 are distributed and arranged on both sides of the first ground wiring 43 in the y direction. The first power supply wiring 41 is arranged closer to the substrate side surface 15 than the first ground wiring 43 in the y direction. The first output wiring 42 is arranged closer to the substrate side surface 16 than the first ground wiring 43 in the y direction.

[0227] The second power supply wiring 44, the second output wiring 45, and the second ground wiring 46 are electrically connected to the second switching section 61B. That is, the second power supply wiring 44 is a wiring for supplying a current from an external power supply (not shown) to the second switching section 61B, the second output wiring 45 is a wiring for outputting a current from the second switching section 61B to the outside of the semiconductor device 1B, and the second ground wiring 46 is a wiring for setting the ground of the second switching section 61B.

[0228] The second power supply wiring 44, the second output wiring 45, and the second ground wiring 46 are arranged closer to the substrate side surface 14 in the y direction. The second power supply wiring 44, the second output wiring 45, and the second ground wiring 46 are arranged spaced apart from each other in the y direction while being aligned with each other in the x direction. The second ground wiring 46 is arranged in the center of the substrate main surface 11 in the y direction. The second power supply wiring 44 and the second output wiring 45 are distributed and arranged on both sides of the second ground wiring 46 in the y direction. The second power supply wiring 44 is arranged closer to the substrate side surface 15 than the second ground wiring 46 in the y direction. The second output wiring 45 is arranged closer to the substrate side surface 16 than the second ground wiring 46 in the y direction.

[0229] The second power supply wiring 44, the second output wiring 45, and the second ground wiring 46 are arranged in the y direction at a distance from the first power supply wiring 41, the first output wiring 42, and the first ground wiring 43. When viewed in the x direction, the second power supply wiring 44 overlaps with the first power supply wiring 41, the second output wiring 45 overlaps with the first output wiring 42, and the second ground wiring 46 overlaps with the first ground wiring 43.

[0230] Furthermore, compared to the multiple wirings 40 of the first embodiment, the shapes of the first power supply wiring 41, the first output wiring 42, the first ground wiring 43, the second power supply wiring 44, the second output wiring 45 and the second ground wiring 46 are different.

[0231] As shown in FIG. 28, the first power supply wiring 41 has a wide wiring portion 41a and a narrow wiring portion 41b. That is, unlike the first power supply wirings 41A and 41B of the first embodiment, the first power supply wiring 41 does not have a connection wiring portion 41c. The width of the wide wiring portion 41a is larger than the width of the wide wiring portion 41a of the first power supply wirings 41A and 41B of the first embodiment. The width of the narrow wiring portion 41b is larger than the width of the narrow wiring portion 41b of the first power supply wirings 41A and 41B of the first embodiment. Eight element electrodes 60a of the semiconductor element 60X are joined to the narrow wiring portion 41b. The eight element electrodes 60a have two rows of four element electrodes 60a aligned in the y direction and spaced apart from each other in the x direction. These two rows of element electrodes 60a are aligned in the x direction and spaced apart from each other in the y direction.

[0232] The narrow wiring portion 41b is disposed closer to the first ground wiring 43 (closer to the substrate side surface 16) in the y direction than the wide wiring portion 41a. This forms a recessed region 41d in the first power supply wiring 41. A connection end portion 47c of the control wiring 47, which is electrically connected to the first region R1 (see FIG. 27) of the second circuit 62, is disposed in the recessed region 41d.

[0233] The shape of the first output wiring 42 as viewed in the z direction is substantially symmetrical to the shape of the first power supply wiring 41 as viewed in the z direction with respect to a virtual center line extending along the x direction at the center of the substrate 10 in the y direction. Therefore, the first output wiring 42 has a wide wiring portion 42a and a narrow wiring portion 42b, similar to the wide wiring portion 41a and the narrow wiring portion 41b of the first power supply wiring 41. Eight element electrodes 60a are joined to the narrow wiring portion 42b. The arrangement of the eight element electrodes 60a of the narrow wiring portion 42b is similar to the arrangement of the eight element electrodes 60a of the narrow wiring portion 41b. In addition, the first output wiring 42 has a recessed region 42d formed therein, similar to the recessed region 41d of the first power supply wiring 41. The connection end portion 47c of the control wiring 47, which is electrically connected to the second region R2 (see FIG. 27) of the second circuit 62, is disposed in the recessed region 42d.

[0234] The first ground wiring 43 extends along the x direction. The first ground wiring 43 does not have a slit 43a. The shape of the second power wiring 44 as viewed in the z direction is symmetrical to the shape of the first power wiring 41 as viewed in the z direction with respect to a virtual center line extending along the x direction at the center of the substrate 10 in the y direction. Therefore, the second power wiring 44 has a wide wiring portion 44a and a narrow wiring portion 44b, similar to the wide wiring portion 41a and the narrow wiring portion 41b of the first power wiring 41. Eight element electrodes 60a are joined to the narrow wiring portion 44b. The arrangement of the eight element electrodes 60a provided in the narrow wiring portion 44b is similar to the arrangement of the eight element electrodes 60a in the narrow wiring portion 41b. In addition, the second power wiring 44 has a recessed region 44d formed therein, similar to the recessed region 41d of the first power wiring 41. In the recessed region 44d, a connection end 47c of the control wiring 47 that is electrically connected to the third region R3 (see FIG. 27) of the second circuit 62 is disposed.

[0235] The shape of the second output wiring 45 as viewed in the z direction is symmetrical to the shape of the first output wiring 42 as viewed in the z direction with respect to a virtual center line extending along the x direction at the center of the substrate 10 in the y direction. Therefore, the second output wiring 45 has a wide wiring portion 45a and a narrow wiring portion 45b, similar to the wide wiring portion 42a and the narrow wiring portion 42b of the first output wiring 42. The second output wiring 45 also has a recessed region 45d, similar to the recessed region 42d of the first output wiring 42. A connection end portion 47c of the control wiring 47 electrically connected to the fourth region R4 of the second circuit 62 is disposed in the recessed region 45d.

[0236] The shape of the second ground wiring 46 as viewed in the z direction is symmetrical to the shape of the first ground wiring 43 as viewed in the z direction with respect to an imaginary center line extending along the x direction at the center of the substrate 10 in the y direction. The second ground wiring 46 does not have a slit 46a. The number of element electrodes 60a joined to each of the wirings 41 to 46 can be changed as desired.

[0237] The plurality of conductors 50X of this embodiment includes a first power supply conductor 51, a first output conductor 52, a first ground conductor 53, a second power supply conductor 54, a second output conductor 55, and a second ground conductor 56. That is, the plurality of conductors 50X of this embodiment is different from the plurality of conductors 50 of the first embodiment in that the number of the first power supply wiring, the first output wiring, the second power supply wiring, and the second output wiring is one each. The plurality of conductors 50X also includes a plurality of control conductors 57. The number of the plurality of control conductors 57 is equal to the number of the plurality of control conductors 57 of the plurality of conductors 50 of the first embodiment. In this embodiment, the first power supply conductor 51 and the second power supply conductor 54 correspond to the first drive conductor, and the first output conductor 52, the first ground conductor 53, the second output conductor 55, and the second ground conductor 56 correspond to the second drive conductor.

[0238] The size and shape of the first power supply conductor 51 are equal to the size and shape of the first power supply conductor 51A of the first embodiment. That is, the area of ​​the top surface 50A of the first power supply conductor 51 is equal to the area of ​​the top surface 50A of the first power supply conductor 51A. The volume of the first power supply conductor 51 is equal to the volume of the first power supply conductor 51A.

[0239] The size and shape of the first output conductor 52 are equal to the size and shape of the first output conductor 52A of the first embodiment. That is, the area of ​​the top surface 50A of the first output conductor 52 is equal to the area of ​​the top surface 50A of the first output conductor 52A. The volume of the first output conductor 52 is equal to the volume of the first output conductor 52A.

[0240] The size and shape of the first ground conductor 53 are equal to the size and shape of the first ground conductor 53 of the first embodiment. That is, the area of ​​the top surface 50A of the first ground conductor 53 of the present embodiment is equal to the area of ​​the top surface 50A of the first ground conductor 53 of the first embodiment. The volume of the first ground conductor 53 of the present embodiment is equal to the volume of the first ground conductor 53 of the first embodiment.

[0241] Therefore, the area of ​​the top surface 50A of the first power supply conductor 51 is smaller than the area of ​​the top surface 50A of the first output conductor 52 and the area of ​​the top surface 50A of the first ground conductor 53. The area of ​​the top surface 50A of the first output conductor 52 is equal to the area of ​​the top surface 50A of the first ground conductor 53. The volume of the first power supply conductor 51 is smaller than the volume of the first output conductor 52 and the volume of the first ground conductor 53. The volume of the first output conductor 52 is equal to the volume of the first ground conductor 53.

[0242] In the present embodiment, the number of first power supply wires and first output wires is reduced compared to the first embodiment, and accordingly, the width of the first power supply wires 41 and the width of the first output wires 42 are increased accordingly.

[0243] 28, the width of the first power supply wiring 41 is at least twice the length in the y direction of the top surface 50A of the first power supply conductor 51. In this embodiment, the width of the first power supply wiring 41 is at least twice and at most three times that of the first power supply conductor 51. The width of the first output wiring 42 is at least twice the length in the y direction of the top surface 50A of the first output conductor 52. In this embodiment, the width of the first output wiring 42 is at least twice and at most three times the length in the y direction of the top surface 50A of the first output conductor 52.

[0244] The size and shape of the second power conductor 54 are equal to the size and shape of the second power conductor 54A of the first embodiment. That is, the area of ​​the top surface 50A of the second power conductor 54 is equal to the area of ​​the top surface 50A of the second power conductor 54A. The volume of the second power conductor 54 is equal to the volume of the second power conductor 54A.

[0245] The size and shape of the second output conductor 55 are equal to the size and shape of the second output conductor 55A of the first embodiment. That is, the area of ​​the top surface 50A of the second output conductor 55 is equal to the area of ​​the top surface 50A of the second output conductor 55A. The volume of the second output conductor 55 is equal to the volume of the second output conductor 55A.

[0246] The size and shape of the second ground conductor 56 are equal to the size and shape of the second ground conductor 56 of the first embodiment. That is, the area of ​​the top surface 50A of the second ground conductor 56 of the present embodiment is equal to the area of ​​the top surface 50A of the second ground conductor 56 of the first embodiment. The volume of the second ground conductor 56 of the present embodiment is equal to the volume of the second ground conductor 56 of the first embodiment.

[0247] Therefore, the area of ​​the top surface 50A of the second power supply conductor 54 is smaller than the area of ​​the top surface 50A of the second output conductor 55 and the area of ​​the top surface 50A of the second ground conductor 56. The area of ​​the top surface 50A of the second output conductor 55 is equal to the area of ​​the top surface 50A of the second ground conductor 56. The volume of the second power supply conductor 54 is smaller than the volume of the second output conductor 55 and the volume of the second ground conductor 56. The volume of the second output conductor 55 is equal to the volume of the second ground conductor 56.

[0248] In the present embodiment, the number of second power supply wires and second output wires is reduced compared to the first embodiment, and accordingly, the width of the second power supply wires 44 and the width of the second output wires 45 are increased accordingly.

[0249] 28, the width of the second power supply wiring 44 is at least twice the length in the y direction of the top surface 50A of the second power supply conductor 54. In this embodiment, the width of the second power supply wiring 44 is at least twice and at most three times the length in the y direction of the top surface 50A of the second power supply conductor 54. The width of the second output wiring 45 is at least twice the length in the y direction of the top surface 50A of the second output conductor 55. In this embodiment, the width of the second output wiring 45 is at least twice and at most three times the length in the y direction of the top surface 50A of the second output conductor 55.

[0250] As shown in FIG. 26, the semiconductor device 1B includes a plurality of terminals 20X. The plurality of terminals 20X includes a first power supply terminal 21, a first output terminal 22, a first ground terminal 23, a second power supply terminal 24, a second output terminal 25, and a second ground terminal 26. That is, the plurality of terminals 20X of this embodiment is different from the plurality of terminals 20 of the first embodiment in that the number of the first power supply terminal, the first output terminal, the second power supply terminal, and the second output terminal is one. The plurality of terminals 20X also includes a plurality of control terminals 27. The number of the plurality of control terminals 27 is equal to the number of the plurality of control terminals 27 of the plurality of terminals 20 of the first embodiment. In this embodiment, the first power supply terminal 21 and the second power supply terminal 24 correspond to the first drive terminal, and the first output terminal 22, the first ground terminal 23, the second output terminal 25, and the second ground terminal 26 correspond to the second drive terminal.

[0251] According to the semiconductor device 1B of this embodiment, in addition to the effects of the first embodiment, the following effects can be obtained.

[0252] (2-1) A first power supply conductor 51, a first output conductor 52, and a first ground conductor 53 are arranged at one end of the sealing resin 30 in the x direction, and a second power supply conductor 54, a second output conductor 55, and a second ground conductor 56 are arranged at the other end of the sealing resin 30 in the x direction. With this configuration, the number of conductors 50 larger than the volume of the control conductor 57 is reduced compared to the first embodiment, thereby reducing warping of the assembly of the resin layer 830 and the base material 810 (both see FIG. 25).

[0253] In addition, since the number of wirings 40 connected to the first circuit 61 is reduced compared to the first embodiment, the number of wirings 40 arranged in the y direction is reduced. As a result, in this embodiment, the width of the first power supply wiring 41 and the width of the first output wiring 42 are each increased. Also, the width of the second power supply wiring 44 and the width of the second output wiring 45 are each increased. Therefore, the electrical resistance of the first power supply wiring 41, the first output wiring 42, the second power supply wiring 44, and the second output wiring 45 can each be reduced.

[0254] (2-2) The width of the first power supply wiring 41 is at least twice the length in the y direction of the top surface 50A of the first power supply conductor 51, and the width of the second power supply wiring 44 is at least twice the length in the y direction of the top surface 50A of the second power supply conductor 54. This configuration can reduce the electrical resistance of each of the first power supply wiring 41 and the second power supply wiring 44. Therefore, this configuration is suitable for passing a large current through each of the first switching unit 61A and the second switching unit 61B of the first circuit 61.

[0255] (2-3) The width of the first output wiring 42 is at least twice the length in the y direction of the top surface 50A of the first output conductor 52, and the width of the second output wiring 45 is at least twice the length in the y direction of the top surface 50A of the second output conductor 55. This configuration can reduce the electrical resistance of each of the first output wiring 42 and the second output wiring 45. Therefore, this configuration is suitable for passing a large current through each of the first switching unit 61A and the second switching unit 61B of the first circuit 61.

[0256] <Modification (First aspect)> The above-mentioned embodiments are examples of possible forms of the semiconductor device according to the present disclosure, and are not intended to limit the forms. The semiconductor device according to the present disclosure may take forms different from those exemplified in the above-mentioned embodiments. An example of such a form is a form in which a part of the configuration of each of the above-mentioned embodiments is replaced, changed, or omitted, or a form in which a new configuration is added to each of the above-mentioned embodiments. In addition, the following modified examples can be combined with each other as long as there is no technical contradiction. In the following modified examples, the parts common to each of the above-mentioned embodiments are assigned the same reference numerals as each of the above-mentioned embodiments, and the description thereof is omitted.

[0257] In the first embodiment, it is possible to change the shapes of each of the first power supply wiring 41A, 41B, the first output wiring 42A, 42B, the first ground wiring 43, the second power supply wiring 44A, 44B, the second output wiring 45A, 45B, and the second ground wiring 46. For example, the shapes of these wirings may be changed as shown in a first example in FIG. 29 and a second example in FIG. 30.

[0258] As shown in FIG. 29, in the first example, the width of the multiple wirings 40 is narrower than that of the multiple wirings 40 in the first embodiment. Specifically, each of the first power supply wirings 41A and 41B has a wide wiring portion 41a, a narrow wiring portion 41b, and a connection wiring portion 41c, similar to the first power supply wiring 41A in the first embodiment. The width of the wide wiring portion 41a of the first power supply wiring 41A is narrower than that of the wide wiring portion 41a of the first power supply wiring 41A in the first embodiment, and the width of the wide wiring portion 41a of the first power supply wiring 41B is narrower than that of the wide wiring portion 41a of the first power supply wiring 41B in the first embodiment. In the illustrated example, the width of the wide wiring portion 41a of the first power supply wiring 41A is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51A, and the width of the wide wiring portion 41a of the first power supply wiring 41B is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51B. Here, if the difference between the width of the wide wiring portion 41a of the first power supply wiring 41A and the length in the y direction of the top surface 50A of the first power supply conductor 51A is, for example, within 5% of the length in the y direction of the top surface 50A of the first power supply conductor 51A, it can be said that the width of the wide wiring portion 41a of the first power supply wiring 41A is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51A. Also, if the difference between the width of the wide wiring portion 41a of the first power supply wiring 41B and the length in the y direction of the top surface 50A of the first power supply conductor 51B is, for example, within 5% of the length in the y direction of the top surface 50A of the first power supply conductor 51B, it can be said that the width of the wide wiring portion 41a of the first power supply wiring 41B is equal to the length in the y direction of the top surface 50A of the first power supply conductor 51B.

[0259] In the illustrated example, the width of the connection wiring portion 41c of the first power supply wiring 41A is narrower than the width of the connection wiring portion 41c of the first power supply wiring 41A in the first embodiment, and the width of the connection wiring portion 41c of the first power supply wiring 41B is narrower than the width of the connection wiring portion 41c of the first power supply wiring 41B in the first embodiment. In the illustrated example, the width of the connection wiring portion 41c of the first power supply wiring 41A is equal to the width of the narrow wiring portion 41b of the first power supply wiring 41A, and the width of the connection wiring portion 41c of the first power supply wiring 41B is equal to the width of the narrow wiring portion 41b of the first power supply wiring 41B.

[0260] The first output wirings 42A and 42B have an outer wiring portion 42e and an inner wiring portion 42f. The inner wiring portion 42f of the first output wiring 42A corresponds to the narrow wiring portion 42b of the first output wiring 42A in the first embodiment, and the inner wiring portion 42f of the first output wiring 42B corresponds to the narrow wiring portion 42b of the first output wiring 42B in the first embodiment. The outer wiring portion 42e of the first output wiring 42A is disposed outward (closer to the substrate side surface 13) than the inner wiring portion 42f of the first output wiring 42A in the x direction. The outer wiring portion 42e of the first output wiring 42B is disposed outward (closer to the substrate side surface 13) than the inner wiring portion 42f of the first output wiring 42B in the x direction.

[0261] In the illustrated example, the width of the outer wiring portion 42e of the first output wiring 42A is smaller than the width of the inner wiring portion 42f of the first output wiring 42A. The first output conductor 52A is disposed on this outer wiring portion 42e. The width of the outer wiring portion 42e is equal to the length in the y direction of the top surface 50A of the first output conductor 52A. Here, if the difference between the width of the outer wiring portion 42e and the length in the y direction of the top surface 50A of the first output conductor 52A is, for example, within 5% of the length in the y direction of the top surface 50A of the first output conductor 52A, it can be said that the width of the outer wiring portion 42e is equal to the length in the y direction of the top surface 50A of the first output conductor 52A.

[0262] In the illustrated example, the width of the outer wiring portion 42e of the first output wiring 42B is smaller than the width of the inner wiring portion 42f of the first output wiring 42B. The first output conductor 52B is disposed on this outer wiring portion 42e. The width of the outer wiring portion 42e is equal to the length in the y direction of the top surface 50A of the first output conductor 52B. Here, if the difference between the width of the outer wiring portion 42e and the length in the y direction of the top surface 50A of the first output conductor 52B is, for example, within 5% of the length in the y direction of the top surface 50A of the first output conductor 52B, it can be said that the width of the outer wiring portion 42e is equal to the length in the y direction of the top surface 50A of the first output conductor 52B.

[0263] The first ground wiring 43 has an outer wiring portion 43d and an inner wiring portion 43e. A slit 43a extending in the x direction is formed in the inner wiring portion 43e. The inner wiring portion 43e is a portion in which the slit 43a is formed in the x direction and overlaps with the semiconductor element 60 (see FIG. 4) when viewed in the z direction. The inner wiring portion 43e has a first wiring portion 43b and a second wiring portion 43c partitioned by the slit 43a. The outer wiring portion 43d is disposed outward in the x direction (closer to the substrate side surface 13) than the inner wiring portion 43e. It can also be said that the outer wiring portion 43d is disposed outward in the x direction (closer to the substrate side surface 13) than the slit 43a.

[0264] In the illustrated example, the width of the inner wiring portion 43e is smaller than the width of the first ground wiring 43 of the first embodiment. The width of the outer wiring portion 43d is smaller than the width of the inner wiring portion 43e. The width of the outer wiring portion 43d is equal to the length in the y direction of the top surface 50A of the first ground conductor 53. Here, if the difference between the width of the outer wiring portion 43d and the length in the y direction of the top surface 50A of the first ground conductor 53 is within 5% of the length in the y direction of the top surface 50A of the first ground conductor 53, for example, it can be said that the width of the outer wiring portion 43d is equal to the length in the y direction of the top surface 50A of the first ground conductor 53.

[0265] The shapes of the second power supply wirings 44A, 44B as viewed in the z direction are symmetrical to the shapes of the first power supply wirings 41A, 41B as viewed in the z direction with respect to an imaginary center line extending along the y direction at the center in the x direction of the substrate 10. For this reason, the wide wiring portion 44a of the second power supply wiring 44A corresponds to the wide wiring portion 41a of the first power supply wiring 41A, the narrow wiring portion 44b of the second power supply wiring 44A corresponds to the narrow wiring portion 41b of the first power supply wiring 41A, and the connection wiring portion 44c of the second power supply wiring 44A corresponds to the connection wiring portion 41c of the first power supply wiring 41A. In addition, the wide wiring portion 44a of the second power supply wiring 44B corresponds to the wide wiring portion 41a of the first power supply wiring 41B, the narrow wiring portion 44b of the second power supply wiring 44B corresponds to the narrow wiring portion 41b of the first power supply wiring 41B, and the connection wiring portion 44c of the second power supply wiring 44B corresponds to the connection wiring portion 41c of the first power supply wiring 41B.

[0266] The second power supply conductor 54A is disposed on the wide wiring portion 44a of the second power supply wiring 44A, and the second power supply conductor 54B is disposed on the wide wiring portion 44a of the second power supply wiring 44B. The width of the wide wiring portion 44a of the second power supply wiring 44A is equal to the length in the y direction of the top surface 50A of the second power supply conductor 54A, and the width of the wide wiring portion 44a of the second power supply wiring 44B is equal to the length in the y direction of the top surface 50A of the second power supply conductor 54B. Here, if the difference between the width of the wide wiring portion 44a of the second power supply wiring 44A and the length in the y direction of the top surface 50A of the second power supply conductor 54A is within 5% of the length in the y direction of the top surface 50A of the second power supply conductor 54A, for example, it can be said that the width of the wide wiring portion 44a of the second power supply wiring 44A is equal to the length in the y direction of the top surface 50A of the second power supply conductor 54A. Furthermore, if the difference between the width of the wide wiring portion 44a of the second power supply wiring 44B and the y-direction length of the top surface 50A of the second power supply conductor 54B is, for example, within 5% of the y-direction length of the top surface 50A of the second power supply conductor 54B, it can be said that the width of the wide wiring portion 44a of the second power supply wiring 44B is equal to the y-direction length of the top surface 50A of the second power supply conductor 54B.

[0267] The shapes of the second output wirings 45A, 45B as viewed in the z direction are symmetrical to the shapes of the first output wirings 42A, 42B as viewed in the z direction with respect to a virtual center line extending along the y direction at the center of the substrate 10 in the x direction. Therefore, the second output wirings 45A, 45B each have an outer wiring portion 45e and an inner wiring portion 45f. The outer wiring portion 45e corresponds to the outer wiring portion 42e, and the inner wiring portion 45f corresponds to the inner wiring portion 42f.

[0268] The second output conductor 55A is disposed on the outer wiring portion 45e of the second output wiring 45A, and the second output conductor 55B is disposed on the outer wiring portion 45e of the second output wiring 45B. The width of the outer wiring portion 45e of the second output wiring 45A is equal to the length in the y direction of the top surface 50A of the second output conductor 55A, and the width of the outer wiring portion 45e of the second output wiring 45B is equal to the length in the y direction of the top surface 50A of the second output conductor 55B. Here, if the difference between the width of the outer wiring portion 45e of the second output wiring 45A and the length in the y direction of the top surface 50A of the second output conductor 55A is within 5% of the length in the y direction of the top surface 50A of the second output conductor 55A, for example, it can be said that the width of the outer wiring portion 45e of the second output wiring 45A is equal to the length in the y direction of the top surface 50A of the second output conductor 55A. Furthermore, if the difference between the width of the outer wiring portion 45e of the second output wiring 45B and the y-direction length of the top surface 50A of the second output conductor 55B is, for example, within 5% of the y-direction length of the top surface 50A of the second output conductor 55B, it can be said that the width of the outer wiring portion 45e of the second output wiring 45B is equal to the y-direction length of the top surface 50A of the second output conductor 55B.

[0269] The shape of the second ground wiring 46 as viewed in the z direction is symmetrical to the shape of the first ground wiring 43 as viewed in the z direction with respect to an imaginary center line extending along the y direction at the center of the substrate 10 in the x direction. Therefore, the second ground wiring 46 has an outer wiring portion 46d and an inner wiring portion 46e. The outer wiring portion 46d corresponds to the outer wiring portion 43d, and the inner wiring portion 46e corresponds to the inner wiring portion 43e.

[0270] The second ground conductor 56 is disposed on the outer wiring portion 46d. The width of the outer wiring portion 46d is equal to the length in the y direction of the top surface 50A of the second ground conductor 56. Here, if the difference between the width of the outer wiring portion 46d and the length in the y direction of the top surface 50A of the second ground conductor 56 is within 5% of the length in the y direction of the top surface 50A of the second ground conductor 56, for example, it can be said that the width of the outer wiring portion 46d is equal to the length in the y direction of the top surface 50A of the second ground conductor 56. With this configuration, the same effects as those of (1-1) to (1-8), (1-11), and (1-15) of the first embodiment can be obtained.

[0271] As shown in FIG. 30, in the second example, the shapes of the first power supply wiring 41A, 41B, the first output wiring 42A, 42B, the second power supply wiring 44A, 44B, and the second output wiring 45A, 45B when viewed in the z direction are different from the shapes of the first power supply wiring 41A, 41B, the first output wiring 42A, 42B, the second power supply wiring 44A, 44B, and the second output wiring 45A, 45B in the first embodiment when viewed in the z direction.

[0272] In the first power supply wiring 41A, the connection wiring portion 41c is omitted, the position of the narrow wiring portion 41b in the y direction relative to the wide wiring portion 41a is different, and the width of the wide wiring portion 41a is different. Specifically, the narrow wiring portion 41b extends from the wide wiring portion 41a toward the center of the substrate 10 in the x direction. The narrow wiring portion 41b is arranged so as to overlap with the wide wiring portion 41a when viewed in the x direction. The narrow wiring portion 41b is arranged slightly shifted toward the first output wiring 42A relative to the wide wiring portion 41a in the y direction. The width of the wide wiring portion 41a is larger than the width of the wide wiring portion 41a of the first power supply wiring 41A in the first embodiment. In the illustrated example, the width of the wide wiring portion 41a is about 1.5 times the length in the y direction of the top surface 50A of the first power supply conductor 51A. The first power supply conductor 51A is disposed near the substrate side surface 15 of the wide wiring portion 41a in the y direction (the opposite side to the first output wiring 42A). An inclined portion 41g is formed near the narrow wiring portion 41b in the x direction of the wide wiring portion 41a. The inclined portion 41g is formed near the substrate side surface 15 of the wide wiring portion 41a in the y direction (the opposite side to the first output wiring 42A) and extends obliquely toward the first output wiring 42A (substrate side surface 16) as it approaches the narrow wiring portion 41b in the x direction.

[0273] The narrow wiring portion 41b is provided with a wide portion 41f that widens the narrow wiring portion 41b. The wide portion 41f protrudes from the narrow wiring portion 41b toward the opposite side to the first output wiring 42A in the y direction. The shape of the wide portion 41f as viewed in the z direction is trapezoidal.

[0274] The first power supply wiring 41B is different from the first power supply wiring 41B of the first embodiment in the y-direction position of the narrow wiring portion 41b relative to the wide wiring portion 41a, and the width of the wide wiring portion 41a is different. Specifically, the narrow wiring portion 41b is arranged so as to overlap with the wide wiring portion 41a when viewed in the x-direction. The narrow wiring portion 41b is arranged slightly shifted toward the first output wiring 42B relative to the wide wiring portion 41a in the y-direction. The width of the wide wiring portion 41a is larger than the width of the wide wiring portion 41a of the first power supply wiring 41B of the first embodiment. In the illustrated example, the width of the wide wiring portion 41a is about 1.5 times the length in the y-direction of the top surface 50A of the first power supply conductor 51B. The first power supply conductor 51B is arranged near the substrate side surface 16 of the wide wiring portion 41a in the y-direction (opposite side to the first output wiring 42B). An inclined portion 41g is formed in the wide wiring portion 41a near the narrow wiring portion 41b in the x direction. The inclined portion 41g is formed in the wide wiring portion 41a near the substrate side surface 16 in the y direction (opposite side to the first output wiring 42B) and extends obliquely toward the first output wiring 42B (substrate side surface 15) as it approaches the narrow wiring portion 41b in the x direction.

[0275] The narrow wiring portion 41b is provided with a wide portion 41f, similar to the narrow wiring portion 41b of the first power supply wiring 41A. The wide portion 41f protrudes from the narrow wiring portion 41b toward the opposite side to the first output wiring 42B in the y direction. The shape of the wide portion 41f as viewed in the z direction is trapezoidal.

[0276] In the first output wiring 42A, the shape of the wide wiring portion 42a is different from that of the wide wiring portion 42a of the first output wiring 42A of the first embodiment. The width of the wide wiring portion 42a of the first output wiring 42A in FIG. 30 is narrower than that of the wide wiring portion 42a of the first output wiring 42A of the first embodiment. The width of the wide wiring portion 42a of the first output wiring 42A is greater than the length in the y direction of the top surface 50A of the first output conductor 52A and is smaller than 1.5 times the length in the y direction of the top surface 50A of the first output conductor 52A. The width of the wide wiring portion 42a is slightly greater than the width of the narrow wiring portion 42b.

[0277] In the first output wiring 42B, the shape of the wide wiring portion 42a is different from the shape of the wide wiring portion 42a of the first output wiring 42B of the first embodiment. The width of the wide wiring portion 42a of the first output wiring 42B in FIG. 30 is narrower than the width of the wide wiring portion 42a of the first output wiring 42B of the first embodiment. The width of the wide wiring portion 42a of the first output wiring 42B is greater than the length in the y direction of the top surface 50A of the first output conductor 52B and is smaller than 1.5 times the length in the y direction of the top surface 50A of the first output conductor 52B. The width of the wide wiring portion 42a is slightly greater than the width of the narrow wiring portion 42b.

[0278] The shapes of the second power supply wirings 44A, 44B as viewed in the z direction are symmetrical to the shapes of the first power supply wirings 41A, 41B as viewed in the z direction with respect to an imaginary center line extending along the y direction at the center in the x direction of the substrate 10. For this reason, each of the second power supply wirings 44A, 44B has an inclined portion 44g formed in the wide wiring portion 44a and a wide portion 44f formed in the narrow wiring portion 44b.

[0279] The inclined portion 44g of the second power supply wiring 44A is formed in the wide wiring portion 44a near the substrate side surface 15 (opposite side from the second output wiring 45A) in the y direction, and extends obliquely toward the second output wiring 45A (substrate side surface 16) as it approaches the narrow wiring portion 44b in the x direction. The wide portion 44f of the second power supply wiring 44A protrudes from the narrow wiring portion 44b toward the opposite side from the second output wiring 45A.

[0280] The inclined portion 44g of the second power supply wiring 44B is formed in the wide wiring portion 44a near the substrate side surface 16 (opposite side from the second output wiring 45B) in the y direction, and extends obliquely toward the second output wiring 45B (substrate side surface 15) as it approaches the narrow wiring portion 44b in the x direction. The wide portion 44f of the second power supply wiring 44B protrudes from the narrow wiring portion 44b toward the opposite side from the second output wiring 45B.

[0281] The shapes of the second output wirings 45A, 45B as viewed in the z direction are symmetrical to the shapes of the first output wirings 42A, 42B as viewed in the z direction with respect to an imaginary center line extending along the y direction at the center in the x direction of the substrate 10. The width of the wide wiring portion 45a of the second output wiring 45A is equal to the width of the wide wiring portion 45a of the first output wiring 42A, and the width of the wide wiring portion 45a of the second output wiring 45B is equal to the width of the wide wiring portion 42a of the first output wiring 42B.

[0282] According to this configuration, in addition to the same effects as those of (1-1) to (1-8), (1-11) and (1-15) of the first embodiment, the following effect can be obtained. That is, an inclined portion 41g is formed near the narrow wiring portion 41b of the wide wiring portion 41a of the first power supply wirings 41A and 41B. This suppresses a reduction in the area between the wide wiring portion 41a and the narrow wiring portion 41b, thereby reducing the electrical resistance of the first power supply wirings 41A and 41B. Also, in the wide wiring portion 44a of the second power supply wirings 44A, 44B, an inclined portion 44g is formed near the narrow wiring portion 44b. This makes it possible to reduce the electrical resistance of the second power supply wirings 44A, 44B, similar to the first power supply wirings 41A, 41B.

[0283] Furthermore, the narrow wiring portions 41b of the first power supply wirings 41A, 41B have wide portions 41f, and the narrow wiring portions 44b of the second power supply wirings 44A, 44B have wide portions 44f. This reduces the electrical resistance of the first power supply wirings 41A, 41B and the second power supply wirings 44A, 44B.

[0284] 30, the element electrodes 60a of the semiconductor element 60 may be joined to the wide portions 41f of the first power supply wirings 41A and 41B. The element electrodes 60a may be joined to the wide portions 44f of the second power supply wirings 44A and 44B. The widths of the multiple wirings 40X of the semiconductor device 1B of the second embodiment may also be narrowed like the multiple wirings 40 shown in FIGS. 29 and 30.

[0285] In the first embodiment, the shapes of the top surfaces 50A of the first power supply conductors 51A and 51B, the top surface 50A of the first output conductors 52A and 52B, the top surface 50A of the first ground conductor 53, the top surface 50A of the second power supply conductors 54A and 54B, the top surface 50A of the second output conductors 55A and 55B, and the top surface 50A of the second ground conductor 56 exposed in the z direction from the sealing resin 30 can be arbitrarily changed. For example, the shapes of the top surfaces 50A may be changed as in a first example shown in FIG. 31, a second example shown in FIG. 32, a third example shown in FIG. 33, a fourth example shown in FIG. 34, and a fifth example shown in FIG. 35. For convenience of explanation, a plurality of terminals 20 are omitted in FIGS. 31 to 35.

[0286] 31 , in the first example, the length in the x direction of the top surface 50A of the first power supply conductors 51A, 51B is equal to the length in the x direction of the top surface 50A of the first output conductors 52A, 52B and the length in the x direction of the top surface 50A of the first ground conductor 53. Meanwhile, the length in the y direction of the top surface 50A of the first power supply conductors 51A, 51B is smaller than the length in the y direction of the top surface 50A of the first output conductors 52A, 52B and the length in the y direction of the top surface 50A of the first ground conductor 53. As a result, the area of ​​the top surface 50A of the first power supply conductors 51A, 51B is smaller than the area of ​​the top surface 50A of the first output conductors 52A, 52B and the area of ​​the top surface 50A of the first ground conductor 53.

[0287] Although not shown, the thickness of the first power supply conductors 51A, 51B is equal to the thickness of the first output conductors 52A, 52B and the thickness of the first ground conductor 53. As a result, the volumes of the first power supply conductors 51A, 51B are smaller than the volumes of the first output conductors 52A, 52B and the first ground conductor 53, respectively.

[0288] 31 , the lengths in the x direction of the top faces 50A of the second power supply conductors 54A and 54B are equal to the lengths in the x direction of the top faces 50A of the second output conductors 55A and 55B and the length in the x direction of the top face 50A of the second ground conductor 56. Meanwhile, the lengths in the y direction of the top faces 50A of the second power supply conductors 54A and 54B are smaller than the lengths in the y direction of the top faces 50A of the second output conductors 55A and 55B and the length in the y direction of the top face 50A of the second ground conductor 56. As a result, the areas of the top faces 50A of the second power supply conductors 54A and 54B are smaller than the areas of the top faces 50A of the second output conductors 55A and 55B and the area of ​​the top face 50A of the second ground conductor 56.

[0289] Although not shown, the thickness of the second power supply conductors 54A, 54B is equal to the thickness of the second output conductors 55A, 55B and the thickness of the second ground conductor 56. As a result, the volumes of the second power supply conductors 54A, 54B are smaller than the volumes of the second output conductors 55A, 55B and the second ground conductor 56. With this configuration, it is possible to obtain the effects (1-1) and (1-2) of the first embodiment.

[0290] 32, in the second example, the length in the x direction of the top surfaces 50A of the first power supply conductors 51A and 51B is equal to the length in the x direction of the top surfaces 50A of the first output conductors 52A and 52B and the length in the x direction of the top surface 50A of the first ground conductor 53. Meanwhile, the portions of the top surfaces 50A of the first power supply conductors 51A and 51B near the center of the substrate 10 in the x direction are tapered toward the center of the substrate 10 in the x direction. As a result, the areas of the top surfaces 50A of the first power supply conductors 51A and 51B are smaller than the areas of the top surfaces 50A of the first output conductors 52A and 52B and the top surface 50A of the first ground conductor 53.

[0291] Although not shown, the thickness of the first power supply conductors 51A, 51B is equal to the thickness of the first output conductors 52A, 52B and the thickness of the first ground conductor 53. As a result, the volumes of the first power supply conductors 51A, 51B are smaller than the volumes of the first output conductors 52A, 52B and the first ground conductor 53, respectively.

[0292] 32, the length in the x direction of the top surface 50A of the second power supply conductors 54A, 54B is equal to the length in the x direction of the top surface 50A of the second output conductors 55A, 55B and the length in the x direction of the top surface 50A of the second ground conductor 56. Meanwhile, the portions of the top surfaces 50A of the second power supply conductors 54A, 54B near the center of the substrate 10 in the x direction are tapered toward the center of the substrate 10 in the x direction. As a result, the areas of the top surfaces 50A of the first power supply conductors 51A, 51B are smaller than the areas of the top surfaces 50A of the first output conductors 52A, 52B and the top surface 50A of the first ground conductor 53.

[0293] Although not shown, the thickness of the first power supply conductors 51A, 51B is equal to the thickness of the first output conductors 52A, 52B and the thickness of the first ground conductor 53. As a result, the volumes of the first power supply conductors 51A, 51B are smaller than the volumes of the first output conductors 52A, 52B and the first ground conductor 53. With this configuration, it is possible to obtain the effects (1-1) and (1-2) of the first embodiment.

[0294] 33, in the third example, the length in the x direction of the top surfaces 50A of the first power supply conductors 51A, 51B is equal to the length in the x direction of the top surfaces 50A of the first output conductors 52A, 52B and the length in the x direction of the top surface 50A of the first ground conductor 53. Meanwhile, the top surfaces 50A of the first power supply conductors 51A, 51B have a stepped shape in which the length in the y direction of a portion near the center of the substrate 10 in the x direction is shorter. As a result, the area of ​​the top surfaces 50A of the first power supply conductors 51A, 51B is smaller than the area of ​​the top surfaces 50A of the first output conductors 52A, 52B and the area of ​​the top surface 50A of the first ground conductor 53.

[0295] Although not shown, the thickness of the first power supply conductors 51A, 51B is equal to the thickness of the first output conductors 52A, 52B and the thickness of the first ground conductor 53. As a result, the volumes of the first power supply conductors 51A, 51B are smaller than the volumes of the first output conductors 52A, 52B and the first ground conductor 53, respectively.

[0296] 33, the length in the x direction of the top surface 50A of the second power supply conductors 54A, 54B is equal to the length in the x direction of the top surface 50A of the second output conductors 55A, 55B and the length in the x direction of the top surface 50A of the second ground conductor 56. Meanwhile, the top surfaces 50A of the second power supply conductors 54A, 54B have a stepped shape in which the length in the y direction of a portion of the top surface 50A near the center of the substrate 10 in the x direction is shorter. As a result, the areas of the top surfaces 50A of the first power supply conductors 51A, 51B are smaller than the areas of the top surfaces 50A of the first output conductors 52A, 52B and the top surface 50A of the first ground conductor 53.

[0297] Although not shown, the thickness of the first power supply conductors 51A, 51B is equal to the thickness of the first output conductors 52A, 52B and the thickness of the first ground conductor 53. As a result, the volumes of the first power supply conductors 51A, 51B are smaller than the volumes of the first output conductors 52A, 52B and the first ground conductor 53. With this configuration, it is possible to obtain the effect (1-1) of the first embodiment.

[0298] 31 to 33, the length in the x direction of the top surface 50A of the first power supply conductors 51A, 51B can be changed arbitrarily. For example, the length in the x direction of the top surface 50A of the first power supply conductors 51A, 51B may be shorter than the length in the x direction of the top surface 50A of the first output conductors 52A, 52B and the length in the x direction of the top surface 50A of the first ground conductor 53. In addition, provided that the area of ​​the top surface 50A of the first power supply conductors 51A, 51B is smaller than the area of ​​the top surface 50A of the first output conductors 52A, 52B and the area of ​​the top surface 50A of the first ground conductor 53, the length in the x direction of the top surface 50A of the first power supply conductors 51A, 51B may be longer than the length in the x direction of the top surface 50A of the first output conductors 52A, 52B and the length in the x direction of the top surface 50A of the first ground conductor 53.

[0299] The length in the x direction of the top surface 50A of the second power supply conductors 54A, 54B can be changed arbitrarily. For example, the length in the x direction of the top surface 50A of the second power supply conductors 54A, 54B may be shorter than the length in the x direction of the top surface 50A of the second output conductors 55A, 55B and the length in the x direction of the top surface 50A of the second ground conductor 56. On the assumption that the area of ​​the top surface 50A of the second power supply conductors 54A, 54B is smaller than the area of ​​the top surface 50A of the second output conductors 55A, 55B and the area of ​​the top surface 50A of the second ground conductor 56, the length in the x direction of the top surface 50A of the second power supply conductors 54A, 54B may be longer than the length in the x direction of the top surface 50A of the second output conductors 55A, 55B and the length in the x direction of the top surface 50A of the second ground conductor 56.

[0300] As shown in FIG. 34, in the fourth example, the length in the x direction of the top surface 50A of the first output conductors 52A and 52B is shorter than the length in the x direction of the top surface 50A of the first ground conductor 53. In the illustrated example, the length in the x direction of the top surface 50A of the first output conductors 52A and 52B is longer than the length in the x direction of the top surface 50A of the first power supply conductors 51A and 51B. In other words, the length in the x direction of the top surface 50A of the first power supply conductors 51A and 51B is shorter than the length in the x direction of the top surface 50A of the first output conductors 52A and 52B. As a result, the area of ​​the top surface 50A of the first output conductors 52A and 52B is smaller than the area of ​​the top surface 50A of the first ground conductor 53 and larger than the area of ​​the top surface 50A of the first power supply conductors 51A and 51B. In other words, the area of ​​the top surfaces 50A of the first power supply conductors 51A, 51B is smaller than the area of ​​the top surfaces 50A of the first output conductors 52A, 52B and the area of ​​the top surface 50A of the first ground conductor 53.

[0301] Although not shown, the thicknesses of the first output conductors 52A and 52B are equal to the thicknesses of the first power supply conductors 51A and 51B and the thickness of the first ground conductor 53. As a result, the volumes of the first output conductors 52A and 52B are smaller than the volume of the first ground conductor 53 and larger than the volume of the first power supply conductors 51A and 51B. In other words, the volumes of the first power supply conductors 51A and 51B are smaller than the volume of the first output conductors 52A and 52B and the volume of the first ground conductor 53.

[0302] 34, the length in the x direction of the top surface 50A of the second output conductors 55A and 55B is shorter than the length in the x direction of the top surface 50A of the second ground conductor 56. In the illustrated example, the length in the x direction of the top surface 50A of the second output conductors 55A and 55B is longer than the length in the x direction of the top surface 50A of the second power supply conductors 54A and 54B. In other words, the length in the x direction of the top surface 50A of the second power supply conductors 54A and 54B is shorter than the length in the x direction of the top surface 50A of the second output conductors 55A and 55B. As a result, the area of ​​the top surface 50A of the second output conductors 55A and 55B is smaller than the area of ​​the top surface 50A of the second ground conductor 56 and larger than the area of ​​the top surface 50A of the second power supply conductors 54A and 54B. In other words, the area of ​​the top surface 50A of the second power supply conductors 54A, 54B is smaller than the area of ​​the top surface 50A of the second output conductors 55A, 55B and the area of ​​the top surface 50A of the second ground conductor 56.

[0303] Although not shown, the thicknesses of the second output conductors 55A, 55B are equal to the thicknesses of the second power supply conductors 54A, 54B and the second ground conductor 56, respectively. As a result, the volumes of the second output conductors 55A, 55B are smaller than the volume of the second ground conductor 56 and larger than the volume of the second power supply conductors 54A, 54B. In other words, the volumes of the second power supply conductors 54A, 54B are smaller than the volume of the second output conductors 55A, 55B and the volume of the second ground conductor 56, respectively. With this configuration, the effects (1-1) and (1-2) of the first embodiment can be obtained.

[0304] As shown in FIG. 35, in the fifth example, the length in the x direction of the top surface 50A of the first ground conductor 53 is shorter than the length in the x direction of the top surfaces 50A of the first output conductors 52A and 52B. In the illustrated example, the length in the x direction of the top surface 50A of the first ground conductor 53 is longer than the length in the x direction of the top surfaces 50A of the first power supply conductors 51A and 51B. As a result, the area of ​​the top surface 50A of the first ground conductor 53 is smaller than the area of ​​the top surfaces 50A of the first output conductors 52A and 52B and larger than the area of ​​the top surfaces 50A of the first power supply conductors 51A and 51B. In other words, the area of ​​the top surfaces 50A of the first power supply conductors 51A and 51B is smaller than the area of ​​the top surfaces 50A of the first output conductors 52A and 52B and the area of ​​the top surface 50A of the first ground conductor 53.

[0305] Although not shown, the thickness of the first ground conductor 53 is equal to the thickness of the first power supply conductors 51A, 51B and the thickness of the first output conductors 52A, 52B. As a result, the volume of the first ground conductor 53 is smaller than the volume of the first output conductors 52A, 52B and larger than the volume of the first power supply conductors 51A, 51B. In other words, the volume of the first power supply conductors 51A, 51B is smaller than the volume of the first output conductors 52A, 52B and the volume of the first ground conductor 53.

[0306] 35, the length in the x direction of the top surface 50A of the second ground conductor 56 is shorter than the length in the x direction of the top surfaces 50A of the second output conductors 55A and 55B. In the illustrated example, the length in the x direction of the top surface 50A of the second ground conductor 56 is longer than the length in the x direction of the top surfaces 50A of the second power supply conductors 54A and 54B. As a result, the area of ​​the top surface 50A of the second ground conductor 56 is smaller than the area of ​​the top surfaces 50A of the second output conductors 55A and 55B and larger than the area of ​​the top surfaces 50A of the second power supply conductors 54A and 54B. In other words, the area of ​​the top surfaces 50A of the second power supply conductors 54A and 54B is smaller than the area of ​​the top surfaces 50A of the second output conductors 55A and 55B and the area of ​​the top surface 50A of the second ground conductor 56.

[0307] Although not shown, the thickness of the second ground conductor 56 is equal to the thickness of the second power supply conductors 54A and 54B and the thickness of the second output conductors 55A and 55B. As a result, the volume of the second ground conductor 56 is smaller than the volume of the second output conductors 55A and 55B and larger than the volume of the second power supply conductors 54A and 54B. In other words, the volume of the second power supply conductors 54A and 54B is smaller than the volume of the second output conductors 55A and 55B and the volume of the second ground conductor 56. This configuration can obtain the effects (1-1) and (1-2) of the first embodiment. The modifications shown in FIGS. 31 to 35 may be applied to the multiple conductors 50X in the semiconductor device 1B of the second embodiment.

[0308] In the manufacturing method of the semiconductor device 1A, 1B of each embodiment, the thicknesses of the conductors 850 in the step of forming the conductors 850 are equal to each other, but this is not limited to the above. For example, as shown in Fig. 36, the thicknesses of the first power supply conductors 851A, 851B among the conductors 850 may be thinner than the thicknesses of the first output conductors 852A, 852B and the thickness of the first ground conductor 853. Then, in the step of removing the resin layer 830 in the thickness direction, the resin layer 830 is removed such that the thicknesses of the first power supply conductors 851A, 851B, the thicknesses of the first output conductors 852A, 852B, and the thickness of the first ground conductor 853 are equal to each other.

[0309] According to this configuration, it is possible to obtain the effect (1-1) of the first embodiment. Although not shown, the thickness of the second power supply conductor may be thinner than the thickness of the second output conductor and the thickness of the second ground conductor.

[0310] In each embodiment, the plurality of conductors 50 are exposed in the z direction from the sealing resin 30, but this is not limited thereto. For example, the conductors 50 may be exposed in the z direction from a substrate supporting the semiconductor element 60.

[0311] In one example, as shown in FIGS. 37 and 38, a semiconductor device 1C includes a substrate 210, a plurality of terminals 20, a sealing resin 230, a plurality of wirings 40, a plurality of conductors 50, and a semiconductor element 60.

[0312] The substrate 210 is made of a material having an electrical insulating material, and is a supporting member that is the base of the semiconductor device 1C. For example, a synthetic resin mainly made of epoxy resin, ceramics, glass, etc. can be used as the material. In the illustrated example, the substrate 210 is made of a synthetic resin mainly made of epoxy resin. The substrate 210 has a substrate main surface 211 and a substrate back surface 212 that face in opposite directions in the z direction. Here, the z direction can also be said to be the thickness direction of the substrate 210. The shape of the substrate 10 as viewed in the z direction is a rectangle with the long side direction being the x direction and the short side direction being the y direction.

[0313] The multiple wirings 40 are formed on the substrate main surface 211. The multiple wirings 40 include first power supply wirings 41A, 41B, first output wirings 42A, 42B, a first ground wiring 43, second power supply wirings 44A, 44B, second output wirings 45A, 45B, a second ground wiring 46, and multiple control wirings 47, as in the first embodiment. The shape of the multiple wirings 40 as viewed in the z direction is the same as the shape of the multiple wirings 40 as viewed in the z direction in the first embodiment. As in the first embodiment, the multiple wirings 40 extend from inside the semiconductor element 60 to outside the semiconductor element 60.

[0314] As shown in FIG. 38, the semiconductor element 60 is disposed on the opposite side of the wirings 40 from the substrate 210 in the z direction, and is joined to the wirings 40 via a solder layer 48.

[0315] The multiple conductors 50 are disposed on the opposite side of the multiple wirings 40 from the semiconductor element 60 in the z direction. The multiple conductors 50 are provided so as to penetrate the substrate 210 in the z direction. As a result, the multiple conductors 50 are exposed on each of the substrate main surface 211 and the substrate back surface 212. The multiple conductors 50 exposed on the substrate main surface 211 are individually joined to the multiple wirings 40. As a result, the multiple conductors 50 are individually electrically connected to the multiple wirings 40. As shown in FIG. 37, the multiple conductors 50 are disposed so as to surround the semiconductor element 60 on the outer side of the semiconductor element 60 when viewed in the z direction.

[0316] Similar to the first embodiment, the multiple conductors 50 include first power supply conductors 51A, 51B, first output conductors 52A, 52B, a first ground conductor 53, second power supply conductors 54A, 54B, second output conductors 55A, 55B, a second ground conductor 56, and multiple control conductors 57.

[0317] 37, the configuration of the multiple conductors 50 and the multiple terminals 20 when viewed from the back surface 212 of the substrate in the z direction is similar to the configuration of the multiple conductors 50 and the multiple terminals 20 of the first embodiment shown in, for example, Fig. 3. Each of the multiple conductors 50 has a top surface 50A exposed from the back surface 212 of the substrate.

[0318] Specifically, the length in the x direction of the top surfaces 50A of the first power supply conductors 51A, 51B is shorter than the length in the x direction of the top surfaces 50A of the first output conductors 52A, 52B and the length in the x direction of the top surface 50A of the first ground conductor 53. The length in the y direction of the top surfaces 50A of the first power supply conductors 51A, 51B is equal to the length in the y direction of the top surfaces 50A of the first output conductors 52A, 52B and the length in the y direction of the top surface 50A of the first ground conductor 53. As a result, the area of ​​the top surfaces 50A of the first power supply conductors 51A, 51B is smaller than the area of ​​the top surfaces 50A of the first output conductors 52A, 52B and the area of ​​the top surface 50A of the first ground conductor 53. Here, if the difference between the y-direction length of the top surface 50A of the first power supply conductors 51A, 51B and the y-direction length of the top surface 50A of the first output conductors 52A, 52B is within 5% of the y-direction length of the top surface 50A of the first output conductors 52A, 52B, it can be said that the y-direction length of the top surface 50A of the first power supply conductors 51A, 51B is equal to the y-direction length of the top surface 50A of the first output conductors 52A, 52B. Also, if the difference between the y-direction length of the top surface 50A of the first power supply conductors 51A, 51B and the y-direction length of the top surface 50A of the first ground conductor 53 is within 5% of the y-direction length of the top surface 50A of the first ground conductor 53, it can be said that the y-direction length of the top surface 50A of the first power supply conductors 51A, 51B is equal to the y-direction length of the top surface 50A of the first ground conductor 53.

[0319] Furthermore, since the thicknesses of the first power supply conductors 51A, 51B, the thicknesses of the first output conductors 52A, 52B, and the thickness of the first ground conductor 53 are all equal to each other, the volume of the first power supply conductors 51A, 51B is smaller than the volume of the first output conductors 52A, 52B and the volume of the first ground conductor 53.

[0320] Furthermore, the length in the x direction of the top surfaces 50A of the second power supply conductors 54A, 54B is shorter than the length in the x direction of the top surfaces 50A of the second output conductors 55A, 55B and the length in the x direction of the top surface 50A of the second ground conductor 56. The length in the y direction of the top surfaces 50A of the second power supply conductors 54A, 54B is equal to the length in the y direction of the top surfaces 50A of the second output conductors 55A, 55B and the length in the y direction of the top surface 50A of the second ground conductor 56. As a result, the area of ​​the top surfaces 50A of the second power supply conductors 54A, 54B is smaller than the area of ​​the top surfaces 50A of the second output conductors 55A, 55B and the area of ​​the top surface 50A of the second ground conductor 56. Here, if the difference between the y-direction length of the top surface 50A of the second power supply conductors 54A, 54B and the y-direction length of the top surface 50A of the second output conductors 55A, 55B is within 5% of the y-direction length of the top surface 50A of the second output conductors 55A, 55B, it can be said that the y-direction length of the top surface 50A of the second output conductors 55A, 55B is equal to the y-direction length of the top surface 50A of the second output conductors 55A, 55B. Also, if the difference between the y-direction length of the top surface 50A of the second power supply conductors 54A, 54B and the y-direction length of the top surface 50A of the second ground conductor 56 is within 5% of the y-direction length of the top surface 50A of the second ground conductor 56, it can be said that the y-direction length of the top surface 50A of the second power supply conductors 54A, 54B is equal to the y-direction length of the top surface 50A of the second ground conductor 56.

[0321] Furthermore, since the thickness of the second power supply conductors 54A, 54B, the thickness of the second output conductors 55A, 55B, and the thickness of the second ground conductor 56 are all equal to each other, the volume of the second power supply conductors 54A, 54B is smaller than the volume of the second output conductors 55A, 55B and the volume of the second ground conductor 56.

[0322] Next, a method for manufacturing semiconductor device 1C will be described with reference to Fig. 39 to Fig. 46. As shown in Fig. 39, the method for manufacturing semiconductor device 1C includes a step of preparing a support substrate 900. Support substrate 900 is made of an intrinsic single crystal material such as Si. Support substrate 900 has an upper surface 901 and a lower surface 902 facing opposite sides in the z direction.

[0323] 39, the manufacturing method of semiconductor device 1C includes a step of forming terminal pillars 950. More specifically, a plurality of terminal pillars 950 are formed on an upper surface 901 of a supporting substrate 900. Each terminal pillar 950 is made of, for example, Cu or a Cu alloy, and is formed by electrolytic plating.

[0324] Specifically, each terminal pillar 950 is formed through, for example, a step of forming a seed layer, a step of forming a mask on the seed layer by photolithography, and a step of forming the terminal pillar 950 in contact with the seed layer. For example, a seed layer is formed on the upper surface 901 of the support substrate 900 by a sputtering method. Next, the seed layer is covered with, for example, a photosensitive resist layer, and the resist layer is exposed to light and developed to form a mask having an opening. Next, a plating metal is deposited on the surface of the seed layer exposed from the mask by an electrolytic plating method using the seed layer as a conductive path, to form the terminal pillar 950. After the formation of the terminal pillar 950, the mask is removed. Note that the terminal pillar 950 may be formed of a Cu pillar material. The thicknesses of the multiple terminal pillars 950 are equal to each other.

[0325] Although not shown, the multiple terminal pillars 950 are members that become the multiple conductors 50. Therefore, the volume of the terminal pillars 950 that become the first power supply conductors 51A and 51B is smaller than the volume of the terminal pillars 950 that become the first output conductors 52A and 52B and the volume of the terminal pillars 950 that become the first ground conductor 53. Specifically, when viewed in the z direction, the shape of the multiple terminal pillars 950 that become the first power supply conductors 51A and 51B, the first output conductors 52A and 52B, and the first ground conductor 53 as viewed in the z direction is a rectangle whose long side direction is the x direction and whose short side direction is the y direction. The length in the x direction of the terminal pillars 950 that become the first power supply conductors 51A and 51B is shorter than the length in the x direction of the terminal pillars 950 that become the first output conductors 52A and 52B and the length in the x direction of the terminal pillars 950 that become the first ground conductor 53. The length in the y direction of the terminal pillar 950 that becomes the first power supply conductors 51A, 51B is equal to the length in the y direction of the terminal pillar 950 that becomes the first output conductors 52A, 52B and the length in the y direction of the terminal pillar 950 that becomes the first ground conductor 53.

[0326] 40, the manufacturing method of semiconductor device 1C includes a step of forming a base material 910. Base material 910 is formed so as to cover the upper surfaces of terminal pillars 950. The material constituting substrate 210 shown in FIG. 38 can be used as the material of this base material 910. In the example shown in the figure, a synthetic resin containing epoxy resin as a main component is used as the material of base material 910.

[0327] 41, a portion of the base material 910 and terminal pillar 950 in the z direction is ground to form a plurality of conductors 50 exposed on an upper surface 911 of the base material 910. In grinding the base material 910, the base material 910 has the same thickness as the substrate 210.

[0328] 42, a plurality of wirings 40 are formed on an upper surface 911 of a base material 910 and on the upper surfaces of a plurality of conductors 50 exposed from the upper surface 911. The plurality of wirings 40 are formed individually for the plurality of conductors 50. More specifically, the plurality of wirings 40 are formed through a step of forming a metal layer, a step of forming a mask on the metal layer by photolithography, and a step of forming a conductive layer in contact with the metal layer.

[0329] First, a metal layer is formed by, for example, a sputtering method. For example, a Ti layer is formed on the upper surface 911 of the base material 910 and the upper surfaces of the plurality of conductors 50, and a Cu layer is formed in contact with the Ti layer. Next, the metal layer is covered with, for example, a photosensitive resist layer, and the resist layer is exposed and developed to form a mask having an opening. Next, a plating layer is deposited on the upper surface of the metal layer exposed from the mask by, for example, an electrolytic plating method using the metal layer as a conductive path, to lock the conductive layer. Through these steps, a plurality of wirings 40 are formed. After the plurality of wirings 40 are formed, the mask is removed.

[0330] 43, the method for manufacturing the semiconductor device 1C includes a step of mounting a semiconductor element 60. The step of mounting the semiconductor element 60 is the same as the step of mounting the semiconductor element 60 in the first embodiment.

[0331] As shown in FIG. 44, the manufacturing method of the semiconductor device 1C includes a step of forming a resin layer 930. The resin layer 930 is a member that becomes the sealing resin 230 shown in FIG. 42. The resin layer 930 is a synthetic resin that contains, for example, an epoxy resin as a main component. For example, the resin layer 930 is formed by transfer molding. Note that in the illustrated example, one resin layer 930 is formed for one semiconductor element 60, but this is not limited thereto, and for example, a resin layer 930 that covers all of the semiconductor elements 60 may be formed.

[0332] As shown in Fig. 45, the manufacturing method of semiconductor device 1C includes a step of removing supporting substrate 900 shown in Fig. 44. Note that Fig. 45 is shown upside down with respect to Fig. 44. Support substrate 900 is removed by, for example, grinding.

[0333] 45, the manufacturing method of the semiconductor device 1C includes a step of forming a plurality of terminals 20. The plurality of terminals 20 are made of a plating metal. For example, the plurality of terminals 20 are formed by precipitating plating metals, such as Ni, Pd, and Au, in this order, by electroless plating.

[0334] As shown in Fig. 46, the manufacturing method of the semiconductor device 1C includes a process of forming the semiconductor device 1C by dicing. More specifically, a dicing tape DT is attached to the lower surface of the resin layer 930. Next, the base material 910 and the resin layer 930 are cut in this order along cutting lines CL indicated by dashed lines, for example, by a dicing blade. Through the above processes, the semiconductor device 1C is manufactured.

[0335] As shown in FIG. 37 and FIG. 38, the semiconductor device 1C has the same configuration as the multiple terminals 20, the multiple wirings 40, and the multiple conductors 50 of the first embodiment, but is not limited thereto and may have the multiple terminals 20X, the multiple wirings 40X, and the multiple conductors 50X of the second embodiment. That is, the semiconductor device 1C may have a first power supply wiring 41, a first output wiring 42, a first ground wiring 43, a second power supply wiring 44, a second output wiring 45, a second ground wiring 46, and multiple control wirings 47. The semiconductor device 1C may have a first power supply conductor 51, a first output conductor 52, a first ground conductor 53, a second power supply conductor 54, a second output conductor 55, a second ground conductor 56, and multiple control conductors 57. The semiconductor device 1C may have a first power supply terminal 21, a first output terminal 22, a first ground terminal 23, a second power supply terminal 24, a second output terminal 25, a second ground terminal 26, and multiple control terminals 27.

[0336] In the first embodiment, the volumes of the first power supply conductors 51A, 51B are smaller than the volumes of the first output conductors 52A, 52B and the first ground conductor 53, but this is not limited to the above. For example, the volumes of the first output conductors 52A, 52B may be smaller than the volumes of the first power supply conductors 51A, 51B and the first ground conductor 53, or the volume of the first ground conductor 53 may be smaller than the volumes of the first power supply conductors 51A, 51B and the first output conductors 52A, 52B. The second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 can also be changed in a similar manner.

[0337] The type of conductors to be reduced in volume is not limited to one type, and may be two types. In one example, the volumes of the first power supply conductors 51A, 51B and the first output conductors 52A, 52B may be made smaller than the volume of the first ground conductor 53. The volumes of the first power supply conductors 51A, 51B and the first ground conductor 53 may be made smaller than the volume of the first output conductors 52A, 52B. The volumes of the first output conductors 52A, 52B and the first ground conductor 53 may be made smaller than the volume of the first power supply conductors 51A, 51B. The second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 may be similarly modified. The configuration for reducing the volume of the conductors may be any of the configurations in each embodiment and each modified example.

[0338] In the first embodiment, the volumes of the same type of conductors are reduced, such as the first power supply conductors 51A and 51B being smaller than the first output conductors 52A and 52B and the first ground conductor 53, but this is not limited thereto. For example, the types of conductors to be reduced in volume may be different from each other. In other words, the volumes of any one to four of the five conductors, the first power supply conductors 51A and 51B, the first output conductors 52A and 52B, and the first ground conductor 53, are made smaller than the volumes of the remaining conductors. In one example, the volumes of the first power supply conductor 51A and the first output conductor 52A are smaller than the volumes of the first power supply conductor 51B, the first output conductor 52B, and the first ground conductor 53. The second power supply conductors 54A and 54B, the second output conductors 55A and 55B, and the second ground conductor 56 can also be changed in a similar manner. Further, the configuration for reducing the volume of the conductor can be any of the configurations in each of the embodiments and the configurations in each of the modified examples.

[0339] In the first embodiment, the types of the conductors near the board side surface 13 and the conductors near the board side surface 14 whose volumes are reduced are the same so that the volumes of the first power supply conductors 51A, 51B and the second power supply conductors 54A, 54B are reduced, but this is not limited to the above. The types of the conductors near the board side surface 13 and the conductors near the board side surface 14 whose volumes are reduced may be different from each other. In other words, the types of the conductors whose volumes are reduced among the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 may be different from the types of the conductors whose volumes are reduced among the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56. In one example, the volume of the first power supply conductors 51A, 51B may be smaller than the volume of the first output conductors 52A, 52B and the volume of the first ground conductor 53, and the volume of the second output conductors 55A, 55B may be smaller than the volume of the second power supply conductors 54A, 54B and the volume of the second ground conductor 56. Note that the configuration for reducing the volume of the conductors may be any of the configurations in each of the embodiments and the configurations in each of the modified examples.

[0340] In the second embodiment, the volume of the first power supply conductor 51 is smaller than the volumes of the first output conductor 52 and the first ground conductor 53, but this is not limited to the above. For example, the volume of the first output conductor 52 may be smaller than the volumes of the first power supply conductor 51 and the first ground conductor 53, or the volume of the first ground conductor 53 may be smaller than the volumes of the first power supply conductor 51 and the first output conductor 52.

[0341] The type of conductors to be reduced in volume is not limited to one type, and may be two types. In one example, the volume of the first power supply conductor 51 and the volume of the first output conductor 52 may be smaller than the volume of the first ground conductor 53. The volume of the first power supply conductor 51 and the volume of the first ground conductor 53 may be smaller than the volume of the first output conductor 52. The volume of the first output conductor 52 and the volume of the first ground conductor 53 may be smaller than the first power supply conductor 51. The second power supply conductor 54, the second output conductor 55, and the second ground conductor 56 can be modified in the same manner. The configuration for reducing the volume of the conductors may be any of the configurations in each embodiment and the configurations in each modified example.

[0342] In the second embodiment, the type of the conductors near the board side surface 13 and the type of the conductors near the board side surface 14 whose volumes are reduced are the same, so that the volumes of the first power supply conductor 51 and the second power supply conductor 54 are each reduced, but this is not limited to the above. The type of the conductors near the board side surface 13 and the type of the conductors near the board side surface 14 whose volumes are reduced may be different from each other. In other words, the type of the conductors of the first power supply conductor 51, the first output conductor 52, and the first ground conductor 53 whose volumes are reduced may be different from the type of the conductors of the second power supply conductor 54, the second output conductor 55, and the second ground conductor 56 whose volumes are reduced. In one example, the volume of the first power supply conductor 51 may be smaller than the volume of the first output conductor 52 and the volume of the first ground conductor 53, and the volume of the second output conductor 55 may be smaller than the volume of the second power supply conductor 54 and the volume of the second ground conductor 56. The configuration for reducing the volume of the conductor can be any of the configurations in each of the embodiments and the configurations in each of the modified examples.

[0343] In the first embodiment, the arrangement of the first power supply wirings 41A, 41B, the first output wirings 42A, 42B, and the first ground wiring 43 in the y direction can be changed arbitrarily. In one example, the first power supply wirings 41A, 41B may be distributed and arranged on both sides of the first ground wiring 43 arranged in the center of the substrate 10 in the y direction, the first output wiring 42A may be arranged on the opposite side of the first power supply wiring 41A to the first ground wiring 43 in the y direction, and the first output wiring 42B may be arranged on the opposite side of the first power supply wiring 41B to the first ground wiring 43 in the y direction. With this change, the arrangement of the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 in the y direction is changed.

[0344] The arrangement of the second power supply wirings 44A, 44B, the second output wirings 45A, 45B, and the second ground wiring 46 in the y direction can be changed arbitrarily. In one example, the second power supply wirings 44A, 44B may be distributed on both sides of the second ground wiring 46 arranged in the center of the substrate 10 in the y direction, the second output wiring 45A may be arranged on the opposite side of the second power supply wiring 44A to the second ground wiring 46 in the y direction, and the second output wiring 45B may be arranged on the opposite side of the second power supply wiring 44B to the second ground wiring 46 in the y direction. With this change, the arrangement of the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 in the y direction is changed. Furthermore, the arrangement of the second power supply wiring 44A, 44B, the second output wiring 45A, 45B, and the second ground wiring 46 in the y direction may be different from the arrangement of the first power supply wiring 41A, 41B, the first output wiring 42A, 42B, and the first ground wiring 43.

[0345] In each embodiment, the control conductor 57 has the end control conductor 57C, the central control conductor 57D, and the intermediate control conductor 57E, which have different areas of the top surface 50A, but is not limited to this. For example, the control conductor 57 may be composed of the end control conductor 57C and the intermediate control conductor 57E. That is, the central control conductor 57D may be changed to the intermediate control conductor 57E. The control conductor 57 may also be composed of only the intermediate control conductor 57E. That is, the end control conductor 57C and the central control conductor 57D may each be changed to the intermediate control conductor 57E.

[0346] In each embodiment, the length in the x direction and the length in the y direction of each of the top faces 50A of the four end control conductors 57C can be arbitrarily changed. For example, the length in the x direction of the top face 50A of the end control conductor 57C may be longer or shorter than the length in the x direction of the top faces 50A of the first power supply conductors 51A and 51B and the length in the x direction of the top faces 50A of the second power supply conductors 54A and 54B. The length in the y direction of the top face 50A of the end control conductor 57C may be equal to the length in the x direction of the top faces 50A of the first power supply conductors 51A and 51B and the length in the x direction of the top faces 50A of the second power supply conductors 54A and 54B. The length in the y direction of the top face 50A of the end control conductor 57C may be shorter than the length in the x direction of the top faces 50A of the first power supply conductors 51A and 51B and the length in the x direction of the top faces 50A of the second power supply conductors 54A and 54B.

[0347] In each embodiment, the length in the x direction and the length in the y direction of each of the top faces 50A of the multiple intermediate control conductors 57E can be arbitrarily changed. For example, the length in the x direction of the top face 50A of the intermediate control conductor 57E may be equal to the length in the x direction of the top faces 50A of the first power supply conductors 51A, 51B and the length in the x direction of the top faces 50A of the second power supply conductors 54A, 54B. The length in the x direction of the top face 50A of the intermediate control conductor 57E may be longer than the length in the x direction of the top faces 50A of the first power supply conductors 51A, 51B and the length in the x direction of the top faces 50A of the second power supply conductors 54A, 54B. The length in the y direction of the top face 50A of the intermediate control conductor 57E may be longer or shorter than the length in the y direction of the top faces 50A of the first power supply conductors 51A, 51B and the length in the y direction of the top faces 50A of the second power supply conductors 54A, 54B.

[0348] In each embodiment, the length in the x direction and the length in the y direction of the central control conductor 57D can be changed arbitrarily. For example, the length in the x direction of the central control conductor 57D may be equal to the length in the x direction of the top surface 50A of the first power supply conductors 51A, 51B and the length in the x direction of the top surface 50A of the second power supply conductors 54A, 54B. The length in the x direction of the top surface 50A of the central control conductor 57D may be shorter than the length in the x direction of the top surface 50A of the first power supply conductors 51A, 51B and the length in the x direction of the top surface 50A of the second power supply conductors 54A, 54B. The length in the y direction of the top surface 50A of the central control conductor 57D may be longer or shorter than the length in the y direction of the top surface 50A of the first power supply conductors 51A, 51B and the length in the y direction of the top surface 50A of the second power supply conductors 54A, 54B.

[0349] In each embodiment, at least one of the area of ​​the top surface 50A of the first power supply conductors 51A, 51B and the area of ​​the top surface 50A of the second power supply conductors 54A, 54B may be equal to the area of ​​the top surface 50A of the control conductor 57. Also, at least one of the area of ​​the top surface 50A of the first power supply conductors 51A, 51B and the area of ​​the top surface 50A of the second power supply conductors 54A, 54B may be equal to the area of ​​the top surface 50A of the middle control conductor 57E of the control conductor 57.

[0350] In each embodiment, at least one of the volumes of the first power supply conductors 51A, 51B and the second power supply conductors 54A, 54B may be equal to the volume of the control conductor 57. Also, at least one of the volumes of the first power supply conductors 51A, 51B and the second power supply conductors 54A, 54B may be equal to the volume of the middle control conductor 57E of the control conductors 57.

[0351] In each embodiment, the positions in the x direction of the first power supply conductors 51A, 51B relative to the first output conductors 52A, 52B and the first ground conductor 53 can be arbitrarily changed. The positions in the x direction of the second power supply conductors 54A, 54B relative to the second output conductors 55A, 55B and the second ground conductor 56 can be arbitrarily changed. For example, the positions in the x direction of the first power supply conductors 51A, 51B and the second power supply conductors 54A, 54B may be changed as in a first example shown in FIG. 47 and a second example shown in FIG. 48.

[0352] As shown in FIG. 47 and FIG. 48, of both ends of the top surface 50A of the first power conductors 51A and 51B in the x direction, the end closest to the resin side surface 32 is referred to as end edge 51a, and the end opposite the resin side surface 32 is referred to as end edge 51b. Of both ends of the top surface 50A of the first output conductors 52A and 52B in the x direction, the end closest to the resin side surface 32 is referred to as end edge 52a, and the end opposite the resin side surface 32 is referred to as end edge 52b. Of both ends of the top surface 50A of the first ground conductor 53 in the x direction, the end closest to the resin side surface 32 is referred to as end edge 53a, and the end opposite the resin side surface 32 is referred to as end edge 53b. Of both ends of the top surface 50A of the second power conductors 54A and 54B in the x direction, the end closest to the resin side surface 33 is referred to as end edge 54a, and the end opposite the resin side surface 33 is referred to as end edge 54b. Of both edges in the x direction of top surface 50A of second output conductors 55A, 55B, the edge near resin side surface 33 is referred to as edge 55a, and the edge opposite resin side surface 33 is referred to as edge 55b. Of both edges in the x direction of top surface 50A of second ground conductor 56, the edge near resin side surface 33 is referred to as edge 56a, and the edge opposite resin side surface 33 is referred to as edge 56b.

[0353] 47, in the first example, edges 51b of the first power supply conductors 51A, 51B are aligned in the x direction with edges 52b of the first output conductors 52A, 52B and an edge 53b of the first ground conductor 53. Edges 54b of the second power supply conductors 54A, 54B are aligned in the x direction with edges 55b of the second output conductors 55A, 55B and an edge 56b of the second ground conductor 56.

[0354] 48, in the second example, the edges 51b of the first power supply conductors 51A and 51B are located closer to the board side surface 13 in the x direction than the edges 52b of the first output conductors 52A and 52B and the edge 53b of the first ground conductor 53. Also, the edges 51a of the first power supply conductors 51A and 51B are located farther from the board side surface 13 in the x direction than the edges 52a of the first output conductors 52A and 52B and the edge 51a of the first ground conductor 53. That is, as shown by the dashed dotted line in FIG. 48, the first power supply conductors 51A and 51B, the first output conductors 52A and 52B, and the first ground conductor 53 are arranged such that the centers in the x direction of the first power supply conductors 51A and 51B, the centers in the x direction of the first output conductors 52A and 52B, and the center in the x direction of the first ground conductor 53 are aligned with each other in the x direction.

[0355] In the x direction, the edges 54b of the second power supply conductors 54A and 54B are located closer to the board side surface 14 than the edges 55b of the second output conductors 55A and 55B and the edge 56b of the second ground conductor 56. In addition, in the x direction, the edges 54a of the second power supply conductors 54A and 54B are located farther from the board side surface 14 than the edges 55a of the second output conductors 55A and 55B and the edge 56a of the second ground conductor 56. That is, as shown by the dashed dotted line in FIG. 48 , the second power supply conductors 54A and 54B, the second output conductors 55A and 55B, and the second ground conductor 56 are arranged such that the centers in the x direction of the second power supply conductors 54A and 54B, the centers in the x direction of the second output conductors 55A and 55B, and the center in the x direction of the second ground conductor 56 are aligned with each other in the x direction.

[0356] 47 and 48 show an example in which the positions in the x direction of the first power supply conductors 51A, 51B and the positions in the x direction of the second power supply conductors 54A, 54B are changed by reducing the volumes of the first power supply conductors 51A, 51B and the second power supply conductors 54A, 54B, but the present invention is not limited to this. It is sufficient that the positions in the x direction of the conductors whose volumes are reduced by shortening the length in the x direction of the top surface 50A among the first power supply conductors 51A, 51B, the first output conductors 52A, 52B, and the first ground conductor 53 are changed. It is also sufficient that the positions in the x direction of the conductors whose volumes are reduced by shortening the length in the x direction of the top surface 50A among the second power supply conductors 54A, 54B, the second output conductors 55A, 55B, and the second ground conductor 56 are changed. Moreover, the first power supply conductor 51, the first output conductor 52, the first ground conductor 53, the second power supply conductor 54, the second output conductor 55 and the second ground conductor 56 of the second embodiment can also be modified in a similar manner.

[0357] The technical ideas that can be understood from each of the embodiments according to the first aspect and each of the modified examples will be described below as supplementary notes.

[0358] A wiring forming step of forming wiring including a first drive wiring and a second drive wiring on a substrate main surface of a substrate having a substrate main surface and a substrate back surface facing in opposite directions in a thickness direction; a conductor forming step of forming a first driving conductor on the first driving wiring and forming a second driving conductor on the second driving wiring; an element mounting step of mounting a semiconductor element on the first drive wiring and the second drive wiring; a resin layer forming step of forming a resin layer that seals the wiring, the semiconductor element, the first driving conductor, and the second driving conductor; A method for manufacturing a semiconductor device comprising: A method of manufacturing a semiconductor device, wherein in the conductor forming step, the first driving conductor is formed so that a volume of the first driving conductor is smaller than a volume of the second driving conductor.

[0359] According to this configuration, the volume of the first drive conductor is made smaller than the volume of the second drive conductor, which reduces warping of the base material constituting the substrate even if the base material is heated during the resin layer formation process, thereby enabling stable manufacture of semiconductor devices.

[0360] Appendix A2. The method for manufacturing a semiconductor device according to Appendix A1, further comprising a resin layer processing step of reducing a thickness of the resin layer, in which the resin layer is processed so that an end face in a thickness direction of the first driving conductor and an end face in a thickness direction of the second driving conductor are exposed from the resin layer.

[0361] Addendum B1. A wiring forming step of forming wiring including a first drive wiring and a second drive wiring on a substrate main surface of a substrate having a substrate main surface and a substrate back surface facing opposite to each other in a thickness direction; a conductor forming step of forming a first driving conductor on the first driving wiring and forming a second driving conductor on the second driving wiring; an element mounting step of mounting a semiconductor element on the first drive wiring and the second drive wiring; a resin layer forming step of forming a resin layer that seals the wiring, the semiconductor element, the first driving conductor, and the second driving conductor; a resin layer processing step of reducing a thickness of the resin layer, a thickness of the first driving conductor, and a thickness of the second driving conductor; A method for manufacturing a semiconductor device comprising: a thickness of the first driving conductor being made smaller than a thickness of the second driving conductor in the conductor forming process, and a thickness of the first driving conductor and a thickness of the second driving conductor being made equal to each other in the resin layer processing process.

[0362] According to this configuration, the volume of the first drive conductor is made smaller than the volume of the second drive conductor in a step prior to the resin layer forming step. This reduces warping of the base material even if it is heated dur...

Claims

1. A substrate having a substrate main surface and a substrate back surface facing in opposite directions in a thickness direction; Wiring disposed on the main surface of the substrate, the wiring including a first drive wiring and a second drive wiring; a semiconductor element electrically connected to the first drive wiring and the second drive wiring; a first driving conductor that is disposed on the same side of the substrate as the semiconductor element in a portion outer than the semiconductor element when viewed in the thickness direction, and is electrically connected to the first driving wiring; a second drive conductor disposed on the same side of the substrate as the semiconductor element in a portion outer than the semiconductor element when viewed in the thickness direction, and electrically connected to the second drive wiring; a sealing resin that seals the wiring and the semiconductor element and covers the first driving conductor and the second driving conductor such that surfaces of the first driving conductor and the second driving conductor that are opposite to the substrate in the thickness direction are exposed; and Equipped with the first drive conductor and the second drive conductor are arranged spaced apart from each other in a predetermined direction along the main surface of the substrate, The volume of the first drive conductor is smaller than the volume of the second drive conductor; the first drive conductor and the second drive conductor each have a top surface exposed from a side opposite to the substrate in the thickness direction with respect to the sealing resin, an area of ​​a top surface of the first driving conductor is smaller than an area of ​​a top surface of the second driving conductor; When an arrangement direction of the first drive conductors and the second drive conductors is defined as a first direction, and a direction perpendicular to the thickness direction and the first direction is defined as a second direction, a semiconductor device in which the shapes of the top surfaces of the first drive conductor and the second drive conductor when viewed in the thickness direction are each rectangular with the first direction being the short side direction and the second direction being the long side direction, and the length of the top surface of the first drive conductor in the second direction is shorter than the length of the top surface of the second drive conductor in the second direction.

2. A substrate having a substrate main surface and a substrate back surface facing in opposite directions in a thickness direction; Wiring disposed on the main surface of the substrate, the wiring including a first drive wiring and a second drive wiring; a semiconductor element electrically connected to the first drive wiring and the second drive wiring; a first driving conductor that is disposed on the same side of the substrate as the semiconductor element in a portion outer than the semiconductor element when viewed in the thickness direction, and is electrically connected to the first driving wiring; a second drive conductor disposed on the same side of the substrate as the semiconductor element in a portion outer than the semiconductor element when viewed in the thickness direction, and electrically connected to the second drive wiring; a sealing resin that seals the wiring and the semiconductor element and covers the first driving conductor and the second driving conductor such that surfaces of the first driving conductor and the second driving conductor that are opposite to the substrate in the thickness direction are exposed; and Equipped with the first drive conductor and the second drive conductor are arranged spaced apart from each other in a predetermined direction along the main surface of the substrate, The volume of the first drive conductor is smaller than the volume of the second drive conductor; the first drive conductor and the second drive conductor each have a top surface exposed from a side opposite to the substrate in the thickness direction with respect to the sealing resin, an area of ​​a top surface of the first driving conductor is smaller than an area of ​​a top surface of the second driving conductor; When an arrangement direction of the first drive conductors and the second drive conductors is defined as a first direction, and a direction perpendicular to the thickness direction and the first direction is defined as a second direction, a semiconductor device in which the shapes of the top surfaces of the first drive conductor and the second drive conductor when viewed in the thickness direction are each rectangular with the first direction being the short side direction and the second direction being the long side direction, and the length of the top surface of the first drive conductor in the first direction is shorter than the length of the top surface of the second drive conductor in the first direction.

3. 3. The semiconductor device according to claim 1, wherein the second drive conductor is arranged closer to a center of the main surface of the substrate in an arrangement direction of the first drive conductor and the second drive conductor than the first drive conductor.

4. When an arrangement direction of the first drive conductors and the second drive conductors is defined as a first direction, and a direction perpendicular to the thickness direction and the first direction is defined as a second direction, The semiconductor device has a control circuit, a plurality of control conductors electrically connected to the control circuit; The control conductors are arranged spaced apart from one another in the second direction, 4. The semiconductor device according to claim 1, wherein a volume of the second drive conductor is larger than a volume of the control conductor.

5. the first drive conductor, the second drive conductor and the control conductor each have a top surface exposed from a side opposite to the substrate in the thickness direction with respect to the sealing resin, The semiconductor device according to claim 4 , wherein an area of ​​a top surface of the second drive conductor is larger than an area of ​​a top surface of the control conductor.

6. a top surface of the second driving conductor when viewed in the thickness direction has a rectangular shape whose short side direction is in the first direction and whose long side direction is in the second direction, a shape of a top surface of the control conductor when viewed in the thickness direction is a rectangle having a side along the first direction and a side along the second direction, 6. The semiconductor device according to claim 5, wherein a length in the second direction at a top surface of the second drive conductor is longer than a length in the first direction and a length in the second direction at a top surface of the control conductor.

7. 7. The semiconductor device according to claim 4, wherein the plurality of control conductors are arranged outwardly of the first drive conductor and the second drive conductor in the first direction.

8. a shape of the substrate as viewed in the thickness direction is a rectangle having a side along the first direction and a side along the second direction, the control conductors include end control conductors located at four corners of the substrate when the substrate is viewed from the thickness direction, and intermediate control conductors disposed between two of the end control conductors in the second direction; the end control conductor and the intermediate control conductor each have a top surface exposed from the sealing resin on a side opposite to the substrate in the thickness direction, 8. The semiconductor device of claim 7, wherein an area of ​​a top surface of the end control conductor is larger than an area of ​​a top surface of the intermediate control conductor.

9. The semiconductor device of claim 8 , wherein a volume of the second drive conductor is greater than a volume of the end control conductor.

10. the second driving conductor has a top surface exposed from the sealing resin on a side opposite to the substrate in the thickness direction, The semiconductor device of claim 9 , wherein an area of ​​a top surface of the second drive conductor is greater than an area of ​​a top surface of the end control conductor.

11. a top surface of the second driving conductor when viewed in the thickness direction has a rectangular shape whose short side direction is in the first direction and whose long side direction is in the second direction, a shape of a top surface of the end control conductor when viewed in the thickness direction is a rectangle having a side along the first direction and a side along the second direction, The semiconductor device according to claim 10 , wherein a length in the second direction at a top surface of the second drive conductor is longer than a length in the first direction and a length in the second direction at a top surface of the end control conductor.

12. 8. The semiconductor device according to claim 4, wherein a volume of the first drive conductor is equal to or larger than a volume of the control conductor.

13. 12. The semiconductor device according to claim 8, wherein a volume of the first drive conductor is smaller than a volume of the end control conductor.

14. 14. The semiconductor device according to claim 13, wherein the first drive conductor has a top surface exposed from the sealing resin on the opposite side of the substrate in the thickness direction, and an area of ​​the top surface of the first drive conductor is smaller than an area of ​​the top surface of the end control conductor.

15. a top surface of the first driving conductor when viewed in the thickness direction has a rectangular shape whose short side direction is in the first direction and whose long side direction is in the second direction, 15. The semiconductor device of claim 14, wherein a length in the second direction at a top surface of the first drive conductor is shorter than at least one of a length in the first direction and a length in the second direction at a top surface of the end control conductor.

16. 12. The semiconductor device according to claim 8, wherein a volume of the first drive conductor is equal to or larger than a volume of the intermediate control conductor.

17. the first driving conductor has a top surface exposed from the sealing resin on a side opposite to the substrate in the thickness direction, 17. The semiconductor device of claim 16, wherein an area of ​​a top surface of the first drive conductor is equal to or greater than an area of ​​a top surface of the intermediate control conductor.

18. the wiring includes a control wiring that connects the control circuit and the control conductor; 18. The semiconductor device according to claim 8, wherein a width of the first drive wiring and a width of the second drive wiring are each larger than a width of the control wiring.

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