Variable gain amplifier and phase shifter

Abstract

The present invention provides a variable gain amplifier comprising a control unit that obtains set gain information related to a gain setting and, on the basis of the set gain information, outputs a current to a first reference current transistor and a second reference current transistor so that the sum of the current value to the first reference current transistor and the current value to the second reference current transistor is constant, and outputs to a first variable impedance circuit and a second variable impedance circuit a voltage obtained by multiplying by a coefficient the absolute value of the difference between the current value to the first variable impedance circuit and the current value to the second variable impedance circuit, wherein, on the basis of the input of a normal-phase signal to a first input terminal and the input of an inverted-phase signal to a second input terminal, the normal-phase signal amplified according to the set gain information is output from the first output terminal, and the inverted-phase signal amplified according to the set gain information is output from the second output terminal.

Description

[Technical field]

[0001] The present disclosure relates to a variable gain amplifier and a phase shifter. [Background technology]

[0002] In general, semiconductor integrated circuits for processing high-frequency signals are used in systems that handle high-frequency signals, such as communications and radar. Among such semiconductor integrated circuits, variable gain amplifiers and vector synthesis type Transfer A phase shifter is used for the purpose of adjusting the amplitude of an input signal to a predetermined level. Conventionally, a variable gain amplifier capable of changing the size of a transistor in accordance with a change in gain when adjusting the amplitude is known (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 1991-190310 A Summary of the Invention [Problem to be solved by the invention]

[0004] In general, when the gain of a variable gain amplifier is changed, the equivalent input and output capacitances change, and as a result, the passing phase changes according to the change in gain. For this reason, a variable gain amplifier and Transfer A phase adjuster is required.

[0005] The present disclosure is directed to solving the above-mentioned problems, and provides a variable gain amplifier and Transfer The object of the present invention is to provide a phaser. [Means for solving the problem]

[0006] A variable gain amplifier according to the present disclosure includes a first input terminal, a second input terminal, a power supply terminal, a ground terminal, a first variable impedance circuit connected between the first input terminal and the ground terminal, a second variable impedance circuit connected between the second input terminal and the ground terminal, a first transistor having a base terminal connected to the first input terminal and an emitter terminal connected to the ground terminal, a second transistor having a base terminal connected to the second input terminal, an emitter terminal connected to the ground terminal, and a collector terminal connected to a collector terminal of the first transistor, a third transistor having a base terminal connected to the first input terminal and an emitter terminal connected to the ground terminal, and a fourth transistor having a base terminal connected to the second input terminal, an emitter terminal connected to the ground terminal, and a collector terminal connected to the collector terminal of the third transistor, the first transistor and the fourth transistor being diode-connected, and the first transistor and the fourth transistor being a current mirror. a first reference current transistor connected to the first transistor and the fourth transistor so as to form a current mirror, a second reference current transistor being diode-connected and connected to the second transistor and the third transistor so as to form a current mirror with the second transistor and the third transistor, a first load connected between a collector terminal of the first transistor and a power supply terminal, a second load connected between a collector terminal of the third transistor and a collector terminal of the fourth transistor and a power supply terminal, a first output terminal connected to the first load, and a second output terminal connected to the second load, acquiring setting gain information relating to gain setting, and outputting a current to the first reference current transistor and the second reference current transistor based on the setting gain information so that a sum of a current value to the first reference current transistor and a current value to the second reference current transistor is constant; First Reference Current Transistor and the current value to Second Reference Current Transistor and a control unit that outputs a voltage obtained by multiplying the absolute value of the difference between the current value to the first variable impedance circuit and the current value to the second variable impedance circuit by a coefficient to the first variable impedance circuit and the second variable impedance circuit, and is characterized in that, based on a positive-phase signal being input to the first input terminal and an inverse-phase signal of the positive-phase signal being input to the second input terminal, a positive-phase signal amplified in accordance with set gain information is output from the first output terminal and a inverse-phase signal amplified in accordance with the set gain information is output from the second output terminal. Effect of the Invention

[0007] According to the present disclosure, it is possible to suppress a change in passing phase when the gain is changed. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a circuit diagram showing a variable gain amplifier according to a first embodiment. [Diagram 2] 3 is an equivalent circuit diagram of a transistor included in the variable gain amplifier according to the first embodiment. [Diagram 3] FIG. 11 is a circuit diagram showing a variable gain amplifier according to a second embodiment. [Figure 4] FIG. 11 is a circuit diagram showing a variable gain amplifier according to a third embodiment. [Diagram 5] FIG. 11 is a circuit diagram showing a variable gain amplifier according to a fourth embodiment. [Figure 6] FIG. 13 is a circuit diagram showing a variable gain amplifier according to a fifth embodiment. [Figure 7] FIG. 13 is a circuit diagram showing a phase shifter according to a sixth embodiment. [Figure 8] FIG. 4 is a block diagram showing an example of a hardware configuration of a control unit. [Figure 9] FIG. 4 is a block diagram showing an example of a hardware configuration of a control unit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Embodiment 1 First, a variable gain amplifier according to the first embodiment will be described with reference to Fig. 1 and Fig. 2. Fig. 1 is a circuit diagram showing a variable gain amplifier according to the first embodiment. As shown in Fig. 1, the variable gain amplifier according to the first embodiment includes an RF (Radio Frequency) signal positive-phase input terminal 1, an RF signal negative-phase input terminal 2, an RF signal positive-phase output terminal 3, an RF signal negative-phase output terminal 4, a power supply terminal 5 connected to an AC power supply (not shown), an amplitude control signal input terminal 6, a control unit 11, transistors 21, 22, 23, 24, 25, 26, loads 27, 28, variable impedance elements 31, 32, and coupling elements 33, 34.

[0010] A positive-phase signal, for example, an RF positive-phase signal, is input to the RF signal positive-phase input terminal 1 serving as a first input terminal. A negative-phase signal of the signal input to the RF signal positive-phase input terminal 1, for example, an RF negative-phase signal, is input to the RF signal negative-phase input terminal 2 serving as a second input terminal. A variable impedance element 31 serving as a first variable impedance circuit is connected between the RF signal positive-phase input terminal 1 and a ground terminal. A variable impedance element 32 serving as a second variable impedance circuit is connected between the RF signal negative-phase input terminal 2 and a ground terminal. The variable impedance elements 31 and 32 are connected, for example, between an imaginary part component ΔA(V a ) and the input voltage V a Only the value of the imaginary part can be changed depending on

[0011] The transistors 21 to 26 are, for example, bipolar transistors having a base (gate) terminal, an emitter (source) terminal, and a collector (drain) terminal. The transistor 21 serving as a first transistor has a base terminal connected to the RF signal positive phase input terminal 1, and an emitter terminal grounded. The transistor 22 serving as a second transistor has a base terminal connected to the RF signal negative phase input terminal 2, and an emitter terminal grounded. The collector terminal of the transistor 21 and the collector terminal of the transistor 22 are connected to be shorted. The transistors 21 and 22 form a first transistor pair.

[0012] The third transistor, ie, transistor 23, has a base terminal connected to RF signal positive phase input terminal 1 and an emitter terminal grounded. The fourth transistor, ie, transistor 24, has a base terminal connected to RF signal negative phase input terminal 2 and an emitter terminal grounded. The collector terminal of transistor 23 and the collector terminal of transistor 24 are connected to be shorted. Moreover, the transistors 23 and 24 form a second transistor pair.

[0013] The transistor 26 as the first reference current transistor has a collector terminal and a base terminal connected to each other. In other words, the transistor 26 is diode-connected. The transistor 26 is also connected to the transistors 21 and 24 so that the transistors 21 and 24 form a current mirror. In other words, the transistor 26 is connected to the transistors constituting the first transistor pair to which a positive-phase signal is input and the transistors constituting the second transistor pair to which a negative-phase signal is input, so that these two transistors form a current mirror. The transistor 26 converts a voltage according to the current I1 input from the control unit 11 and transmits it to the transistors 21 and 24. The current I1 flows through the transistors 21 and 24 as a bias current.

[0014] The transistor 25 as the second reference current transistor has a collector terminal and a base terminal connected to each other. In other words, the transistor 25 is diode-connected. The transistor 25 is also connected to the transistors 22 and 23 so that the transistors 22 and 23 form a current mirror. In other words, the transistor 25 is connected to the transistors constituting the first transistor pair to which a negative phase signal is input and the transistor constituting the second transistor pair to which a positive phase signal is input so that these two transistors form a current mirror. The transistor 25 converts a voltage according to the current I2 input from the control unit 11 and transmits it to the transistors 22 and 23. The current I2 flows in the transistors 22 and 23 as a bias current.

[0015] The loads 27 and 28 have an impedance Z. The load 27 as a first load is connected between the collector terminals of the transistors 21 and 22 and the power supply terminal 5. Also, the RF signal positive phase output terminal 3 as a first output terminal is connected between the collector terminals of the transistors 21 and 22 and the load 27. The load 28 as a second load is connected between the collector terminals of the transistors 23 and 24 and the power supply terminal 5. Also, the RF signal negative phase output terminal 4 as a second output terminal is connected between the collector terminals of the transistors 23 and 24 and the load 28.

[0016] The coupling element 33 is connected between the RF signal positive phase input terminal 1 and the base terminal of the transistor 23. The coupling element 34 is connected between the RF signal negative phase input terminal 2 and the base terminal of the transistor 22. A positive phase signal inputted from the RF signal positive phase input terminal 1 is transmitted to the transistor 21, then to the variable impedance element 31, and then to the transistor 23 via the coupling element 33. A negative phase signal inputted from the RF signal negative phase input terminal 2 is transmitted to the transistor 24, then to the variable impedance element 32, and then to the transistor 22 via the coupling element 34. The coupling elements 33 and 34 have the function of blocking DC components and transmitting only AC components.

[0017] The control unit 11 acquires the set gain information input from the amplitude control signal input terminal 6, and outputs a current I1 to the transistor 26 and a current I2 to the transistor 25 based on the acquired set gain information. Also, the control unit 11 outputs a control voltage V a The set gain information is information related to the setting of the gain of the variable gain amplifier (gain setting), for example, the set gain information is information for determining the gain when amplifying a signal by the variable gain amplifier, and for example, the set gain information is set amplitude information for determining the amplitude of the signal output from the variable gain amplifier.

[0018] 2 is an equivalent circuit diagram of transistors 21 to 24 included in the variable gain amplifier according to the first embodiment. inp The negative input voltage of the variable gain amplifier input from the RF signal negative input terminal 2 is V inn The positive phase output voltage of the variable gain amplifier output from the RF signal positive phase output terminal 3 is V outp The negative-phase output voltage of the variable gain amplifier output from the RF signal negative-phase output terminal 4 is V outn In this case, when the transistors 21 to 24 are represented by the equivalent circuit shown in FIG. 2, the differential input voltage V inp -V innDifferential output voltage V outp -V outn The ratio, that is, the differential voltage gain G, is expressed by the following equation (1). TIFF0007630739000001.tif26166 In addition, ΔC in The capacitance component parasitic to the transistor that changes according to the gain setting state is r π represents the parasitic parallel resistance of the transistor.

[0019] Here, k and q are constants, and T is temperature. In this way, this circuit is able to adjust the gain by the current difference between I1 and I2 output from control unit 11. The gain is determined by |I1-I2|, which is the absolute value of I1-I2, and the polarity is determined by the sign of I1-I2. Control unit 11 also outputs currents to transistors 25 and 26 so that the sum of the currents output to transistors 25 and 26 is constant (I1+I2=constant). Here, as shown in the following formula (2), ΔC in (|I1-I2|,V a ) is a component ΔC that is parasitic to the transistor and changes according to the bias current difference corresponding to the gain setting state. π (|I p -I n |) and the imaginary component ΔA (V a ) ΔC in (|I1-I2|,V a )=ΔC π (|I1-I2|)+ΔA(V a ) (2)

[0020] Furthermore, if Z of the loads 27 and 28 is only the real part, then the passing phase change Δφ when the control unit 11 changes the bias current I1 and the current I2 in accordance with the set gain information is expressed by the following formula (3). TIFF0007630739000002.tif16166

[0021] In this way, the passing phase changes because the difference current changes according to the gain setting. Here, ΔC π If we approximate the base storage capacitance of the bipolar transistor as the dominant factor, (|I1-I2|) can be expressed as the following formula (4). F is a value called the base transit time, which depends on the bipolar transistor technology, and takes a value of, for example, 10 to 500 [ps]. TIFF0007630739000003.tif17166

[0022] Here, by controlling the control unit 11 to change the variable impedance elements 31 and 32 with inverse characteristics according to the absolute value of the bias current difference as shown in the following formula (5), ΔC π (|I1-I2|) and ΔA(V a ) ΔC in (|I p -I n |,V a ) can be set to 0, making it possible to keep the passing phase constant. TIFF0007630739000004.tif15166

[0023] Here, the output voltage V from the control unit 11 a is expressed by the following equation (6) for the current difference I1-I2. TIFF0007630739000005.tif20166 In this way, the control unit 11 Transistor 26 Current value to I 1 and Transistor 25 Current value to I The absolute value of the difference between this voltage and voltage V a is multiplied by a coefficient and output to variable impedance elements 31 and 32.

[0024] In addition, by setting the currents I1 and I2 output from the control unit 11 as shown in the following formula (7), the gains G and ΔC π (|I1-I2|), and ΔA(Va ) can be cancelled, making it possible to realize a constant passing phase regardless of gain changes or temperature changes. TIFF0007630739000006.tif30166

[0025] As described above, the variable gain amplifier according to the first embodiment is a variable gain differential amplifier that keeps the total amount of transistor current constant, changes the current distribution between the positive and negative phases, and controls the gain by the current difference, and by changing the variable impedance element installed at the input with inverse characteristics according to the absolute value of the current distribution between the positive and negative phases using the control unit 11, it is possible to keep the imaginary part of the input impedance constant and also to cancel the temperature characteristic. As a result, the variable gain amplifier according to the first embodiment can suppress changes in the passing phase when the gain is changed, and also suppress changes in the passing phase when the temperature changes.

[0026] In addition, in general, in a phased array antenna, the passing phase and amplitude output from each element must be set to a predetermined value during beamforming. However, if the passing phase changes depending on the gain, Transfer In addition to the passing phase value of the phase shifter, it is necessary to guarantee the passing phase change of the variable gain amplifier. For this reason, in the phased array antenna, a setting value table of the setting phase and setting amplitude according to the beamforming direction and excitation distribution must be read for each setting, which increases the size of the device. Since the variable gain amplifier according to the first embodiment can suppress the change in the passing phase when the gain is changed, it is possible to make the device smaller than before in a device using a variable gain amplifier such as a phased array antenna.

[0027] In addition, the gain characteristics of conventional variable gain devices change significantly with temperature changes, so a temperature compensation table for the passing phase is also required. TransferHowever, there is a problem that the configuration of the device, such as a phase shifter, a phased array antenna, etc., becomes large. Since the variable gain amplifier according to the first embodiment can suppress the change in the passing phase when the temperature changes, it is possible to miniaturize the device.

[0028] Embodiment 2 Next, a variable gain amplifier according to a second embodiment will be described with reference to Fig. 3. The variable gain amplifier according to the second embodiment differs from the variable gain amplifier according to the first embodiment in that a varactor element is used as a variable impedance circuit, but other configurations are similar, and the same components as those in the first embodiment are denoted by the same reference numerals and description thereof will be omitted.

[0029] 3 is a circuit diagram showing a variable gain amplifier according to the second embodiment. As shown in FIG. 3, the variable gain amplifier according to the second embodiment uses varactor elements 35 and 36 as a variable impedance circuit instead of the variable impedance elements 31 and 32 of the variable gain amplifier according to the first embodiment. a The change due to ΔC var Then, by giving the capacitance change with respect to the voltage as shown in the following equation (8), it becomes possible to keep the input impedance constant and the passing phase constant. TIFF0007630739000007.tif18166

[0030] At this time, the control unit 11 calculates the output voltage V a Output. TIFF0007630739000008.tif18166

[0031] As described above, the variable gain amplifier according to the second embodiment is a variable gain differential amplifier that controls the gain by changing the current distribution between the positive and negative phases, and by changing the varactor capacitance installed at the input with inverse characteristics according to the absolute value of the current distribution between the positive and negative phases using the control unit 11, it is possible to keep the imaginary part of the input impedance constant and also to cancel the temperature characteristic. This makes it possible to suppress the change in the passing phase when the gain is changed, and also to suppress the change in the passing phase when the temperature changes.

[0032] Embodiment 3 Next, a variable gain amplifier according to a third embodiment will be described with reference to Fig. 4. The variable gain amplifier according to the third embodiment differs from the variable gain amplifier according to the first embodiment in the arrangement of the variable impedance circuit, but other configurations are similar, and the same configurations as those in the first embodiment are denoted by the same reference numerals and description thereof will be omitted.

[0033] 4 is a circuit diagram showing a variable gain amplifier according to the third embodiment. As shown in FIG. 4, the variable gain amplifier according to the third embodiment includes variable impedance elements 31 and 32 as a variable impedance circuit. The variable impedance element 31 is connected between the collector terminals of the transistors 21 and 22 and the power supply terminal 5 so as to be in parallel with the load 27. In other words, the variable impedance element 31 is connected between the RF signal positive phase output terminal 3 and the power supply terminal 5 so as to be in parallel with the load 27. The variable impedance element 32 is connected between the collector terminals of the transistors 23 and 24 and the power supply terminal 5 so as to be in parallel with the load 28. In other words, the variable impedance element 32 is connected between the RF signal negative phase output terminal 4 and the power supply terminal 5 so as to be in parallel with the load 28.

[0034] By arranging the variable impedance elements 31 and 32 in this manner, it becomes possible to replace Z in equation (1) showing the gain G of the variable gain amplifier according to the first embodiment with Z+ΔA, and the gain G of the variable gain amplifier according to the first embodiment can be expressed by the following equation (10). TIFF0007630739000009.tif32166

[0035] In the third embodiment, the change in passing phase Δφ when the control section 11 changes the bias current I1 and the current I2 in response to the set gain information is expressed by the following formula (11). TIFF0007630739000010.tif20166

[0036] Here, as shown in the following formula (12), by controlling the imaginary component ΔA of the variable impedance element by the control unit 11, it is possible to keep the passing phase constant. TIFF0007630739000011.tif18166

[0037] As described above, the variable gain amplifier according to the third embodiment is a variable gain differential amplifier that changes the current distribution between the positive and negative phases and controls the gain by the current difference, and by changing the variable impedance element installed at the output with inverse characteristics according to the absolute value of the current distribution between the positive and negative phases using the control unit 11, it is possible to keep the imaginary part of the input impedance constant and also to cancel the temperature characteristic. As a result, the variable gain amplifier according to the third embodiment can suppress changes in the passing phase when the gain is changed and suppress changes in the passing phase when the temperature changes.

[0038] In the variable gain amplifier according to the third embodiment, the variable impedance element 31 is connected between the RF signal positive phase output terminal 3 and the power supply terminal 5 so as to be in parallel with the load 27, and the variable impedance element 32 is connected between the RF signal negative phase output terminal 4 and the power supply terminal 5 so as to be in parallel with the load 28, but this is not limiting. It is sufficient that the variable impedance element 31 is connected between one of the power supply terminal 5 and the ground terminal and the RF signal positive phase output terminal 3 so as to be in parallel with the load 27, and the variable impedance element 32 is connected between one of the power supply terminal 5 and the ground terminal and the RF signal negative phase output terminal 4 so as to be in parallel with the load 28. For example, the variable impedance element 31 may be connected between the ground terminal and the RF signal positive phase output terminal 3 so as to be in parallel with the load 27, and the variable impedance element 32 may be connected between the ground terminal and the RF signal negative phase output terminal 4 so as to be in parallel with the load 28.

[0039] Embodiment 4 Next, a variable gain amplifier according to a fourth embodiment will be described with reference to Fig. 5. The variable gain amplifier according to the fourth embodiment differs from the variable gain amplifier according to the third embodiment in that a varactor element is used as a variable impedance circuit, but other configurations are similar, and the same reference numerals are used to designate the same configuration as in the first embodiment, and description thereof will be omitted.

[0040] 5 is a circuit diagram showing a variable gain amplifier according to the fourth embodiment. As shown in FIG. 5, the variable gain amplifier according to the fourth embodiment uses varactor elements 35 and 36 as a variable impedance circuit instead of the variable impedance elements 31 and 32 of the variable gain amplifier according to the third embodiment. a The change due to ΔC var Then, the gain G of the variable gain amplifier according to the fourth embodiment is expressed by the following formula (13). TIFF0007630739000012.tif30166

[0041] In the fourth embodiment, the change in passing phase Δφ when the control section 11 changes the bias current I1 and the current I2 in response to the set gain information is expressed by the following formula (14). TIFF0007630739000013.tif19166

[0042] Here, as shown in the following formula (15), the control unit 11 calculates the ΔC var By controlling the above, it is possible to keep the passing phase constant. TIFF0007630739000014.tif15166

[0043] At this time, the control unit 11 calculates the output voltage V a Output. TIFF0007630739000015.tif17166

[0044] As described above, the variable gain amplifier according to the fourth embodiment is a variable gain differential amplifier that controls gain by changing the current distribution between the positive and negative phases and by changing the varactor capacitance installed at the output with inverse characteristics according to the absolute value of the current distribution between the positive and negative phases using the control unit 11, it is possible to keep the imaginary part of the passing gain constant in the gain control and also to cancel the temperature characteristic. As a result, the variable gain amplifier according to the fourth embodiment can suppress changes in the passing phase when the gain is changed and suppress changes in the passing phase when the temperature changes.

[0045] In the variable gain amplifier according to the fourth embodiment, the varactor element 35 is connected between the RF signal positive-phase output terminal 3 and the power supply terminal 5 so as to be in parallel with the load 27, and the varactor element 36 is connected between the RF signal negative-phase output terminal 4 and the power supply terminal 5 so as to be in parallel with the load 28, but this is not limiting. It is sufficient that the varactor element 35 is connected between one of the power supply terminal 5 and the ground terminal and the RF signal positive-phase output terminal 3 so as to be in parallel with the load 27, and the varactor element 36 is connected between one of the power supply terminal 5 and the ground terminal and the RF signal negative-phase output terminal 4 so as to be in parallel with the load 28. For example, the varactor element 35 may be connected between the ground terminal and the RF signal positive-phase output terminal 3 so as to be in parallel with the load 27, and the varactor element 36 may be connected between the ground terminal and the RF signal negative-phase output terminal 4 so as to be in parallel with the load 28.

[0046] Embodiment 5. Next, a variable gain amplifier according to a fifth embodiment will be described with reference to Fig. 6. The variable gain amplifier according to the fifth embodiment differs from the variable gain amplifier according to the first embodiment in the arrangement of the variable impedance circuit, but other configurations are similar, and the same components as those in the first embodiment are denoted by the same reference numerals and description thereof will be omitted.

[0047] 6 is a circuit diagram showing a variable gain amplifier according to the fifth embodiment. As shown in FIG. 6, the variable gain amplifier according to the fifth embodiment includes new variable impedance elements 31 and 32 in addition to the variable impedance elements 31 and 32 included in the variable gain amplifier according to the first embodiment. The new variable impedance element 31 as the third variable impedance circuit is connected between the collector terminals of the transistors 21 and 22 and the power supply terminal 5 so as to be in parallel with the load 27, similar to the variable impedance element 31 of the variable gain amplifier according to the third embodiment. The new variable impedance element 32 as the fourth variable impedance circuit is connected between the collector terminals of the transistors 23 and 24 and the power supply terminal 5 so as to be in parallel with the load 28, similar to the variable impedance element 32 of the variable gain amplifier according to the third embodiment.

[0048] The gain G of the variable gain amplifier according to the fifth embodiment in which the variable impedance elements 31, 31, 32, and 32 are connected in this manner is expressed by the following formula (17). TIFF0007630739000016.tif30166

[0049] In the fifth embodiment, the change in passing phase Δφ when the control section 11 changes the bias current I1 and the current I2 in response to the set gain information is expressed by the following formula (18). TIFF0007630739000017.tif19166

[0050] Here, as shown in the following formula (19), the control unit 11 calculates ΔC var By controlling the above, it is possible to keep the passing phase constant. TIFF0007630739000018.tif17166

[0051] At this time, the control unit 11 calculates the output voltage V aOutput. TIFF0007630739000019.tif18166

[0052] As described above, the variable gain amplifier according to the fifth embodiment is a variable gain differential amplifier that changes the current distribution between the positive and negative phases and controls the gain by the current difference, and by using the control unit 11 to change the variable impedance elements installed at both the input and output with inverse characteristics according to the absolute value of the current distribution between the positive and negative phases, it is possible to keep the imaginary part of the passing gain constant in the gain control and also to cancel the temperature characteristic. As a result, the variable gain amplifier according to the fifth embodiment can suppress the change in the passing phase when the gain is changed and can suppress the change in the passing phase when the temperature changes. Furthermore, by installing capacitance at both the input and output, the range of ΔA becomes larger, making it possible to accommodate a larger gain change.

[0053] The variable gain amplifier according to the fifth embodiment includes variable impedance elements 31, 31, 32, and 32 as a variable impedance circuit, but is not limited to this. The variable gain amplifier may include a varactor element as a variable impedance circuit instead of the variable impedance element of the variable gain amplifier according to the fifth embodiment.

[0054] Embodiment 6 Next, a phase shifter according to a sixth embodiment will be described with reference to Fig. 7. The phase shifter according to the sixth embodiment includes a variable gain amplifier according to any one of the first to fifth embodiments, and description of the same configuration as those of the first to fifth embodiments will be omitted.

[0055] FIG. 7 is a circuit diagram showing a phase shifter according to the sixth embodiment. As shown in FIG. TransferThe phase shifter is a vector sum type phase shifter including an input terminal 41, an output terminal 42, a passing phase setting terminal 43, variable gain amplifiers 51 and 52, an IQ (In-Phase, Quadrature-Phase) generating circuit 53, and a control unit 54. Moreover, variable gain amplifier 51 as the first variable gain amplifier and variable gain amplifier 52 as the second variable gain amplifier are any of the variable gain amplifiers according to the first to fifth embodiments.

[0056] The IQ generation circuit 53 converts the RF signal (input signal) input from the input terminal 41 into an in-phase signal (positive phase signal, first signal) which is the 0 degree component of the RF signal, an inverse phase signal (second signal) of the RF signal, a differential signal (positive phase signal, third signal) which is a quadrature-phase signal which is the 90 degree component of the RF signal, and an inverse phase signal (fourth signal) of the quadrature-phase signal. The IQ generation circuit 53 also outputs the first signal and the second signal to the variable gain amplifier 51, and outputs the third signal and the fourth signal to the variable gain amplifier 52.

[0057] The set gain G in the variable gain amplifier 51 I , and the set gain G in the variable gain amplifier 52 Q The control unit 54 performs the calculation shown in the following formula (21) according to the phase shift amount θ input from the passing phase setting terminal 43, and the value is input to the variable gain amplifiers 51 and 52 as set gain information. G Q = cosθ, G I = sinθ (21)

[0058] Variable gain amplifier 51 adjusts the amplitudes of the first and second signals based on the input set gain information and outputs the adjusted signals. Variable gain amplifier 52 adjusts the amplitudes of the third and fourth signals based on the input set gain information and outputs the adjusted signals. The signals output by variable gain amplifier 51 and variable gain amplifier 52 are combined again and output from output terminal 42.

[0059] The phase shifter according to the sixth embodiment has a set gain G according to the phase setting. Q , G I Since no change in the passing phase occurs in response to a temperature change, the control unit does not need to have a correction table for that. Similarly, since no change in the passing phase occurs in response to a temperature change in the phase shifter according to the sixth embodiment, the control unit does not need to have a correction table for that. As a result, the phase shifter according to the sixth embodiment can be realized with a control unit having a small memory, and therefore it is possible to realize a small phase shifter and a radar device such as a small active electronically scanned array (AESA) antenna or a phased array antenna that includes the phase shifter.

[0060] Next, the hardware configuration of the control unit 11 according to the first to sixth embodiments and the control unit 54 according to the sixth embodiment will be described with reference to Figs. 8 and 9. Fig. 8 is a block diagram showing an example of the hardware configuration of the control unit 11 according to the first embodiment, and Fig. 9 is a block diagram showing an example of the hardware configuration of the control unit 11 according to the first embodiment, which is different from that shown in Fig. 8. For example, as shown in Fig. 8, the control unit 11 has a processor 11a, a memory 11b, and an I / O port 11c, and is configured so that the processor 11a reads and executes a program stored in the memory 11b. The memory 11b may be, for example, a non-volatile or volatile semiconductor memory such as a RAM, a ROM, a flash memory, an EPROM, or an EEPROM. The memory 11b may also be a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, a DVD, or the like. The memory 11b may also be an HDD or an SSD.

[0061] 6, the control unit 11 has a processing circuit 11d, which is dedicated hardware, and an I / O port 11c. The processing circuit 11d is configured, for example, by a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, a system LSI (Large-Scale Integration), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination of these. Each function of the control unit 11 is realized by the processor 11a or the processing circuit 11d, which is dedicated hardware, executing a program, which is software, firmware, or a combination of software and firmware.

[0062] The hardware configurations of the control unit 11 according to the second to sixth embodiments and the control unit 54 according to the sixth embodiment are similar to that of the control unit 11 according to the first embodiment, and therefore will not be described.

[0063] In addition, the present disclosure allows free combinations of the respective embodiments, or modifications of any of the components of the respective embodiments, or omission of any of the components of the respective embodiments. [Industrial Applicability]

[0064] A variable gain amplifier according to the present disclosure can be used, for example, for beamforming in a phased array antenna.

[0065] Various aspects of the present disclosure are summarized below as appendices.

[0066] (Appendix 1) A first input terminal; A second input terminal; A power terminal, A ground terminal; a first transistor having a base terminal connected to the first input terminal and an emitter terminal connected to the ground terminal; a second transistor having a base terminal connected to the second input terminal, an emitter terminal connected to the ground terminal, and a collector terminal connected to the collector terminal of the first transistor; a third transistor having a base terminal connected to the first input terminal and an emitter terminal connected to the ground terminal; a fourth transistor having a base terminal connected to the second input terminal, an emitter terminal connected to the ground terminal, and a collector terminal connected to the collector terminal of the third transistor; a first reference current transistor that is diode-connected and connected to the first transistor and the fourth transistor such that the first transistor and the fourth transistor form a current mirror; a second reference current transistor that is diode-connected and connected to the second transistor and the third transistor such that the second transistor and the third transistor form a current mirror; a first load connected between the collector terminal of the first transistor and the collector terminal of the second transistor and the power supply terminal; a second load connected between the collector terminal of the third transistor and the collector terminal of the fourth transistor and the power supply terminal; a first output terminal connected to the first load; a second output terminal connected to the second load; a first variable impedance circuit connected between one of the power supply terminal and the ground terminal and one of the first input terminal and the first output terminal; One of the power supply terminal and the ground terminal, the second input terminal and the Second a second variable impedance circuit connected between the first output terminal and the second output terminal; acquiring setting gain information relating to a gain setting, and outputting currents to the first reference current transistor and the second reference current transistor based on the setting gain information so that a sum of a current value to the first reference current transistor and a current value to the second reference current transistor is constant; the first reference current transistor and the current value to the second reference current transistora control unit that outputs a voltage obtained by multiplying an absolute value of a difference between a current value to the first variable impedance circuit and a current value to the second variable impedance circuit by a coefficient, Based on a positive-phase signal being input to the first input terminal and an inverse phase signal of the positive-phase signal being input to the second input terminal, a positive-phase signal amplified according to the set gain information is output from the first output terminal, and an inverse phase signal amplified according to the set gain information is output from the second output terminal. A variable gain amplifier comprising: (Appendix 2) a third variable impedance circuit connected between the first output terminal and one of the power supply terminal and the ground terminal; a fourth variable impedance circuit connected between the second output terminal and one of the power supply terminal and the ground terminal. 2. The variable gain amplifier according to claim 1. (Appendix 3) the first variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the first input terminal; the second variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the second input terminal. 2. The variable gain amplifier according to claim 1. (Appendix 4) the first variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the first output terminal, the second variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the second output terminal. 2. The variable gain amplifier according to claim 1. (Appendix 5) A first variable gain amplifier which is a variable gain amplifier according to any one of claims 1 to 4; A second variable gain amplifier, which is a variable gain amplifier according to any one of claims 1 to 4; an IQ generation circuit that outputs, based on an input signal, a first signal which is an in-phase signal of the input signal and a second signal which is an in-phase signal of the input signal to the first variable gain amplifier, and outputs a third signal which is a quadrature signal of the input signal and a fourth signal which is an in-phase signal of the quadrature signal to the second variable gain amplifier; a signal output from the first variable gain amplifier based on the first signal and the second signal being input, and a signal output from the second variable gain amplifier based on the third signal and the fourth signal being input, the signal being outputted by the second variable gain amplifier being combined and outputted. A phase shifter characterized by: [Explanation of symbols]

[0067] 1 RF signal positive phase input terminal (first input terminal) , 2 RF signal inverted phase input terminal (second input terminal) , 3 RF signal positive phase output terminal (first output terminal) , 4 RF signal inverted phase output terminal (second output terminal) , 5 power terminal , 6 Amplitude control signal input terminal , 11 Control section , 21 transistor (first transistor) , 22 transistor (second transistor) , 23 transistor (third transistor) , 24 transistor (4th transistor) , 25 transistors (second reference current transistors) , 26 transistor (first reference current transistor) , 27, 28 Load , 31 variable impedance element (first variable impedance circuit) , 32 variable impedance element (second variable impedance circuit) , 33, 34 Coupling elements , 35 varactor element (first variable impedance circuit) , 36 Varactor element (second variable impedance circuit) , 41 input terminal , 42 output terminal , 43 Pass phase setting terminal , 51, 52 Variable Gain Amplifier , 53 IQ generation circuit , 54 control section.

Claims

1. A first input terminal; A second input terminal; A power terminal, A ground terminal; a first transistor having a base terminal connected to the first input terminal and an emitter terminal connected to the ground terminal; a second transistor having a base terminal connected to the second input terminal, an emitter terminal connected to the ground terminal, and a collector terminal connected to the collector terminal of the first transistor; a third transistor having a base terminal connected to the first input terminal and an emitter terminal connected to the ground terminal; a fourth transistor having a base terminal connected to the second input terminal, an emitter terminal connected to the ground terminal, and a collector terminal connected to the collector terminal of the third transistor; a first reference current transistor that is diode-connected and connected to the first transistor and the fourth transistor such that the first transistor and the fourth transistor form a current mirror; a second reference current transistor that is diode-connected and connected to the second transistor and the third transistor such that the second transistor and the third transistor form a current mirror; a first load connected between the collector terminal of the first transistor and the collector terminal of the second transistor and the power supply terminal; a second load connected between the collector terminal of the third transistor and the collector terminal of the fourth transistor and the power supply terminal; a first output terminal connected to the first load; a second output terminal connected to the second load; a first variable impedance circuit connected between one of the power supply terminal and the ground terminal and one of the first input terminal and the first output terminal; a second variable impedance circuit connected between one of the power supply terminal and the ground terminal and one of the second input terminal and the second output terminal; a control unit that acquires setting gain information related to gain setting, outputs currents to the first reference current transistor and the second reference current transistor based on the setting gain information so that a sum of a current value to the first reference current transistor and a current value to the second reference current transistor is constant, and outputs a voltage obtained by multiplying an absolute value of a difference between the current value to the first reference current transistor and the current value to the second reference current transistor by a coefficient to the first variable impedance circuit and the second variable impedance circuit, A positive-phase signal is input to the first input terminal, and an inverse phase signal of the positive-phase signal is input to the second input terminal, based on which a positive-phase signal amplified according to the set gain information is output from the first output terminal, and an inverse phase signal amplified according to the set gain information is output from the second output terminal. A variable gain amplifier comprising:

2. a third variable impedance circuit connected between the first output terminal and one of the power supply terminal and the ground terminal; a fourth variable impedance circuit connected between the second output terminal and one of the power supply terminal and the ground terminal.

2. The variable gain amplifier according to claim 1.

3. the first variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the first input terminal; the second variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the second input terminal; 2. The variable gain amplifier according to claim 1.

4. the first variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the first output terminal, the second variable impedance circuit is connected between one of the power supply terminal and the ground terminal and the second output terminal.

2. The variable gain amplifier according to claim 1.

5. A first variable gain amplifier, which is a variable gain amplifier according to any one of claims 1 to 4; A second variable gain amplifier, which is a variable gain amplifier according to any one of claims 1 to 4; an IQ generation circuit that outputs, based on an input signal, a first signal which is an in-phase signal of the input signal and a second signal which is an in-phase signal of the input signal to the first variable gain amplifier, and outputs a third signal which is a quadrature signal of the input signal and a fourth signal which is an in-phase signal of the quadrature signal to the second variable gain amplifier; a signal output from the first variable gain amplifier based on the input of the first signal and the second signal and a signal output from the second variable gain amplifier based on the input of the third signal and the fourth signal are mixed and output. A phase shifter characterized by:

Images