Wafer edge evaluation method

Abstract

To provide an evaluation method for a wafer end face part capable of more highly accurately evaluating a contact flaw caused by a contact with an external object in an end face part of a wafer.SOLUTION: An evaluation method for a wafer end face part includes: an epitaxial growth step of growing an epitaxial layer from a flat surface of a wafer to the end face part and, in a case where a contact flaw caused by a contact with an external object exists in the end face part of the wafer, generating a lamination defect with the contact flaw defined as a starting point in the epitaxial layer; an observation step of observing a surface of the epitaxial layer in the end face part of the wafer and grasping at least one of the presence / absence and a degree of the lamination defect as an observation result; and an evaluation step of evaluating at least one of the presence / absence and a degree of the contact flaw in the end face part of the wafer.SELECTED DRAWING: Figure 8

Description

[Technical field]

[0001] The present invention relates to a method for evaluating a wafer edge portion, and more particularly to a method for evaluating contact scratches on the wafer edge portion caused by contact with an external object. [Background technology]

[0002] In various processes such as inter-process transfer and batch cleaning in the wafer manufacturing process, the peripheral edge of the wafer comes into contact with various external objects such as the wafer holder of various processing equipment and the wafer holder of a robot arm for wafer transfer, and contact scratches may be introduced to the wafer edge due to the contact with the external objects. Due to the miniaturization of device structures and the increase in the number of chips obtained per wafer, the quality required for the wafer edge is becoming higher and higher. In addition, in device processes, there is a problem that film peeling and dust generation may occur due to contact scratches on the wafer edge. Furthermore, it has been pointed out that the contact scratches on the edge may cause crack extension or wafer cracking during heat treatment. Therefore, a method for evaluating the presence and degree of contact scratches on the wafer edge caused by contact with external objects with high accuracy is required.

[0003] Patent Document 1 describes a method for observing and imaging the edge surface of a wafer using a total of three CCD cameras, each of which observes the top surface, side surface, and bottom surface of the edge surface of the wafer, and evaluating contact scratches on the edge surface of the wafer caused by contact with an external object based on the imaging results. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2003-139523 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, as a result of the inventors' investigation, it was found that the method of Patent Document 1 cannot visually recognize contact scratches with small unevenness on the wafer edge. Due to the advancement of the wafer manufacturing process, the contact scratches caused by contact with an external object on the wafer edge tend to have small unevenness. Therefore, the inventors recognized the problem that the method of Patent Document 1 cannot evaluate the contact scratches caused by contact with an external object on the wafer edge with sufficient accuracy.

[0006] In view of the above problems, the present invention aims to provide a method for evaluating a wafer edge portion that is capable of evaluating contact scratches on the edge portion of a wafer caused by contact with an external object with higher accuracy. [Means for solving the problem]

[0007] In order to solve the above problems, the present inventors have conducted extensive research and have found that (A) By growing an epitaxial layer from the flat surface to the edge portion of the wafer, stacking faults can be generated in the epitaxial layer starting from contact scratches present on the edge portion of the wafer due to contact with an external object; (B) Even if the contact scratches cannot be directly observed by observing the edge of the wafer, the stacking faults can be observed by observing the surface of the epitaxial layer, so that contact scratches with small irregularities can be evaluated with high accuracy. I gained the following insight.

[0008] Also, (C) The amount of damage introduced by ion implantation differs between the contact scratch area and normal area on the edge of the wafer. Therefore, by implanting ions into the edge of the wafer prior to epitaxial growth, the contact scratches can be emphasized. As a result, contact scratches with smaller unevenness can be evaluated with high accuracy. I gained the following insight.

[0009] The present invention, which has been completed based on the above findings, has the following essential features. [1] an epitaxial growth step of growing an epitaxial layer from a flat surface to an edge portion of a wafer, and generating stacking faults in the epitaxial layer originating from the contact scratches when the edge portion of the wafer has contact scratches caused by contact with an external object; an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result; an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results; The method for evaluating a wafer edge portion includes the steps of:

[0010] [2] The method for evaluating a wafer edge portion according to the above [1], further comprising a step of implanting ions into the edge portion of the wafer prior to the epitaxial growth step.

[0011] [3] The method for evaluating a wafer edge portion according to the above-mentioned [2], wherein the ions include one or more selected from a monomer ion consisting of one type selected from B, P, As, C, and Si, and a cluster ion containing carbon and hydrogen.

[0012] [4] The method for evaluating a wafer end surface according to any one of [1] to [3] above, wherein in the epitaxial growth process, the thickness of the epitaxial layer on the flat surface adjacent to the end surface of the wafer is set to 5 μm or more.

[0013] [5] A method for evaluating a wafer edge portion according to any one of [1] to [4] above, wherein the observation step comprises: (I) observation and image acquisition using an imaging device; or (II) magnified observation and image acquisition using a combination of a microscope and an imaging device.

[0014] [6] The method for evaluating a wafer edge portion described in [5] above, wherein the observation or the magnified observation, and the image acquisition are performed on the entire circumference of the edge portion of the wafer.

[0015] [7] The method for evaluating an end surface portion of a wafer according to any one of the above [1] to [6], wherein the wafer is a polished silicon wafer that has been subjected to at least one of a transport process in a state where the wafer is accommodated in a wafer storage container and a cleaning process using a batch-type cleaning apparatus. Effect of the Invention

[0016] According to the method for evaluating a wafer edge portion of the present invention, contact scratches on the wafer edge portion caused by contact with an external object can be evaluated with higher accuracy. [Brief description of the drawings]

[0017] [Figure 1] 1A to 1C are diagrams for explaining a method of observing a wafer edge portion in a conventional method and an embodiment of the present invention for evaluating a wafer edge portion. [Diagram 2] FIG. 1 is a diagram illustrating an experimental flow of Example 1. [Diagram 3] 3A and 3B are diagrams showing a state in which wafers are accommodated in the FOSB in the first embodiment, in which (a) shows a state in which the lid is open, and (b) shows a state in which the lid is closed. [Figure 4] 4 is a diagram showing a contact state between a wafer holder in a FOSB and an edge portion of a wafer in the first embodiment. FIG. [Diagram 5] 1 shows the results of observing the entire circumference of a wafer end surface according to a comparative example of Example 1. [Figure 6] 1 shows the results of observing the entire circumference of a wafer end surface according to the first embodiment of the present invention. [Figure 7] 1 shows the results of evaluation of contact scratches in the comparative example and the inventive example of Example 1. [Figure 8] 4A to 4C are diagrams for explaining the mechanism by which contact scratches become apparent due to epitaxial growth in Example 1. [Figure 9] FIG. 13 is a diagram illustrating the experimental flow of Example 2. [Figure 10] FIG. 11 is a diagram showing a wafer holder of a transfer robot arm and a cleaning tank in a cleaning apparatus according to a second embodiment. [Figure 11]13 is a diagram showing a contact state between a wafer holder of a transfer robot arm or a cleaning tank and an edge portion of a wafer in the second embodiment. FIG. [Figure 12] 13 shows the results of observing the entire circumference of a wafer end surface according to a comparative example of Example 2. [Figure 13] 13 shows the results of observing the entire circumference of a wafer end surface according to Example 2 of the present invention. [Figure 14] 1 shows the results of evaluation of contact scratches in the comparative example and the inventive example of Example 2. [Figure 15] 11A to 11C are diagrams for explaining the mechanism by which contact scratches become apparent due to ion implantation and epitaxial growth in Example 2. [Figure 16] FIG. 13 is a diagram illustrating the experimental flow of Example 3. [Figure 17] 13 is a graph showing the evaluation results of contact scratches in Example 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] A method for evaluating a wafer end surface according to an embodiment of the present invention includes the steps of: an epitaxial growth step of growing an epitaxial layer from the flat surface to an end surface of the wafer, and generating stacking faults in the epitaxial layer starting from the contact scratches when the end surface of the wafer has contact scratches caused by contact with an external object; an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result; an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results; has.

[0019] In addition, a method for evaluating a wafer end surface according to another embodiment of the present invention includes a step of implanting ions into the end surface of the wafer prior to the epitaxial growth step. That is, the ion implantation step is an optional step in the present invention, and an embodiment in which the ion implantation step is not implemented also constitutes the present invention. However, the method for evaluating a wafer end surface in an embodiment includes the following steps: implanting ions into an edge portion of the wafer; an epitaxial growth step of growing an epitaxial layer from the flat surface to an end surface of the wafer, and generating stacking faults in the epitaxial layer starting from the contact scratches when the end surface of the wafer has contact scratches caused by contact with an external object; an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result; an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results; has.

[0020] [Wafer] In this embodiment, the wafer to be evaluated may be a polished wafer obtained by polishing a wafer cut from a single crystal ingot with abrasive grains, performing a surface treatment by a chemical method, and performing chemical-mechanical polishing using an abrasive grain liquid, or may be an annealed wafer obtained by further performing an annealing treatment. These wafers are preferably single crystal silicon wafers.

[0021] Contact scratches caused by contact with external objects are likely to occur during the process of transporting wafers contained in a wafer container and during the process of cleaning wafers using a batch-type cleaning device.

[0022] Regarding the transport step, for example, when a wafer is stored or transported between processes in a storage container called a FOUP (Front Opening Unified Pod), contact between a wafer holder of the FOUP and a wafer end surface may cause contact scratches on the wafer end surface. Also, regarding the transport step, for example, when a wafer is shipped or transported in a storage container called a FOSB (Front Opening Shipping Box), contact between a wafer holder of the FOSB and a wafer end surface may cause contact scratches on the wafer end surface.

[0023] In addition, in the wafer cleaning process, when the wafer is transferred into the cleaning tank of the batch cleaning apparatus by the transfer robot arm, the wafer holder of the transfer robot arm comes into contact with the wafer end surface, which may cause contact scratches to be introduced to the wafer end surface. In addition, in the wafer cleaning process, when the wafer is fixed in the cleaning tank, the wafer holder in the cleaning tank comes into contact with the wafer end surface, which may cause contact scratches to be introduced to the wafer end surface.

[0024] In view of the above, in this embodiment, the wafer to be evaluated is preferably a polished silicon wafer that has been subjected to at least one of a transport process in a state where it is accommodated in a wafer accommodation container and a cleaning process using a batch-type cleaning device.

[0025] [Ion implantation process] In this embodiment, it is preferable to perform a step of implanting ions into the edge of the wafer prior to the epitaxial growth step described below. The amount of damage caused by ion implantation differs between the contact scratch area and the normal area on the edge of the wafer. Therefore, by implanting ions into the edge of the wafer prior to the epitaxial growth step, the contact scratches can be emphasized, and as a result, contact scratches with smaller unevenness can be evaluated with high accuracy.

[0026] As shown in FIG. 15, the ion implantation process is performed by irradiating ions from one of a pair of flat surfaces (front and back) of a wafer toward the front surface of the wafer. Here, the "front surface" of the wafer is the surface on which a semiconductor device is manufactured or a heterogeneous substrate is attached, and the "back surface" of the wafer is the flat surface opposite to the front surface. An identifier (laser mark) recording product information is engraved on the front surface or back surface of the wafer. Therefore, the front surface and back surface of the wafer are clearly distinguished. The end surface of the wafer is the outer periphery connecting the front surface and back surface of the wafer, and is composed of an "end surface side surface" including the outermost periphery of the wafer, an "end surface upper surface" on the front surface side of the end surface side, and an "end surface lower surface" on the back surface side of the end surface side. Here, the outermost periphery of the wafer is located at the intersection of the thickness center line of the wafer and the end surface of the wafer in a cross section including the center of the wafer flat surface and perpendicular to the wafer flat surface. The "side edge" of a wafer is defined as the edge portion of the wafer located within ±10% of the wafer thickness, centered on the centerline of the wafer thickness, in a cross section that includes the center of the wafer's flat surface and is perpendicular to the wafer's flat surface.

[0027] The ion implantation process is performed by irradiating ions from one side (front side) of the wafer toward the wafer surface. This makes it possible to emphasize the contact scratches located on the "upper end face" of the wafer end face, as shown in Figure 15.

[0028] The ions to be implanted preferably include at least one selected from monomer ions consisting of one selected from B, P, As, C, and Si, and cluster ions containing carbon and hydrogen.

[0029] The acceleration voltage of the monomer ions is generally set to 150 to 2000 keV / atom, and may be set appropriately within this range. The dose of the monomer ions is not particularly limited, but may be set to, for example, 1×10 13 atoms / cm 2 More than 1×10 16 atoms / cm 2From the viewpoint of emphasizing the contact scratches, the following range can be set: 5×10 14 atoms / cm 2 It is preferable that the concentration is 1×10 or more. 15 atoms / cm 2 More preferably, it is equal to or greater than this.

[0030] The "cluster ions" in this specification are obtained by bombarding gaseous molecules with electrons to dissociate the bonds of the gaseous molecules to form atomic aggregates with various numbers of atoms, ionizing the atomic aggregates by fragmentation, and performing mass separation of the ionized atomic aggregates with various numbers of atoms to extract ionized atomic aggregates with specific mass numbers. That is, the "cluster ions" in this specification are ionized clusters formed by aggregating multiple atoms into a mass by giving them a positive or negative charge, and are clearly distinguished from monoatomic ions such as carbon ions and monomolecular ions such as carbon monoxide ions. The number of atoms constituting a cluster ion is usually about 5 to 100. For example, CLARIS (registered trademark) manufactured by Nissin Ion Equipment Co., Ltd. can be used as a cluster ion implantation device using such a principle.

[0031] The irradiation conditions of the cluster ions include the constituent elements of the cluster ions, the dose of the cluster ions, the cluster size, the acceleration voltage of the cluster ions, and the beam current value.

[0032] The constituent elements of the cluster ions preferably contain carbon and hydrogen, and more preferably consist of carbon and hydrogen.

[0033] The gaseous molecules that are the source of cluster ions are not particularly limited as long as they can produce cluster ions of the desired size. For example, cyclohexane (C6H 12 ) as the source gas, cluster ions consisting of carbon and hydrogen can be generated and extracted. 16 H 10 ), dibenzyl (C14 H 14 Cluster C was generated using the raw materials n H m (3≦n≦16, 3≦m≦10, n and m are both integers) is preferably used because it is easy to control a small-sized cluster ion beam.

[0034] The cluster size can be appropriately set to 2 to 100, preferably 60 or less, more preferably 50 or less. In this specification, "cluster size" means the number of atoms constituting one cluster ion. In the experimental example described later, C3H5 with a cluster size of 8 was used. The cluster size can be adjusted by adjusting the gas pressure of the gas ejected from the nozzle, the pressure of the vacuum vessel, the voltage applied to the filament during ionization, etc. The cluster size can be obtained by determining the cluster number distribution by mass analysis using a quadrupole high-frequency electric field or time-of-flight mass analysis, and calculating the average value of the cluster number.

[0035] The dose of the cluster ions can be adjusted by controlling the ion irradiation time. The dose of each element constituting the cluster ions depends on the cluster ion species and the dose of the cluster ions (ions / cm 2 In this embodiment, the dose of carbon is not particularly limited and is generally 1×10 14 atoms / cm 2 More than 1×10 16 atoms / cm 2 From the viewpoint of emphasizing the contact scratches, the following range can be set: 5×10 14 atoms / cm 2 It is preferable that the concentration is 1×10 or more. 15 atoms / cm 2 More preferably, it is equal to or greater than this.

[0036] The acceleration voltage of the cluster ions can be more than 0 keV / ion and less than 200 keV / ion, preferably 100 keV / ion or less, and more preferably 80 keV / ion or less. The acceleration voltage of the cluster ions can be more than 0 keV / atom and 50 keV / atom or less, preferably 40 keV / atom or less per carbon atom. Two methods are generally used to adjust the acceleration voltage: (1) electrostatic acceleration and (2) radio frequency acceleration. The former method is a method in which multiple electrodes are arranged at equal intervals and equal voltages are applied between them to create a uniform acceleration electric field in the axial direction. The latter method is a linear linac method in which ions are accelerated using radio frequency while running in a straight line.

[0037] The beam current value of the cluster ions is not particularly limited, but can be appropriately determined, for example, within the range of 50 to 5000 μA. The beam current value of the cluster ions can be adjusted, for example, by changing the decomposition conditions of the raw material gas in the ion source.

[0038] [Epitaxial growth process] In this embodiment, it is important to perform an epitaxial growth step in which an epitaxial layer is grown from the flat surface (front surface) of the wafer to the end surface without performing the ion implantation step (see FIG. 8) or preferably after performing the ion implantation step (see FIG. 15). As a result, as shown in FIGS. 8 and 15, when contact scratches caused by contact with an external object exist on the end surface of the wafer, stacking faults originating from the contact scratches can be generated in the epitaxial layer. That is, the contact scratches existing on the end surface of the wafer can be made apparent as stacking faults on the surface of the epitaxial layer.

[0039] As shown in Figures 8 and 15, in the epitaxial growth process, an epitaxial layer is grown from the flat surface (front surface) of the wafer to the edge surface. Specifically, an epitaxial layer is formed on the "edge upper surface" and "edge side surface" of the wafer edge surface. An epitaxial layer is not formed on the "edge lower surface" of the wafer edge surface. For this reason, for example, as shown in Figure 8, contact scratches located on at least one of the "edge upper surface" and "edge side surface" of the wafer edge surface can be made visible as stacking faults.

[0040] 15, the ion implantation process can be performed to emphasize the contact scratches located on the "upper surface" of the wafer edge, and then the epitaxial growth process can be performed. In this case, even if the contact scratches are smaller in unevenness, the contact scratches can be made visible as stacking faults.

[0041] The epitaxial layer is preferably a silicon epitaxial layer. The silicon epitaxial layer can be formed under general conditions. For example, hydrogen is used as a carrier gas, and source gases such as dichlorosilane and trichlorosilane are introduced into a chamber. Although the growth temperature varies depending on the source gas used, epitaxial growth can be performed on a wafer by a CVD method at a temperature in the range of about 1000 to 1200°C.

[0042] From the viewpoint of making contact scratches present on the edge of the wafer manifest as stacking faults on the surface of the epitaxial layer, in the epitaxial growth step, the thickness of the epitaxial layer on the flat surface (front surface) adjacent to the edge of the wafer is preferably 5 μm or more, more preferably 10 μm or more. On the other hand, since the size of stacking faults is proportional to the thickness of the epitaxial layer, when the epitaxial layer is extremely thick, it becomes difficult to evaluate the degree of the contact scratches that are the origin of the stacking faults, so it is preferable to make the thickness of the epitaxial layer on the flat surface (front surface) adjacent to the edge of the wafer 50 μm or less.

[0043] [Observation process] In the observation step, the surface of the epitaxial layer at the end face of the wafer is observed to grasp at least one of the presence or absence and the degree of the stacking faults as the observation result. In the observation step, it is preferable to (I) perform observation and image acquisition using an imaging device, or (II) perform magnified observation and image acquisition using a combination of a microscope and an imaging device. The imaging device is not particularly limited, but examples thereof include a CCD image sensor and a CMOS image sensor. The microscope is not particularly limited, and either an optical microscope or an electron microscope can be used, but it is preferable to use an optical microscope. It is preferable that the observation and image acquisition using the imaging device, and the magnified observation and image acquisition using an optical microscope incorporating an imaging device are performed on the entire circumference of the end face of the wafer. That is, it is preferable to use a CCD image sensor or an optical microscope to acquire an image of the entire circumference of the end face of the wafer.

[0044] [Evaluation process] In the evaluation step, at least one of the presence or absence and the degree of contact scratches on the edge of the wafer is evaluated based on the observation results. For example, when there are no stacking faults on the surface of the epitaxial layer, it can be evaluated that there are no contact scratches on the edge of the wafer, and when there are stacking faults on the surface of the epitaxial layer, it can be evaluated that there are contact scratches on the edge of the wafer. In addition, the number, density, area, etc. of stacking faults in a specific region or the entire periphery region of the surface of the epitaxial layer can be obtained, and the degree of contact scratches on the edge of the wafer can be evaluated based on the number, density, area, etc. of these stacking faults.

[0045] According to the method for evaluating a wafer edge portion according to the present embodiment described above, contact scratches on the wafer edge portion caused by contact with an external object can be evaluated with high accuracy. EXAMPLES

[0046] Example 1 The experimental flow of Example 1 is shown in Figure 2. The samples are eight polished silicon wafers that have been subjected to general wafer processing. The samples are immediately after polishing, and no contact scratches with other equipment have been formed on the edge surfaces. First, the notch position is rotated 90°, and the eight samples are placed in a Front-Opening Shipping Box (FOSB). The lid of the FOSB is repeatedly opened and closed as shown in Figures 3(a) and (b), so that the samples are pressed in multiple times and brought into contact with the wafer holder in the FOSB, introducing contact scratches on the edge surfaces of the samples. Contact with the wafer holder in the FOSB resulted in contact scratches on the side of the edge surfaces of the samples, as shown in Figure 4.

[0047] After that, as an evaluation of a comparative example, the end face was inspected by a CCD camera. The end face was inspected by measuring the entire circumference (observing and photographing the entire circumference of the end face) using a wafer end face inspection device as shown in Figure 1.

[0048] Then, as an evaluation of the invention example, an epitaxial layer was grown from the front surface of the sample to the end face, and the end face was again measured all around (observed and photographed all around) using the same inspection device. Epitaxial growth was performed at a growth rate of 1.0 μm / min at a temperature of 1120°C using SiHCl3 as source gas. The epitaxial layer had a thickness of 10 μm on the flat part, dopant type: phosphorus, and resistivity: 10 Ω·cm.

[0049] [Evaluation Results] The results of evaluation of the same contact scratch by the comparative example and the example of the invention are shown in Figures 5 and 6. In the evaluation by the comparative example, no contact scratches were detected, but in the evaluation by the example of the invention, the length and shape of the contact scratches could be confirmed. Figure 7 shows the locations of contact scratches around the entire circumference measured by the evaluation by the comparative example and the example of the invention. Figure 7 shows eight samples superimposed when the notch position is set to the circumferential position of 0°. As shown in Figure 7, in the evaluation by the comparative example, no contact scratches were detected around the entire circumference, but in the evaluation by the example of the invention, it was confirmed that the contact scratches were formed at the position where the notch position was rotated 90° and contacted with the wafer holder in the FOSB. It is believed that the contact scratches formed on the side of the end face due to contact with the wafer holder in the FOSB became apparent as stacking faults during epitaxial growth, as shown in Figure 8.

[0050] Example 2 The experimental flow of Example 2 is shown in FIG. 9. The samples are 13 polished silicon wafers that have been subjected to general wafer processing. The samples are immediately after polishing, and no contact scratches with other equipment have been formed on the edge surfaces. First, in order to intentionally introduce contact scratches on the edge surfaces of the 13 sample wafers, the samples were placed in the cleaning tank of a batch-type cleaning machine by a transfer robot arm as shown in FIG. 10, and then the operation of removing the samples from the cleaning tank by the transfer robot arm (emphasized transfer) was repeated three times. The wafer holder of the transfer robot arm and the wafer holder of the cleaning tank have grooves engraved on them, and the wafer edge surfaces are held by being inserted into the grooves. Therefore, by repeatedly transferring the wafers, contact scratches were formed on the upper and lower end surfaces of the sample wafers as shown in FIG. 11.

[0051] After that, as an evaluation of a comparative example, the end face was inspected by a CCD camera. The end face was inspected by measuring the entire circumference (observing and photographing the entire circumference of the end face) using a wafer end face inspection device as shown in Figure 1.

[0052] Furthermore, as an evaluation of the invention example, ion implantation and epitaxial growth were performed on the sample, and the end face was again measured (observed and photographed) using the same inspection device. The ion implantation was performed with the following ion implantation species: C3H5, and carbon dose: 1.0×10 15 atoms / cm 2 The conditions were: acceleration voltage: 80 keV, beam current: 850 μA, tilt: 0°, twist: 0°. Epitaxial growth was performed at a growth rate of 1.0 μm / min at a temperature of 1120°C using SiHCl3 as the source gas. The epitaxial layer had a thickness of 10 μm on the flat part, dopant species: phosphorus, and resistivity: 10 Ω·cm.

[0053] [Evaluation Results] The results of evaluation of the same contact scratches by the comparative example and the inventive example are shown in Figs. 12 and 13. In the comparative example, almost no contact scratches were detected, but in the inventive example, the length and shape of the contact scratches could be confirmed. Fig. 14 shows the locations of contact scratches around the circumference measured by the comparative example and the inventive example. Fig. 14 shows the overlap of 13 samples when the notch position is set to the circumferential position of 0°. As shown in Fig. 14, in the comparative example, almost no contact scratches were detected, but in the inventive example, it was confirmed that contact scratches were formed at positions corresponding to the wafer holder of the transfer robot arm and the wafer holder of the cleaning tank. It is considered that the contact scratches formed on the upper surface of the end face were accentuated by the implantation damage of ion implantation, as shown in Fig. 15, and became apparent as stacking faults during epitaxial growth.

[0054] Example 3 The experimental flow of Example 3 is shown in FIG. 16. The samples were 10 polished silicon wafers that had been subjected to general wafer processing. The samples were immediately after polishing, and no contact scratches with other equipment were formed on the edge surface. As in Example 2, in order to intentionally introduce contact scratches on the edge surface, the transfer operation was repeated multiple times using the transfer robot arm and cleaning tank of the batch cleaning machine. The operation of placing the sample in the cleaning tank of the batch cleaning machine by the transfer robot arm and then removing it from the cleaning tank by the transfer robot arm (highlighted transfer) was repeated three times.

[0055] Thereafter, as an evaluation of the comparative example, the entire circumference of the end face was measured (observation and image capture of the entire circumference of the end face) using an optical microscope.

[0056] Furthermore, as an evaluation of invention examples 1 and 2, ion implantation and epitaxial growth were performed on the samples, and the end face was again measured all around (observed and photographed all around) using an optical microscope. The ion implantation was performed with the following ion implantation species: C3H5, and the implanted carbon dose: 5.0×10 for invention example 1. 14 atoms / cm 2 , and 1.0×10 in Example 2 15 atoms / cm 2 The conditions were: acceleration voltage: 80 keV, beam current: 850 μA, tilt: 0°, twist: 0°. Epitaxial growth was performed at a growth rate of 1.0 μm / min at a temperature of 1120°C using SiHCl3 as the source gas. The epitaxial layer had a thickness of 10 μm on the flat part, dopant species: phosphorus, and resistivity: 10 Ω·cm.

[0057] [Evaluation Results] 17 shows the total circumferential area (average value per wafer) of contact scratches detected in the comparative example and invention examples 1 and 2. No contact scratches were detected in the comparative example, but contact scratches were detected in invention examples 1 and 2. In addition, comparing invention examples 1 and 2, it can be seen that contact scratches could be evaluated with higher sensitivity in invention example 2, which had a higher dose implantation condition. [Industrial Applicability]

[0058] According to the method for evaluating a wafer edge portion of the present invention, contact scratches on the wafer edge portion caused by contact with an external object can be evaluated with higher accuracy.

Claims

1. A process for implanting ions into an edge portion of a wafer; Next, an epitaxial growth step is performed in which an epitaxial layer is grown from the flat surface to the end surface of the wafer, and when a contact scratch due to contact with an external object is present on the end surface of the wafer, stacking faults are generated in the epitaxial layer starting from the contact scratch; an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result; an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results; The method for evaluating a wafer edge portion includes the steps of:

2. 2. The method for evaluating a wafer end surface according to claim 1, wherein the ions include at least one selected from the group consisting of monomer ions consisting of one selected from B, P, As, C, and Si, and cluster ions containing carbon and hydrogen.

3. 3. The method for evaluating a wafer end surface according to claim 1, wherein in the epitaxial growth step, a thickness of the epitaxial layer on the flat surface adjacent to the end surface of the wafer is set to 5 μm or more.

4. The method for evaluating a wafer end surface according to any one of claims 1 to 3, wherein the observation step includes (I) observation and image acquisition using an imaging device, or (II) magnified observation and image acquisition using a combination of a microscope and an imaging device.

5. The method for evaluating a wafer edge portion according to claim 4 , wherein the observation or the magnified observation and the image acquisition are performed on an entire circumference of the edge portion of the wafer.

6. 6. The method for evaluating an end surface portion of a wafer according to claim 1, wherein the wafer is a polished silicon wafer that has been subjected to at least one of a transport step in a state where the wafer is accommodated in a wafer accommodation container and a cleaning step using a batch-type cleaning device.

7. An epitaxial growth process in which an epitaxial layer is grown from a flat surface to an end surface of a wafer, and when a contact scratch due to contact with an external object is present on the end surface of the wafer, stacking faults are generated in the epitaxial layer starting from the contact scratch; an observation step of observing a surface of the epitaxial layer at the end face of the wafer to grasp at least one of the presence or absence and the degree of the stacking faults as an observation result; an evaluation step of evaluating at least one of the presence or absence and the degree of the contact scratches on the edge surface of the wafer based on the observation results; having In the observation step, (I) observation and image acquisition are performed using an imaging device, or (II) magnified observation and image acquisition are performed using a combination of a microscope and an imaging device, The method for evaluating a wafer edge portion, wherein the observation or the magnified observation, and the image acquisition are performed on an entire circumference of the edge portion of the wafer.

Images