Chamber Deposition and Etch Process

Abstract

An exemplary method of semiconductor processing may include depositing a material on a substrate mounted on a substrate support housed in a processing region of a semiconductor processing chamber. The processing region may be at least partially defined by a substrate support and a faceplate. The substrate support may be at a first position within the processing region relative to the faceplate. The method may include translating the substrate support to a second position relative to the faceplate. The method may include forming a plasma of an etchant precursor within the processing region of the semiconductor processing chamber. The method may include etching an edge region of the substrate.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of priority to U.S. patent application Ser. No. 16 / 700,758, filed Dec. 2, 2019, the contents of which are incorporated by reference in their entirety for all purposes.

[0002] Technical Field

[0002] The present technology relates to semiconductor processing methods and components. More particularly, the present technology relates to systems and methods for manufacturing hardmask films. [Background technology]

[0003] background

[0003] Integrated circuits are made possible by processes that produce intricately patterned layers of material on a substrate surface. Fabricating patterned materials on a substrate requires controlled methods for forming and removing materials. As device sizes continue to shrink, the aspect ratios of structures can become large, and maintaining the dimensions of these structures during removal operations can be difficult. To facilitate the patterning of materials on a substrate, hard masks can be used. As the number of material layers to be patterned increases, the use of hard masks and selectivity to multiple materials becomes more important.

[0004]

[0004] Therefore, there is a need for improved systems and methods that can be used to manufacture high quality devices and structures. These and other needs are addressed by the present technique. Summary of the Invention

[0005]

[0005] An exemplary method of semiconductor processing may include depositing material on a substrate mounted on a substrate support contained in a processing region of a semiconductor processing chamber. The processing region may be defined at least in part by a substrate support and a faceplate. The substrate support may be at a first position in the processing region relative to the faceplate. The method may include translating the substrate support to a second position relative to the faceplate. The method may include forming a plasma of an etchant precursor in the processing region of the semiconductor processing chamber. The method may include etching an edge region of the substrate.

[0006] In some embodiments, the depositing may include delivering a carbon-containing precursor to a processing region of a semiconductor processing chamber. The depositing may include forming a plasma of the carbon-containing precursor and depositing the carbon-containing material on the substrate. The etchant precursor may be or may include an oxygen-containing precursor. The distance between the substrate support and the faceplate at the second position may be less than the distance between the substrate support and the faceplate at the first position. When the substrate support is in the second position, a surface of the substrate facing the faceplate may be located about 5 mm or less from the faceplate. The substrate support may be characterized by a recessed ledge at an outer edge of the substrate support. The surface of the substrate support facing the faceplate at the recessed ledge may be located about 2 mm or more from the faceplate when the substrate support is in the second position. The forming of the plasma of the etchant precursor may include forming an annular plasma around an edge region of the substrate support. The method of performing an etch substantially limited to a distance extending about 50 mm or less from an outer edge of the substrate.

[0007]

[0007] Some embodiments of the present technique may include a semiconductor processing method. The method may include depositing material on a substrate mounted on a substrate support contained in a processing region of a semiconductor processing chamber. The processing region may be defined at least in part by a substrate support and a faceplate. The substrate support may be characterized by a recessed ledge at an outer edge of the substrate support. The method may include lifting the substrate support to a position where a surface of the substrate facing the faceplate is positioned about 5 mm or less from the faceplate. The method may include forming a plasma of an etchant precursor in the processing region of the semiconductor processing chamber. The method may include etching an edge region of the substrate while substantially maintaining material deposited in a central region of the substrate.

[0008] In some embodiments, the material deposited on the substrate may be or may include a carbon-containing hard mask. Forming a plasma of an etchant precursor may include flowing an oxygen-containing precursor into a processing region of a semiconductor processing chamber. The method may include forming a plasma of an oxygen-containing precursor and etching the material deposited on the substrate with plasma effluents of the oxygen-containing precursor. By raising the substrate support, a surface of the substrate facing the faceplate may be positioned about 2 mm or less from the faceplate. Forming a plasma of an etchant precursor may include forming an annular plasma around an edge region of the substrate support. The method of performing an etch substantially limited to a distance extending about 50 mm or less from an outer edge of the substrate, wherein etching the edge region of the substrate. The method may include reducing pressure in the semiconductor processing chamber to purge the processing region of the semiconductor processing chamber following depositing the material. The substrate support may be characterized by a tilt during deposition, and the method may include leveling the substrate support such that the substrate is substantially parallel to the faceplate.

[0009]

[0009] Some embodiments of the present technique may include a semiconductor processing method. The method may include forming a plasma of a carbon-containing precursor in a processing region of a semiconductor processing chamber. The processing region may be defined at least in part by a substrate support and a faceplate. The method may include depositing a carbon-containing material on a substrate disposed on the substrate support. The substrate support may be at a first position in the processing region relative to the faceplate. The method may include lifting the substrate support to a second position relative to the faceplate. The method may include forming an annular plasma of an oxygen-containing precursor in the processing region of the semiconductor processing chamber. The method may include etching an edge region of the substrate.

[0010] In some embodiments, the substrate support may include positioning tabs for maintaining the substrate on the substrate support. The substrate support may be characterized by a recessed ledge at an outer edge of the substrate support radially outward of an area where the substrate is placed. When the substrate support is in the second position, a surface of the substrate that faces the faceplate may be about 2 mm or less from the faceplate. When the substrate support is in the second position, a surface of the substrate that faces the faceplate at the recessed ledge may be about 2 mm or more from the faceplate.

[0011]

[0011] Such techniques may provide many advantages over conventional systems and techniques. For example, embodiments of the present technique may perform deposition and etching processes in a single processing chamber, thereby reducing processing queue times. Additionally, the present technique may reduce delamination of formed films by performing angled etches. These and other embodiments, along with many of their advantages and features, are described in more detail in conjunction with the following description and accompanying figures.

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and drawings. [Brief description of the drawings]

[0013] [Figure 1] 1 shows a schematic cross-sectional view of an exemplary plasma system in accordance with some embodiments of the present technique. [Diagram 2]

[0014] 1 illustrates operations in a semiconductor processing method according to some embodiments of the present technique. [Figure 3A]

[0015] 1 shows a schematic cross-sectional view of an exemplary plasma chamber during an exemplary deposition operation in accordance with some embodiments of the present technique. [Figure 3B]

[0016] 1 shows a schematic cross-sectional view of an exemplary plasma chamber during an exemplary etching operation in accordance with certain embodiments of the present technique. [Figure 4]

[0017] 1 shows a schematic top plan view of an exemplary substrate support, in accordance with some embodiments of the present technique; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014]

[0018] Some of the figures are included as schematic diagrams. It is understood that these figures are for illustrative purposes and should not be considered to be to scale unless specifically stated to be to scale. Furthermore, as schematic diagrams, the figures are provided to aid in understanding and may not include all aspects or information compared to realistic representations and may include exaggerated material for illustrative purposes.

[0015]

[0019] In the accompanying figures, similar components or features may have the same reference label. Additionally, various components of a similar type may be distinguished by tracing the reference numbers with a letter that distinguishes between the similar components. If only a first reference number is used in this specification, the description is applicable to any one of the similar components having the same first reference number, regardless of the letter.

[0016]

[0020] Plasma enhanced deposition processes can energize one or more constituent precursors to facilitate film formation on a substrate. Any number of material films can be produced to develop semiconductor structures, including conductive and dielectric films, as well as films that facilitate material translation and removal. For example, hard mask films can be formed to facilitate substrate patterning while protecting otherwise preserved underlying materials. In many processing chambers, several precursors can be mixed in a gas panel and delivered to a processing region of the chamber where a substrate can be placed. Within the processing region, a plasma can be ignited to generate materials for deposition. In the non-limiting example of a carbon-containing film, plasma deposition can also occur under relatively high temperatures, which can facilitate the adsorption of carbon radicals to the surface of the substrate.

[0017]

[0021] This type of deposition can produce a film that can extend to the edge region of the substrate and may also extend to the beveled outer edge of the substrate. This material can be characterized by reduced adhesion compared to material deposited on the bare substrate surface. Additionally, hydrogen can be incorporated into the film, which can further reduce adhesion during processing. Subsequent operations can include lithography, and in one non-limiting lithography technique, immersion lithography can be used. Immersion lithography can replace the air gap between the final lens of the tool and the substrate surface with a liquid medium with a refractive index greater than 1. The resolution of the technique can increase in air by a factor equal to the refractive index of the liquid. Some immersion lithography techniques may utilize purified water as the liquid medium. Aqueous media can be characterized by surface tension, which can further increase the chance of delamination of the hardmask film, which can be characterized by lower adhesion, such as around the beveled edges of the substrate.

[0018]

[0022] To limit this effect, an edge etch can be performed on the substrate to remove residual material on the bevel of the substrate. The process can be performed in a load lock or other etch chamber that etches the edge region after transferring the substrate with the deposited material from the deposition processing chamber. Since many platforms contain more deposition chambers than load locks, such an etch process can be limited. Additionally, multiple pump down operations can be performed to further slow substrate throughput.

[0019]

[0023] The present technique overcomes these problems by performing an in-situ etching process after deposition is completed. The present technique may, in some embodiments, utilize a modified substrate support, which may facilitate control of the etching plasma. Additionally, performing the etch immediately after deposition may solve the throughput issues of multi-chamber systems.

[0020]

[0024] While the remaining disclosure routinely identifies a particular deposition process utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to other deposition, etch, and cleaning chambers and processes that may occur in the described chambers. Thus, the technology should not be considered limited for use with only these particular deposition processes or chambers. This disclosure discusses one possible chamber that may be used to perform processes according to embodiments of the present technology before additional modifications and adjustments to this system according to embodiments of the present technology are described.

[0021]

[0025] FIG. 1 illustrates a cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technology. The diagram may provide an overview of a system that may incorporate one or more aspects of the present technology and / or be specifically configured to perform one or more operations according to embodiments of the present technology. Additional details of the chamber 100 or the method performed may be further described below. Although the chamber 100 may be utilized to form a film layer according to some embodiments of the present technology, it should be understood that the method may be similarly performed in any chamber in which film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a lid assembly 106 coupled with the chamber body 102 and enclosing the substrate support 104 within a processing volume 120. The substrate 103 may be provided in the processing volume 120 through an opening 126, which may be sealed in a conventional manner for processing using a slit valve or door. The substrate 103 may be mounted on a surface 105 of the substrate support during processing. The substrate support 104 can be rotatable along an axis 147, as indicated by arrow 145, where the shaft 144 of the substrate support 104 can be disposed. Alternatively, the substrate support 104 can be elevated to rotate as needed during the deposition process.

[0022]

[0026] The plasma profile modulator 111 may be disposed within the processing chamber 100 to control the plasma distribution across the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 may include a first electrode 108 that may be disposed adjacent to the chamber body 102 and may separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or may be a separate sidewall electrode. For example, in some embodiments described further below, the first electrode 108 may be a faceplate. The first electrode 108 may be an annular or ring-shaped member and may be a ring electrode. The first electrode 108 may be a continuous loop around the circumference of the processing chamber 100 surrounding the processing region 120 or may be discontinuous at selected locations as needed. The first electrode 108 may also be a perforated electrode, such as a perforated ring or mesh electrode, or may be a plate electrode, such as a secondary gas distributor, for example.

[0023]

[0027] One or more isolators 110a, 110b, which may be a dielectric material such as a ceramic or metal oxide, e.g., aluminum oxide and / or aluminum nitride, may contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 may define an aperture 118 for distributing the process precursors to the processing region 120. The gas distributor 112 may be coupled to a first power source 142, such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source capable of being coupled to a process chamber. In some embodiments, the first power source 142 may be an RF power source.

[0024]

[0028] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed from conductive and non-conductive components. For example, the body of the gas distributor 112 can be conductive, while the faceplate of the gas distributor 112 can be non-conductive. The gas distributor 112 can be powered, for example, by a first power source 142 as shown in FIG. 1, or the gas distributor 112 can be coupled to ground in some embodiments.

[0025]

[0029] The first electrode 108 can be coupled to a first conditioning circuit 128 that can control the ground path of the processing chamber 100. The first conditioning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 can be or include a variable capacitor or other circuit element. The first conditioning circuit 128 can be or include one or more inductors 132. The first conditioning circuit 128 can be any circuit that allows for a variable or controllable impedance under the plasma conditions present in the processing region 120 during processing. In some illustrated embodiments, the first conditioning circuit 128 can include a first circuit leg and a second circuit leg coupled in parallel between ground and the first electronic sensor 130. The first circuit leg can include a first inductor 132A. The second circuit leg can include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B can be disposed between the first electronic controller 134 and a node connecting both the first and second circuit legs to the first electronic sensor 130. The first electronic sensor 130 can be a voltage or current sensor and can be coupled to the first electronic controller 134, which can allow for some closed-loop control of the plasma conditions in the processing region 120.

[0026]

[0030] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded in the substrate support 104 or coupled to a surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed arrangement of conductive elements. The second electrode 122 may be a conditioning electrode and may be coupled to a second conditioning circuit 136 by a conduit 146, such as a cable with a selected resistance, such as, for example, 50 ohms, disposed on a shaft 144 of the substrate support 104. The second conditioning circuit 136 may include a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage or current sensor and may be coupled to the second electronic controller 140 to further control the plasma conditions in the processing region 120.

[0027]

[0031] A third electrode 124, which may be a bias electrode and / or an electrostatic chucking electrode, may be coupled to the substrate support 104. The third electrode may be coupled to a second power source 150 through a filter 148, which may be an impedance matching circuit. The second power source 150 may be DC power, pulsed DC power, RF bias power, pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second power source 150 may be RF bias power.

[0028]

[0032] The lid assembly 106 and substrate support 104 of FIG. 1 can be used with any processing chamber for plasma or thermal processing. During operation, the processing chamber 100 can provide real-time control of plasma conditions in the processing region 120. The substrate 103 can be placed on the substrate support 104, and process gases can flow through the lid assembly 106 using the inlet 114 according to any desired flow plan. The gases can exit the processing chamber 100 through the outlet 152. Power can be coupled with the gas distributor 112 to establish a plasma in the processing region 120. In some embodiments, the substrate can be subjected to an electrical bias using the third electrode 124.

[0029]

[0033] Upon energizing the plasma in the process volume 120, a potential difference may be established between the plasma and the first electrode 108. A potential difference may also be established between the plasma and the second electrode 122. The electronic controllers 134, 140 may then be used to adjust the flow characteristics of the ground paths represented by the two adjustment circuits 128 and 136. Set points may be provided to the first adjustment circuit 128 and the second adjustment circuit 136 to provide independent control of the deposition rate and center-to-edge plasma density uniformity. In an embodiment where the electronic controllers can both be variable capacitors, the electronic sensor may adjust the variable capacitors to maximize the deposition rate and independently minimize the thickness non-uniformity.

[0030]

[0034] Each of the conditioning circuits 128, 136 may have a variable impedance that can be adjusted using the respective electronic controller 134, 140. If the electronic controller 134, 140 is a variable capacitor, the capacitance range of each variable capacitor and the inductance of the first inductor 132A and the second inductor 132B may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, and the capacitance range of each variable capacitor may be minimum. Thus, when the capacitance of the first electronic controller 134 is minimum or maximum, the impedance of the first conditioning circuit 128 may be high, resulting in a plasma shape with minimum aerial or lateral reach on the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first conditioning circuit 128, the aerial reach of the plasma is maximized, effectively covering the entire working area of ​​the substrate support 104. As the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may shrink from the chamber walls and the aerial coverage of the substrate support may decrease. The second electronic controller 140 may have a similar effect, increasing and decreasing the aerial coverage of the plasma above the substrate support as the capacitance of the second electronic controller 140 may change.

[0031]

[0035] The electronic sensors 130, 138 may be used to regulate the respective circuits 128, 136 in a closed loop. Depending on the sensor type used, a current or voltage set point may be attached to each sensor, which may be equipped with control software that determines adjustments to the respective electronic controllers 134, 140 to minimize deviations from the set point. As a result, the plasma shape may be selected and dynamically controlled during processing. Although the above discussion is based on the electronic controllers 134, 140 being variable capacitors, it should be understood that any electronic component with adjustable characteristics may be used to provide adjustable impedance to the regulation circuits 128 and 136.

[0032]

[0036] FIG. 2 illustrates exemplary operations in a processing method 200 according to some embodiments of the present technique. The method can be performed in a variety of processing chambers, including the processing chamber 100 described above. The method 200 can include several optional operations that may or may not be specifically associated with some embodiments of the method according to the present technique. For example, many of the operations are described to provide a broader scope of structure formation, but are not critical to the technique or may be performed by alternative methodologies as will be readily understood. The method 200 can describe operations shown as being performed in a processing chamber 300 as shown generally in FIGS. 3A-3B, which will be described in conjunction with the operations of the method 200. The chamber 300 can include any aspect of the chamber 100 described above. It should be understood that the figures show only partial schematic views, and that the substrate can include any number of structural sections having aspects as shown in the figures, as well as alternative structural aspects that can still benefit from the operations of the present technique.

[0033]

[0037] Method 200 may include additional operations prior to the commencement of the listed operations. For example, the additional processing operations may include forming structures on a semiconductor substrate, which may include both the formation and removal of materials. Pre-processing operations may be performed in the chamber in which method 200 may be performed, or processing may be performed in one or more other processing chambers prior to delivering the substrate to the semiconductor processing chamber in which method 200 may be performed. In either case, method 200 may optionally include delivering a semiconductor substrate to a processing region of a semiconductor processing chamber, such as processing chamber 100 described above, or other chamber, which may include the components described above. The substrate may be deposited on a substrate support, which may be a pedestal, such as substrate support 104, which may be present in a processing region of a chamber, such as processing region 120 described above. An exemplary substrate 305 is shown in FIG. 3A and may be or include aspects of a substrate on which operations according to the present technology may be performed.

[0034]

[0038] The substrate 305 may be any number of materials on which materials may be deposited. The substrate may be or include silicon, germanium, a dielectric material including silicon oxide or silicon nitride, a metallic material, or any number of combinations of these materials, which may be the substrate 305 or a material formed on the substrate 305. The chamber 300 may include a processing chamber including a faceplate 310 to which precursors may be delivered for processing and which may be coupled to a power source to generate a plasma in a processing region of the chamber. The chamber may also include a chamber body 315 which may include sidewalls and a base as shown. The pedestal or substrate support 310 may extend through the base of the chamber as previously described. The processing region may be at least partially defined between the pedestal, the faceplate, and / or the chamber walls. The substrate support may include a support platen 325 which may support the semiconductor substrate 305. The support platen 325 may be coupled to a shaft 330 which may extend through the base of the chamber.

[0035]

[0039] The method 200 may include a number of operations to prepare the chamber for processing, and forming a hard mask film, or other deposition operations, although any other deposition process may be encompassed by the present technology as well. In operation 205, a material may be deposited on a substrate. During deposition, the substrate support 310 may be positioned at a first position, which may be a first vertical position relative to the faceplate 310. The position may be any distance from the faceplate that facilitates the generation of a plasma across the substrate support, as shown in the figure. The substrate may also be tilted in some operations, which may facilitate improved uniformity for characterizing the chamber. The first position of the substrate may be at a height configured to generate a plasma volume 340 between the faceplate and the substrate support, where a capacitively coupled plasma may be generated.

[0036]

[0040] In one non-limiting embodiment, the deposition can be a hardmask deposition, such as in the case of a carbon-containing hardmask. A carbon-containing precursor can be delivered to the processing region, and a plasma can be generated to generate carbon-containing radicals, which can be deposited or adsorbed on the substrate to generate a carbon-containing film, such as a hardmask. Any carbon-containing material can be used for the deposition, and the carbon-containing precursor can be or include any alkane, alkene, or any other carbon-containing material. The precursor can include a carbon-hydrogen-containing precursor, which can include any amount of carbon and hydrogen bonds. In some embodiments, the carbon-containing precursor can be comprised of carbon-carbon bonds and carbon-hydrogen bonds. The deposition can occur uniformly or relatively uniformly on the substrate, and can extend to the edge region, including over or up to the bevel edge of the substrate. The deposition can be performed at any number of processing conditions, which can be adjusted based on the particular deposition being performed. For example, in the case of a carbon-containing hardmask, the process can occur at temperatures of about 600° C. or higher, about 650° C. or higher, or higher. Further, the pressure within the chamber can be maintained between about 1 and about 20 Torr, which can include any smaller range within this range, such as, for example, about 3 to about 9 Torr.

[0037]

[0041] Following deposition, which may be performed to any thickness, in optional operation 210, the chamber may be pumped down to remove residual deposition precursors or deposition by-products. For example, the chamber may be pumped down to about 3 Torr or less, about 2 Torr or less, about 1 Torr or less, or less to evacuate residual materials. Additionally, a planarization operation may be performed to make the substrate parallel or substantially parallel to the faceplate, such as when the substrate was tilted during deposition. Substantially parallel means that perfect parallelism may not be achievable based on machine tolerances, and tolerances are included in the term to account for slight deviations from a perfect plane relative to the faceplate. The substrate support platen 325 and substrate may be leveled in optional operation 215, which may facilitate subsequent translational movements.

[0038]

[0042] In operation 220, the substrate support can be translated vertically. For example, the substrate support can be raised toward the faceplate 310 and moved from a first position to a second position relative to the faceplate. The second position can be closer to the faceplate in some embodiments, such as a distance shorter than the distance between the substrate support and the faceplate when the support is in the first position, as shown in FIG. 3B. As described further below, this distance can be sufficient to limit plasma generation between the substrate and the faceplate. To initiate the etching process, an etchant precursor can be flowed into the chamber. Depending on the material to be etched, any number of etchant materials can be used in embodiments. For example, for carbon-containing films, an oxygen-containing precursor can be flowed into the chamber and used as the etchant. The oxygen-containing precursors used in any operation as described throughout the present technique can include O2, N2O, NO2, O3, H2O, ozone, as well as any other oxygen-containing precursor that can be used in film etching or other film conversion or removal operations. In some embodiments, a remote plasma may not be formed from an etchant precursor. When a remote plasma is generated, the plasma effluent may flow through the chamber components and may be distributed evenly across the substrate, which may etch the film in the center area as much or more than in the edge areas where angle etching may be desired.

[0039]

[0043] In operation 225, a plasma may be generated from the etchant precursor in the processing region of the chamber. For example, in the case of an oxygen-containing precursor, the oxygen-containing precursor may flow into the processing region of the chamber through the faceplate. The plasma may impinge on the oxygen-containing precursor, although this may be affected by the position of the substrate support. The two plasma electrodes may be or may include the faceplate and the substrate support. For example, the faceplate may operate as a powered RF electrode, while in some embodiments the substrate support may operate as a hot electrode relative to the faceplate. As previously mentioned, the substrate support may be positioned away from the substrate to limit plasma generation. A capacitively coupled plasma may be generated between two electrodes that may be spaced apart beyond the distance of the plasma sheath. In a capacitive plasma, each electrode may form a plasma sheath at the transition between the bulk region space and the solid surface of the electrode. Below a distance of a few Debye lengths to accommodate coverage, plasma may not be formed. Thus, by positioning the substrate at a distance less than a few Debye lengths, plasma may not be generated between the substrate and the faceplate.

[0040]

[0044] Thus, in some embodiments, when the substrate support is in the second position, the surface of the substrate facing the faceplate can be positioned about 5 mm or less from the faceplate, about 4 mm or less, about 3 mm or less, about 2 mm or less, 1 mm or less, or less from the faceplate. Depending on the dynamics of the chamber, a plasma sheath can form across the substrate at a distance of about 0.5 mm or more to about 1 mm from each electrode, such that the total distance between the electrodes is between about 1 mm and about 2 mm. As a result, by maintaining the substrate at this distance or within that range, plasma may not be generated between the substrate and the faceplate.

[0041]

[0045] However, for planar substrate supports or substrate supports with recessed pockets or edge rings, by positioning the substrate support closer to the faceplate, plasma may not be generated in the region at all. Thus, in some embodiments, the substrate support may be characterized by a recessed ledge at the edge region of the support, as shown. By creating an edge distance that may extend beyond several Debye lengths, plasma may form around the edge region while being restricted from the central region. As a result, etching may be performed around the bevel and / or edge region of the substrate while substantially maintaining the remainder of the formed film. The formed plasma may be characterized by an annular shape extending around the substrate, and edge material may be etched in operation 230.

[0042]

[0046] As described above, to generate a plasma, the distance between the recessed ledge and the faceplate can be sufficient to generate a plasma while the substrate support is in the second position. Thus, the recess can be about 1 mm or more, about 2 mm or more, about 3 mm or more, about 4 mm or more, or more. As shown in FIG. 3B, the recessed ledge 345 can extend sufficiently from the faceplate such that an annular or other shaped plasma 350 can form around the substrate support. This can etch the bevel of the substrate and remove the overhang of the deposited film. Furthermore, by increasing the distance between the substrate and the substrate support, the generated plasma can extend at least partially radially inward, which allows for controlled elongation of the etch at the edge region of the substrate. For example, etching can be performed at a distance of about 50 mm or less from the outer edge of the substrate, and can be controlled to a distance of about 45 mm or less, about 40 mm or less, about 35 mm or less, about 30 mm or less, about 25 mm or less, about 20 mm or less, about 15 mm or less, about 10 mm or less, about 5 mm or less, about 2 mm or less, or less than that. The plasma may diffuse to the center due to density gradients, but rarely reaches the center or exceeds the nominal etching of the bulk film produced.

[0043]

[0047] FIG. 4 shows a schematic top plan view of an exemplary substrate support 400 according to some embodiments of the present technique. The substrate support 400 may be an additional view of any substrate support discussed elsewhere and may be included in any of the chambers discussed or any other chamber that may be used in semiconductor processing. As shown, the substrate support 400 may mount a substrate 402 in a central region 405 of the support. A recessed ledge 410 may extend around the substrate support to generate a plasma generation region for bevel etching. As shown, the recessed ledge 410 may extend a distance outward from the substrate and may extend from the edge of the substrate by about 5 mm or more, about 10 mm or more, about 15 mm or more, about 20 mm or more, about 25 mm or more, about 30 mm or more, or more.

[0044]

[0048] Many substrate supports include a pocket or edge ring for the wafer, both of which can provide positional advantages among other benefits. For example, without proper mounting or components to maintain the position of the substrate during evacuation and repressurization of the chamber, the substrate may shift or float on the substrate support, which can affect process uniformity on wafers offset from the central axis. By utilizing heaters with recessed ledges, sides such as edge rings or pockets may not be available. Thus, some embodiments of the present technology may incorporate positioning tabs 415, which can ensure that the substrate is maintained in place during processing, even with a recessed outer ledge. The tabs may be formed or encompassed and characterized by limited vertical extension to limit the impact on the etching process at the bevel. Thus, in some embodiments, the tabs can be characterized by a height above the surface to which the substrate is attached of about 20 mm or less, and can be characterized by a height from the surface of about 15 mm or less, about 12 mm or less, about 10 mm or less, about 9 mm or less, about 8 mm or less, about 7 mm or less, about 6 mm or less, about 5 mm or less, about 4 mm or less, about 3 mm or less, about 2 mm or less, or less. By including a recessed ledge on the substrate support, the present technique can allow for the generation of a controlled edge plasma and etch. Such a plasma can allow for the in-situ etch to be performed in the same chamber in which deposition was performed on the substrate.

[0045]

[0049] In the foregoing description, for purposes of explanation, numerous details are set forth in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to one skilled in the art that particular embodiments may be practiced without some of these details, or with additional details.

[0046]

[0050] Although several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the embodiments. Moreover, some well-known processes and elements have not been described in order to avoid unnecessarily obscuring the technology. Thus, the above description should not be construed as limiting the scope of the technology.

[0047]

[0051] Where a range of values ​​is presented, unless the context clearly dictates otherwise, it is understood that each intervening value between the upper and lower limits of that range is also specifically disclosed to the smallest unit of the unit of the lower limit. Any narrower range between any stated or unstated intervening value in a stated range, as well as any other stated or intervening value in that stated range, are also encompassed. The upper and lower limits of these smaller ranges may be individually included or excluded in the range, and each range in which either, neither, or both limits are included in the narrower range is also encompassed within the technology, subject to the specifically excluded limit in the stated range. Where a stated range includes one or both of the limits, ranges excluding either or both of the included limits are also included.

[0048]

[0052] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly indicates otherwise. Thus, for example, reference to "a precursor" includes a reference to a plurality of such precursors, reference to "a layer" includes a reference to one or more layers and equivalents thereof known to those skilled in the art, and so forth.

[0049]

[0053] Additionally, the terms "comprise(s)", "comprising", "contain(s)", "containing", "include(s)", and "including", when used in this specification and claims, are intended to specify the presence of stated features, integers, components, or steps, but do not exclude the presence or addition of one or more other features, integers, components, steps, operations, or groups.

Claims

1. depositing material onto a substrate mounted on a substrate support contained in a processing region of a semiconductor processing chamber, the processing region being at least partially defined by the substrate support and a faceplate, the substrate support being at a first position within the processing region relative to the faceplate; lifting the substrate support to a second position relative to the faceplate; forming a plasma of an etchant precursor in the processing region of the semiconductor processing chamber; and Etching an edge region of the substrate. A semiconductor processing method comprising:

2. The depositing step comprises: delivering a carbon-containing precursor to the processing region of the semiconductor processing chamber; forming a plasma of the carbon-containing precursor; and depositing a carbon-containing material onto the substrate; 2. The semiconductor processing method of claim 1, comprising:

3. The semiconductor processing method of claim 2 , wherein the etchant precursor comprises an oxygen-containing precursor.

4. 2. The semiconductor processing method of claim 1, wherein a distance between the substrate support and the faceplate at the second position is less than a distance between the substrate support and the faceplate at the first position.

5. 2. The semiconductor processing method of claim 1, wherein when the substrate support is in the second position, a surface of the substrate facing the faceplate is positioned approximately 5 mm or less from the faceplate.

6. The semiconductor processing method of claim 1 , wherein the substrate support is characterized by a recessed ledge at an outer edge of the substrate support.

7. 7. The semiconductor processing method of claim 6, wherein when the substrate support is in the second position, a surface of the substrate support that faces the faceplate at the recessed ledge is positioned approximately 2 mm or more from the faceplate.

8. The semiconductor processing method of claim 1 , wherein forming the plasma of the etchant precursor comprises forming an annular plasma around an edge region of the substrate support.

9. 10. The semiconductor processing method of claim 8, wherein etching the edge region of the substrate performs an etch substantially limited to a distance extending from an outer edge of the substrate no more than about 50 mm.

10. depositing material onto a substrate mounted on a substrate support contained in a processing region of a semiconductor processing chamber, the processing region being defined at least in part by the substrate support and a faceplate, the substrate support being characterized by a recessed ledge at an outer edge of the substrate support; raising the substrate support to a position such that a surface of the substrate facing the faceplate is positioned no more than about 5 mm from the faceplate; forming a plasma of an etchant precursor in the processing region of the semiconductor processing chamber; and Etching an edge region of the substrate while substantially maintaining the material deposited on a central region of the substrate. A semiconductor processing method comprising:

11. 11. The semiconductor processing method of claim 10, wherein the material deposited on the substrate comprises a carbon-containing hardmask.

12. Forming a plasma of an etchant precursor includes: flowing an oxygen-containing precursor into the processing region of the semiconductor processing chamber; forming a plasma of the oxygen-containing precursor; and Etching the material deposited on the substrate with plasma effluents of the oxygen-containing precursor. The semiconductor processing method of claim 10 comprising:

13. 11. The semiconductor processing method of claim 10, wherein raising the substrate support positions the surface of the substrate facing the faceplate no more than about 2 mm from the faceplate.

14. The semiconductor processing method of claim 10 , wherein forming the plasma of the etchant precursor comprises forming an annular plasma around an edge region of the substrate support.

15. 15. The semiconductor processing method of claim 14, wherein etching the edge region of the substrate performs an etch substantially limited to a distance extending from an outer edge of the substrate no more than about 50 mm.

16. subsequent to depositing the material, reducing the pressure within the semiconductor processing chamber to purge the processing region of the semiconductor processing chamber. The semiconductor processing method of claim 10 further comprising:

17. The substrate support is characterized by tilt during deposition, and the method comprises: leveling the substrate support so that the substrate is substantially parallel to the faceplate; The semiconductor processing method of claim 10 further comprising:

18. forming a plasma of a carbon-containing precursor in a processing region of a semiconductor processing chamber, the processing region being defined at least in part by a substrate support and a faceplate; depositing a carbon-containing material on a substrate disposed on the substrate support, the substrate support being at a first position within the processing region relative to the faceplate; depositing a carbon-containing material on the substrate; lifting the substrate support to a second position relative to the faceplate; forming an annular plasma of an oxygen-containing precursor in the processing region of the semiconductor processing chamber; and Etching an edge region of the substrate. A semiconductor processing method comprising:

19. The semiconductor processing method of claim 18 , wherein the substrate support includes positioning tabs for maintaining the substrate on the substrate support.

20. 20. The semiconductor processing method of claim 18, wherein the substrate support is characterized by a recessed ledge at an outer edge of the substrate support radially outward of a region on which the substrate is disposed, a surface of the substrate facing the faceplate being about 2 mm or less from the faceplate when the substrate support is in the second position, and a surface of the substrate support facing the faceplate at the recessed ledge being about 2 mm or more from the faceplate when the substrate support is in the second position.

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