Method and apparatus for process kit centering measurement

Abstract

To provide methods and apparatuses for measuring process kit centering.SOLUTION: In a processing tool used in semiconductor manufacturing, a sensor wafer 110 includes a substrate, and the substrate includes a first surface, a second surface opposite the first surface, and an edge surface between the first surface and the second surface. The sensor wafer further includes a plurality of edge sensor regions formed along the edge surface, and each sensor region includes a self-referencing capacitive sensor. A position of a process kit 125 in a chamber is determined by arranging the sensor wafer on a support surface 105, and a center-point offset distance D of a center line 1120 of the process kit relative to a center line 115 of the sensor wafer is determined from gap distances G1, G2.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Non-provisional Application No. 16 / 121,183, filed September 4, 2018, the entire contents of which are incorporated herein by reference.

[0002] FIELD OF THE DISCLOSURE

[0002] Embodiments relate to the field of semiconductor manufacturing, and more particularly to a method and apparatus for process kit centering measurements. [Background technology]

[0003] In processing a substrate, such as a semiconductor wafer, the substrate is placed on a support surface (e.g., an electrostatic chuck (ESC)) in a processing chamber. Typically, a process kit is positioned around the support surface to provide desired processing characteristics during substrate processing. The process kit fits loosely (with gaps) around the support surface to prevent the support surface or process kit from being damaged during installation or removal of the process kit. To provide the desired uniformity, the process kit needs to be precisely centered with respect to the substrate and the support surface.

[0004] Currently, the process kits are manually placed. Thus, centering of the process kits is currently susceptible to human error. After manual placement, various tests, such as etch rate tests or particle tests, may be performed to ensure that the process kits are properly centered. However, such tests are expensive and can take many hours to complete. Furthermore, if the process kit is found to be off-center, recovery times are significantly longer than if centering could be confirmed immediately after pump-down. Summary of the Invention

[0005] Embodiments disclosed herein include a sensor wafer. In one embodiment, the sensor wafer comprises a substrate, the substrate comprising a first surface, a second surface opposite the first surface, and an edge surface between the first surface and the second surface. In one embodiment, the sensor wafer further comprises a plurality of sensor regions formed along the edge surface, each sensor region comprising a self-referencing capacitive sensor.

[0006] The embodiments disclosed herein may also include a method of determining a position of a process kit in a chamber. In one embodiment, the method includes arranging the process kit in the chamber around a support surface. In one embodiment, the method may further include arranging a sensor wafer on the support surface, the sensor wafer including a first surface supported by the support surface, a second surface opposite the first surface, and an end surface connecting the first surface to the second surface, with a plurality of sensor regions formed on the end surface. In one embodiment, the method may further include determining a gap distance between each of the plurality of sensor regions and the surface of the process kit. In one embodiment, the method may further include determining a center point offset of a center point of the process kit relative to a center point of the sensor wafer from the gap distance.

[0007] The embodiments disclosed herein may also include a method of identifying a position of a process kit in a chamber. In one embodiment, the method includes arranging the process kit in the chamber around a support surface. In one embodiment, the method further includes arranging a sensor wafer on the support surface, the sensor wafer including a first surface supported by the support surface, a second surface opposite the first surface, and an end surface connecting the first surface to the second surface, a first plurality of sensor areas formed on the end surface, and a second plurality of sensor areas formed on the first surface. In one embodiment, the method further includes identifying a gap distance between each of the first plurality of sensor areas and the surface of the process kit. In one embodiment, the method further includes identifying a first center point offset from the gap distance, the first center point offset being an offset of a center point of the process kit relative to a center point of the sensor wafer. In one embodiment, the method further includes identifying a plurality of edge positions of the support surface using the second plurality of sensor areas. In one embodiment, the method further includes identifying a second center point offset using the multiple edge locations, the second center point offset being an offset of a center point of the support surface relative to a center point of the sensor wafer. [Brief description of the drawings]

[0008] [Figure 1] 1 is a cross-sectional schematic diagram of a processing tool having a sensor wafer for measuring offset of a process kit according to one embodiment. [Diagram 2] FIG. 2 is a top view of a sensor wafer having edge sensors according to one embodiment. [Diagram 3] FIG. 2 illustrates a perspective view of a sensor wafer having edge sensors according to one embodiment. [Figure 4A] FIG. 2 is a partial cross-sectional view of a sensor wafer having edge sensors according to one embodiment. [Figure 4B] 1 illustrates a partial cross-sectional view of a sensor wafer having edge sensors and electric field guards according to one embodiment. [Figure 4C] FIG. 2 is a partial cross-sectional view of a sensor wafer having an edge sensor and a top surface recess, according to one embodiment. [Diagram 5] 1 is a cross-sectional schematic diagram of a processing tool having a sensor wafer for measuring the offset of a process kit relative to the center of a support surface, according to one embodiment. [Figure 6A] 1 illustrates a plan view illustration of a bottom surface of a sensor wafer having a sensor area for measuring a position of the sensor wafer relative to a center of a support surface and an edge sensor area for measuring a position of a process kit, according to one embodiment. [Figure 6B] FIG. 2 is a partial cross-sectional view of a sensor wafer having a lower sensor region according to one embodiment. [Figure 7] 1 is a schematic diagram of a process tool and a placement controller for determining an offset of a process kit relative to a center of a support surface, according to one embodiment. [Figure 8] FIG. 13 is a flow diagram of a process for identifying the offset of a process kit relative to a sensor wafer, according to one embodiment. [Figure 9] FIG. 1 illustrates a flow diagram of a process for determining an offset of a process kit relative to a center of a support surface, according to one embodiment. [Figure 10] FIG. 1 illustrates a block diagram of an example computer system that may be used in conjunction with a process that includes identifying an offset of a process kit relative to a center of a support surface, according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] A system including a sensor wafer having an edge sensor and a method of using such a sensor wafer to perform centering measurements of a process kit are described according to various embodiments. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the embodiments. It will be apparent to one of ordinary skill in the art that the embodiments may be practiced without these specific details. In other instances, well-known aspects have not been described in detail so as not to unnecessarily obscure the embodiments. It should be further understood that the various embodiments illustrated in the accompanying figures are illustrative representations and are not necessarily drawn to scale.

[0010] As described above, process kits are currently manually installed and centered in a processing tool. To ensure that the process kit is properly centered with respect to the substrate, multiple substrates are processed in the processing tool to monitor etch rates and / or perform particle testing. Only after many substrates have been processed can it be determined that the process kit is properly centered. This process requires many hours of down time for the processing tool and is expensive.

[0011] Thus, the embodiments disclosed herein include a sensor wafer that can directly measure the offset of the process kit. Thus, a single test procedure may be performed after pump-down of the processing tool to ensure that the process kit is centered within a desired tolerance. If the position of the process kit is found to be outside of the desired tolerance, the process kit can be adjusted without the need for extensive testing. Thus, the embodiments disclosed herein result in reduced downtime of the processing tool, as the accuracy of the centering of the process kit may be improved, improving the uniformity of the process performed by the processing tool.

[0012] 1, a schematic cross-sectional view of a processing tool 100 is shown, according to one embodiment. In one embodiment, the processing tool 100 may include a support surface 105 for supporting a substrate to be processed in the processing tool 100. The support surface 105 may be any suitable support surface 105, such as an electrostatic chuck (ESC). In one embodiment, a process kit 125 may be disposed about the support surface 105. For example, the process kit 125 may be a ring that completely surrounds the support surface 125.

[0013] The process kit 125 may fit loosely (with gaps) around the support surface 105. As shown, the innermost surface 123 of the process kit 125 may have a diameter larger than the diameter of the outermost surface 103 of the support surface 105. Because the surfaces 103 and 123 are not in direct contact with each other, there is room for the process kit 125 to be off-center from the support surface 105.

[0014] As shown in FIG. 1, the sensor wafer 110 can be used to measure whether the process kit 125 is off-center. In one embodiment, the sensor wafer 110 may have substantially the same dimensions as a production wafer. For example, the sensor wafer 110 may have a diameter that is a standard wafer diameter (e.g., 300 mm, etc.). In FIG. 1, the sensor wafer 110 has an edge that is unevenly spaced relative to the process kit 125. For example, the gap G1 on the left side of FIG. 1 is smaller than the gap G2 on the right side of FIG. 1. The uneven gaps G1 and G2 result in the centerline 120 of the process kit 125 being offset from the centerline 115 of the sensor wafer 110 by a distance D. In FIG. 1, the centerline 115 of the sensor wafer is aligned with the center of the support surface 105, but the embodiment is not limited to such a configuration. FIG. 5, described below, illustrates a situation in which the centerline 115 of the sensor wafer is not aligned with the center of the support surface 105.

[0015] In one embodiment, the offset distance D may be determined by measuring the gap G between the edge of the sensor wafer 110 and the surface of the process kit 125 at multiple locations. In a particular embodiment, the gap G is measured at multiple sensor areas formed on the edge of the sensor wafer 110. Figures 2-4C provide exemplary illustrations of a sensor wafer 110 having edge sensor areas, according to various embodiments.

[0016] Referring now to FIG. 2, in accordance with one embodiment, a plurality of edge sensor regions 2351-235 n2 is a top view illustration of a sensor wafer 210 having an edge sensor region 235. In one embodiment, edge sensor regions 235 are distributed around the periphery of the sensor wafer 210. Each sensor region 235 comprises one or more sensors that are used to measure a gap between the edge of the sensor wafer 210 and a process kit (not shown) that surrounds the sensor wafer 210. One or more sensors in the edge sensor region 235 may be capacitive sensors. In certain embodiments, the edge sensor region 235 may comprise a self-referencing capacitive sensor.

[0017] In the illustrated embodiment, three edge sensor areas 235 are shown. However, it should be understood that more than two edge sensor areas 235 may be used to measure the offset of the center of the process kit relative to the center of the sensor wafer 210. One skilled in the art will recognize that providing more edge sensor areas 235 will provide a more accurate measurement.

[0018] In one embodiment, each of the edge sensor regions 235 may be communicatively coupled to a computing module 238 of the sensor wafer 210 using traces 237. In one embodiment, the computing module 238 may comprise one or more of a power source 232 (e.g., a battery), a processor / memory 234 (e.g., circuitry, memory, etc. for performing and / or storing measurements made using the edge sensor regions 235), and a wireless communication module 233 (e.g., Bluetooth, WiFi, etc.). In one embodiment, the computing module 238 may be embedded within the sensor wafer 210. Additionally, while the computing module 238 is shown in the center of the sensor wafer 210, it should be understood that the computing module 238 may be located at any convenient location within the sensor wafer 210.

[0019] 3, an illustration of a perspective view of a sensor wafer 310 highlighting details of an exemplary edge sensor region 335 is shown, according to one embodiment. In one embodiment, the sensor wafer 310 may include a first surface 311 (e.g., a top surface), a second surface 313 (e.g., a bottom surface), and an edge surface 312 connecting the first surface 311 to the second surface 313. In one embodiment, the edge sensor region 335 may be formed along the edge surface 312.

[0020] In a particular embodiment, the edge sensor region 335 may include a probe 341. The probe 341 (i.e., the probe in each edge sensor region) may be a self-referencing capacitive probe. That is, the output phase of the current supplied to a first probe 341 in a first edge sensor region 335 may be offset by 180 degrees from the output phase of the current supplied to a second probe 341 in an adjacent second edge sensor region 335. Thus, a measurement of the distance from the edge 312 to the surface of the process kit (not shown) may be made without requiring the process kit to be grounded. In the illustrated embodiment, the edge sensor region 335 is shown as having a single probe. However, in some embodiments, each edge sensor region 335 may include two or more probes 341. Although specific reference is made herein to a self-referencing capacitive sensor, it should be understood that the embodiments disclosed herein include any suitable sensor technology (e.g., laser sensors, optical sensors, etc.).

[0021] 4A-4C, exemplary partial cross-sectional views of a sensor wafer 410 are shown, according to various embodiments. In FIG. 4A, the partial cross-sectional view depicts a sensor region 435 that is substantially coplanar with an edge surface 412. In one embodiment, the sensor region 435 emits an electric field 449 from the edge surface 412 such that the sensor can measure the gap between the edge surface 412 and the surface of the process kit.

[0022] 4B, a partial cross-sectional view of a sensor wafer 410 having an electric field guard 447 is shown, according to one embodiment. In one embodiment, the electric field guard 447 may be a conductive layer formed between the underside 413 of the sensor wafer 410 and the edge sensor region 435. The electric field 449 at the edge sensor region 435 may be modified by the electric field guard 447. In particular, the electric field guard 447 may modify the electric field 449 at the edge sensor region 435 such that the electric field 449 extends laterally from the edge surface 412 toward the process kit. Thus, the electric field guard 447 prevents the sensors in the edge sensor region 435 from detecting objects below the sensor wafer 410, which may provide erroneous readings.

[0023] 4C, a partial cross-sectional view of a sensor wafer 410 having a top surface recess 448 is shown, according to one embodiment. In one embodiment, the top surface recess 448 can be formed in the first surface 411 directly adjacent the sensor region 435. The top surface recess 448 can be fabricated to prevent a sensor in the sensor region 435 from sensing the top surface 411 and providing an erroneous reading. In one embodiment, the top surface recess 448 can extend back a distance R. For example, the distance R can be approximately equal to the maximum sensing distance of the edge sensing region 435. For example, the distance R can be 2.0 mm or less.

[0024] 5, a cross-sectional schematic diagram of a processing tool 500 is shown, according to one embodiment. The processing tool 500 may be substantially similar to the processing tool 100 described above with respect to FIG. 1, except that a sensor wafer 510 provides the ability to determine the offset of a center point 520 of a process kit 525 relative to a center point 555 of a support surface 505.

[0025] In one such embodiment, the sensor wafer 510 can be used to measure a first offset D1 and a second offset D2. The first offset D1 is the offset of the centerline 515 of the sensor wafer 510 relative to the centerline 520 of the process kit 525. The first offset D1 may be determined by measuring the gap (e.g., G1 / G2) between the edge of the sensor wafer 510 and the surface of the process kit 525 with an edge sensor. The second offset D2 is the offset of the centerline 515 of the sensor wafer 510 relative to the centerline 555 of the support surface 505. The second offset D2 may be determined by detecting the edge position 501 of the edge surface 503 of the support surface 505 with a bottom facing sensor. In one embodiment, the offsets D1 and D2 may be added together to calculate a total offset D3 of the centerline of the process kit 525 relative to the centerline of the support surface 505.

[0026] Referring now to FIG. 6A, edge sensor areas 6351-635, according to one embodiment, n and lower sensor area 6651-665 n 6 shows an example of a plan view of the underside of a sensor wafer 610 having a top surface 665. Similar to sensor wafer 210, sensor wafer 610 may include a computing module 638 housing one or more of a power source 632, a processor / memory 638, and a wireless communication module 633. Computing module 638 may be communicatively coupled to edge sensor region 635 and bottom sensor region 665 by conductive traces 637.

[0027] In one embodiment, the edge sensor regions 6351-635 n may be substantially similar to the edge sensor area 235 described above. n may each include multiple sensors (e.g., capacitive sensors) configured to detect an edge of the support surface. By locating the edge of the support surface at multiple locations (e.g., three or more locations) relative to the sensor wafer 610, the center point of the support surface relative to the center point of the sensor wafer 610 can be identified.

[0028] 6B, a partial cross-sectional view of the sensor wafer 610 and a portion of the support surface 605 are shown, according to one embodiment. As shown, the lower sensor region 665 may be formed in a recess in the second surface 613 opposite the support surface 605. In one embodiment, the lower sensor region 665 may comprise an array of sensors (e.g., position sensors) that determine the spacing between the support surface 605 and the sensor region 665. Thus, at location 601, the array of sensors in the lower sensor region 665 will indicate that an edge 603 of the support surface is present, since there is no underlying surface detectable by the sensor region 665. The location of location 601 is known relative to the center of the sensor wafer 610. In that way, once three or more locations 601 are identified, the center point of the support surface 605 relative to the center point of the sensor wafer 610 can be calculated.

[0029] 7, a schematic block diagram of a processing tool 790 having a placement controller 770 for performing a process of measuring the position of a process kit 725 is shown, according to one embodiment. In one embodiment, the process kit 725 may be positioned within the processing tool 790 about a support surface 705. For example, the process kit 725 may be manually placed inside the processing tool 790.

[0030] In one embodiment, the placement controller 770 may provide instructions to a positioning robot 776 to place the sensor wafer 710 on the support surface 705 of the processing tool 790. The sensor wafer 710 may be a sensor wafer similar to the sensor wafers described above. For example, the sensor wafer 710 may be a sensor wafer having a gap G1-G2 between an edge of the sensor wafer 710 and an edge of the process kit 725. n The sensor wafer 710 may include a plurality of edge sensor regions for measuring the edge positions 7031-7033 of the support surface 705. n A plurality of lower sensor areas may also be provided for determining

[0031] In one embodiment, sensor information from the sensor wafer 710 may be acquired by a sensor interface 771 of the placement controller 770. For example, the sensor interface 771 may receive the sensor information from the sensor wafer 710 (e.g., wirelessly using a wireless communication module). The placement controller 790 may then receive the sensor information (e.g., edge positions 7031-7032) in the wafer center module 772. n ) can be used to identify the center point of the sensor wafer 710 relative to the center point of the support surface 705. The placement controller 790 uses the sensor information (e.g., gaps G1-G n ) may be utilized to identify the center point of the sensor wafer 710 relative to the center point of the process kit 725. The placement controller 770 may use results from the wafer center point module 772 and the process kit center point module 773 to generate an offset value 774 that is provided to a database 775. The offset value 774 may be a total offset of the process kit 725 relative to the support surface 705. In one embodiment, if the total offset value 774 exceeds a predetermined threshold, a warning may be generated indicating that the position of the process kit 725 needs to be realigned. For example, the predetermined threshold may be 200 microns or more, or 100 microns or more.

[0032] Referring now to FIG. 8, a flow diagram of a process 880 for identifying the center point of a process kit using a sensor wafer is shown, according to one embodiment.

[0033] In one embodiment, operation 880 begins with operation 881 which includes placing a sensor wafer having multiple edge sensor regions on a support surface. The sensor wafer may be any sensor wafer described according to embodiments disclosed herein. In one embodiment, the sensor wafer may be placed on the support surface using a positioning robot controlled by a placement controller, similar to the embodiment described in connection with FIG.

[0034] In one embodiment, operation 880 may continue with operation 882, which includes identifying a gap distance between the edge of the sensor wafer and the surface of the process kit using each of the multiple edge sensor regions. For example, the edge sensor regions may include self-referencing capacitive sensors. The edge sensor regions may have electric field guards below them to modify the electric field of the capacitive sensor. Further embodiments may include a top surface recess proximate the edge sensor regions to eliminate erroneous measurements of the top surface of the sensor wafer.

[0035] In one embodiment, operation 880 may continue with operation 883 which includes determining a center point offset of the process kit center point relative to the sensor wafer center point using the gap distances from the edge sensor regions. In one embodiment, the center point offset may be determined by the positioning controller and stored in a database. When the center point offset is greater than a predetermined threshold, in one embodiment, the process kit may be relocated.

[0036] Referring now to FIG. 9, a process flow diagram of a process 980 for identifying the center point of a process kit using a sensor wafer is shown, according to one embodiment.

[0037] In one embodiment, process 980 begins with operation 981, which includes placing a sensor wafer having a plurality of edge sensor regions and a plurality of bottom sensor regions on a support surface. The sensor wafer may be any sensor wafer described according to embodiments disclosed herein. For example, the sensor wafer may be similar to sensor wafer 610 shown in FIG. 6A.

[0038] In one embodiment, process 980 continues with operation 982 which includes determining multiple edge position measurements of the support surface using multiple lower sensor regions.

[0039] In one embodiment, operation 980 may continue with operation 983 which includes identifying a first center point offset of the center of the sensor wafer relative to the center of the support surface using the multiple edge position measurements.

[0040] In one embodiment, process 980 may continue with operation 984 which includes identifying a gap distance between the edge of the sensor wafer and a surface of the process kit using each of a plurality of edge sensor regions.

[0041] In one embodiment, process 980 may continue with operation 985, which includes identifying a second center point offset of the process kit center point relative to the sensor wafer center point using the gap distances from the multiple edge sensor regions.

[0042] Referring now to FIG. 10, a block diagram of an exemplary computer system 1060 of a processing tool is shown, according to one embodiment. In one embodiment, the computer system 1060 can be used as a placement controller. In one embodiment, the computer system 1060 is coupled to the processing tool and controls processing within the processing tool. The computer system 1060 can be connected (e.g., networked) to other machines in a network 1061 (e.g., a Local Area Network (LAN), an intranet, an extranet, or the Internet). The computer system 1060 can operate in the role of a server or a client machine in a client-server network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The computer system 1060 can be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile phone, a web appliance, a server, a network router, a switch, or a bridge, or any machine capable of executing a set of instructions (sequenced or otherwise) that specify operations to be performed by the machine. Additionally, although only a single machine is shown as computer system 1060, the term "machine" should also be interpreted to include any collection of machines (e.g., computers) that individually, or in concert, execute a set (or sets) of instructions to perform any one or more of the methods described herein.

[0043] The computer system 1060 may include a computer program product, or software 1022, having a non-transitory machine-readable medium having instructions stored thereon that may be used to program the computer system 1060 (or other electronic device) to perform processes according to embodiments. A machine-readable medium includes any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable (e.g., computer-readable) medium may include a machine (e.g., computer) readable storage medium (e.g., read only memory (ROM), random access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, etc.), a machine (e.g., computer) readable transmission medium (a propagated signal in electrical, optical, acoustic, or other form (e.g., infrared, digital, etc.)), etc.

[0044] In one embodiment, computer system 1060 includes a system processor 1002, a main memory 1004 (e.g., read only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM)), a static memory 1006 (e.g., flash memory, static random access memory (SRAM), etc.), and a secondary memory 1018 (e.g., data storage device), which communicate with each other via a bus 1030.

[0045] The system processor 1002 represents one or more general-purpose processing devices, such as a microsystem processor, a central processing unit, etc. More specifically, the system processor may be a complex instruction set computing (CISC) microsystem processor, a reduced instruction set computing (RISC) microsystem processor, a very long instruction word (VLIW) microsystem processor, a system processor that executes other instruction sets, or a system processor that executes a combination of instruction sets. The system processor 1002 may also be one or more special-purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal system processor (DSP), a network system processor, etc. The system processor 1002 is configured to implement processing logic 1026 for performing the operations described herein.

[0046] The computer system 1060 may further include a system network interface device 1008 for communicating with other devices or machines. The computer system 1060 may also include a video display unit 1010 (e.g., a liquid crystal display (LCD), a light emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 1012 (e.g., a keyboard), a cursor control device 1014 (e.g., a mouse), and a signal generating device 1016 (e.g., a speaker).

[0047] The secondary memory 1018 may include a machine-accessible storage medium 1031 (or more specifically a computer-readable storage medium) having stored thereon one or more sets of instructions (e.g., software 1022) that embody any one or more of the methods or functions described herein. This software 1022 may also reside, completely or at least partially, within the main memory 1004 and / or the system processor 1002 while being executed by the computer system 1060, with the main memory 1004 and the system processor 1002 also constituting machine-readable storage media. This software 1022 may further be transmitted or received over the network 1061 via the system network interface device 1008.

[0048] While an exemplary embodiment illustrates the machine-accessible storage medium 1031 as a single medium, the term "machine-readable storage medium" should be interpreted to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) on which one or more sets of instructions are stored. The term "machine-readable storage medium" should also be interpreted to include any medium capable of storing or encoding a set of instructions for execution by a machine and causing the machine to perform any one or more of the methods. Thus, the term "machine-readable storage medium" should be interpreted to include, but is not limited to, solid-state memories, optical media, and magnetic media.

[0049] In the foregoing specification, certain exemplary embodiments have been described. It will be apparent that various modifications to the exemplary embodiments may be made without departing from the scope of the following claims. The specification and drawings are therefore to be regarded as illustrative rather than restrictive.

Claims

1. a substrate including a first surface, a second surface opposite the first surface, and an edge between the first surface and the second surface; a plurality of sensors disposed at a first interval along the end surface, each sensor being a self-referenced capacitive sensor, each sensor comprising a first probe and a second probe adjacent to each other at a second interval smaller than the first interval, an output phase of the first probe being offset by 180 degrees from an output phase of the second probe; A sensor wafer comprising:

2. The sensor wafer of claim 1 , wherein the plurality of sensors comprises at least three sensors.

3. The sensor wafer of claim 1 further comprising a recess in the first surface of the substrate adjacent each sensor.

4. The sensor wafer of claim 3 , wherein the recess extends back from the edge surface at least 1.0 mm.

5. The sensor wafer of claim 1 further comprising a plurality of second sensors on the second surface of the substrate.

6. The sensor wafer of claim 5 , wherein the second sensor is recessed from the second surface.

7. The sensor wafer of claim 1 , further comprising an electric field guard beneath each of the plurality of sensors.

8. The sensor wafer of claim 1 , further comprising a computing module communicatively coupled to the plurality of sensors.

9. The sensor wafer of claim 8 , wherein the computing module comprises one or more of a power source, a processor, a memory, and a wireless communication module.

10. The sensor wafer of claim 1 , wherein the substrate has a diameter of 300 mm.

11. 1. A method for identifying a position of a process kit within a chamber, comprising: placing the process kit within the chamber about a support surface; placing a sensor wafer on the support surface, the sensor wafer comprising a substrate, the substrate including a first surface, a second surface opposite the first surface, and an edge surface between the first surface and the second surface, the sensor wafer further comprising a plurality of sensors disposed at a first interval along the edge surface, each sensor being a self-referencing capacitive sensor, the self-referencing capacitive sensor comprising a first probe and a second probe adjacent to each other at a second interval that is smaller than the first interval, an output phase of the first probe being offset by 180 degrees from an output phase of the second probe; determining a gap distance between each of the plurality of sensors and a surface of the process kit; determining a first center point offset of a center point of the process kit relative to a center point of the sensor wafer from the gap distance; A method comprising:

12. The method of claim 11 , further comprising determining a second center point offset, the second center point offset being an offset of the center point of the sensor wafer relative to a center point of the support surface.

13. The method of claim 12 , further comprising determining the second center point offset using a second sensor on the first surface of the sensor wafer.

14. The method of claim 13 , further comprising determining a total offset by adding the first center point offset to the second center point offset.

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