Manufacturing method of the circuit unit

Abstract

To improve mounting quality of an electronic component and secure current capacity.SOLUTION: A method of manufacturing a circuit unit includes: a first step of applying solder paste 40 to a region, in which a via hole 24 is not formed, of land parts 16a and 17a for loading a surface-mount type electronic component 20; a second step of mounting the surface-mount type electronic component; a third step of temporarily fixing the surface-mount type electronic component 20 to the land parts 16a and 17a; a fourth step of applying solder paste 50 to a region, in which the via hole 24 is formed, of a backside 11b of a mounting surface 11a of the surface-mount type electronic component 20; and a fifth step of fixing the surface-mount type electronic component 20 to a circuit board 10.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a circuit unit. [Background technology]

[0002] Generally, a multi-layer board using via holes is used as the board for the purpose of ensuring the current capacity of the mounted electronic components or improving the heat dissipation efficiency. In the manufacturing process of this type of board, molten solder may flow into the via hole, and the molten solder may harden on the back side, forming a so-called solder ball on the back side, which may then protrude from the back side.

[0003] As a solution to the above problems, for example, a method for manufacturing a printed circuit board has been disclosed in which a solder layer is formed to bring a heat dissipation soldering land and a heat sink into surface contact and adhere, and molten solder leaking to the other side through a via hole is caused to flow onto the solder absorption land and adhere to the opening in a flat shape thinner than the thickness of a metal mask that covers the solder resist surrounding the solder absorption land, a metal mask is placed on the solder resist surrounding the solder absorption land on the other side of the printed circuit board, cream solder is applied with a squeegee to the solder absorption land while covering the solder that has solidified at the opening of the via hole, and the cream solder is subjected to a second reflow to form a solder layer on the solder absorption land (see, for example, Patent Document 1).

[0004] Also, a circuit device is disclosed that includes a substrate having a first land portion, a second land portion, and a third land portion, and a via hole connecting the second land portion and the third land portion, and includes a first electronic component joined to the first land portion through a first solder portion. The substrate further includes a second solder portion joined to the second land portion and having a thickness dimension in the thickness direction of the substrate thinner than the first solder portion, and a third solder portion joined to the inner periphery of the via hole while inserted into the via hole, and the circuit device includes a second electronic component joined to the third land portion through a fourth solder portion and heavier than the first electronic component (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 5142119 [Patent Document 2] JP 2019-186397 A Summary of the Invention [Problem to be solved by the invention]

[0006] However, the technology described in Patent Document 1 is originally intended to improve the heat dissipation efficiency of electronic components. To achieve this purpose, a land part having as large a surface area as possible is provided on the back side of the surface on which the electronic components are mounted, and is electrically connected to the mounting surface of the electronic components by a via hole, and solder is fixed to the land part in order to prevent oxidation of the land part surface. In accordance with the well-known technology, solder balls generated on the back side of the electronic components are applied with cream solder during the mounting process of the electronic components, and the solder balls are eliminated by applying normal heating and cooling treatment to the cream solder. In other words, while the technology described in Patent Document 1 contributes to improving the heat dissipation efficiency of electronic components, when the objective is, for example, to ensure the current capacity of the electronic components, there is a problem in that the provision of a solder absorption land portion with a large surface area leads to a reduction in the mounting density of the electronic components and an increase in the size of the board.

[0007] The technology described in Patent Document 2 aims to prevent a heavy electronic component from falling off the board, and includes a first land portion on which a light first electronic component is placed and a second land portion on which no electronic component is placed, and a third land portion connected to the second land portion through a via hole and on which a second electronic component heavier than the first electronic component is placed, on one side of the circuit board. A series of reflow processes is performed from one side of the circuit board, and then a series of reflow processes is performed on the other side of the circuit board, thereby preventing the heavy second electronic component from falling off the board. In other words, by filling the via holes with solder during a series of reflow processes on one side of the circuit board, the intention is to prevent the molten solder applied to the third land portion from flowing out to the second land portion during a series of reflow processes on the other side of the circuit board. In addition, in a series of reflow processes on one side of the circuit board, a solder ball is formed in the third land portion, but the method for dealing with this is the same as the technique described in Patent Document 1, so the technique described in Patent Document 2 has the same issues as the technique described in Patent Document 1.

[0008] The present invention has been made in consideration of the above-mentioned problems, and has an object to provide a method for manufacturing a circuit unit that contributes to improving the mounting quality of electronic components and ensuring current capacity. [Means for solving the problem]

[0009] Mode 1: One or more embodiments of the present invention include a first step of placing a mounting surface reflow mask on a mounting surface of a circuit board on which a surface-mounted electronic component is to be mounted so as to cover a via hole, and applying solder paste to an area of ​​a land portion on which the surface-mounted electronic component is to be mounted where the via hole is not formed; a second step of mounting the surface-mounted electronic component on the land portion; a third step of placing the circuit board on which the surface-mounted electronic component is mounted in a heating furnace, melting the solder paste, removing the circuit board on which the surface-mounted electronic component is mounted from the heating furnace, and temporarily fixing the surface-mounted electronic component to the land portion by cooling; and a third step of placing a back reflow mask on the back side of the mounting surface of the surface-mounted electronic component, and applying solder paste to an area on which the via hole is formed. The amount of the solder paste applied to the area of ​​the land portion of the mounting surface where the via holes are formed is added to the amount of the solder paste equivalent to the volume of all the via holes formed in the land portion. The present invention proposes a method for manufacturing a circuit unit, comprising: a fourth step of applying the solder paste; and a fifth step of placing the circuit board, on which the solder paste has been applied in the area where the via holes are formed, in the heating furnace to melt the solder paste, removing the circuit board, on which the solder paste has been applied in the area where the via holes are formed, from the heating furnace, and fixing the surface-mounted electronic components to the circuit board by cooling. Effect of the Invention

[0011] According to one or more embodiments of the present invention, it is possible to obtain an effect of contributing to improving the mounting quality of electronic components and ensuring current capacity. [Brief description of the drawings]

[0012] [Figure 1] 1A to 1C are a cross-sectional view, a top view, and a bottom view showing a main part of a circuit board according to an embodiment of the present invention. [Diagram 2] 1A is a plan view of a land portion and a cross-sectional view in the AA direction of the circuit board, showing the shape of the land portion on the mounting surface on which electronic components are mounted in the circuit board of this embodiment (A), the relationship between the land portion and a reflow mask (B), and the relationship between the land portion and applied solder paste (C). [Diagram 3]2A to 2C are a plan view of a land portion showing the relationship between the terminal of an electronic component and the solder fixed thereto after reflow on the mounting surface of the circuit board according to the present embodiment, and a cross-sectional view of the circuit board in the AA direction. [Figure 4] 1A is a plan view of a land portion on the back side of a mounting surface on which electronic components are mounted in a circuit board according to this embodiment, showing (A) the shape of the land portion, the relationship between the land portion and a reflow mask, and (C) the relationship between the land portion and applied solder paste, and a cross-sectional view in the AA direction of the circuit board. [Diagram 5] 2A is a plan view of a land portion showing the relationship between the terminal of an electronic component and the solder fixed thereto after reflow on the back side of the mounting surface in the circuit board according to the present embodiment, and a cross-sectional view in the AA direction of the circuit board. [Figure 6] 3 is a flow diagram showing a method for manufacturing a circuit unit according to the present embodiment. [Figure 7] 1A is a cross-sectional view, a top view, and a bottom view showing a main part of a circuit board according to an embodiment of the present invention. [Figure 8] 1A is a plan view of a land portion and a cross-sectional view in the AA direction of the circuit board, showing the shape of the land portion on the mounting surface on which electronic components are mounted in the circuit board of this embodiment (A), the relationship between the land portion and a reflow mask (B), and the relationship between the land portion and applied solder paste (C). [Figure 9] 2A to 2C are a plan view of a land portion showing the relationship between the terminal of an electronic component and the solder fixed thereto after reflow on the mounting surface of the circuit board according to the present embodiment, and a cross-sectional view of the circuit board in the AA direction. [Figure 10] 1A is a plan view of a land portion on the back side of the mounting surface on which electronic components are mounted in a circuit board according to this embodiment, showing (A) the shape of the land portion, the relationship between the land portion and a reflow mask, and (C) the relationship between the land portion and applied solder paste, and a cross-sectional view in the AA direction of the circuit board. [Figure 11] 2A is a plan view of a land portion showing the relationship between the terminal of an electronic component and the solder fixed thereto after reflow on the back side of the mounting surface in the circuit board according to the embodiment, and a cross-sectional view in the AA direction of the circuit board. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] <Embodiment> Hereinafter, an embodiment of the present invention will be described with reference to FIGS. The circuit board 10 according to this embodiment is, for example, a double-sided board having conductor patterns made of copper foil on both the front and back sides of an insulating substrate 12 made of glass epoxy, and a surface-mounted electronic component 20 is mounted on one side, which is the component mounting surface 11a.

[0014] In the present embodiment, a surface-mounted electrolytic capacitor will be described as an example of the surface-mounted electronic component 20. However, the surface-mounted electronic component 20 may be an electronic component that requires current capacity to be ensured via a conductive pattern, such as a surface-mounted relay, in the same manner as the surface-mounted electrolytic capacitor. As shown in the cross-sectional view of FIG. 1(A) and the top view of FIG. 1(B), the surface-mounted electrolytic capacitor as the surface-mounted electronic component 20 has L-shaped terminals 20a, 20b extending in the left-right direction from the bottom surface of the main body, which are fixed by solder at unique land portions 16a, 17a formed on the mounting surface 11a. FIG. 1C is a diagram showing the state in which the surface-mount electronic component 20 is fixed with solder, as viewed from the back side of the circuit board 10.

[0015] 2(A), on the mounting surface 11a of the insulating substrate 12 on which the terminals 20a, 20b of the surface-mounted electronic component 20 are mounted, land portions 16a, 17a surrounded by solder resist 18 are provided, and the copper foil is exposed. Via holes 24 are provided in the periphery of the land portions 16a, 17a. In the example shown in FIG. 2(A), the via holes 24 are provided at the widthwise ends of the terminals 20a, 20b in the lands 16a, 17a. Of the land portions 16a, 17a, the land portion on which one terminal 20a of the surface mount electronic component 20 is mounted is the first land portion 16a, and the land portion on which the other terminal 20b is mounted is the second land portion 17a. In the following, when a distinction is necessary, the description will use one terminal 20a, the other terminal 20b, the first land portion 16a, and the second land portion 17a as appropriate, and when a distinction is not necessary, the description will use terminals 20a, 20b, and land portions 16a and 17a as appropriate.

[0016] The number of via holes 24 is one or more, and at least one of the via holes 24 is provided under the main body of the surface-mounted electronic component 20 . It is preferable that the terminals 20a and 20b are disposed below the main body of the surface-mounted electronic component 20 at bent portions of the terminals 20a and 20b that extend vertically downward from the main body of the surface-mounted electronic component 20. 2(A), the arrangement area of ​​the via holes 24 in the first land portion 16a and the arrangement area of ​​the via holes 24 in the second land portion 17a are not line-symmetrical, that is, the via holes 24 arranged in the first land portion 16a and the via holes 24 arranged in the second land portion 17a are positioned on opposite sides of the central axis O (see FIG. 3) of the terminals 20a, 20b of the surface mount electronic component 20. The via holes 24 may be arranged across the central axis O.

[0017] Also, as shown in FIG. 2(B), the arrangement area of ​​the via holes 24 on the mounting surface side is masked by a reflow mask 30a used for mounting the surface-mounted electronic component 20, and the openings of the reflow mask 30a are placed on the areas of the lands 16a, 17a excluding the arrangement area of ​​the via holes 24 on the mounting surface side. In other words, as shown in FIG. 2(C), solder paste 40 is not applied to the arrangement area of ​​via hole 24 on mounting surface 11a, but solder paste 40 is applied to the areas of land portions 16a, 17a excluding the arrangement area of ​​via hole 24 on mounting surface 11a. For convenience, the solder paste applied to the mounting surface 11a side (applied by reflow on the mounting surface 11a side) will be described with the reference symbol 40, and the solder paste applied to the back surface 11b side of the mounting surface 11a (applied by reflow on the back surface 11b side of the mounting surface 11a) will be described with the reference symbol 50.

[0018] 3, when the surface mount electronic component 20 is mounted in a state in which the solder paste 40 is applied to the area of ​​the lands 16a, 17a excluding the area where the via holes 24 are arranged on the mounting surface 11a side, one side of one terminal 20a of the surface mount electronic component 20 is placed on the solder paste 40, and the other side is in a floating state, as shown in the right diagram of the figure. Although not shown, the other terminal 20b is also in a floating state on one side. Thereafter, when a heat treatment is performed, the solder paste 40 is heated to a predetermined temperature and melts, and one side of each of the terminals 20a, 20b of the surface-mounted electronic component 20 sinks into the layer of solder paste 40 melted on the surface of the land portions 16a, 17a and adheres to the layer of molten solder paste 40, and the remaining molten solder paste 40 spreads inside the land portions 16a, 17a so as to slip between the surfaces of the land portions 16a, 17a and the undersides of the terminals 20a, 20b of the surface-mounted electronic component 20.

[0019] As shown in FIG. 4(A), on the mounting surface 11a and back surface 11b of the circuit board 10 on which the terminals 20a, 20b of the surface-mounted electronic component 20 are mounted, land portions 16b, 17b are provided which are surrounded by solder resist 18 and correspond to the arrangement area of ​​the via hole 24, and the copper foil is exposed.

[0020] Also, as shown in FIG. 4(B), the area in which the via holes 24 are arranged on the back surface 11b of the mounting surface 11a is placed over the openings of the reflow mask 30b used on the back surface 11b of the mounting surface 11a. That is, the solder paste 50 is applied only to the arrangement area of ​​the via holes 24 on the back surface 11b of the mounting surface 11a. When the solder paste 50 on the back surface 11b of the mounting surface 11a is heated to a predetermined temperature, as shown in Figures 1(C) and 5, the solder paste 50 applied to the area of ​​the land portions 16b, 17b where the via holes 24 are arranged melts and spreads over the entire land portions 16b, 17b, and part of the molten solder paste 50 leaks through the via holes 24 onto the land portions 16a, 17a on the mounting surface 11a, and the molten solder paste 50 leaking onto the land portions 16a, 17a on the mounting surface 11a spreads over part of the terminals 20a, 20b of the surface-mounted electronic component 20. Note that since FIG. 5 is an AA cross-sectional view, the via holes 24 shown by dashed lines cannot actually be seen with the naked eye. However, in order to make the content of the explanation easier to understand, the solder is intentionally illustrated in FIG. 5 so that it is easy to understand that the solder flows into the via holes 24 shown by dashed lines. In addition, in Figure 5, for ease of understanding, the solder paste 40 that is adhered to the terminals 20a, 20b in the reflow process on the mounting surface 11a and the solder paste 50 that is adhered to the terminals 20a, 20b in the reflow process on the back surface 11b of the mounting surface 11a are shown separately.

[0021] (Action and effect) Next, the flow of a method for manufacturing a circuit unit in which a surface-mount electronic component 20 is mounted on the circuit board 10 according to the present embodiment will be described with reference to FIGS. 2 to 6, while also describing the operation and effects of the present embodiment.

[0022] As a first step, as shown in FIG. 2(B), first, a reflow mask 30a for the mounting surface 11a is placed on the mounting surface 11a of the surface-mounted electronic component 20, solder paste 40 is placed on the surface end of the reflow mask 30a, and the solder paste 40 is applied to the surface of the reflow mask 30a by a squeegee, as shown in FIG. 2(C) (step S101). As a result, the solder paste 40 is applied to the portions corresponding to the openings of the reflow mask 30a. In this embodiment, the solder paste 40 is applied uniformly to the areas of the lands 16a and 17a excluding the areas where the via holes 24 are arranged on the mounting surface 11a. After the solder paste 40 is applied, the reflow mask 30a is removed.

[0023] Next, in a second step, as shown in FIG. 3, the surface mount electronic component 20 is mounted at a predetermined position on the mounting surface 11a (step S102). As a result, parts of the terminals 20a, 20b of the surface-mount electronic component 20 are placed on the solder paste 40 applied to the surfaces of the lands 16a, 17a.

[0024] Furthermore, in a third step, the circuit board 10 on which the surface mount electronic component 20 is mounted in the second step is placed in a heating furnace, and the solder paste 40 is heated to a predetermined temperature by a heat treatment, thereby melting the solder paste 40. When the solder paste 40 melts, a part of the terminals 20a, 20b of the surface mount electronic component 20 drops into the layer of the solder paste 40 melted on the surface of the land portions 16a, 17a and adheres to the layer of the melted solder paste 40, and the remaining melted solder paste 40 spreads inside the land portions 16a, 17a so as to get between the surface of the land portions 16a, 17a and the lower surface of the terminals 20a, 20b of the surface mount electronic component 20. Furthermore, after the heating process, the circuit board 10 on which the surface-mounted electronic component 20 is mounted is removed from the heating furnace and cooled, whereby the molten solder paste 40 solidifies between the peripheral portions of the terminals 20a, 20b and the surfaces of the land portions 16a, 17a and the undersides of the terminals 20a, 20b of the surface-mounted electronic component 20, as shown in FIG. 3, and parts of the terminals 20a, 20b of the surface-mounted electronic component 20 are fixed to the surfaces of the land portions 16a, 17a (step S103). As described above, since the solder paste 40 is not applied to the area where the via hole 24 is arranged, one side of one terminal 20a is floating above the land portion 16a as shown in the right diagram of FIG. In other words, the surface mount electronic component 20 is temporarily fixed to the circuit board 10 . Therefore, even if the surface-mounted electronic component 20 is relatively heavy, such as a surface-mounted electrolytic capacitor or a relay, the surface-mounted electronic component 20 can be prevented from falling off the circuit board 10 during heat treatment of the mounting surface 11a and the back surface 11b. Furthermore, in this embodiment, the arrangement area of ​​the via holes 24 in the first land portion 16a and the arrangement area of ​​the via holes 24 in the second land portion 17a are configured to be arranged on opposite sides of the central axis O of the terminals 20a, 20b, so that the positions of one terminal 20a of the first land portion 16a and the other terminal 20b of the second land portion 17a are temporarily fixed at positions diagonally shifted from each other. Therefore, the surface mount electronic component 20 can be temporarily fixed on the mounting surface 11a without applying the solder paste 40 to the via holes 24. As a result, the solder paste 40 is not applied to the arrangement areas of the via holes 24 in the first step, so that the solder paste 40 does not leak out onto the mounting surface 11a and the back surface 11b through the via holes 24. In other words, since no solder balls are formed on the back surface 11b of the mounting surface 11a, the reflow mask 30b for the back surface 11b of the mounting surface 11a can be placed without being affected by the solder balls when it is placed in the fourth step described below.

[0025] Next, as a fourth step, as shown in FIG. 4(B), a reflow mask 30b for the back surface 11b of the mounting surface 11a of the surface-mounted electronic component 20 is placed on the back surface 11b of the mounting surface 11a, solder paste 50 is placed on the end of the front surface of the reflow mask 30b, and the solder paste 50 is applied to the front surface of the reflow mask 30b by a squeegee (step S104). As a result, the solder paste 50 is applied to the portions corresponding to the openings of the reflow mask 30b. In this embodiment, the solder paste 50 is applied uniformly to the areas of the lands 16b and 17b in the arrangement area of ​​the via holes 24 on the back surface 11b of the mounting surface 11a. After the solder paste 50 is applied, the reflow mask 30b is removed. Here, the amount of solder paste 50 applied to the area where via holes 24 are formed on the back surface 11b of mounting surface 11c is the amount of solder paste applied to the area where via holes 24 are formed in land portions 16a, 17a of mounting surface 11a plus the amount of solder paste equivalent to the volume of all via holes 24 formed in land portions 16b, 17b of back surface 11b of mounting surface 11a. As a result, the solder paste 50 applied to the lands 16b and 17b flows into the via holes 24, preventing the stuck solder from protruding from the via holes 24.

[0026] Next, in a fifth step, the circuit board 10 on which the solder paste 50 has been applied in the area where the via holes 24 are formed in the fourth step is placed in a heating furnace, and the solder paste 50 is heated to a predetermined temperature by a heat treatment, thereby melting the solder paste 50 applied to the area of ​​the land portions 16b, 17b on which the via holes 24 are arranged. When the solder paste 50 melts, the solder paste 50 spreads over the entire land portions 16b, 17b, and a part of the molten solder paste 50 leaks through the via holes 24 to the land portions 16a, 17a on the mounting surface 11a side, and the molten solder paste 50 leaking to the land portions 16a, 17a on the mounting surface 11a side spreads over a part of the terminals 20a, 20b of the surface-mounted electronic component 20. After the heating process, the circuit board 10 with the solder paste 50 applied to the area where the via holes 24 are formed is removed from the heating furnace and cooled, so that the molten solder paste 50 adheres to the surfaces of the lands 16b, 17b, the inside of the via holes 24, and the areas where it has leaked onto the lands 16a, 17a on the mounting surface 11a, as shown in Fig. 5, and fixes parts of the terminals 20a, 20b of the surface-mounted electronic component 20 to the lands 16a, 17a on the mounting surface 11a (step S105). After the entire series of steps are completed, the surface-mounted electronic component 20 is mounted as shown in Fig. 1(A). In other words, by heating the solder paste 50 on the back surface 11b of the mounting surface 11a of the circuit board 10, the solder paste 50 applied to the area of ​​the land portions 16b, 17b where the via holes 24 are arranged melts and spreads over the entire land portions 16b, 17b. At the same time, some of the molten solder paste 50 leaks through the via holes 24 to the land portions 16a, 17a on the mounting surface 11a side. The molten solder paste 50 leaking to the land portions 16a, 17a flows around to the terminals 20a, 20b of the surface-mounted electronic component 20 on the mounting surface 11a and is fixed by a cooling process, thereby preventing the generation of solder balls. Furthermore, as described above, the occurrence of solder balls can be prevented, which contributes to ensuring current carrying capacity while improving the mounting quality of electronic components.

[0027] In this embodiment, the number of via holes 24 is one or more, and at least one of the via holes 24 is provided under the main body of the surface mount electronic component 20. Therefore, the current path of the surface mount electronic component 20 can be made as short as possible, which contributes to ensuring the current capacity.

[0028] Furthermore, in this embodiment, the area to which solder paste 40 is applied is divided into mounting surface 11a and the rear surface 11b side of mounting surface 11a by an area equivalent to the area to which solder paste 40 is normally applied. Therefore, it is possible to prevent the occurrence of solder balls with the same amount of solder paste 40 as in the past, while improving the mounting quality of electronic components and ensuring current capacity.

[0029] <Example> Hereinafter, an embodiment of the present invention will be described with reference to FIGS.

[0030] In the present embodiment, a surface-mounted electrolytic capacitor will be described as an example of the surface-mounted electronic component 20. However, the surface-mounted electronic component 20 may be an electronic component that requires current capacity to be ensured via a conductive pattern, such as a surface-mounted relay, in the same manner as the surface-mounted electrolytic capacitor. As shown in the cross-sectional view of FIG. 7(A) and the top view of FIG. 7(B), the surface-mounted electrolytic capacitor as the surface-mounted electronic component 20 has L-shaped terminals 20a, 20b extending in the left-right direction from the bottom surface of the main body, which are fixed with solder at unique land portions 16a, 17a formed on the mounting surface 11a. FIG. 7C is a diagram showing the state in which the surface-mount electronic component 20 is fixed with solder, as viewed from the back side of the circuit board 10.

[0031] 8(A), the mounting surface 11a of the insulating substrate 12 on which the terminals 20a, 20b of the surface-mounted electronic component 20 are placed is provided with land portions 16a, 17a surrounded by solder resist 18, and the copper foil is exposed. In the land portions 16a, 17a, one via hole 24 is provided around the lower periphery of the bent portions of the terminals 20a, 20b when the surface-mounted electronic component 20 is mounted. Of the land portions 16a, 17a, the land portion on which one terminal 20a of the surface mount electronic component 20 is mounted is the first land portion 16a, and the land portion on which the other terminal 20b is mounted is the second land portion 17a. In the following, when a distinction is necessary, the description will use one terminal 20a, the other terminal 20b, the first land portion 16a, and the second land portion 17a as appropriate, and when a distinction is not necessary, the description will use terminals 20a, 20b, and land portions 16a and 17a as appropriate.

[0032] The number of via holes 24 is one, and it is preferable that the via holes 24 are disposed below the main body of the surface mount electronic component 20 at the bent portions of the terminals 20a, 20b extending vertically downward from the main body of the surface mount electronic component 20.

[0033] As shown in FIG. 8B, the arrangement area of ​​the via holes 24 on the mounting surface side is A is , which is masked by a reflow mask 30a used for mounting the surface-mount electronic component 20, and the openings of the reflow mask 30a are placed on the areas of the lands 16a, 17a in the arrangement area of ​​the via holes 24 on the mounting surface. That is, as shown in FIG. 8C, the solder paste 40 is not applied to the arrangement area of ​​the via hole 24 on the mounting surface 11a side. figure The solder paste 40 is applied to the areas of the lands 16a and 17a, excluding the areas where the via holes 24 are arranged on the mounting surface 11a. R . For convenience, the solder paste applied to the mounting surface 11a side (applied by reflow on the mounting surface 11a side) will be described with the reference symbol 40, and the solder paste applied to the back surface 11b side of the mounting surface 11a (applied by reflow on the back surface 11b side of the mounting surface 11a) will be described with the reference symbol 50.

[0034] 9, when the surface mount electronic component 20 is mounted in a state in which the solder paste 40 is applied to the areas of the lands 16a, 17a in the arrangement area of ​​the via holes 24 on the mounting surface 11a side, the bent portions of both terminals 20a, 20b of the surface mount electronic component 20 are placed on the solder paste 40, as shown in the right diagram of the figure, and the other side is in a floating state. Although not shown, the other terminal 20b is also in a floating state. Thereafter, when a heat treatment is performed, the solder paste 40 is heated to a predetermined temperature and melts, and the bent portions of the terminals 20a, 20b of the surface-mounted electronic component 20 sink into the layer of solder paste 40 melted on the surface of the land portions 16a, 17a and adhere to the layer of molten solder paste 40, and the remaining molten solder paste 40 spreads inside the land portions 16a, 17a so as to slip between the surfaces of the land portions 16a, 17a and the undersides of the terminals 20a, 20b of the surface-mounted electronic component 20.

[0035] As shown in FIG. 10(A), on the back surface 11b side of the mounting surface 11a of the circuit board 10 on which the terminals 20a, 20b of the surface-mounted electronic component 20 are mounted, land portions 16b, 17b are provided which are surrounded by solder resist 18 and correspond to the arrangement area of ​​the via hole 24, and the copper foil is exposed.

[0036] Also, as shown in FIG. 10(B), the area in which the via holes 24 are arranged on the back surface 11b of the mounting surface 11a is placed over the openings of the reflow mask 30b used on the back surface 11b of the mounting surface 11a. That is, the solder paste 50 is applied only to the arrangement area of ​​the via holes 24 on the back surface 11b of the mounting surface 11a. When the solder paste 50 on the back surface 11b of the mounting surface 11a is heated to a predetermined temperature, as shown in Figures 1(C), 10(C), and 11, the solder paste 50 applied to the area of ​​the land portions 16b, 17b where the via holes 24 are arranged melts and spreads over the entire land portions 16b, 17b, and some of the molten solder paste 50 leaks through the via holes 24 onto the land portions 16a, 17a on the mounting surface 11a, and the molten solder paste 50 leaking onto the land portions 16a, 17a on the mounting surface 11a spreads over part of the terminals 20a, 20b of the surface-mounted electronic component 20. In addition, in Figure 11, for ease of understanding, the solder paste 40 that is adhered to the terminals 20a, 20b in the reflow process on the mounting surface 11a and the solder paste 50 that is adhered to the terminals 20a, 20b in the reflow process on the back surface 11b of the mounting surface 11a are shown separately.

[0037] (Action and effect) Next, the flow of a method for manufacturing a circuit unit in which a surface-mount electronic component 20 is mounted on a circuit board 10 according to the present embodiment will be described with reference to FIGS. 6 to 11, while also describing the operation and effects of the present embodiment.

[0038] As a first step, as shown in FIG. 8(B), first, a reflow mask 30a for the mounting surface 11a is placed on the mounting surface 11a of the surface-mounted electronic component 20, solder paste 40 is placed on the surface end of the reflow mask 30a, and the solder paste 40 is applied to the surface of the reflow mask 30a by a squeegee, as shown in FIG. 8(C) (step S101). As a result, the solder paste 40 is applied to the portions corresponding to the openings of the reflow mask 30a. In this embodiment, the solder paste 40 is applied uniformly to the areas of the lands 16a and 17a in the arrangement area of ​​the via holes 24 on the mounting surface 11a. After the solder paste 40 is applied, the reflow mask 30a is removed.

[0039] Next, in a second step, as shown in FIG. 9, the surface mount electronic component 20 is mounted at a predetermined position on the mounting surface 11a (step S102). As a result, parts of the terminals 20a, 20b of the surface-mount electronic component 20 are placed on the solder paste 40 applied to the surfaces of the lands 16a, 17a.

[0040] Furthermore, in a third step, the circuit board 10 on which the surface mount electronic component 20 is mounted in the second step is placed in a heating furnace, and the solder paste 40 is heated to a predetermined temperature by a heat treatment, thereby melting the solder paste 40. When the solder paste 40 melts, a part of the terminals 20a, 20b of the surface mount electronic component 20 drops into the layer of the solder paste 40 melted on the surface of the land portions 16a, 17a and adheres to the layer of the melted solder paste 40, and the remaining melted solder paste 40 spreads inside the land portions 16a, 17a so as to get between the surface of the land portions 16a, 17a and the lower surface of the terminals 20a, 20b of the surface mount electronic component 20. After the heating process, the circuit board 10 on which the surface-mounted electronic component 20 is mounted is removed from the heating furnace and cooled, whereby the molten solder paste 40 solidifies between the peripheral portions of the terminals 20a, 20b and the surfaces of the land portions 16a, 17a and the undersides of the terminals 20a, 20b of the surface-mounted electronic component 20, as shown in FIG. 9, and the terminals 20a, 20b of the surface-mounted electronic component 20 are fixed to the surfaces of the land portions 16a, 17a (step S103). As described above, the solder paste 40 is not applied to areas other than the area where the via hole 24 is arranged, so that the other sides of the terminals 20a, 20b are floating above the land portions 16a, 17a, as shown in the right diagram of Figure 9. In other words, the surface mount electronic component 20 is temporarily fixed to the circuit board 10 . Therefore, even if the surface-mounted electronic component 20 is relatively heavy, such as a surface-mounted electrolytic capacitor or a relay, the surface-mounted electronic component 20 can be prevented from falling off the circuit board 10 during heat treatment of the mounting surface 11a and the back surface 11b. Furthermore, as in this embodiment, the arrangement area of ​​the via holes 24 in the first land portion 16a and the arrangement area of ​​the via holes 24 in the second land portion 17a are relatively wide areas that are symmetrical with respect to the terminals 20a, 20b, so that one terminal 20a of the first land portion 16a and the other terminal 20b of the second land portion 17a are temporarily fixed in a relatively wide area that is a symmetrical pair. Therefore, the surface mount electronic component 20 can be temporarily fixed on the mounting surface 11a without applying the solder paste 40 to the via holes 24.

[0041] Next, as a fourth step, as shown in FIG. 10(B), a reflow mask 30b for the back surface 11b of the mounting surface 11a of the surface-mounted electronic component 20 is placed on the back surface 11b of the mounting surface 11a, solder paste 50 is placed on the front end of the reflow mask 30b, and the solder paste 50 is applied to the front surface of the reflow mask 30b by a squeegee (step S104). As a result, the solder paste 50 is applied to the portions corresponding to the openings of the reflow mask 30b. In this embodiment, the solder paste 50 is applied uniformly to the areas of the lands 16b and 17b, which are slightly larger than the via holes 24 on the back surface 11b of the mounting surface 11a. After the solder paste 50 is applied, the reflow mask 30b is removed. Here, the amount of solder paste 50 applied to the land portions 16b, 17b of the via holes 24 on the back surface 11b of the mounting surface 11c depends on the size of the land portions 16b, 17b of the via holes 24 on the back surface 11b of the mounting surface 11c. As a result, the solder paste 50 applied to the lands 16b, 17b flows into the via holes 24, preventing the occurrence of solder balls, which are formed by the solidified solder protruding from the via holes 24.

[0042] Next, in a fifth step, the circuit board 10 on which the solder paste 50 has been applied in the area where the via holes 24 have been formed in the fourth step is placed in a heating furnace, and the solder paste 50 is heated to a predetermined temperature by a heat treatment, thereby melting the solder paste 50 applied to the land portions 16b, 17b on which the via holes 24 are arranged. When the solder paste 50 melts, the solder paste 50 spreads over the entire land portions 16b, 17b, and a part of the molten solder paste 50 leaks through the via holes 24 onto the land portions 16a, 17a on the mounting surface 11a side, and the molten solder paste 50 leaking onto the land portions 16a, 17a on the mounting surface 11a side spreads over a part of the terminals 20a, 20b of the surface-mounted electronic component 20. Furthermore, after the heating process, the circuit board 10 with the solder paste 50 applied to the area where the via holes 24 are formed is removed from the heating furnace and cooled, whereby the molten solder paste 50 adheres to the surfaces of the land portions 16b, 17b, the inside of the via holes 24, and the areas where it has leaked out to the land portions 16a, 17a on the mounting surface 11a, as shown in FIG. 11, thereby fixing the terminals 20a, 20b of the surface-mounted electronic component 20 to the land portions 16a, 17a on the mounting surface 11a (step S105). After the entire series of steps are completed, the surface mount electronic component 20 is in a mounting form as shown in FIG. 7(A). In other words, by heating the solder paste 50 on the back surface 11b of the mounting surface 11a of the circuit board 10, the solder paste 50 applied to the area of ​​the land portions 16b, 17b where the via holes 24 are arranged melts and spreads over the entire land portions 16b, 17b. At the same time, some of the molten solder paste 50 leaks through the via holes 24 to the land portions 16a, 17a on the mounting surface 11a side. The molten solder paste 50 leaking to the land portions 16a, 17a flows around to the terminals 20a, 20b of the surface-mounted electronic component 20 on the mounting surface 11a and is fixed by a cooling process, thereby preventing the generation of solder balls. Furthermore, as described above, the occurrence of solder balls can be prevented, which contributes to ensuring current carrying capacity while improving the mounting quality of electronic components.

[0043] In this embodiment, the number of via holes 24 is one, and the via hole 24 is provided below the main body of the surface mount electronic component 20. Therefore, the current path of the surface mount electronic component 20 can be made as short as possible, which contributes to ensuring the current capacity.

[0044] Furthermore, in this embodiment, the area onto which the solder paste 40 is applied is kept smaller than the area onto which the solder paste 40 would normally be applied. Therefore, it is possible to prevent the occurrence of solder balls with a smaller amount of solder paste 40 than in the past, while contributing to improving the mounting quality of electronic components and ensuring current capacity.

[0045] Although an embodiment of the present invention has been described in detail above with reference to the drawings, the specific configuration is not limited to this embodiment, and designs that do not deviate from the gist of the present invention are also included. [Explanation of symbols]

[0046] 10; Circuit board 11a; Mounting surface 11b;Back side 12;Insulating substrate 16a; Land section 16b; Land section 17a; Land section 17b; Land section 18; Solder resist 20. Surface mount electronic components 20a; terminal 20b; terminal 24; Via Hole 30a; reflow mask 30b; Reflow mask 40; solder paste 50; solder paste

Claims

[Claim 1] a first step of placing a reflow mask for mounting on a mounting surface of a circuit board on which a surface-mounted electronic component is to be mounted, so as to cover via holes, and applying solder paste to an area of ​​a land portion on which the surface-mounted electronic component is to be mounted, where the via holes are not formed; a second step of mounting the surface mount electronic component on the land portion; a third step of placing the circuit board on which the surface mount electronic components are mounted in a heating furnace, melting the solder paste, removing the circuit board on which the surface mount electronic components are mounted from the heating furnace, and temporarily fixing the surface mount electronic components to the land portions by cooling; a fourth step of placing a back reflow mask on a back side of the mounting surface of the surface mount type electronic component, and applying the solder paste to the area where the via holes are formed in an amount equal to the amount of the solder paste applied to the area where the via holes are formed in the land part of the mounting surface plus the amount of the solder paste equivalent to the volume of all the via holes formed in the land part; a fifth step of placing the circuit board with the solder paste applied to the area where the via holes are formed in the heating furnace, melting the solder paste, removing the circuit board with the solder paste applied to the area where the via holes are formed from the heating furnace, and fixing the surface mount electronic component to the circuit board by cooling; A method for manufacturing a circuit unit comprising:

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