Substrate Processing Method and Substrate Processing Apparatus

Abstract

The present invention is a method for processing a polymeric substrate obtained by bonding a first substrate and a second substrate together, wherein: a device layer including a plurality of devices is formed on the front surface side of the first substrate, and a leaked light prevention layer is formed by irradiating first laser light onto an oxygen-containing film formed between the device layer and a formation location of a modified layer, which serves as an origin for detaching the first substrate; after the leaked light prevention layer has been formed, the modified layer is formed by irradiating second laser light onto the interior of the first substrate; and the first substrate is detached and thinned, originating at the modified layer.

Description

Technical Field

[0001] The present disclosure relates to a substrate processing method and a substrate processing apparatus.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing a semiconductor device using a SIMOX (Separation by Implanted Oxygen) substrate. According to Patent Document 1, after forming a layer including a field effect transistor and a memory element having a first single crystal semiconductor layer as an active layer on one surface of the SIMOX substrate, a second single crystal semiconductor layer on the surface opposite to the one surface is removed by at least one of etching or grinding and polishing.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The technology according to the present disclosure appropriately thins the first substrate in a polymerized substrate in which the first substrate and the second substrate are joined.

Means for Solving the Problems

[0005] One aspect of the present disclosure is a method for processing a polymerized substrate in which a first substrate and a second substrate are joined, wherein a device layer including a plurality of devices is formed on the surface side of the first substrate, and a first laser beam is irradiated onto an oxygen-containing film formed between a formation position of a modified layer serving as a base point for peeling the first substrate and the device layer to form a light leakage prevention layer, after forming the light leakage prevention layer, a second laser beam is irradiated into the first substrate to form the modified layer, and the first substrate is peeled and thinned with the modified layer as a base point. Substrate processing ​

Advantages of the Invention

[0006] According to the present disclosure, in a polymerized substrate in which a first substrate and a second substrate are joined, the first substrate can be appropriately thinned.

Brief Description of the Drawings

[0007]

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Modes for Carrying Out the Invention

[0008] In the manufacturing process of semiconductor devices, a semiconductor substrate (hereinafter sometimes referred to as a "wafer") having a device layer including a plurality of electronic circuits and the like formed on its surface is thinned. As an example, wafer thinning is performed by irradiating a laser beam into the interior of the wafer to be processed to form a modified layer, and separating the wafer into a device wafer on the front surface side and a separation wafer on the back surface side with the modified layer as a starting point.

[0009] By the way, in recent years, for the purpose of improving the efficiency of semiconductor devices (transistors) as products, an SOI (Silicon on Insulator) substrate in which a single-crystalline semiconductor layer (for example, single-crystalline silicon) and an insulating layer (for example, SiO 2 ) are laminated may be used. As an example of an SOI substrate, a SIMOX substrate described in Patent Document 1 can be mentioned. When an SOI substrate is used, it is possible to reduce the parasitic capacitance of the transistor and improve the operating speed and reduce the power consumption.

[0010] However, when using an SOI substrate in this way, it has been difficult to appropriately perform the above-described wafer thinning. Specifically, for example, when thinning a wafer by etching as described in Patent Document 1, it takes time to thin the wafer, and it is necessary to use a large amount of chemical solution and gas. Also, for example, when grinding and polishing a wafer as described in Patent Document 1, a large amount of grinding water is required to thin the wafer, and a large amount of grinding chips and the like are generated during grinding. Furthermore, for example, when forming a modified layer inside the wafer as described above, the laser beam irradiated, for example, near-infrared (NIR: Near Infrared) light may pass through the single-crystalline semiconductor layer and the insulating layer and affect the device layer as leakage light.

[0011] Here, as a method for suppressing the influence on the device layer due to leakage light, the focus of the laser light inside the wafer (the formation position of the modified layer) is shifted upward (the back side opposite to the surface on which the device layer is formed), and the light transmitted to the device layer is defocused. However, in this case, since the formation position of the modified layer is shifted upward, the separation surface position (thinning interface) of the wafer is also shifted upward, and there may occur a problem that the grinding amount of the back side of the wafer in the subsequent process increases.

[0012] The technology according to the present disclosure has been made in view of the above circumstances, and in a polymer substrate in which a first substrate and a second substrate are joined, the first substrate is appropriately thinned. Hereinafter, a wafer processing system as a substrate processing apparatus according to the present embodiment and a wafer processing method as a substrate processing method will be described with reference to the drawings. In the present specification and drawings, elements having substantially the same functional configuration are denoted by the same reference numerals, and redundant description is omitted.

[0013] In the wafer processing system 1 according to the present embodiment described later, as shown in FIG. 1, processing is performed on a polymer wafer T as a polymer substrate in which a first wafer W as a first substrate and a second wafer S as a second substrate are joined. Hereinafter, in the first wafer W, the surface on the side joined to the second wafer S is referred to as a front surface Wa, and the surface on the side opposite to the front surface Wa is referred to as a back surface Wb. Similarly, in the second wafer S, the surface on the side joined to the first wafer W is referred to as a front surface Sa, and the surface on the side opposite to the front surface Sa is referred to as a back surface Sb.

[0014] The first wafer W is a semiconductor wafer such as a silicon substrate, for example. On the front surface Wa side of the first wafer W, a SiO 2 film is formed. The SiO 2 film may be, for example, an oxygen-doped silicon layer in which a part of the thickness of the first wafer W is modified by doping with oxygen (O 2 ). The SiO 2The film further has a Si film as a single crystal silicon layer (single crystal semiconductor layer) and a device layer Dw including a plurality of devices formed thereon. That is, the first wafer W has a structure as an SOI substrate in which an insulating layer and a single crystal semiconductor layer are laminated. Further, a surface film Fw is formed on the device layer Dw, and the first wafer W is bonded to the second wafer S via the surface film Fw. Examples of the surface film Fw include an oxide film (THOX film, SiO 2 film, TEOS film), SiC film, SiCN film, or an adhesive. Note that the peripheral portion We of the first wafer W is chamfered, and the cross section of the peripheral portion We becomes thinner toward its tip.

[0015] Note that the SiO 2 film formed on the first wafer W does not necessarily have to be an oxygen-doped silicon layer, and a general oxide film may be used. The SiO 2 film may be formed by modifying the inside of the first wafer W, or may be formed so as to coat the outer surface of the first wafer W. In other words, an oxygen-containing film is formed on the first wafer W.

[0016] The second wafer S is, for example, a wafer that supports the first wafer W. A surface film Fs is formed on the second wafer S, and the second wafer S is bonded to the first wafer W via the surface film Fs. Note that the second wafer S does not necessarily have to be a support wafer that supports the first wafer W, and may be, for example, a device wafer having a device layer (not shown) formed on the surface Sa side. In such a case, the surface film Fs is formed on the second wafer S via the device layer.

[0017] As shown in FIG. 2, the wafer processing system 1 has a configuration in which a loading / unloading station 2 and a processing station 3 are integrally connected. In the loading / unloading station 2, for example, a cassette C capable of accommodating a plurality of polymer wafers T and the like is loaded / unloaded to / from the outside. The processing station 3 includes various processing apparatuses that perform desired processing on the polymer wafer T.

[0018] The loading / unloading station 2 is provided with a cassette mounting table 10 for mounting a plurality of, for example, three cassettes C. Further, on the negative X-axis side of the cassette mounting table 10, a wafer transfer device 20 is provided adjacent to the cassette mounting table 10. The wafer transfer device 20 is configured to move on a transfer path 21 extending in the Y-axis direction and to be able to transfer superposed wafers T and the like between the cassette C on the cassette mounting table 10 and a transition device 30 described later.

[0019] At the loading / unloading station 2, on the negative X-axis side of the wafer transfer device 20, a transition device 30 is provided adjacent to the wafer transfer device 20 for transferring superposed wafers T and the like between the processing station 3.

[0020] The processing station 3 is provided with, for example, three processing blocks B1 to B3. The first processing block B1, the second processing block B2, and the third processing block B3 are arranged side by side in this order from the positive X-axis side (the loading / unloading station 2 side) to the negative direction side.

[0021] The first processing block B1 is provided with an etching device 40 for etching the ground surface of the first wafer W ground by a processing device 80 described later, a cleaning device 41 for cleaning the ground surface of the first wafer W, and a wafer transfer device 50. The etching device 40 and the cleaning device 41 are arranged in a stacked manner. Note that the number and arrangement of the etching device 40 and the cleaning device 41 are not limited to this.

[0022] The wafer transfer device 50 is arranged on the negative X-axis side of the transition device 30. The wafer transfer device 50 has, for example, two transfer arms 51, 51 for holding and transferring the superposed wafer T. Each transfer arm 51 is configured to be movable in the horizontal direction, the vertical direction, around the horizontal axis, and around the vertical axis. And the wafer transfer device 50 is configured to be able to transfer the superposed wafer T and the like to the transition device 30, the etching device 40, the cleaning device 41, an interface modification device 60 described later, an internal modification device 61 described later, and a separation device 62 described later.

[0023] The second processing block B2 is provided with an interface modification device 60 for forming an anti-leakage light layer described later, an internal modification device 61 for forming a separation surface modification layer serving as a base point for peeling the first wafer W, a separation device 62 for separating the first wafer W, and a wafer transfer device 70. The interface modification device 60, the internal modification device 61, and the separation device 62 are arranged in a stacked manner. Note that the number and arrangement of the interface modification device 60, the internal modification device 61, and the separation device 62 are not limited to this. For example, instead of arranging the interface modification device 60, the internal modification device 61, and the separation device 62 in a stacked manner, at least any one of them may be arranged adjacent to each other in the horizontal direction.

[0024] The interface modification device 60 as the first laser light irradiation unit irradiates, for example, a SiO film as an insulating layer formed on the first wafer W with interface laser light L1 (for example, CO laser) as the first laser light. The interface laser light L1 has a wavelength of, for example, 5 μm or more, preferably 9 μm to 10 μm. In the interface modification device 60, the Si film is modified at the focus position of the interface laser light L1 to form an anti-leakage light layer M1 that suppresses the transmission of the internal laser light L2 described later. 2 film with interface laser light L1 (e.g., CO laser) as the first laser light. 2 The interface laser light L1 has a wavelength of, for example, 5 μm or more, preferably 9 μm to 10 μm. In the interface modification device 60, the Si film is modified at the focus position of the interface laser light L1 to form an anti-leakage light layer M1 that suppresses the transmission of the internal laser light L2 described later.

[0025] As shown in FIG. 3, the interface modification device 60 has a chuck 100 that holds the polymerized wafer T on the upper surface. The chuck 100 adsorbs and holds the non-bonding surface side of the first wafer W in the second wafer S.

[0026] The chuck 100 is supported by a slider table 102 via an air bearing 101. A rotation mechanism 103 is provided on the lower surface side of the slider table 102. The rotation mechanism 103 incorporates, for example, a motor as a drive source. The chuck 100 is configured to be rotatable about the θ-axis (vertical axis) via the air bearing 101 by the rotation mechanism 103. The slider table 102 is configured to be movable along a rail 105 extending in the Y-axis direction by a horizontal movement mechanism 104 provided on the lower surface side thereof. The rail 105 is provided on a base 106. Note that the drive source of the horizontal movement mechanism 104 is not particularly limited, and for example, a linear motor is used.

[0027] Above the chuck 100, a laser irradiation system 110 is provided. The laser irradiation system 110 has a laser head 111 and a lens 112. The lens 112 may be configured to be movable up and down by a lifting mechanism (not shown).

[0028] The laser head 111 has a laser oscillator (not shown) that oscillates laser light in a pulsed manner. That is, the laser light irradiated from the laser irradiation system 110 onto the polymerization wafer T held by the chuck 100 is so-called pulsed laser, and its power repeats between 0 (zero) and the maximum value. Note that the laser head 111 may have other devices of the laser oscillator, such as an amplifier. The lens 112 is a cylindrical member and irradiates the interface laser light L1 onto the polymerization wafer T held by the chuck 100.

[0029] The internal modification device 61 as the second laser light irradiation unit irradiates the inside of the first wafer W with internal laser light L2 (for example, NIR light such as a YAG laser) as the second laser light. The internal laser light L2 has a wavelength of, for example, 1 μm to 1.5 μm as an example. In the internal modification device 61, the first wafer W is modified at the focusing point position of the internal laser light L2, and an internal surface modification layer M2 serving as a base point for separating the first wafer W is formed.

[0030] The internal modification device 61 has the same configuration as the interface modification device 60. That is, as shown in FIG. 3, the internal modification device 61 includes a chuck 200 that holds the polymerization wafer T, an air bearing 201, a slider table 202, a rotation mechanism 203, a horizontal movement mechanism 204, a rail 205, a base 206, and a laser irradiation system 210. The laser irradiation system 210 includes a laser head 211 and a lens 212. The laser irradiation system 210 irradiates the internal laser beam L2 onto the polymerization wafer T held by the chuck 200.

[0031] The separation device 62 as a peeling part separates the first wafer W into a device wafer Wd1 and a separation wafer Wd2 based on the internal surface modification layer M2 formed by the internal modification device 61.

[0032] As shown in FIG. 4, the separation device 62 includes a chuck 130 that holds the second wafer S on the upper surface and a separation arm 131 that holds the first wafer W on the adsorption holding surface. In the separation device 62, as shown in FIG. 4, while holding the second wafer S with the chuck 130, the first wafer W is adsorbed and held with the separation arm 131, and in this state, the separation arm 131 is lifted to separate the first wafer W. Note that the separation method of the first wafer W in the separation device 62 is not limited to this and can be arbitrarily determined.

[0033] The wafer transfer device 70 is disposed, for example, on the positive Y-axis side of the interface modification device 60 and the internal modification device 61. The wafer transfer device 70 has, for example, two transfer arms 71, 71 that adsorb and hold the polymerization wafer T by an adsorption holding surface (not shown) and transfer it. Each transfer arm 71 is supported by an articulated arm member 72 and is configured to be movable in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The wafer transfer device 70 is configured to be able to transfer the polymerization wafer T and the like to the etching device 40, the cleaning device 41, the interface modification device 60, the internal modification device 61, the separation device 62, and a processing device 80 described later.

[0034] The third processing block B3 is provided with a processing device 80.

[0035] The processing device 80 has a rotary table 81. The rotary table 81 is configured to be rotatable about a vertical rotation center line 82 by a rotation mechanism (not shown). On the rotary table 81, two chucks 83 for sucking and holding the polymerized wafer T are provided. The chucks 83 are evenly arranged on the same circumference as the rotary table 81. The two chucks 83 can be moved to the delivery position A0 and the processing position A1 when the rotary table 81 rotates. Further, each of the two chucks 83 is configured to be rotatable about a vertical axis by a rotation mechanism (not shown).

[0036] At the delivery position A0, the polymerized wafer T is delivered. A grinding unit 84 is arranged at the processing position A1, and the first wafer W is ground while the second wafer S is sucked and held by the chuck 83. The grinding unit 84 has a grinding part 85 provided with a grinding wheel (not shown) that is annular and rotatable. Further, the grinding part 85 is configured to be movable in the vertical direction along a support column 86.

[0037] The above wafer processing system 1 is provided with a control device 90. The control device 90 is a computer equipped with, for example, a CPU and a memory, and has a program storage part (not shown). A program for controlling the processing of the polymerized wafer T in the wafer processing system 1 is stored in the program storage part. Note that the above program may be recorded on a computer-readable storage medium H and installed from the storage medium H into the control device 90.

[0038] Next, the wafer processing performed using the wafer processing system 1 will be described. In this embodiment, the polymerized wafer T is formed in a bonding device (not shown) outside the wafer processing system 1 in advance. Also, in the polymerized wafer T to be processed according to this embodiment, as shown in FIGS. 1 and 5(a), SiO is provided on the surface Wa side of the first wafer W. 2A film, an Si film, a device layer Dw, and a surface film Fw are laminated and formed.

[0039] First, a cassette C containing a plurality of polymerization wafers T is placed on the cassette mounting table 10 of the loading / unloading station 2. Next, the polymerization wafer T in the cassette C is taken out by the wafer transfer device 20 and transferred to the transition device 30. The polymerization wafer T transferred to the transition device 30 is then transferred to the interface modification device 60 by the wafer transfer device 50.

[0040] In the interface modification device 60, as shown in FIG. 5(a), the SiO 2 film formed on the first wafer W is irradiated with the interface laser light L1. The irradiated interface laser light L1 is absorbed by the SiO 2 film, and the SiO 2 film is modified to form an anti-leakage light layer M1 (step P1 in FIG. 6). The anti-leakage light layer M1 is desirably formed so as to cover the entire effective device surface to be protected in plan view.

[0041] In this embodiment, as an example, by increasing the temperature of the silicon constituting the first wafer W by absorbing the interface laser light L1 (CO 2 laser), the light absorption rate of the silicon is improved. As a result, the silicon absorbs the wavelength of the interface laser light L1 (CO 2 laser), is modified, and the anti-leakage light layer M1 is formed. That is, the "modification" of the SiO 2 film in the interface modification device 60 in this embodiment is assumed to include the modification of the silicon constituting the first wafer W. 2 film in the interface modification device 60 in this embodiment is assumed to include the modification of the silicon constituting the first wafer W.

[0042] The polymerization wafer T on which the anti-leakage light layer M1 is formed is then transferred to the internal modification device 61 by the wafer transfer device 50. In the internal modification device 61, as shown in FIG. 5(b), an internal surface modification layer M2 is formed inside the first wafer W (step P2 in FIG. 6).

[0043] In forming the internal surface modification layer M2, while rotating the polymerization wafer T (first wafer W), the internal laser beam L2 is periodically irradiated from the laser irradiation system 210, and the irradiation position of the laser beam is moved radially inward of the first wafer W. As a result, an internal surface modification layer M2 that is substantially spiral or concentric in plan view is formed over the entire surface along the surface direction inside the first wafer W. The radial formation interval of the internal surface modification layer M2 can be arbitrarily determined. Note that in forming the internal surface modification layer M2, the internal surface modification layer M2 may be formed in a substantially linear shape by scanning and moving the irradiation position of the laser beam horizontally relative to the polymerization wafer T (first wafer W).

[0044] Note that inside the first wafer W, as shown in FIG. 5(b), cracks C2 extend along the formation direction of the internal surface modification layer M2, that is, along the surface direction of the first wafer W. It is desirable that the cracks C2 extending from each of the internally formed surface modification layers M2 adjacent in the surface direction be connected to each other. The cracks C2 extending from the internal surface modification layer M2 can be controlled by adjusting conditions such as the output and frequency of the internal laser beam L2 or the rotation speed of the polymerization wafer T.

[0045] Here, the internal laser beam L2 irradiated during the formation of the internal surface modification layer M2 is NIR light and has permeability to silicon (Si). For this reason, there was concern that a part of the internal laser beam L2 irradiated inside the first wafer W would leak from the focus point (the formation position of the internal surface modification layer M2) and further pass through the SiO 2 film and affect the device layer Dw.

[0046] In this regard, in the present embodiment, a leakage light prevention layer M1 is formed in the interface modification device 60 prior to the formation of the internal surface modification layer M2. Then, the formed leakage light prevention layer M1 absorbs or scatters the leakage light of the internal laser beam L2 (NIR light), thereby reducing the leakage light reaching the device layer Dw and suppressing the influence on the device layer Dw.

[0047] Note that as shown in Fig. 5(b), the lower end of the internal surface modification layer M2 formed inside the first wafer W is desirably positioned above the target thickness (the dashed line in Fig. 5(b)) of the first wafer W after grinding the separation surface in step P4 described later.

[0048] Next, the polymerized wafer T on which the internal surface modification layer M2 is formed is conveyed to the separation device 62 by the wafer conveyance device 50.

[0049] In the separation device 62, as shown in Fig. 5(c), the first wafer W is separated into a device wafer Wd1 on the surface Wa side and a separation wafer Wd2 on the back surface Wb side with the internal surface modification layer M2 and the crack C2 as the bases (step P3 in Fig. 6).

[0050] In the separation of the first wafer W in step P3, while the first wafer W is adsorbed and held by the adsorption holding surface provided on the separation arm 131, the second wafer S is adsorbed and held by the chuck 130 (see Fig. 4). Then, with the adsorption holding surface holding the first wafer W, the separation arm 131 is lifted to separate the first wafer W into the device wafer Wd1 and the separation wafer Wd2. At this time, shear stress may be generated at the separation interface between the device wafer Wd1 and the separation wafer Wd2 by relatively rotating or horizontally moving the chuck 130 and the separation arm 131.

[0051] In this embodiment, the first wafer W is separated using the separation arm 131 in the separation device 62. However, when transferring the polymerized wafer T from the wafer conveyance device 70 to the chuck 83 in the processing device 80, the first wafer W may be separated. In such a case, the processing device 80 functions as the "peeling portion" according to the technology of the present disclosure.

[0052] The separation wafer Wd2 separated from the first wafer W is recovered, for example, outside the wafer processing system 1. Alternatively, for example, a recovery unit (not shown) may be provided within the movable range of the transfer arm 71, and the separation wafer Wd2 may be recovered in the recovery unit.

[0053] The polymer wafer T from which the first wafer W has been separated is subsequently transported by the wafer transfer device 70 to the chuck 83 of the processing device 80. Next, the chuck 83 is moved to the processing position A1, and as shown in FIG. 5(d), the separation surface of the device wafer Wd1 is ground by the grinding unit 84 (step P4 in FIG. 6). By such grinding treatment, the internal surface modification layer M2 remaining on the separation surface of the device wafer Wd1 is removed, and the device wafer Wd1 is reduced to a desired target thickness.

[0054] At this time, as described above, since the lower end of the internal surface modification layer M2 is formed to be located above the target thickness (height position of the final finish thickness) of the first wafer W after grinding, the internal surface modification layer M2 remaining on the separation surface can be appropriately removed by grinding.

[0055] The polymer wafer T in which the first wafer W has been thinned to the target thickness in the processing device 80 is transported by the wafer transfer device 70 to the cleaning device 41, and the ground surface of the device wafer Wd1 is cleaned (step P5 in FIG. 6).

[0056] Subsequently, the polymer wafer T is transported by the wafer transfer device 50 to the etching device 40, and the ground surface of the device wafer Wd1 is wet-etched with a chemical solution (step P6 in FIG. 6). In step P6, by performing a wet-etching treatment on the ground surface of the device wafer Wd1 in this way, the ground surface is planarized.

[0057] Thereafter, the polymer wafer T on which all the processes have been performed is transported by the wafer transfer device 50 to the transition device 30, and further transported by the wafer transfer device 20 to the cassette C on the cassette mounting table 10. Thus, a series of wafer processes in the wafer processing system 1 are completed.

[0058] After all the processes have been performed, the laminated wafer T may be further subjected to a CMP (Chemical Mechanical Polishing) process to smooth the ground surface. The CMP process may be performed outside or inside the wafer processing system 1. When the CMP process is performed inside the wafer processing system 1, a CMP apparatus for performing the CMP process may be arranged, for example, stacked with the etching apparatus 40 and the cleaning apparatus 41 in the first processing block B1.

[0059] According to the above embodiment, prior to the formation of the internal surface modification layer M2, the SiO 2 The film is modified to form a leakage light prevention layer M1 for absorbing or scattering the leakage light of the internal laser light L2. As a result, even if the internal laser light L2 (NIR light) having transparency to silicon is irradiated when forming the internal surface modification layer M2, the leakage light of the internal laser light L2 is prevented from reaching the device layer Dw, and thus the device layer Dw is prevented from being affected.

[0060] Furthermore, according to this embodiment, by forming the light leakage prevention layer M1 in this manner, the focal point position inside the first wafer W (the formation position of the internal surface modification layer M2) can be brought closer to the device layer Dw, thereby reducing the amount of grinding in the subsequent grinding process (step P4).

[0061] Specifically, the amount of the internal laser light L2 transmitted to the device layer Dw when the internal surface modification layer M2 is formed increases as the focal point position of the internal laser light L2 approaches the device layer Dw. In this regard, in the present embodiment, even if the focal point position of the internal laser light L2 (the formation position of the internal surface modification layer M2) is brought closer to the device layer Dw, the leakage light that is about to transmit to the device layer Dw can be absorbed and scattered by the leakage light prevention layer M1. Therefore, the focal point position of the internal laser light L2 can be brought closer to the device layer Dw (more specifically, the target thickness in the grinding process), and the amount of grinding in the grinding process (step P4) can be reduced.

[0062] In the above-described embodiment, the ground wafer T after the separation of the first wafer W is sequentially subjected to a grinding process (step P4), a cleaning of the ground surface (step P5), and a wet etching process (step P6). However, when the condensing point position of the internal laser beam L2 can be sufficiently close to the device layer Dw in this way, the grinding process of the polymerized wafer T can be appropriately omitted. That is, the grinding process in step P4 described above is intended to reduce the device wafer Wd1 to a desired target thickness. However, if an internal surface modification layer M2 is formed near the desired target thickness position and the first wafer W can be separated near the target thickness position, the grinding process in step P4 can be omitted. In this case, the internal surface modification layer M2 remaining on the separation surface of the device wafer Wd1 can be removed by the wet etching process applied to the polymerized wafer T without performing the grinding process. Further, in such a wet etching process, the separation surface of the polymerized wafer T is planarized. Further, the separation surface of the polymerized wafer T planarized by the wet etching process may be further smoothed by the CMP process as described above.

[0063] In the above-described embodiment, as shown in FIG. 5(b), the crack C2 extending in the plane direction from the internal surface modification layer M2 reaches the outer peripheral edge of the first wafer W. However, in this case, as shown in FIG. 5(c), the device wafer Wd1 after the removal of the separated wafer Wd2 has a shape in which the peripheral edge We is sharply pointed (so-called knife edge shape). Then, chipping may occur at the peripheral edge We of the wafer, and the wafer may be damaged.

[0064] Therefore, in the wafer processing system 1 according to the present embodiment, in order to suppress the formation of the knife edge shape at the peripheral edge We, the peripheral edge We of the first wafer W may be removed integrally with the separated wafer Wd2 (so-called edge trim process). That is, the separation device 62 or the processing device 80 that separates the first wafer W can function as a peripheral removal unit that removes the peripheral edge We of the first wafer W.

[0065] Specifically, first, as shown in FIG. 7(a), in the interface modification device 60, the SiO 2 film is modified, and the light leakage prevention layer M1 is formed in the same manner as in the above embodiment.

[0066] When the light leakage prevention layer M1 is formed, next, as shown in FIG. 7(b), the focal position of the interface laser beam L1 (CO 2 laser) is changed to the device layer Dw or the surface film Fw (surface film Fw in the illustrated example) at the peripheral edge We of the first wafer W, and an unbonded region Ae where the bonding force between the first wafer W and the second wafer S is reduced is formed. The unbonded region Ae is formed, for example, by amorphizing or removing the irradiated portion of the interface laser beam L1.

[0067] When the unbonded region Ae is formed, next, as shown in FIG. 7(c), in the internal modification device 61, the internal surface modification layer M2 and the peripheral modification layer M3 are sequentially formed. The peripheral modification layer M3 serves as a base point for peeling (edge trimming) of the peripheral edge We. The formation order of the internal surface modification layer M2 and the peripheral modification layer M3 is not particularly limited. At this time, a crack C2 extends along the surface direction of the first wafer W from the internal surface modification layer M2, and a crack C3 extends along the thickness direction of the first wafer W from the peripheral modification layer M3. Also, the radially outer end of the crack C2 is connected to the peripheral modification layer M3 or the upper end of the crack C3 formed at the uppermost position (on the back surface Wb side of the first wafer W) inside the first wafer W as shown in FIG. 7(c). In other words, the crack C2 does not extend to the end of the first wafer W. Also, the crack C3 does not extend to the back surface Wb of the first wafer W.

[0068] Then, as shown in FIG. 7(d), based on the internal surface modification layer M2, the peripheral modification layer M3, and the cracks C2 and C3 formed inside the first wafer W, the first wafer W is separated into a device wafer Wd1 and a separation wafer Wd2 and thinned.

[0069] According to the example shown in FIG. 7, by removing the peripheral portion We of the first wafer W integrally with the separation wafer Wd2, it is possible to suppress the formation of a knife-edge shape at the peripheral portion of the device wafer Wd1. In the example shown in FIG. 7, the light leakage prevention layer M1 and the unbonded region Ae are formed in this order. However, the unbonded region Ae may be formed prior to the light leakage prevention layer M1.

[0070] In the embodiment shown in FIG. 5 or FIG. 7, the polymer wafer T to be processed has, as an example, the first wafer W in which an SiO 2 film, an Si film, a device layer Dw, and a surface film Fw are laminated. However, as described above, the SiO 2 film of the first wafer W may be an oxygen-doped silicon layer in which a part of the thickness of the first wafer W is modified by doping with oxygen (O 2 ). Hereinafter, the case where the polymer wafer T has the first wafer W on which an oxygen-doped silicon layer is formed as the SiO 2 film will be described.

[0071] In forming the oxygen-doped silicon layer on the first wafer W, first, as shown in FIG. 8(a), high-concentration oxygen (O) ions are implanted near the surface Wa of the first wafer W, and as shown in FIG. 8(b), an SiO 2 layer is formed as an insulating layer. At this time, the SiO 2 layer is formed at the position in the thickness direction of the first wafer W into which O ions are implanted. As a result, an SOI structure in which a single-crystalline silicon layer and an SiO 2 layer as an insulating layer are formed side by side in the thickness direction is formed on the first wafer W. Note that the implantation position of the oxygen ions (the height in the thickness direction inside the first wafer W) may be adjusted to a desired position as appropriate, but the implantation position is set closer to the surface Wa than the planned formation position of the internal surface modification layer M2 in the internal modification device 61.

[0072] In addition, for the SiO 2The method of forming the layer is not limited thereto. For example, instead of implanting high-concentration oxygen ions, after implanting high-concentration carbon (C) ions near the surface Wa of the first wafer W, the first wafer W implanted with carbon ions inside is subjected to heat treatment (annealing treatment) at a high temperature to form an oxygen precipitation layer.

[0073] When the SiO 2 layer is formed, next, as shown in FIG. 8(c), a device layer Dw and a surface film Fw are sequentially formed on the surface Wa side of the first wafer W. The device layer Dw includes a plurality of devices. The surface film Fw is, for example, a TEOS film. Next, as shown in FIG. 8(d), the first wafer W and the second wafer S are bonded to form a polymerized wafer T. The first wafer W and the second wafer S are bonded to each other via the surface films Fw and Fs, respectively.

[0074] The polymerized wafer T formed as described above is subsequently carried into the wafer processing system 1. The polymerized wafer T carried into the wafer processing system 1 is first transported to the interface modification device 60, and as shown in FIG. 9(a), the SiO 2 layer formed on the first wafer W is irradiated with the interface laser light L1, whereby the SiO 2 layer is modified to form an anti-leakage light layer M1.

[0075] Subsequently, the polymerized wafer T having the anti-leakage light layer M1 formed thereon is transported to the internal modification device 61, and as shown in FIG. 9(b), the internal laser light L2 is irradiated inside the first wafer W, whereby an internal surface modification layer M2 serving as a peeling base point of the first wafer W is formed. Further, cracks C2 extending in the plane direction of the first wafer W extend from the internal surface modification layer M2. At this time, inside the polymerized wafer T, since the light leakage prevention layer M1 is formed between the formation position of the inner surface modification layer M2 and the device layer Dw, it is possible to appropriately suppress the occurrence of the influence of light leakage on the device layer Dw when irradiating the internal laser beam L2. Further, since the light leakage prevention layer M1 is formed in this way, as shown in FIG. 9(b), the formation position of the inner surface modification layer M2 (the condensing point position of the internal laser beam L2) can be brought closer to the device layer Dw.

[0076] The polymerized wafer T on which the inner surface modification layer M2 is formed is subsequently transported to the separation device 62. In the separation device 62, as shown in FIG. 9(c), the first wafer W is separated into the device wafer Wd1 and the separation wafer Wd2 with the inner surface modification layer M2 and the crack C2 as the bases. Note that the device wafer Wd1 after the separation of the first wafer W may be transported to the cleaning device 41 and the separation surface may be cleaned.

[0077] Here, in the polymerized wafer T according to the present embodiment, as described above, the formation position of the inner surface modification layer M2 (the condensing point position of the internal laser beam L2) can be brought closer to the device layer Dw. In other words, the grinding amount of the first wafer W after separation in the processing device 80 can be reduced or eliminated. Therefore, in the present embodiment, the device wafer Wd1 after the separation of the first wafer W is transported to the etching device 40 without being transported to the processing device 80. In other words, in the present embodiment, as shown in FIG. 9(d), an etching process (removal and planarization of the inner surface modification layer M2) can be performed on the peeling surface of the polymerized wafer T (device wafer Wd1) thinned by separation without performing the grinding process in the processing device 80. Further, in this etching process, as shown in FIG. 9(d), the SiO 2 layer and the light leakage prevention layer M1 formed inside the first wafer W may be further removed.

[0078] Thereafter, the polymerized wafer T on which all the processes have been performed is carried out of the wafer processing system 1. Thus, a series of wafer processes in the wafer processing system 1 are completed.

[0079] In addition, the polymerized wafer T on which all the processes have been performed may be further subjected to CMP processing (smoothing processing) inside or outside the wafer processing system 1.

[0080] As described above, the configuration of the polymerized wafer T processed by the wafer processing system 1 is not particularly limited, and SiO as an oxygen-containing film 2 a film may be formed on the surface Wa of the first wafer W, or an SiO as an oxygen-containing film 2 layer may be formed inside the first wafer W. In any case, by forming the light leakage prevention layer M1 prior to the formation of the internal surface modification layer M2 with respect to the inside of the first wafer W, it is possible to appropriately prevent and suppress the influence of light leakage on the device layer Dw.

[0081] In addition, in the example shown in FIG. 9, the etching process was performed on the polymerized wafer T without performing the grinding process. However, depending on the formation position of the internal surface modification layer M2 inside the first wafer W, that is, the separation surface position of the first wafer W, it is possible to appropriately perform the grinding process.

[0082] In addition, in the above embodiment, the interface modification device 60 for forming the light leakage prevention layer M1 and the internal modification device 61 for forming the internal surface modification layer M2 (and the peripheral modification layer M3) are arranged independently, but these laser irradiation devices may be integrally configured.

[0083] That is, for example, as shown in FIG. 10, inside one laser irradiation device 160, one laser irradiation system 161 for irradiating the interface laser light L1 (CO 2 laser) and another laser irradiation system 162 for irradiating the internal laser light L2 (NIR light) may be arranged. One laser irradiation system 161 includes a laser head 161a and a lens 161b. The other laser irradiation system 162 includes a laser head 162a and a lens 162b. At this time, the first laser irradiation system 161 and the other laser irradiation system 162 may be independently arranged as shown in FIG. 10. Or, although not shown, the first laser irradiation system 161 and the other laser irradiation system 162 may be integrally configured, and for example, under the control of the control device 90, the irradiation of the interface laser light L1 and the internal laser light L2 may be configured to be switchable.

[0084] In addition, when the interface modification device 60 and the internal modification device 61 are integrally configured in this way, SiO 2 The irradiation of the interface laser light L1 on the film and the irradiation of the internal laser light L2 on the inside of the first wafer W may be performed simultaneously. More specifically, while moving the lens 161b, the interface laser light L1 is irradiated on the SiO 2 film, and the lens 162b is moved so as to follow the irradiation of the interface laser light L1 on the SiO 2 film, and the internal laser light L2 is irradiated. That is, in the above embodiment, after the leakage light prevention layer M1 is formed on the entire surface of the first wafer W, the formation of the internal surface modification layer M2 is subsequently performed. However, immediately after the leakage light prevention layer M1 is formed, the internal laser light L2 may be irradiated at a position corresponding to the formed leakage light prevention layer M1.

[0085] In such a case, it is desirable that the output of the internal laser light L2 or the relative distance between the irradiation axis of the interface laser light L1 and the irradiation axis of the internal laser light L2 is controlled so that the crack C2 that extends during the formation of the internal surface modification layer M2 does not reach directly under the irradiation of the interface laser light L1.

[0086] Thereby, since the formation of the leakage light prevention layer M1 and the formation of the internal surface modification layer M2 can be performed substantially simultaneously as described above, the time required for a series of processes on the polymerized wafer T in the wafer processing system 1 can be significantly shortened.

[0087] In the above embodiment, the interface laser light L1 is CO 2Although the case where the internal laser beam L2 is NIR light has been described as an example for the laser, the type of the laser beam is not particularly limited as long as the light leakage prevention layer M1 and the internal surface modification layer M2 can be appropriately formed.

[0088] In addition, in the above-described embodiment, the case where the wafer to be processed is an SIO wafer (for example, a SIMOX wafer) has been described as an example, but the structure of the wafer is not particularly limited, either.

[0089] The embodiments disclosed this time should be considered as illustrative in all respects and not restrictive. The above embodiments may be omitted, substituted, or changed in various forms without departing from the scope and gist of the appended claims.

Explanation of Reference Numerals

[0090] 1 Wafer processing system 60 Interface modification device 61 Internal modification device 80 Processing device 90 Control device Dw Device layer L1 Laser beam for interface L2 Internal laser beam M1 Light leakage prevention layer M2 Internal surface modification layer S Second wafer T Polymerized wafer W First wafer

Claims

1. A substrate processing method for processing a polymerized substrate in which a first substrate and a second substrate are bonded, comprising: A device layer including a plurality of devices is formed on the surface side of the first substrate; Irradiating a first laser beam onto an oxygen-containing film formed between a formation position of a modified layer serving as a base point for peeling the first substrate and the device layer to form a light leakage prevention layer; After forming the light leakage prevention layer, irradiating a second laser beam into the first substrate to form the modified layer; Peeling and thinning the first substrate with the modified layer as a base point.

2. The substrate processing method according to claim 1, wherein the polymerized substrate is a SIMOX substrate formed by laminating a single crystal semiconductor layer and an insulating layer.

3. The substrate processing method according to claim 1, wherein the light leakage prevention layer is an oxygen-doped silicon layer in which a part of the thickness of the first substrate is modified by oxygen doping.

4. The substrate processing method according to claim 1, wherein the light leakage prevention layer is an oxide film formed so as to coat the outer surface of the first substrate.

5. The substrate processing method according to any one of claims 1 to 4, wherein a lower end of the modified layer is located above a height position of a final finish thickness of the first substrate.

6. The substrate processing method according to any one of claims 1 to 4, wherein, when peeling the first substrate, the peripheral portion of the first substrate is peeled integrally with the back surface side of the first substrate to be removed.

7. Forming the light leakage prevention layer in a central region radially inside a peripheral portion of the first substrate to be removed; Forming an unbonded region in which a bonding force between the first substrate and the second substrate is reduced in a portion corresponding to the peripheral portion.

8. Performing a planarization process on a peeling surface of the polymerized substrate after thinning without performing a grinding process; Polishing the peeling surface of the polymerized substrate after planarization.

9. A substrate processing apparatus for processing a polymerized substrate in which a first substrate and a second substrate are bonded, comprising: A device layer including a plurality of devices is formed on the surface side of the first substrate; A first laser beam irradiation unit that irradiates a first laser beam onto an oxygen-containing film formed between a formation position of a modified layer serving as a base point for peeling the first substrate and the device layer to form a light leakage prevention layer; After forming the light leakage prevention layer, a second laser light irradiation unit that irradiates the inside of the first substrate with a second laser light to form the modified layer, a peeling unit that peels and thins the first substrate with the modified layer as a base point, a control unit, and a substrate processing apparatus comprising the same.

10. The substrate processing apparatus according to claim 9, wherein the first laser light irradiation unit and the second laser light irradiation unit are integrally configured.

11. The control unit according to claim 9 or 10, wherein the control unit executes control to form the modified layer such that the lower end of the modified layer is positioned above the height position of the final finish thickness of the first substrate.

12. The substrate processing apparatus according to claim 9 or 10, further comprising a peripheral removal unit that removes a peripheral portion of the first substrate.

13. The peripheral removal unit is integrally configured with the peeling unit, The control unit according to claim 12, wherein when peeling the first substrate, the control unit executes control to peel the peripheral portion of the first substrate integrally with the back surface side of the first substrate to be removed.

14. The control unit, control to form the light leakage prevention layer in a central region radially inside the peripheral portion of the first substrate to be removed, and control to form an unbonded region where the bonding force between the first substrate and the second substrate is reduced in a portion corresponding to the peripheral portion, the substrate processing apparatus according to claim 12.

15. The substrate processing apparatus according to claim 9 or 10, wherein the polymerized substrate is a SIMOX substrate formed by laminating a single crystal semiconductor layer and an insulating layer.

16. The substrate processing apparatus according to claim 9 or 10, wherein the light leakage prevention layer is an oxygen-doped silicon layer in which a part of the thickness of the first substrate is modified by oxygen doping.

17. The substrate processing apparatus according to claim 9 or 10, wherein the light leakage prevention layer is an oxide film formed to coat the outer surface of the first substrate.

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