Components for semiconductor manufacturing equipment

Abstract

In a member for a semiconductor manufacturing apparatus having a plurality of heater electrodes, the number of jumper electrode layers is reduced. A member for a semiconductor manufacturing apparatus includes a ceramic substrate having an upper surface on which a wafer can be placed, a terminal dense portion in which 10 or more terminals are arranged in a single section, a plurality of zoned heater electrodes, and a plurality of jumper electrode layers. Each jumper electrode layer is composed of a plurality of planar jumper electrodes electrically separated via an insulator. In at least one terminal dense portion, among all the terminals arranged in the terminal dense portion, 70% or more of the terminals are not electrically connected to the planar jumper electrodes located in an upper layer than any of the planar jumper electrodes to which other terminals having a distance from the outer peripheral edge of the terminal dense portion farther than themselves are electrically connected, and are electrically connected to a predetermined planar jumper electrode via a first via extending in the vertical direction.

Description

Technical Field

[0001] The present invention relates to a member for a semiconductor manufacturing apparatus.

Background Art

[0002] Conventionally, members for semiconductor manufacturing apparatuses used for holding, temperature control, conveyance, etc. of wafers are known. This type of member for a semiconductor manufacturing apparatus is also referred to as a wafer stage, an electrostatic chuck, a susceptor, etc., and generally has a function of applying electrostatic adsorption power to built-in electrodes to adsorb a wafer by electrostatic force.

[0003] Processes for wafers are diverse, such as etching and CVD, and the optimal temperature distribution of the wafer also varies depending on the type of process. For this reason, members for semiconductor manufacturing apparatuses are required to have the performance of controlling the temperature distribution of wafers. In order to meet such requirements, members for semiconductor manufacturing apparatuses with multi-zone heaters having a ceramic substrate incorporating a plurality of heater electrodes are known.

[0004] Japanese Unexamined Patent Application Publication No. 2021-015933 describes that a heater electrode layer having a plurality of heater electrodes formed of a conductive material, a driver electrode layer having a plurality of driver electrodes for power supply to the heater electrode layer, and various vias are disposed inside a plate-like member made of ceramics. Further, the publication describes that a plurality of power supply pads are arranged side by side in a direction substantially orthogonal to the vertical direction in a positioning recess on the lower surface of the plate-like member, and each power supply pad is electrically connected to the driver electrode of the driver electrode layer via a via. The drawings of the publication depict a state in which a plurality of driver electrodes are arranged at different height positions.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] In such a member for a semiconductor manufacturing apparatus with a multi-zone heater, in order to cope with more precise wafer processing, it is required to enhance the performance of controlling the temperature distribution of the wafer. In order to enhance the performance of controlling the temperature distribution of the wafer, it is necessary to increase the number of zones by increasing the number of heater electrodes. However, as the number of heater electrodes increases, the number of driver electrodes (hereinafter referred to as "jumper electrodes" in this specification) for supplying power to the heater electrodes also increases. When the number of jumper electrodes increases, it becomes necessary to stack the jumper electrodes in multiple layers, and further, the number of those layers also increases. Therefore, there is a problem that the manufacturing process of the ceramic substrate increases and the manufacturing cost of the member for a semiconductor manufacturing apparatus tends to rise.

[0007] In view of the above circumstances, an object of the present invention in one embodiment is to reduce the number of layers of the jumper electrode layer in a member for a semiconductor manufacturing apparatus including a plurality of zoned heater electrodes.

Means for Solving the Problems

[0008] As a result of intensive studies to solve the above problems, the present inventor has created the present invention exemplified below. [Aspect 1] An upper surface on which a wafer can be placed, A terminal dense portion in which 10 or more terminals are arranged within a single section, A plurality of zoned heater electrodes, A plurality of jumper electrode layers that electrically connect the plurality of heater electrodes and each terminal of the terminal dense portion and are stacked in the vertical direction via an insulator, A member for a semiconductor manufacturing apparatus including a ceramic substrate having the above, Each jumper electrode layer is composed of a plurality of planar jumper electrodes electrically separated via an insulator, In at least one of the terminal dense portions, while satisfying the condition that among all the terminals arranged in the terminal dense portion, terminals with a number of 70% or more are not electrically connected to planar jumper electrodes located above any planar jumper electrodes to which other terminals farther from the outer peripheral edge of the terminal dense portion than themselves are electrically connected, they are electrically connected to a predetermined planar jumper electrode via first vias extending in the vertical direction. Each of the plurality of planar jumper electrodes is electrically connected to a first connection portion of a predetermined heater electrode selected from the plurality of heater electrodes via second vias extending in the vertical direction. A member for a semiconductor manufacturing apparatus. [Aspect 2] In at least one of the terminal dense portions, at least one terminal T 1 is electrically connected to a planar jumper electrode located above at least one other terminal T 2 whose distance from the outer peripheral edge of the terminal dense portion is farther than itself, and the distance between the at least one terminal T 1 and the outer peripheral edge is M 1 (mm), and the distance between the at least one other terminal T 2 and the outer peripheral edge is M 2 (mm). Then, for Equation 1: M 1 < M 2 ≦ M 1 +2 holds for all terminals T 1 . The member for a semiconductor manufacturing apparatus according to Aspect 1. [Aspect 3] In at least one of the terminal dense portions, while satisfying the condition that all the terminals arranged in the terminal dense portion are not electrically connected to planar jumper electrodes located above any planar jumper electrodes to which other terminals farther from the outer peripheral edge of the terminal dense portion than themselves are electrically connected, they are electrically connected to a predetermined planar jumper electrode via first vias extending in the vertical direction. The member for a semiconductor manufacturing apparatus according to Aspect 1. [Aspect 4] Among the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal dense portion in each single compartment, at least one jumper electrode layer is a member for a semiconductor manufacturing apparatus according to any one of Aspects 1 to 3, which is composed of 8 to 12 planar jumper electrodes. [Aspect 5] When the total number of all the jumper electrode layers electrically connected to 10 or more terminals constituting the terminal dense portion in each single compartment is A, the number of a plurality of planar jumper electrodes constituting the Nth (N is a natural number from 1 to A) jumper electrode layer from the lowermost layer is the same as or less than the number of a plurality of planar jumper electrodes constituting the (N - 1)th jumper electrode layer from the lowermost layer, and the number of a plurality of planar jumper electrodes constituting the uppermost jumper electrode layer is less than the number of a plurality of planar jumper electrodes constituting the lowermost jumper electrode layer. A member for a semiconductor manufacturing apparatus according to any one of Aspects 1 to 4. [Aspect 6] Among the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal dense portion in each single compartment, each of the plurality of planar jumper electrodes constituting at least one jumper electrode layer has a planar shape having, as components, two line segments adjacent to each other at the same angle with the position of the first via as the vertex. A member for a semiconductor manufacturing apparatus according to any one of Aspects 1 to 5. [Aspect 7] Each of the plurality of heater electrodes has a second connection portion, and the second connection portion is connected to a common terminal for grounding via a common jumper. A member for a semiconductor manufacturing apparatus according to any one of Aspects 1 to 6. [Aspect 8] The common jumper is electrically connected to the common terminal via a third via extending in the vertical direction, and the diameter of the third via is larger than the diameter of the first via. A member for a semiconductor manufacturing apparatus according to Aspect 7. [Aspect 9] In each jumper electrode layer of the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal dense portion in each single partition, adjacent planar jumper electrodes are electrically separated via a linear insulator, and the linear insulator is a member for a semiconductor manufacturing apparatus according to any one of Aspects 1 to 8 in which it does not linearly overlap in the vertical direction with any of the linear insulators in different jumper electrode layers. [Aspect 10] Among the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal dense portion in each single partition, all of the plurality of planar jumper electrodes constituting at least one jumper electrode layer are spaced 0.3 mm or more from adjacent planar jumper electrodes in the same layer, and the member is for a semiconductor manufacturing apparatus according to any one of Aspects 1 to 9. [Advantages of the Invention]

[0009] According to the member for a semiconductor manufacturing apparatus according to one embodiment of the present invention, by increasing the number of heater electrodes, it is possible to reduce the number of layers of the jumper electrodes when the jumper electrodes are made multilayered. Therefore, it is possible to manufacture at low cost a member for a semiconductor manufacturing apparatus with a multi-zone heater that enhances the temperature distribution control performance of the wafer. [Brief Description of the Drawings]

[0010]

Figure 1

Figure 2

Figure 3-1

Figure 3-2

Figure 4-1

Figure 4-2

Figure 5

Figure 6

Figure 7

Embodiments for Carrying Out the Invention

[0011] Next, embodiments of the present invention will be described in detail with reference to the drawings. It should be understood that the present invention is not limited to the following embodiments, and within the scope not departing from the gist of the present invention, design changes, improvements, etc. can be appropriately added based on the ordinary knowledge of those skilled in the art. Also, in this specification, "upper" and "lower" are used to conveniently represent the relative positional relationship when the upper surface on which a wafer of a member for a semiconductor manufacturing apparatus can be placed is on the upper side and placed on a horizontal plane, and do not represent an absolute positional relationship. Therefore, depending on the orientation of the member for a semiconductor manufacturing apparatus, "upper" and "lower" can become "lower" and "upper", or "left" and "right", or "front" and "back".

[0012] <1. Configuration of a Member for a Semiconductor Manufacturing Apparatus> Referring to FIGS. 1 and 2, a member 10 for a semiconductor manufacturing apparatus according to an embodiment of the present invention can be used when performing processes such as CVD and etching on a wafer W using plasma, and can be fixed to an installation plate (not shown) provided inside a chamber for a semiconductor process. The member 10 for a semiconductor manufacturing apparatus includes a ceramic substrate 20 and a base plate 30 located on the lower surface 23 side of the ceramic substrate 20 and having a refrigerant flow path 32 built therein. The ceramic substrate 20 and the base plate 30 can be joined by, for example, a joining layer 40.

[0013] (1-1. Ceramic Substrate) The ceramic substrate 20 according to an embodiment of the present invention has an upper surface 21a on which the wafer W can be placed, a terminal dense portion 52 in which 10 or more terminals 52a are arranged within a single compartment, a plurality of zoned heater electrodes 27, and a plurality of jumper electrode layers 29 that electrically connect the plurality of heater electrodes 27 and each terminal 52a of the terminal dense portion 52 and are stacked in the vertical direction via an insulator 28. And has.

[0014] More specifically, the ceramic substrate 20 according to an embodiment of the present invention includes a central portion 20a having a circular upper surface 21a in plan view and an outer peripheral portion 20b having an annular upper surface 21b in plan view on the outer periphery of the central portion 20a. The wafer W can be placed on the upper surface 21a, and the focus ring 78 can be placed on the upper surface 21b. The ceramic substrate 20 is formed of a ceramic material typified by alumina, aluminum nitride, etc. The upper surface 21b of the outer peripheral portion 20b is one step lower than the upper surface 21a of the central portion 20a. The lower surfaces 23 of the central portion 20a and the outer peripheral portion 20b may be on the same plane. The ceramic substrate 20 may have a central portion 20a but not have an outer peripheral portion 20b, that is, may not have a one-step lower upper surface 21b.

[0015] In the embodiment shown in FIG. 1, the upper surface of the focus ring 78 and the upper surface of the wafer W are flush, but the upper surface of the focus ring 78 may be at a position higher than that of the wafer. In the embodiment shown in FIG. 1, the outer diameter of the focus ring 78 and the outer diameter of the outer peripheral portion 20b of the ceramic substrate 20 coincide, but the outer diameters of the two may not be the same.

[0016] A plurality of small protrusions (not shown) may be provided on the upper surface 21a on which the wafer W can be placed. Also, a seal band (not shown) may be formed along the outer edge of the upper surface 21a. In this case, the wafer W may be supported by the top surface of the seal band and the top surfaces of the plurality of small protrusions.

[0017] The central portion 20a of the ceramic substrate 20 can be, for example, 190 to 450 mm in diameter and 1 to 20 mm in thickness. Also, the central portion 20a of the ceramic substrate 20 can incorporate an electrostatic chucking electrode 26 on the side closer to the upper surface 21a. The electrostatic chucking electrode 26 can be formed of a material containing, for example, W, Mo, WC, MoC, etc. The electrostatic chucking electrode 26 can be, for example, a planar electrode. The ceramic substrate 20 may incorporate one layer of the electrostatic chucking electrode 26, or may incorporate two or more layers with a space therebetween.

[0018] The electrostatic chucking electrode 26 is connected to an external DC power supply via a power supply member (not shown). A low-pass filter may be arranged in the middle of the power supply member. The power supply member is electrically insulated from the bonding layer 40 and the base plate 30. When a DC voltage is applied to the electrostatic chucking electrode 26, the wafer W is adsorbed and fixed to the upper surface 21a by the electrostatic adsorption force, and when the application of the DC voltage is released, the adsorption and fixation of the wafer W to the upper surface 21a is released. The ceramic substrate 20 may incorporate an RF electrode for plasma generation instead of or in addition to the electrostatic chucking electrode 26.

[0019] Further, the ceramic substrate 20 has a plurality of zoned heater electrodes 27. The plurality of heater electrodes 27 are arranged, for example, such that a plurality of zones are formed in a plane direction parallel to the upper surface 21a of the ceramic substrate 20. Each of the zoned heater electrodes 27 can control its output. As a result, since the upper surface 21a of the ceramic substrate 20 is divided into a plurality of zones and temperature control can be performed for each zone, it is possible to enhance the performance of controlling the temperature distribution of the wafer.

[0020] The heater electrode 27 may be installed only at the central portion 20a of the ceramic substrate 20, but the heater electrode 27 may also be installed at the outer peripheral portion 20b of the ceramic substrate 20 (i.e., under the focus ring 78).

[0021] In order to enhance the performance of controlling the temperature distribution of the wafer, the ceramic substrate 20 preferably has 10 or more heater electrodes 27 in total, more preferably 50 or more, and even more preferably 100 or more. Each heater electrode 27 can be a linear electrode that extends in a single stroke in a direction parallel to the upper surface 21a of the ceramic substrate 20, for example. Each heater electrode 27 has a first connection portion 27a that is a connection location with the second via 62 and a second connection portion 27b that is a connection location with the fourth via 64.

[0022] The heater electrode 27 can be formed of, for example, a mixed material of metal and ceramic. Examples of the metal include Ru, W, Mo, etc., and one kind or a combination of two or more kinds can be used, but a material having a thermal expansion coefficient close to that of the ceramic material constituting the ceramic substrate 20 is preferred. As the ceramic, it is preferable to use the same material as the ceramic substrate 20 (e.g., alumina, aluminum nitride). By forming the heater electrode 27 with such a mixed material, the risk of cracks occurring between the heater electrode 27 and the ceramic substrate 20 due to the thermal expansion difference between the two can be reduced.

[0023] Each jumper electrode layer 29 is composed of a plurality of planar jumper electrodes 29a electrically separated via an insulator 29b (see FIG. 6). Since the jumper electrode 29a is planar, there is an advantage that heat generation of the jumper electrode can be suppressed as compared with the case where it is linear. That the jumper electrode 29a is planar means that the jumper electrode 29a extends in a plane direction parallel to the upper surface 21a of the ceramic substrate 20, and typically can be flat (e.g., foil-like), but may have an uneven shape such as a mesh shape. The thickness of each planar jumper electrode 29a can be, for example, 10 to 100 μm, and typically can be 20 to 50 μm.

[0024] At least one jumper electrode layer 29, preferably more than half of the jumper electrode layers 29, more preferably all of the plurality of planar jumper electrodes 29a constituting all of the jumper electrode layers 29, among the plurality of jumper electrode layers 29 connected to ten or more terminals constituting the terminal dense portion 52 within each single partition 55, are each preferably such that the distance D from an adjacent planar jumper electrode 29a within the same layer is 0.1 mm or more, more preferably 0.2 mm or more, and still more preferably 0.3 mm or more (see FIG. 4). Thereby, the risk that adjacent planar jumper electrodes 29a are electrically connected to cause a malfunction can be reduced. On the other hand, from the viewpoint of reducing the risk that the heat generation increases due to the narrowing of the jumper electrode width, the distance D is preferably 2 mm or less, more preferably 1.5 mm or less, and still more preferably 1 mm or less. Therefore, at least one jumper electrode layer 29, preferably more than half of the jumper electrode layers 29, more preferably all of the plurality of planar jumper electrodes 29a constituting all of the jumper electrode layers 29, among the plurality of jumper electrode layers 29 connected to ten or more terminals constituting the terminal dense portion 52 within each single partition 55, are each preferably such that the distance D from an adjacent planar jumper electrode 29a within the same layer is 0.1 to 2 mm, more preferably 0.2 to 1.5 mm, and still more preferably 0.3 to 1 mm.

[0025] The area (excluding the opening) of one planar jumper electrode 29a when viewed in plan is preferably 450 mm 2 or more, more preferably 700 mm 2 or more, and even more preferably 1400 mm 2 or more. Also, the area (excluding the opening) of one planar jumper electrode 29a when viewed in plan is preferably 15000 mm 2 or less, more preferably 7000 mm 2 or less, and even more preferably 4000 mm 2 or less. Therefore, the area (excluding the opening) of one planar jumper electrode 29a when viewed in plan is preferably, for example, 450 to 15000 mm 2 , more preferably 700 to 7000 mm 2 , and even more preferably 1400 to 4000 mm 2 .

[0026] Each terminal 52a of the terminal dense portion 52 is electrically connected to a predetermined planar jumper electrode 29a via a first via 61 extending in the vertical direction. Each terminal 52a can be fixed to the ceramic substrate 20 by, for example, soldering. Also, each terminal 52a of the terminal dense portion 52 can be connected to a power supply member (not shown) connected to the heater power supply. There is no particular limitation on each terminal 52a, but it can be, for example, a rigid rod shape extending in the vertical direction or a flexible wire.

[0027] Each of the plurality of planar jumper electrodes 29a is electrically connected to a first connection portion 27a of a predetermined heater electrode 27 selected from the plurality of heater electrodes 27 via a second via 62 extending in the vertical direction. Each second connection portion 27b of the plurality of heater electrodes 27 can be electrically connected to a common terminal 72 via a common jumper 71. The common terminal 72 can be connected to, for example, a ground (earth) wire. Also, the common terminal 72 may be connected to a heater power source. The common jumper 71 can be electrically connected to the common terminal 72 via a third via 63 extending in the vertical direction. Also, the second connection portion 27b can be electrically connected to the common jumper 71 via a fourth via 64 extending in the vertical direction. In the illustrated embodiment, the common terminal 72 is inserted inside the ceramic substrate 20 and can be fixed by soldering. With this configuration, the bonding strength of the common terminal 72 can be increased. However, the common terminal 72 only needs to be electrically connected to the common jumper 71 and does not need to be inserted inside the ceramic substrate 20. For example, the common terminal 72 may be fixed by soldering to the lower surface 23 of the ceramic substrate 20 or the bottom surface of a recess 35 provided in the lower surface 23.

[0028] The common jumper 71 can be formed at a height position different from that of the jumper electrode layer 29 and the heater electrode 27 via an insulator 28. In the embodiment shown in FIG. 1, the common jumper 71 is formed between the jumper electrode layer 29 and the heater electrode 27. The position of the common jumper 71 is not limited to this, and for example, it can also be provided at a position in an upper layer than the heater electrode 27.

[0029] One common jumper 71 can electrically connect all or part of the plurality of terminals included in one or more terminal dense portions 52. In one embodiment, all of the plurality of terminals included in one terminal dense portion 52 may be electrically connected to one common jumper 71. In another embodiment, some of the plurality of terminals included in one terminal dense portion 52 may be electrically connected to one common jumper 71, and the other terminals may be electrically connected to another common jumper 71. While having more common jumpers 71 has the advantage of current dispersion and heat generation suppression, an increase in the number of common terminals 72 has the disadvantages of increased cost and wiring complexity. Therefore, the member 10 for a semiconductor manufacturing apparatus preferably has 1 to 5 common jumpers 71 as a whole, and more preferably has 1 to 3 common jumpers 71.

[0030] In a preferred embodiment, the common jumper 71 is planar. By the common jumper 71 being planar, the advantage of heat generation suppression can be obtained compared to the case where it is linear. For the common jumper 71 to be planar means that the common jumper extends in a plane direction parallel to the upper surface 21a of the ceramic substrate 20, and typically can be flat (e.g., foil-like), but may also have an uneven shape such as a mesh shape. The thickness of the common jumper 71 can be, for example, 10 to 100 μm, and typically can be 30 to 80 μm. Also, the area (excluding the openings) of one common jumper 71 when viewed in plan is preferably 3500 mm 2 or more, more preferably 7000 mm 2 or more, and even more preferably 14000 mm 2 or more, for the reason of heat generation suppression. Also, the area (excluding the openings) of one common jumper 71 when viewed in plan is preferably 70000 mm 2 or less, and more preferably 40000 mm 2 or less, for the reason of simplification of electrode zoning. Therefore, the area (excluding the openings) of one common jumper 71 when viewed in plan is, for example, 3500 to 70000 mm2 is preferably in the range of 7000 to 40000 mm 2 is more preferably in the range of 14000 to 40000 mm 2 is even more preferably so.

[0031] For one terminal dense portion 52, one common terminal 72 may be provided, or a plurality of common terminals 72 may be provided. However, from the viewpoint of suppressing heat generation due to current concentration in the common terminal, it is preferable to provide a plurality of common terminals 72 for one terminal dense portion 52.

[0032] In the illustrated embodiment, the common terminal 72 is provided in a recess 35 provided on the lower surface 23 of the ceramic substrate 20. The recess 35 may not be provided. The common terminal 72 can be joined to the ceramic substrate 20 by, for example, brazing or soldering. There is no particular limitation on the common terminal 72, but for example, it can be a rigid rod shape extending in the vertical direction or a flexible cable.

[0033] The planar jumper electrode 29a and the common jumper 71 can be formed of, for example, a mixed material of one or more selected from W, Mo, and Ru and ceramics. The first via 61, the second via 62, the third via 63, and the fourth via 64 can be formed of, for example, a mixed material of one or more selected from W, Mo, and Ru and ceramics. The terminal 52a and the common terminal 72 can be formed of materials such as Mo and Kovar (Fe-Ni-Co alloy), for example.

[0034] Since the current supplied through each terminal 52a concentrates in the third via 63, it is likely to generate heat. Therefore, in order to suppress excessive heat generation of the third via 63, the diameter of the third via 63 is preferably larger than the diameter of the first via. The diameter X of the third via 3 of the first via 1 The ratio to X may be appropriately set in consideration of the current flowing through the third via. Exemplarily, 2 ≦ X 3 / X 1It can be set to ≤25, and typically, 4 ≤ X 3 / X 1 can be set to ≤10.

[0035] The diameter X of the first via 1 can be, for example, 50 to 1000 μm, and typically can be 100 to 400 μm. The diameter X of the second via 2 can be, for example, 50 to 1000 μm, and typically can be 100 to 400 μm. The diameter X of the third via 3 can be, for example, 300 to 5000 μm, and typically can be 500 to 2000 μm. The diameter X of the fourth via 4 can be, for example, 50 to 1000 μm, and typically can be 100 to 400 μm.

[0036] In this specification, the diameters of the first, second, third, and fourth vias refer to the equivalent circle diameters in the cross-section perpendicular to the extending direction of each via.

[0037] The terminal dense portion 52 is a portion where 10 or more terminals 52a are arranged within a single section 55 (see FIG. 3). In the embodiment shown in FIG. 1, only one terminal dense portion 52 is shown. Due to the relationship of the wiring for supplying power to the terminals, the ceramic substrate 20 may be provided with a plurality of terminal dense portions 52, that is, a plurality of single sections 55. There is no particular limitation on the number of terminals 52a arranged in the terminal dense portion 52 within the single section 55, but illustratively, it can be 10 to 100, and typically can be 20 to 70. In the embodiment shown in FIG. 1, the terminal dense portion 52 is provided in a recess 34 provided on the lower surface 23 of the ceramic substrate 20, and the single section 55 is partitioned by the recess 34. The recess 34 may not be provided. Also, from the viewpoints of space saving and ensuring insulation between terminals, the number density of the terminals 52a arranged in the terminal dense portion 52 is preferably 10 to 100 pieces / cm 2 and more preferably 30 to 90 pieces / cm 2 and even more preferably 50 to 80 pieces / cm2 It is even more preferable to do so. The number density of the terminals 52a arranged in the terminal dense portion 52 is obtained by dividing the number of terminals arranged in the terminal dense portion 52 by the area of the region surrounded by the outer peripheral edge 54 of the terminal dense portion 52. The definition of the outer peripheral edge 54 will be described later.

[0038] From the viewpoints of space saving and ensuring insulation between terminals, for each of the 10 or more terminals 52a arranged in the single section 55, the shortest distance X (insulated distance) from the nearest terminal 52a among the adjacent terminals 52a is preferably 0.3 to 2 mm, more preferably 0.5 to 1.5 mm, and even more preferably 0.7 to 1.3 mm (see FIGS. 3-1 and 4-1).

[0039] The plurality of jumper electrode layers 29 electrically connect the plurality of heater electrodes 27 and the respective terminals 52a of the terminal dense portion 52, and are laminated in the vertical direction via the insulator 28. The distance between the jumper electrode layers 29 adjacent in the vertical direction (equal to the thickness T of the insulator 28 between the layers) is preferably 0.02 to 1 mm, more preferably 0.02 to 0.5 mm, and even more preferably 0.02 to 0.2 mm, from the balance of ensuring insulation between the jumper electrode layers 29 adjacent in the vertical direction and thinning the ceramic substrate 20 to reduce the manufacturing cost.

[0040] Since the manufacturing cost increases as the number of the jumper electrode layers 29 increases due to the increase in the number of lamination times, it is desirable to reduce the number of the jumper electrode layers 29 as much as possible. In order to reduce the jumper electrode layer 29, it is preferable that each jumper electrode layer 29 has a plurality of planar jumper electrodes 29a.

[0041] Therefore, in one embodiment, each jumper electrode layer 29 can be composed of a plurality of planar jumper electrodes 29a electrically separated via an insulator 29b (see FIG. 6). A larger number of jumper electrodes 29a in the same jumper electrode layer 29 helps reduce the number of jumper electrode layers 29, but it is not advisable to have an excessive number as heat generation increases when the width of each jumper electrode 29a becomes narrow. Thus, among the plurality of jumper electrode layers 29 electrically connected to the ten or more terminals 52a constituting the terminal dense portion 52 within each single section 55, at least one jumper electrode layer 29, preferably more than half of the jumper electrode layers 29, and more preferably all of the jumper electrode layers 29 are each preferably composed of 5 to 15 planar jumper electrodes 29a, and more preferably composed of 8 to 12 planar jumper electrodes 29a.

[0042] As the insulator 29b that electrically separates the plurality of planar jumper electrodes 29a, for example, the ceramics (such as alumina and / or aluminum nitride, etc.) constituting the ceramic substrate 20 can be adopted. Also, without being limited to this, as the insulator 29b, a different type of ceramics from the ceramics constituting the ceramic substrate 20 may be adopted.

[0043] Each terminal 52a of the terminal dense portion 52 is electrically connected to a predetermined planar jumper electrode 29a via a first via 61 extending in the vertical direction. One terminal 52a may be electrically connected to a plurality of planar jumper electrodes 29a, or a plurality of terminals 52a may be electrically connected to one planar jumper electrode 29a. In a preferred embodiment, each terminal 52a is connected to a predetermined one planar jumper electrode 29a.

[0044] In order to reduce the number of jumper electrode layers 29, it is necessary to electrically connect a large number of terminals 52a arranged in the terminal dense portion 52 to each jumper electrode 29a with high space efficiency. Specifically, it is desirable to connect the first vias 61 connected to the terminals 52a on the outer peripheral side of the terminal dense portion 52 to the lower layer side jumper electrode layer 29, and connect the first vias 61 connected to the terminals 52a on the inner peripheral side to the upper layer side jumper electrode layer 29. Therefore, in one embodiment, in at least one terminal dense portion 52, among all the terminals 52a arranged in the terminal dense portion 52, 70% or more, preferably 80% or more, and more preferably all of the terminals 52a arranged in the terminal dense portion 52 are not electrically connected to the planar jumper electrode 29a located above any planar jumper electrode 29a to which another terminal 52a having a distance from the outer peripheral edge 54 of the terminal dense portion 52 farther than itself is electrically connected, while being electrically connected to a predetermined planar jumper electrode 29a through the first via 61 extending in the vertical direction. That is, when comparing terminal A with a short distance from the outer peripheral edge 54 of the terminal dense portion 52 and terminal B with a distance from the outer peripheral edge 54 of the terminal dense portion 52 farther than terminal A, the planar jumper electrode 29a to which terminal A is connected preferably belongs to the same jumper electrode layer 29 as the planar jumper electrode 29a to which terminal B is connected, or belongs to the jumper electrode layer 29 located below the planar jumper electrode 29a to which terminal B is connected.

[0045] Among all the terminals 52a arranged in the terminal dense portion 52, some of the terminals 52a do not have to satisfy the above conditions. Therefore, in at least one terminal dense portion 52, at least one terminal 52a (T 1 ) may be electrically connected to a planar jumper electrode 29a located above at least one other terminal 52a (T 2 ) to which a distance from the outer peripheral edge 54 of the terminal dense portion 52 farther than itself is electrically connected. However, the distance between the at least one terminal 52a (T 1 ) and the outer peripheral edge 54 is M1 in millimeters (mm), and the distance between the at least one other terminal 52a (T 2 ) and the outer peripheral edge 54 is M 2 in millimeters (mm). Then, Equation 1: M 1 < M 2 ≦ M 1 +2 should hold for all terminals 52a (T 1 ).

[0046] When the ceramic substrate 20 has a plurality of terminal-dense portions 52, it is preferable that more than half of the terminal-dense portions 52 satisfy the above conditions, and it is more preferable that all the terminal-dense portions 52 satisfy the above conditions. There is no particular limitation on the number of the terminal-dense portions 52, and it may be appropriately set according to the area of the upper surface 21a which is the wafer mounting surface of the ceramic substrate 20, the number of the heater electrodes 27, the number of the jumper electrode layers 29, etc. Exemplarily, it can be 1 to 10, and typically it can be 1 to 5.

[0047] FIG. 3-1 and FIG. 4-1 show Arrangement Example 1 and Arrangement Example 2 when observing the terminal-dense portion 52 in the single section 55 from the lower surface 23 side of the ceramic substrate 20. The outer peripheral edge 54 of the terminal-dense portion 52 is defined as a convex hull (the smallest convex set) that includes all the terminals 52a in the single section 55 to which the terminal-dense portion 52 belongs. Also, the distance between each terminal 52a and the outer peripheral edge 54 refers to the shortest distance M from the center of gravity of the terminal 52a to the outer peripheral edge 54 when observing the terminal 52a from the direction perpendicular to the surface to which the terminal 52a is connected.

[0048] FIG. 3-2 exemplarily shows a diagram for explaining the assignment in the case where each terminal 52a of the terminal dense portion 52 according to Arrangement Example 1 is electrically connected to the planar jumper electrode 29a of the jumper electrode layer 29 composed of five layers via the first via 61. In other words, FIG. 3-2 exemplarily shows to which layer from the lowermost layer (layer 1) to the uppermost layer (layer 5) of the jumper electrode layer 29 each terminal 52a of the terminal dense portion 52 is electrically connected. Eleven terminals 52a located at the outermost periphery are assigned to the first layer. Nine terminals 52a located at the outermost periphery and two terminals 52a located one step inward from the outermost periphery are assigned to the second layer. Ten terminals 52a located one step inward from the outermost periphery are assigned to the third layer. Six terminals 52a located one step inward from the outermost periphery and three terminals 52a located two steps inward from the outermost periphery are assigned to the fourth layer. Nine terminals 52a located two steps inward from the outermost periphery are assigned to the fifth layer.

[0049] In Arrangement Example 1, for all terminals 52a, the condition that they are not electrically connected to the planar jumper electrodes located in a layer above any of the planar jumper electrodes to which other terminals whose distance from the outer peripheral edge 54 of the terminal dense portion 52 is farther than themselves are electrically connected is satisfied.

[0050] FIG. 4-2 exemplarily shows a diagram for explaining the assignment in the case where each terminal 52a of the terminal dense portion 52 according to Arrangement Example 2 is electrically connected to the planar jumper electrode 29a of the jumper electrode layer 29 composed of five layers via the first via 61. In other words, FIG. 4-2 exemplarily shows to which layer from the lowermost layer (layer 1) to the uppermost layer (layer 5) of the jumper electrode layer 29 each terminal 52a of the terminal dense portion 52 is electrically connected. Eleven terminals 52a are assigned to the first layer. Eleven terminals 52a are assigned to the second layer. Ten terminals 52a are assigned to the third layer. Ten terminals 52a are assigned to the fourth layer. Eight terminals 52a are assigned to the fifth layer.

[0051] In Configuration Example 2, a total of 50 terminals 52a are arranged in the terminal dense portion 52. In FIG. 4-2, 13 terminals 52a (9 in the second layer and 4 in the fourth layer) surrounded by thick circles do not satisfy the condition that they are not electrically connected to planar jumper electrodes located in an upper layer than any planar jumper electrodes to which other terminals 52a farther from the outer peripheral edge 54 of the terminal dense portion 52 are electrically connected. The other 37 terminals 52a (74%) satisfy the condition.

[0052] In a preferred embodiment, when the total number of all layers of the plurality of jumper electrode layers 29 electrically connected to 10 or more terminals 52a constituting the terminal dense portion 52 in each single compartment 55 is A, the number of the plurality of planar jumper electrodes 29a constituting the Nth (N is a natural number from 1 to A) jumper electrode layer 29 from the lowermost layer is the same as or less than the number of the plurality of planar jumper electrodes 29a constituting the (N-1)th jumper electrode layer 29 from the lowermost layer, and the number of the plurality of planar jumper electrodes 29a constituting the uppermost jumper electrode layer 29 is less than the number of the plurality of planar jumper electrodes 29a constituting the lowermost jumper electrode layer 29. A wider inter-electrode distance of the jumper electrode 29a is preferable from the viewpoint of insulation between electrodes, and a wider electrode width is preferable from the viewpoint of heat generation suppression. However, by adopting the configuration in which the jumper electrodes connected to the outer peripheral side terminals where it is easy to secure the inter-electrode distance and the electrode width are arranged on the lower layer side, the advantage that the jumper electrodes can be arranged efficiently with a minimum number of layers can be obtained.

[0053] FIG. 5 shows examples of the shapes of a plurality of planar jumper electrodes 29a that constitute each of the first to fifth jumper electrode layers 29 and an example of the shape of a common jumper when the upper surface 21a, which is the wafer mounting surface of the ceramic substrate 20, is circular, the number of terminal dense portions 52 is 3, and the number of jumper electrode layers 29 is 5. In the embodiment shown in FIG. 5, the planar shape of one jumper electrode layer 29 electrically connected to a plurality of terminals 52a included in one terminal dense portion 52 is a substantially fan shape with the center of the circle formed by the upper surface 21a as the reference for the central angle. In the embodiment shown in FIG. 5, three jumper electrode layers 29 are arranged at the same height position from the first layer to the fifth layer. The three jumper electrode layers 29 are each electrically connected to the corresponding terminal dense portion 52. The three jumper electrode layers 29 at the same height position (the same number) are arranged as a whole so as to correspond to the planar shape (circular in FIG. 5) of the upper surface 21a, which is the wafer mounting surface.

[0054] In the embodiment shown in FIG. 5, the three jumper electrode layers 29 at the same height position (the same number) are all substantially fan-shaped with substantially the same central angle (specifically, 120°) and are electrically separated from each other via a linear insulator 29c (e.g., ceramic) extending along the radius. It is preferable that the linear insulator 29c that electrically separates the adjacent jumper electrode layers 29 does not linearly overlap with any of the linear insulators 29c in different jumper electrode layers 29 in the vertical direction. FIG. 7 shows a schematic diagram when a plurality of planar jumper electrodes constituting the five-layer jumper electrode layer illustrated in FIG. 5 are virtually seen from above in perspective. Thereby, the risk of cracks occurring in the ceramic substrate 20 can be reduced. The line width of the linear insulator 29c (equal to the distance between adjacent jumper electrode layers 29) is not limited, but can be, for example, 0.3 to 2 mm, and typically can be 0.3 to 1 mm.

[0055] FIG. 6 exemplarily shows schematic plan views of the jumper electrode layers 29 from the first layer to the third layer. At least one of the plurality of jumper electrode layers 29, preferably more than half of the jumper electrode layers 29, and more preferably all of the plurality of jumper electrode layers 29 that are electrically connected to ten or more terminals 52a constituting the terminal dense portion 52 in each single partition 55 each preferably have a planar shape having two line segments adjacent to each other at the same angle with the position of the first via 61 as the vertex as a constituent element. In the vicinity of the first via 61 extending in the vertical direction from the terminal dense portion 52, current concentrates and heat is likely to be generated. For this reason, the advantage that heat can be easily dispersed by spreading the planar jumper electrodes 29a at equal intervals can be obtained.

[0056] Referring to FIG. 6, in the jumper electrode layers 29 of the first layer and the second layer, each of the 11 jumper electrodes 29a has a planar shape having two line segments adjacent to each other at 32.7° (= 360°÷11) as constituent elements. In the jumper electrode layer 29 of the third layer, each of the 10 jumper electrodes 29a has a planar shape having two line segments adjacent to each other at 36° (= 360°÷10) as constituent elements.

[0057] In each jumper electrode layer 29 of a plurality of jumper electrode layers 29 connected to 10 or more terminals 52a that constitute a terminal dense portion 52 within each single partition 55, adjacent planar jumper electrodes 29a can be electrically separated from each other via a linear insulator 29b (e.g., ceramics). The linear insulator 29b can be formed, for example, by a straight line, a curve, or a combination of both. In this case, it is preferable that the linear insulator 29b does not linearly overlap in the vertical direction with any of the linear insulators 29b in different jumper electrode layers 29. FIG. 7 shows a schematic diagram when a plurality of planar jumper electrodes constituting the five-layer jumper electrode layer illustrated in FIG. 5 are virtually seen from above in a perspective view. Thereby, the risk of cracks occurring in the ceramic substrate can be reduced. The line width of the linear insulator 29b (equal to the distance between adjacent jumper electrodes 29a) is not limited, but can be, for example, 0.3 to 2 mm, and typically can be 0.5 to 1 mm.

[0058] From the viewpoint of reducing manufacturing costs, the total layer number A of the jumper electrode layers 29 is preferably 20 or less, more preferably 10 or less, and even more preferably 5 or less. On the other hand, from the viewpoint of increasing the number of heater electrodes to increase the number of zones and enhancing the performance of controlling the temperature distribution of the wafer, the total layer number A of the jumper electrode layers 29 is preferably 2 or more, more preferably 3 or more, and even more preferably 4 or more. Therefore, the total layer number A of the jumper electrode layers 29 is preferably, for example, 2 to 20, more preferably 3 to 10, and even more preferably 4 to 5.

[0059] (1-2. Base Plate) The base plate 30 can be, for example, disc-shaped. In one embodiment, the base plate 30 includes a central portion 30a having a circular upper surface 31a in plan view, and a flange portion 30b having an annular upper surface 31b in plan view on the outer periphery of the central portion 30a. The thickness of the central portion 30a can be, for example, 5 to 30 mm. The flange portion 30b can be used to clamp or bolt-fasten the member 10 for the semiconductor manufacturing apparatus to an installation plate disposed on the lower surface 33 side. Also, a ring heater (not shown) can be placed on the flange portion 30b. In this case, the ring heater can be bolt-fastened to the installation plate.

[0060] The base plate 30 can be made of, for example, a metal material or a composite material of metal and ceramics. Examples of the metal material include Al, Ti, Mo, or their alloys. Examples of the composite material of metal and ceramics include metal matrix composite (MMC) and ceramic matrix composite (CMC). Specific examples of such composite materials include a material containing Si, SiC, and Ti (also referred to as SiSiCTi), a material obtained by impregnating a SiC porous body with Al and / or Si, a composite material of Al 2 O 3 and TiC, etc. A material obtained by impregnating a SiC porous body with Al is called AlSiC, and a material obtained by impregnating a SiC porous body with Si is called SiSiC. As the material of the base plate 30, it is preferable to select a material having a coefficient of thermal expansion close to that of the ceramics constituting the ceramic substrate 20. For example, when the ceramic substrate 20 is made of alumina, the base plate 30 is preferably made of SiSiCTi or AlSiC having a coefficient of thermal expansion close to that of alumina.

[0061] The base plate 30 can be used as an RF electrode by connecting it to an RF power supply via a power supply terminal (not shown). A high-pass filter (HPF) can be disposed between the base plate 30 and the RF power supply.

[0062] Inside the base plate 30, a refrigerant flow path 32 through which refrigerant circulates may be formed. The refrigerant flowing through the refrigerant flow path 32 is preferably a liquid and preferably has electrical insulation properties. Examples of the electrically insulating liquid include fluorine-based inert liquids. The refrigerant flow path 32 can be formed, for example, in one stroke from one end (inlet) to the other end (outlet) over the entire base plate 30 in a plan view. At one end and the other end of the refrigerant flow path 32, a supply port and a recovery port of an external refrigerant device (not shown) are respectively connected. The refrigerant supplied from the supply port of the external refrigerant device to one end of the refrigerant flow path 32 passes through the refrigerant flow path 32, then returns from the other end of the refrigerant flow path 32 to the recovery port of the external refrigerant device, and after temperature adjustment, is supplied again from the supply port to one end of the refrigerant flow path 32.

[0063] (1-3. Bonding layer) The bonding layer 40 bonds the lower surface 23 of the ceramic substrate 20 and the upper surface 31a of the base plate 30. The bonding layer 40 may be composed of, for example, a metal layer formed of solder or a metal brazing material. The bonding layer 40 is formed, for example, by TCB (Thermal Compression Bonding). TCB refers to a known method in which a metal bonding material is sandwiched between two members to be bonded and the two members are pressure-bonded in a state of being heated to a temperature below the solidus temperature of the metal bonding material. The bonding layer 40 is not limited to a metal layer. For example, a resin bonding layer may be used instead of the metal layer. The resin bonding layer can be composed of, for example, a cured product of a silicone resin-based adhesive, an epoxy resin-based adhesive, an acrylic resin-based adhesive, or a urethane resin-based adhesive.

[0064] The bonding layer 40 and the base plate 30 can have through holes at positions corresponding to the terminal dense portion 52 in order to facilitate connecting the power supply member to each terminal 52a of the terminal dense portion 52. Also, the bonding layer 40 and the base plate 30 can have through holes at positions corresponding to the common terminal 7 to 2 in order to facilitate connecting the ground wire 73 to the common terminal 7. They can have through holes at the corresponding positions.

[0065] (1-4. Others) The side surface of the outer peripheral portion 20b of the ceramic substrate 20, the outer periphery of the bonding layer 40, the side surface of the base plate 30, and the upper surface 31b of the flange portion 30b can be covered with an insulating film 42. Examples of the insulating film 42 include a sprayed film such as alumina or yttria.

[0066] In the above-described embodiment, the member 10 for a semiconductor manufacturing apparatus may have a plurality of holes penetrating the member 10 for a semiconductor manufacturing apparatus in the vertical direction. Such holes include a plurality of gas holes opening in the upper surface 21a and lift pin holes for inserting lift pins for moving the wafer W up and down with respect to the upper surface 21a. A plurality of gas holes can be provided at appropriate positions when the upper surface 21a is viewed in plan. A heat conduction gas such as He gas is supplied to the gas holes. Usually, the gas holes can be provided so as to open at a location where no seal band or small protrusion is provided among the upper surface 21a provided with the seal band and small protrusions described above. When the heat conduction gas is supplied to the gas holes, the space on the back side of the wafer W placed on the upper surface 21a is filled with the heat conduction gas. A plug having a gas flow path may be embedded in the gas holes. The lift pin holes can be provided at equal intervals along the concentric circles of the upper surface 21a when the upper surface 21a is viewed in plan.

[0067] <2. Method of Using the Member for a Semiconductor Manufacturing Apparatus> Next, an exemplary description will be given of the method of using the member 10 for a semiconductor manufacturing apparatus. The common terminal 72 of the member 10 for a semiconductor manufacturing apparatus is connected to the ground via the ground wire 73. Also, each terminal 52a of the terminal dense portion 52 is connected to a heater power supply via a power supply member (not shown). In this state, when a voltage is applied from the heater power supply, current flows in the order of each terminal 52a of the terminal dense portion 52 → the first via 61 → the jumper electrode layer 29 → the second via 62 → each heater electrode 27 → the fourth via 64 → the common jumper 71 → the third via 63 → the common terminal 72, and each heater electrode 27 generates heat. By changing the voltage applied to each terminal 52a, it is possible to change the amount of heat generated by the plurality of zoned heater electrodes 27. Thereby, a desired heat generation distribution can be realized for the ceramic substrate 20, and for example, the temperature distribution of the wafer W adsorbed and fixed to the upper surface 21a of the ceramic substrate 20 can be controlled.

[0068] A method of adsorbing and fixing the wafer W will be described. First, with the member 10 for a semiconductor manufacturing apparatus installed in a chamber (not shown), the wafer W is placed on the upper surface 21a of the ceramic substrate 20. Then, the inside of the chamber is depressurized by a vacuum pump to adjust to a predetermined degree of vacuum, a voltage is applied to the electrostatic adsorption electrode 26 to generate an electrostatic adsorption force, and the wafer W is adsorbed and fixed to the upper surface 21a of the ceramic substrate 20.

[0069] A method of processing the wafer W will be described. The inside of the chamber is set to a reaction gas atmosphere at a predetermined pressure (for example, several tens to several hundreds of Pa), and after controlling the plurality of zoned heater electrodes 27 so that the temperature distribution of the wafer W adsorbed and fixed to the upper surface 21a of the ceramic substrate 20 becomes a desired state, a high-frequency voltage such as an RF voltage is applied between an upper electrode (not shown) provided on the ceiling portion inside the chamber and the base plate 30 of the member 10 for a semiconductor manufacturing apparatus to generate plasma. The surface of the wafer W is processed by the generated plasma.

[0070] <3. Manufacturing Method of Member for Semiconductor Manufacturing Apparatus> Next, an exemplary description will be given of the manufacturing method of the member 10 for a semiconductor manufacturing apparatus.

[0071] First, a method for manufacturing the ceramic substrate 20 will be described. A plurality of disk-shaped green sheets that are the basis of the ceramic substrate 20 are manufactured. The green sheet can be manufactured, for example, by the tape casting method. Grooves are formed on the lower surface of the first green sheet from the lowermost layer at the locations where the concave portions 34 and 35 are to be provided. Further, a through hole is formed at a position corresponding to the first via 61 in the green sheet, and the through hole is filled with a conductive paste to form a paste filling portion. Furthermore, a through hole is also formed at a position where the common terminal 72 is to be inserted as necessary. Next, a conductive paste is printed on the upper surface of the green sheet so as to obtain the same pattern as the first-layer jumper electrode layer 29 to form a first-layer jumper precursor.

[0072] For the second and subsequent (the Nth) green sheets from the lowermost layer, through holes are formed at positions corresponding to the first via 61, the second via 62, the third via 63, and the fourth via 64 as necessary, and the through holes are filled with a conductive paste to form paste filling portions. Furthermore, a through hole is formed at a position where the common terminal 72 is to be inserted as necessary. Next, a conductive paste is printed on the upper surface of the green sheet so as to have the same pattern as the jumper electrode layer 29, the common jumper 71, or the heater electrode 27 required according to the order from the lowermost layer to form a jumper precursor. The uppermost green sheet can be used as it is without processing.

[0073] The green sheets that have been subjected to predetermined processing from the lowermost layer to the uppermost layer are sequentially laminated from the bottom to form a laminate. By firing this laminate, the ceramic substrate 20 is obtained. Note that the electrostatic adsorption electrode 26 and vias (not shown) connected to the electrostatic adsorption electrode 26 can be formed inside the ceramic substrate 20 by a conventional method.

[0074] Separate from the ceramic substrate 20, a base plate 30 and a metal bonding material are prepared. The base plate 30 has a refrigerant flow path 32. Further, the base plate 30 and the metal bonding material may have through holes for accessing the recesses 34 and 35 of the ceramic substrate 20. The base plate 30 provided with the refrigerant flow path 32 can be manufactured, for example, by joining a plurality of aluminum or MMC plate members in which grooves or holes corresponding to the refrigerant flow path 32 are formed by machining, by methods such as electron beam, welding, diffusion bonding, or TCB. The through holes can be formed by machining.

[0075] Subsequently, a resin or a metal bonding material is sandwiched between the lower surface 23 of the ceramic substrate 20 and the upper surface 31 of the base plate 30 to form a laminate. Then, the laminate is pressurized and joined at a temperature below the solidus temperature of the metal bonding material (for example, at a temperature equal to or higher than the temperature obtained by subtracting 20°C from the solidus temperature and equal to or lower than the solidus temperature), and then returned to room temperature (TCB). As a result, the metal bonding material becomes the bonding layer 40, and a joined body in which the ceramic substrate 20 and the base plate 30 are joined by the bonding layer 40 is obtained. It is preferable to use a metal bonding material having a thickness of around 100 μm (for example, 80 to 240 μm). a

[0076] Thereafter, a plurality of terminals 52a constituting the terminal dense portion 52 are respectively connected to the corresponding first vias 61 by a method such as brazing. Also, the common terminal 72 is connected to the third via 63 by a method such as brazing. Thereafter, the semiconductor manufacturing apparatus member 10 is completed by appropriately performing steps such as shaping the overall shape.

Explanation of Reference Numerals

[0077] 10: Member for semiconductor manufacturing apparatus 20: Ceramic substrate 20a: Central portion 20b: Outer peripheral portion 21a: Upper surface 21b: Upper surface 23: Lower surface 26: Electrode for electrostatic adsorption 27: Heater electrode 27a: First connection part 27b: Second connection part 28: Insulator 29: Jumper electrode layer 29a: (Planar) jumper electrode 29b: Insulator 29c: Insulator 30: Base plate 30a: Central part 30b: Flange part 3 1a: Upper surface 31b: Upper surface 32: Refrigerant flow path 33: Lower surface 34: Recess 35: Recess 40: Bonding layer 42: Insulating film 52: Terminal dense part 52a: Terminal 54: Outer periphery 55: Single compartment 61: First via 62: Second via 63: Third via 64: Fourth via 71: Common jumper 72: Common terminal 73: Ground wire 78: Focus ring W: Wafer

Claims

1. an upper surface on which a wafer can be placed; a terminal-dense portion in which 10 or more terminals are arranged in a single section; A plurality of zoned heater electrodes; a plurality of jumper electrode layers that electrically connect the plurality of heater electrodes and each terminal of the densely-packed terminal portion and are stacked in a vertical direction via an insulator; A semiconductor manufacturing equipment member having a ceramic substrate having Each jumper electrode layer is composed of a plurality of planar jumper electrodes electrically isolated by an insulator; in at least one of the dense terminal sections, 70% or more of all the terminals arranged in the dense terminal section are electrically connected to a predetermined planar jumper electrode through a first via extending in the vertical direction while satisfying the condition that the terminals are not electrically connected to any planar jumper electrode located in a layer above any of the planar jumper electrodes to which other terminals that are farther away from the outer periphery of the dense terminal section are electrically connected, each of the plurality of planar jumper electrodes is electrically connected to a first connection portion of a predetermined heater electrode selected from the plurality of heater electrodes through a second via extending in a vertical direction; Components for semiconductor manufacturing equipment.

2. At least one terminal T 1 At least one other terminal T that is farther away from the outer periphery of the terminal-packed area than the terminal T 2 is electrically connected to a planar jumper electrode located in a layer above the planar jumper electrode to which the at least one terminal T 1 The distance between the outer periphery and the 1 (mm), and the at least one other terminal T 2 and the distance from the outer edge is M 2 (mm), then Equation 1: M 1 <M 2 ≦M 1 +2 is all terminal T 1 The member for semiconductor manufacturing equipment according to claim 1 ,

3. In at least one of the densely-packed terminal sections, all of the terminals arranged in the densely-packed terminal section are electrically connected to a predetermined planar jumper electrode through a first via extending in the vertical direction while satisfying the condition that each of the terminals is not electrically connected to a planar jumper electrode located in a layer above any of the planar jumper electrodes to which other terminals that are farther away from the outer periphery of the densely-packed terminal section are electrically connected. The semiconductor manufacturing equipment member according to claim 1 .

4. 3. The semiconductor manufacturing equipment member according to claim 1, wherein at least one of the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal-dense area in each single compartment is composed of 8 to 12 planar jumper electrodes.

5. 3. A semiconductor manufacturing equipment member as described in claim 1 or 2, wherein, when the total number of the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal-dense area in each single section is A, the number of the plurality of planar jumper electrodes constituting the Nth jumper electrode layer (N is a natural number from 1 to A) from the bottom layer is the same as or less than the number of the plurality of planar jumper electrodes constituting the N-1th jumper electrode layer from the bottom layer, and the number of the plurality of planar jumper electrodes constituting the uppermost jumper electrode layer is less than the number of the plurality of planar jumper electrodes constituting the lowermost jumper electrode layer.

6. A component for semiconductor manufacturing equipment as described in claim 1 or 2, wherein each of the plurality of planar jumper electrodes constituting at least one of the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal-dense area in each single compartment has a planar shape whose components are two adjacent line segments at the same angle with the position of the first via as a vertex.

7. 3. The semiconductor manufacturing equipment member according to claim 1, wherein each of the heater electrodes has a second connection portion, and the second connection portion is connected to a common terminal for grounding via a common jumper.

8. 8. The semiconductor manufacturing equipment member according to claim 7, wherein the common jumper is electrically connected to the common terminal via a third via extending in the vertical direction, the third via having a diameter larger than that of the first via.

9. 3. A semiconductor manufacturing equipment component as described in claim 1 or 2, wherein in each jumper electrode layer of the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal-dense portion in each single compartment, adjacent planar jump electrodes are electrically separated from each other by linear insulators, and the linear insulators do not linearly overlap in the vertical direction with any linear insulators in different jumper electrode layers.

10. A component for semiconductor manufacturing equipment as described in claim 1 or 2, wherein each of the plurality of planar jumper electrodes constituting at least one of the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal-dense area in each single compartment has a spacing of 0.3 mm or more between adjacent planar jumper electrodes in the same layer.

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