circuit board

Abstract

To provide a circuit board capable of improving a yield.SOLUTION: In a circuit board 3, a wall 9 includes an unevenness part 30 on an inner side surface 13. In this case, a front surface area of the inner side surface 13 of the wall 9 is increased. According to the construction, when a construction material 20 such as an adhesive agent is arranged into the wall 9, the construction material 20 is held by the inner side surface 13 having a large front surface area, and can be easily stayed in the inner part of the wall 9. Therefore, when an electronic component 2 is inserted into the inner part of the wall 9, the electronic component 2 is held by the construction material 20 which becomes easily staying in the inner part of the wall 9 and is prevented from being carried (refer to Fig. 12(a)). Thus, a yield when constructing a mounting substrate can be improved.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a circuit board. [Background technology]

[0002] In recent years, advances in electronics have led to the development of technologies for mounting electronic components on substrates. For example, technologies have been developed for mounting a large number of bare chips of semiconductor light-emitting elements, such as light-emitting diodes (hereinafter referred to as "LEDs") used in lighting, display devices, etc., on wiring substrates. For example, Patent Document 1 discloses an invention in which semiconductor light-emitting elements are inserted and bonded into a cavity that allows for easy positioning and arrangement of multiple semiconductor light-emitting elements. Furthermore, Patent Document 2 also discloses a technology for preventing semiconductor light-emitting elements from being carried away and solder bridges when mounting electronic components using a paste-like bonding material. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-93523 [Patent Document 2] Japanese Patent Application Laid-Open No. 2004-47772 Summary of the Invention [Problem to be solved by the invention]

[0004] Here, when attempting to mount electronic components using a paste-like electronic component bonding material as shown in Patent Document 2 in a cavity as shown in Patent Document 1, there is a possibility that after the electronic components are carried and mounted using a holding member, problems may occur, such as the electronic components being carried away by the holding member. Therefore, there is a demand for a circuit board that can suppress problems caused by carrying away when constructing a mounting board and can improve yield.

[0005] An object of the present invention is to provide a circuit board that can improve yield. [Means for solving the problem]

[0006] The circuit board of the present invention is a circuit board having at least a pair of terminals, in which a bonding material containing a metal element is arranged above the terminals, and the pair of terminals and the bonding material are arranged within a wall formed by an insulator, and the wall has an uneven portion on its inner surface.

[0007] In the circuit board according to the present invention, the wall has an uneven portion on its inner surface. In this case, the surface area of ​​the inner surface of the wall is increased. With this configuration, when a component such as an adhesive is placed inside the wall, the component is held by the inner surface with a large surface area, making it easier to remain inside the wall. Therefore, when an electronic component is inserted inside the wall, the electronic component is held by the component that is easier to remain inside the wall, preventing it from being carried away. As a result, the yield when constructing a mounting board can be improved.

[0008] The uneven portion may extend in the thickness direction of the circuit board. In this case, when a component is placed inside the wall, it is possible to suppress air entrapment between the inner surface of the wall and the component. Therefore, it is possible to suppress a reduction in the contact area between the inner surface and the component due to the entrapped air. This suppresses a reduction in the holding force of the component to hold the electronic component.

[0009] In a plan view, a reference line is set along the direction in which the inner surface extends, and the length of the reference line is length a. The wall length corresponding to the reference line is length L. (Length L / Length a) may be 1.02 or more and 1.20 or less. By setting (Length L / Length a) to 1.02 or more, the surface area of ​​the inner surface of the wall is sufficiently large, making it easier for the components to remain inside the wall. Furthermore, by setting (Length L / Length a) to 1.20 or less, it is possible to prevent the components from becoming difficult to penetrate into the valleys of the uneven portions.

[0010] When a reference line is set along the direction in which the inner surface widens in a plan view, the wall may have 40 to 1200 uneven portions per 1 mm of the reference line. In this case, having 40 or more uneven portions per 1 mm of the reference line makes the surface area of ​​the inner surface of the wall sufficiently large, making it easier for components to remain inside the wall. Furthermore, having 1200 or fewer uneven portions per 1 mm of the reference line makes it possible to prevent components from having difficulty entering the valleys of the uneven portions.

[0011] A reflective material may be formed inside the wall on the upper surface of the substrate on which the wall is provided. In this case, when the wall is photo-cured, the reflective material can reflect light. The reflected light can form a pattern of projections and recesses on the corresponding inner surface of the wall. [Effects of the Invention]

[0012] According to the present invention, it is possible to provide a circuit board that can improve yield. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a schematic cross-sectional view showing a mounting board 1 including a circuit board 3 according to an embodiment of the present invention. [Figure 2] 1 is a schematic cross-sectional view showing a circuit board 3 according to an embodiment of the present invention. [Figure 3] FIG. [Figure 4] FIG. 4(a) is an enlarged plan view of the inner surface 13 of the wall 9, and FIG. 4(b) is a conceptual diagram for explaining the definition of one uneven portion 30. [Figure 5] FIG. 2 is a conceptual diagram showing the structure of the concave-convex portion. [Figure 6] 1 is a plan view of a circuit board. [Figure 7] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a circuit board and a mounting board. [Figure 8] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a circuit board and a mounting board. [Figure 9]5A to 5C are schematic cross-sectional views showing a method for manufacturing a circuit board and a mounting board. [Figure 10] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a circuit board and a mounting board. [Figure 11] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a circuit board and a mounting board. [Figure 12] 5A to 5C are schematic cross-sectional views showing a method for manufacturing a circuit board and a mounting board. DETAILED DESCRIPTION OF THE INVENTION

[0014] A circuit board 3 according to an embodiment of the present invention will be described with reference to Figures 1 to 3. Figure 1 is a schematic cross-sectional view showing a mounting board 1 including a circuit board 3 according to an embodiment of the present invention. Figure 2 is a schematic cross-sectional view showing a circuit board 3 according to an embodiment of the present invention. Figure 3 is a plan view of the circuit board 3.

[0015] 1, the mounting board 1 includes an electronic component 2 and a circuit board 3. The mounting board 1 is constructed by mounting the electronic component 2 on the circuit board 3 with a bonding material 4 interposed therebetween.

[0016] The electronic component 2 includes a main body 6 and a pair of terminals 7. The main body 6 is a member for fulfilling the function of the electronic component 2. The terminals 7 are metal portions formed on the main surface of the main body 6. The terminals 7 may be made of metals such as Cu, Ti, Au, Ni, Sn, Bi, P, B, In, Ag, Zn, Pd, Mo, Pt, and Cr, or alloys selected from at least two of these metals. The electronic component 2 may be formed, for example, by a micro LED. The micro LED is a component that emits light in response to input from the circuit board 3.

[0017] The circuit board 3 includes a substrate 8, a wall 9, and a pair of terminals 10. The substrate 8 is a flat body of the circuit board 3. The wall 9 is an insulating member formed on the upper surface of the substrate 8. The wall 9 may be made of a resin material such as epoxy resin, acrylic resin, phenolic resin, melamine resin, urea resin, or alkyd resin. Epoxy resin or acrylic resin is particularly preferred. The terminal 10 is a metal portion formed on the main surface of the substrate 8. The terminal 10 may be made of Ni, Cu, Ti, Cr, Al, Mo, Pt, Au, or an alloy selected from at least two of these metals. A conductive film 12 is formed on the upper surface of the terminal 10. The conductive film 12 may be made of a film of Ti, Cu, Ni, Al, Mo, Cr, Ag, or the like, or a film containing metal particles mixed with a binder.

[0018] The bonding material 4 is a member that bonds the terminals 7 of the electronic component 2 and the terminals 10 of the circuit board 3. The bonding material 4 is formed by thermally bonding and integrating a bonding material 4A on the mounting substrate 1 side and a bonding material 4B on the electronic component 2 side (see FIG. 11(c)). The bonding material 4 may contain Sn or may be made of an alloy containing Sn. However, the bonding material 4 is not necessarily limited to a material containing Sn. The bonding material 4 may be made of an alloy containing, in addition to Sn, an element that lowers the melting point of Sn. An example of an element that lowers the melting point of Sn is Bi. The bonding material 4 functions as solder. As a result, the terminals 10, the conductive film 12, the bonding material 4, and the terminals 7 are stacked between the base material 8 and the main body 6 in this order from the top surface of the base material 8. Note that, in this location, solder bonding is performed after the terminals 10, the conductive film 12, the bonding material 4, and the terminals 7 are stacked. Therefore, a structure is formed in which the metals of the terminal 10, the conductive film 12, the bonding material 4, and the terminal 7 are melted and diffused. Such a structure after soldering may contain a brittle intermetallic compound (IMC). If an intermetallic compound, which has a brittle structure, is present, it is prone to fracture due to external stress, and reliability is likely to decrease. Therefore, surrounding the electronic component 2 with the wall 9 has the effect of protecting the electronic component 2.

[0019] A recess 11 is formed in the wall 9. The recess 11 is formed by a through-hole that penetrates the wall 9. As a result, the top surface of the base material 8 is exposed at the bottom of the recess 11. The recess 11 is rectangular when viewed in the thickness direction of the circuit board 3 (see FIG. 3). The terminals 7, 10, conductive film 12, and bonding material 4 are arranged in the recess 11 formed in the wall 9, and are thereby surrounded by the wall 9. Small gaps are formed between the terminals 7, 10, conductive film 12, and bonding material 4 and the four inner surfaces of the recess 11 (i.e., the inner surfaces of the wall 9).

[0020] Within the recess 11, a component 20 is disposed between the wall 9 and the electronic component 2 and bonding material 4. This supports the electronic component 2 with the component 20, making it less likely to peel off from the circuit board 3. Furthermore, the force applied to the electronic component 2, bonding material 4, and terminals 7 and 10 is alleviated, improving reliability. Examples of materials that can be used for the component 20 include epoxy resin, acrylic resin, phenolic resin, melamine resin, urea resin, alkyd resin, and mixtures thereof, as well as mixtures of any of the above resin materials with SiOx, ceramics, etc. Particularly preferably, epoxy resin or acrylic resin is used as the material for the component 20.

[0021] As shown in Fig. 2, the circuit board 3 has a configuration in which the electronic components 2 and the constituent material 20 have been removed from the mounting board 1 shown in Fig. 1. In the circuit board 3, a bonding material 4A containing a metal element is disposed above the terminals 10 (on the upper surface of the conductive film 12). As described above, this bonding material 4A constitutes part of the bonding material 4 in the stage prior to thermally bonding the electronic components 2 and the mounting board 1. In the state of the circuit board 3, the pair of terminals 10, the conductive film 12, and the bonding material 4A are disposed within a wall 9 formed of an insulator.

[0022] As shown in FIG. 3, the recess 11 of the wall 9 has inner surfaces 13a and 13b that form a pair of long sides and inner surfaces 13c and 13d that form a pair of short sides. Thus, the area surrounded by the wall 9 is defined by the inner surfaces 13a, 13b, 13c, and 13d that correspond to the respective sides. As shown in FIG. 2, a small gap is formed between one of the terminals 10, the conductive film 12, and the bonding material 4A and the inner surface 13c of the wall 9. A small gap is formed between the other of the terminals 10, the conductive film 12, and the bonding material 4A and the inner surface 13d of the wall 9. In the following description, when the inner surfaces 13a, 13b, 13c, and 13d are not distinguished from one another and are collectively described, they will be referred to as the "inner surface 13."

[0023] Next, the configuration of the inner surface 13 of the wall 9 will be described with reference to FIG. 4. FIG. 4(a) is an enlarged plan view of the inner surface 13 of the wall 9. FIG. 4(b) is a conceptual diagram for explaining the definition of one concave-convex portion 30. In a plan view, the direction in which the inner surface 13 expands is defined as the "expansion direction D1." The thickness direction of the circuit board 3 is defined as the "thickness direction D2." The expansion direction D1 differs among the inner surfaces 13a, 13b, 13c, and 13d. As shown in FIG. 4, the expansion direction D1 of the inner surface 13a and the expansion direction D1 of the inner surface 13c are perpendicular to each other. When simply referring to the "expansion direction D1 of the inner surface 13," this refers to the expansion direction D1 of each inner surface, without distinguishing between the inner surfaces 13a, 13b, 13c, and 13d.

[0024] As shown in FIG. 4(a), the wall 9 has an uneven portion 30 on the inner surface 13. The uneven portion 30 is formed by alternately arranging valley portions 31 and peak portions 32. One peak portion 32 is formed between one valley portion 31 and the adjacent valley portion 31. The inner surface 13 also has a plurality of uneven portions 30 along the expansion direction D1. Note that FIG. 4(a) shows that the uneven portion 30 is formed on the inner surface 13c, and the uneven portion 30 is formed on the inner surface 13a. However, the uneven portions 30 are also formed on the inner surfaces 13b and 13d.

[0025] In a plan view, a reference line SL1 is set along the expansion direction D1 in which the inner surface 13 expands. This reference line SL1 may be a statistical approximation line set for a curve drawn by a plurality of concave-convex portions 30. For example, the curve drawn by the inner surface 13 having the concave-convex portions 30 in the image in a plan view may be regarded as a graph, an average line may be calculated for the graph, and the average line may be set as the reference line SL1. The statistical calculation method for calculating such reference line SL1 is not particularly limited, and a calculation method such as linear approximation by least squares regression may be used.

[0026] Next, with reference to FIG. 4(b), the definition of one uneven portion 30 will be described. As shown in FIG. 4(b), a tangent line TL is set that touches the valley portions 31, 31 on both sides of the apex P1 of the peak portion 32. Next, a vertical line PL is set that passes through the apex P1 of the peak portion 32 and is perpendicular to the reference line SL1. The length of the vertical line PL between the apex P1 and the intersection P2 of the vertical line PL and the tangent line TL is defined as the height dimension H of the peak portion 32. In this case, a peak portion 30 having a height dimension H of 150 nm or more is defined as one uneven portion 30. FIG. 6 shows an image of the circuit board 3 in a plan view. The area circled in FIG. 6 is an example of a location where the uneven portion 30 is formed.

[0027] As shown in Fig. 5(a), the concave-convex portion 30 extends in the thickness direction D2 of the circuit board 3. That is, the valley portions 31 and peak portions 32 that constitute the concave-convex portion 30 form grooves that extend in the thickness direction D2. However, as shown in Fig. 5(b), a configuration may be adopted in which a plurality of the concave-convex portions 30 are arranged in the thickness direction D2.

[0028] As shown in FIG. 6, a reference line SL1 is set with respect to the inner surface 13d, and the length of the reference line SL1 is defined as "length a." Here, a corner R is formed at a corner CN between the inner surface 13d and the inner surface 13a, and a corner R is also formed at a corner CN between the inner surface 13d and the inner surface 13b. Length a excludes the lengths of the portions corresponding to the corner R of these corners CN. Next, the wall length corresponding to the reference line SL1 is calculated as length L. Specifically, the length of the curve described by the inner surface 13d within the range defining length a corresponds to "length L." For example, if the curve described by the inner surface 13d is extended in the expansion direction D1 to form a straight line, the length of the straight line in the expansion direction D1 corresponds to "length L." Because a plurality of concave-convex portions 30 are formed on the inner surface 13d, (length L / length a) may be 1.02 or more, and more preferably 1.05 or more. Furthermore, (length L / length a) may be 1.20 or less, and more preferably 1.15 or less. Furthermore, in a plan view, a reference line SL1 is set along the expansion direction D1 in which the inner surface 13d of the wall 9 expands. In this case, the wall 9 has 40 or more, and more preferably 160 or more, uneven portions 30 per mm of the reference line SL1. Furthermore, the wall 9 has 1,200 or less, and more preferably 900 or less, uneven portions 30 per mm of the reference line SL1. These numerical values ​​apply not only to the inner surface 13d, but also to the inner surfaces 13a, 13b, and 13c.

[0029] Next, a method for manufacturing the circuit board 3 will be described with reference to FIGS. 7 to 12. First, terminals 10 are formed on the upper surface of the base material 8 (FIG. 7(a)). Next, a seed film 40 is formed on the upper surfaces of the base material 8 and the terminals 10 (FIG. 7(b)). Next, a resist 41 having openings where the bonding material 4A will be formed is formed on the upper surface of the seed film 40 (FIG. 7(c)). Next, electrolytic plating is performed on the openings in the resist 41 of the seed film 40 to form the bonding material 4A (FIG. 7(d)). Next, the resist 41 is peeled off from the seed film 40 (FIG. 7(e)).

[0030] Next, a resist 42 is formed on the upper surface of the seed film 40, with openings at the locations to be etched (FIG. 8(a)). Next, a portion of the seed film 40 is removed by etching (FIG. 8(b)). As a result, the seed film on the terminal 10 remains as the conductive film 12, and the seed film on the edge of the substrate remains as the reflective material 43. Next, the resist 42 is peeled off from the conductive film 12 and the reflective material 43 (FIG. 8(c)). Next, a resist 44 for forming the wall 9 is applied to the substrate 8 (FIG. 8(d)).

[0031] Next, a mask 46 is placed on the resist 44, and an exposure process is performed (FIG. 9(a)). At this time, the light LE hits the portions of the resist 44 corresponding to the wall 9, and these portions are hardened. During this exposure process, the seed film remaining on the edge of the substrate acts as a reflector 43 for the light LE, and the light LE is reflected by the reflector 43 and directed toward the inner periphery. At this time, the light LE is irradiated onto the boundary surface 44a between the hardened and unhardened portions of the resist 44. As a result, an uneven pattern is formed on the boundary surface 44a in a manner corresponding to the uneven portions 30 of the wall 9 after thermal hardening. Note that, although a seed film is used here as a reflective material that reflects the light LE, the reflective material is not limited to a seed film as long as it reflects light, and another metal film, a film coated with metal fine particles, or glass may also be used.

[0032] Next, the substrate 8 is heated from below with a hot plate 47 (FIG. 9(b)). Next, a development process is performed to remove the uncured portions of the resist 44 (FIG. 9(c)). Next, the entire circuit board 3 is placed in a furnace 48 and heated (FIG. 9(d)). This thermally cures the resist 44, forming walls 9 (FIG. 11(a)). At this time, the reflective material 43 remains within the walls 9 and is formed on the upper surface of the substrate 8 on which the walls 9 are provided.

[0033] The method for forming the uneven portion 30 is not limited to the above-described method, and the method shown in FIG. 10 may also be employed. First, a resist 42 for removing the seed film 40 is formed only at the position of the terminal 10 (FIG. 10(a)). As a result, once the seed film 40 is removed, only the conductive film 12 remains (FIGS. 10(b) and 10(c)). When an exposure process is performed through a mask 46 in this state, the light LE that has entered the uncured portion is reflected by the bonding material 4A and irradiated onto the interface 44a. As a result, a pattern of the uneven portion 30 is formed on the interface 44a.

[0034] When the circuit board 3 is completed, the recess 11 is filled with the component 20 (FIG. 11(b)). Then, the electronic component 2 is held by the holding member 49, and the bonding material 4A and the bonding material 4B are brought into contact with each other inside the component 20 (FIG. 11(c)). Next, the electronic component 2 is removed from the holding member 49 (FIG. 12(a)).

[0035] The functions and effects of the circuit board 3 according to this embodiment will be described.

[0036] In the circuit board 3 according to this embodiment, the wall 9 has an uneven portion 30 on the inner surface 13. In this case, the surface area of ​​the inner surface 13 of the wall 9 is increased. With this configuration, when a component 20 such as an adhesive is placed inside the wall 9, the component 20 is held by the inner surface 13, which has a large surface area, and is likely to remain inside the wall 9. Therefore, when an electronic component 2 is inserted inside the wall 9, the electronic component 2 is held by the component 20, which is likely to remain inside the wall 9, and is therefore prevented from being carried away (see FIG. 12(a)). As a result, it is possible to improve the yield when assembling a mounting board.

[0037] For example, Fig. 12(b) shows a circuit board 103 according to a comparative example in which the uneven portion 30 is not formed on the inner surface 13. As shown in Fig. 12(b), when the holding member 49 is raised after the electronic component 2 is inserted, the component 20 is not easily supported by the inner surface 13 of the wall 9 and is therefore not easily retained inside, resulting in problems with the electronic component 2 being removed. In contrast, as shown in Fig. 12(a), in the circuit board 3 according to this embodiment, the component 20 supported by the uneven portion 30 adequately holds the electronic component 2, thereby preventing problems with the electronic component 2 being removed.

[0038] The uneven portion 30 may extend in the thickness direction D2 of the circuit board 3. In this case, when the component 20 is placed inside the wall 9, it is possible to prevent air from being entrained between the inner surface 13 of the wall 9 and the component 20. This prevents the contact area between the inner surface 13 and the component 20 from being reduced due to the entrained air. This prevents a reduction in the holding force of the electronic component 2 by the component 20.

[0039] In a plan view, a reference line SL1 is set along the expansion direction D1 in which the inner surface 13 expands, and the length of the reference line is length a. The wall length corresponding to the reference line SL1 is length L. In this case, (length L / length a) may be set to 1.02 or more and 1.20 or less. When (length L / length a) is 1.02 or more, the surface area of ​​the inner surface 13 of the wall 9 is sufficiently large, making it easier for the component 20 to remain inside the wall 9. When (length L / length a) is 1.20 or less, it is possible to prevent the component 20 from having difficulty entering the valleys 31 of the uneven portion 30.

[0040] In a plan view, when a reference line SL1 is set along the expansion direction D1 in which the inner surface 13 expands, the wall 9 may have 40 to 1200 uneven portions 30 per mm of the reference line SL1. In this case, when the wall 9 has 40 or more uneven portions 30 per mm of the reference line SL1, the surface area of ​​the inner surface 13 of the wall 9 is sufficiently large, making it easier for the constituent material 20 to remain inside the wall 9. Furthermore, when the wall 9 has 1200 or fewer uneven portions 30 per mm of the reference line SL1, it is possible to prevent the constituent material 20 from having difficulty entering the valleys 31 of the uneven portions 30.

[0041] A reflective material 43 may be formed inside the wall 9 on the upper surface of the base material 8 on which the wall 9 is provided. In this case, when the wall 9 is photo-cured, the reflective material 43 can reflect light. The reflected light can form a pattern of the uneven portion 30 at a location corresponding to the inner surface 13 of the wall 9.

[0042] The present invention is not limited to the above-described embodiment. For example, the number and arrangement of terminals on the circuit board are not particularly limited. Furthermore, although one electronic component 2 is arranged within the wall 9 in the above-described embodiment, multiple electronic components 2 may be arranged. The arrangement of the multiple electronic components 2 is not particularly limited. [Explanation of symbols]

[0043] 3... Circuit board, 4A... Bonding material, 8... Base material, 9... Wall, 10... Terminal, 20... Component material, 30... Uneven part, 43... Reflective material.

Claims

1. A circuit board having at least one pair of terminals, a bonding material containing a metal element is disposed on an upper side of the terminal; the pair of terminals and the bonding material are disposed within a wall formed by an insulator, The wall has an uneven portion on the inner surface, The uneven portion extends in a thickness direction of the circuit board.

2. 2. The circuit board according to claim 1, wherein, in a plan view, a reference line is set along a direction in which the inner surface widens, the length of the reference line is length a, and the wall length corresponding to the reference line is length L, (length L / length a) is 1.02 or more and 1.20 or less.

3. 3. The circuit board according to claim 1, wherein, when a reference line is set along the direction in which the inner surface widens in a plan view, the wall has 40 to 1,200 uneven portions per 1 mm of the reference line.

4. A circuit board having at least one pair of terminals, a bonding material containing a metal element is disposed on an upper side of the terminal; the pair of terminals and the bonding material are disposed within a wall formed by an insulator, The wall has an uneven portion on the inner surface, A circuit board, wherein a reflective material is formed within the wall on an upper surface of a base material on which the wall is provided.

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