Vertical-cavity surface-emitting laser and method for manufacturing the same
By inclining the inner edge of the high-resistance region in the second distributed Bragg reflector and using ions with varying concentrations, the capacitance is reduced while maintaining low electrical resistance, enhancing the operational bandwidth of vertical-cavity surface-emitting lasers.
Patent Information
- Application Number
- JP2021119824
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-07-20
- Publication Date
- 2025-09-02
- Estimated Expiration
- 2041-07-20
AI Technical Summary
Existing vertical-cavity surface-emitting lasers face the challenge of increasing electrical resistance when attempting to reduce the capacitance of the p-type distributed Bragg reflector, as expanding the high-resistivity region inward leads to higher resistance.
The design incorporates a high-resistance region in the second distributed Bragg reflector with an inner edge inclined relative to the laser light emission axis, reducing capacitance while maintaining low electrical resistance by using ions with varying concentrations and orientations.
This approach effectively reduces the capacitance of the distributed Bragg reflector while suppressing an increase in electrical resistance, enabling the laser to operate over a wider band with improved performance.
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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to vertical-cavity surface-emitting lasers and methods for manufacturing vertical-cavity surface-emitting lasers. [Background technology]
[0002] Patent Document 1 discloses a vertical-cavity surface-emitting laser including an n-type distributed Bragg reflector, an active layer, and a p-type distributed Bragg reflector. The n-type distributed Bragg reflector, the active layer, and the p-type distributed Bragg reflector are arranged in this order in the direction of laser light emission. The p-type distributed Bragg reflector has a semiconductor region and a high-resistance region surrounding the semiconductor region. The high-resistance region is formed by ion implantation. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] US Patent Application Publication No. 2010 / 0189147 Summary of the Invention [Problem to be solved by the invention]
[0004] In the vertical-cavity surface-emitting laser, the inner edge of the high-resistivity region is parallel to the direction of laser light emission. Therefore, if the inner edge of the high-resistivity region is expanded inward to reduce the capacitance of the p-type distributed Bragg reflector, the electrical resistance of the p-type distributed Bragg reflector increases. Therefore, it is not possible to reduce the capacitance of the p-type distributed Bragg reflector while suppressing the increase in the electrical resistance of the p-type distributed Bragg reflector.
[0005] The present disclosure provides a vertical-cavity surface-emitting laser that can reduce the capacitance of a distributed Bragg reflector while suppressing an increase in the electrical resistance of the distributed Bragg reflector, and a method for manufacturing the vertical-cavity surface-emitting laser. [Means for solving the problem]
[0006] A vertical-cavity surface-emitting laser according to one aspect of the present disclosure comprises a first distributed Bragg reflector, an active layer, and a second distributed Bragg reflector, wherein the first distributed Bragg reflector, the active layer, and the second distributed Bragg reflector are sequentially arranged in a direction of a first axis, the second distributed Bragg reflector includes a semiconductor region and a high-resistance region, the high-resistance region has an electrical resistance higher than an electrical resistance of the semiconductor region, the first axis passes through the semiconductor region, the high-resistance region surrounds the semiconductor region, and in a cross section including the first axis, the high-resistance region has an inner edge extending in a direction inclined with respect to the first axis such that an inner diameter of the high-resistance region increases with increasing distance from the active layer in the direction of the first axis.
[0007] A method for manufacturing a vertical-cavity surface-emitting laser according to another aspect of the present disclosure includes the steps of: forming a mask on a semiconductor laminate provided on a primary surface of a substrate, the semiconductor laminate including a first semiconductor layer for a first distributed Bragg reflector, an active layer, and a second semiconductor layer for a second distributed Bragg reflector, the substrate, the first semiconductor layer, the active layer, the second semiconductor layer, and the mask being arranged in order in a direction of a first axis intersecting the primary surface; implanting first ions into the second semiconductor layer using the mask in a first direction tilted with respect to the first axis; and implanting second ions into the second semiconductor layer using the mask in a second direction tilted with respect to the first axis, wherein a direction in which the second direction is projected onto a plane perpendicular to the first axis differs from a direction in which the first direction is projected onto the plane. [Effects of the Invention]
[0008] According to the present disclosure, there are provided a vertical-cavity surface-emitting laser and a method for manufacturing the vertical-cavity surface-emitting laser that can reduce the capacitance of the distributed Bragg reflector while suppressing an increase in the electrical resistance of the distributed Bragg reflector. [Brief explanation of the drawings]
[0009] [Figure 1] FIG. 1 is a cross-sectional view schematically showing a vertical-cavity surface-emitting laser according to an embodiment. [Figure 2] FIG. 2 is an enlarged cross-sectional view showing a part of the vertical-cavity surface-emitting laser of FIG. [Figure 3] FIG. 3 is a plan view showing a high resistance region of the vertical-cavity surface-emitting laser of FIG. [Figure 4] FIG. 4 is a cross-sectional view showing a step of a method for manufacturing a vertical-cavity surface-emitting laser according to an embodiment. [Figure 5] FIG. 5 is a cross-sectional view showing a step of a method for manufacturing a vertical-cavity surface-emitting laser according to an embodiment. [Figure 6] FIG. 6 is a plan view showing the process of FIG. [Figure 7] FIG. 7 is a plan view showing a step of a method for manufacturing a vertical-cavity surface-emitting laser according to an embodiment. [Figure 8] FIG. 8 is a plan view showing a step of a method for manufacturing a vertical-cavity surface-emitting laser according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0010] [Description of the embodiments of the present disclosure] A vertical-cavity surface-emitting laser according to one embodiment comprises a first distributed Bragg reflector, an active layer, and a second distributed Bragg reflector, wherein the first distributed Bragg reflector, the active layer, and the second distributed Bragg reflector are sequentially arranged in a direction of a first axis, the second distributed Bragg reflector includes a semiconductor region and a high-resistance region, the high-resistance region has an electrical resistance higher than that of the semiconductor region, the first axis passes through the semiconductor region, the high-resistance region surrounds the semiconductor region, and in a cross section including the first axis, the high-resistance region has an inner edge extending in a direction inclined with respect to the first axis such that an inner diameter of the high-resistance region increases with increasing distance from the active layer in the direction of the first axis.
[0011] According to the vertical-cavity surface-emitting laser, the capacitance of the portion of the second distributed Bragg reflector that is close to the active layer can be reduced while suppressing an increase in the electrical resistance of the portion of the second distributed Bragg reflector that is far from the active layer. Therefore, the capacitance of the second distributed Bragg reflector can be reduced while suppressing an increase in the electrical resistance of the second distributed Bragg reflector.
[0012] The high-resistance region may include a first high-resistance region surrounding the semiconductor region and a second high-resistance region surrounding the first high-resistance region, each of the first high-resistance region and the second high-resistance region containing ions, the ions in the second high-resistance region having a higher concentration than the ions in the first high-resistance region, In this case, the electrical resistance of the second high-resistance region can be made larger than the electrical resistance of the first high-resistance region.
[0013] The first high resistance region may have a plurality of portions, and the ions in the plurality of portions may have different concentrations, thereby obtaining a plurality of portions having different electrical resistances.
[0014] The ions in the first high resistance region are 1×10 19 cm -3 In this case, the capacitance of the second distributed Bragg reflector can be further reduced.
[0015] The vertical-cavity surface-emitting laser may further include an electrode provided to surround the first axis, the second distributed Bragg reflector being disposed between the electrode and the active layer in the direction of the first axis, the inner edge of the high-resistance region in the cross section having a first end and a second end, the second end being located farther from the electrode in the direction of the first axis than the first end, and the first end being located farther from the first axis in a direction perpendicular to the first axis than the inner edge of the electrode. In this case, an increase in the electrical resistance of the second distributed Bragg reflector can be further suppressed.
[0016] The second end may be located closer to the first axis than the inner edge of the electrode in a direction perpendicular to the first axis, which makes it possible to further reduce the capacitance of the second distributed Bragg reflector.
[0017] A method for manufacturing a vertical-cavity surface-emitting laser according to one embodiment includes the steps of: forming a mask on a semiconductor laminate provided on a primary surface of a substrate, the semiconductor laminate including a first semiconductor layer for a first distributed Bragg reflector, an active layer, and a second semiconductor layer for a second distributed Bragg reflector, the substrate, the first semiconductor layer, the active layer, the second semiconductor layer, and the mask being sequentially arranged in a direction of a first axis intersecting the primary surface; implanting first ions into the second semiconductor layer using the mask in a first direction tilted with respect to the first axis; and implanting second ions into the second semiconductor layer using the mask in a second direction tilted with respect to the first axis, wherein a direction in which the second direction is projected onto a plane perpendicular to the first axis differs from a direction in which the first direction is projected onto the plane.
[0018] According to the above-described method for manufacturing a vertical-cavity surface-emitting laser, first ions are implanted into the first portion covered by the mask by ion implantation in a first direction. Second ions are implanted into the second portion covered by the mask by ion implantation in a second direction. The first and second portions form the high-resistance region described above in the second distributed Bragg reflector. Therefore, in the manufactured vertical-cavity surface-emitting laser, the capacitance of the second distributed Bragg reflector can be reduced while suppressing an increase in the electrical resistance of the second distributed Bragg reflector.
[0019] [Details of the embodiments of the present disclosure] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same or equivalent elements are designated by the same reference numerals, and duplicate explanations will be omitted. X, Y, and Z coordinate axes are shown in the drawings as necessary. The X, Y, and Z axes intersect (e.g., are perpendicular to) each other.
[0020] Fig. 1 is a cross-sectional view schematically showing a vertical-cavity surface-emitting laser according to one embodiment. Fig. 2 is an enlarged cross-sectional view showing a portion of the vertical-cavity surface-emitting laser of Fig. 1. The vertical-cavity surface-emitting laser (VCSEL) 10 shown in Fig. 1 includes a first distributed Bragg reflector 18, an active layer 20, and a second distributed Bragg reflector 22. The first distributed Bragg reflector 18, the active layer 20, and the second distributed Bragg reflector 22 are sequentially arranged in the direction of a first axis Ax1. The direction in which the first axis Ax1 extends coincides with the Z-axis.
[0021] The vertical-cavity surface-emitting laser 10 may include a post PS provided on a substrate 12. The post PS extends along a first axis Ax1. The post PS includes a first distributed Bragg reflector 18, an active layer 20, and a second distributed Bragg reflector 22. The substrate 12, the first distributed Bragg reflector 18, the active layer 20, and the second distributed Bragg reflector 22 are arranged in order in the direction of the first axis Ax1.
[0022] The substrate 12 has a primary surface 12a including a III-V compound semiconductor. The primary surface 12a intersects with the first axis Ax1. The substrate 12 may be a III-V compound semiconductor substrate. The substrate 12 may be a substrate including a III-V compound semiconductor layer and a base substrate. The III-V compound semiconductor layer has the primary surface 12a. The base substrate supports the III-V compound semiconductor layer. The III-V compound semiconductor includes, for example, GaAs.
[0023] The first distributed Bragg reflector 18 has a semiconductor laminate structure of a first conductivity type (e.g., n-type). The semiconductor laminate structure includes semiconductor layers 18a and 18b arranged alternately in the direction of the first axis Ax1. The semiconductor layers 18a and 18b have refractive indices different from each other. For example, the semiconductor layer 18a has a lower refractive index than the semiconductor layer 18b. Each of the semiconductor layers 18a and 18b includes a III-V compound semiconductor such as AlGaAs. An example of an n-type dopant is silicon.
[0024] The active layer 20 has, for example, a multi-quantum well structure. The multi-quantum well structure may include GaAs layers (or AlGaAs layers) and AlGaAs layers alternately arranged along the first axis Ax1.
[0025] The second distributed Bragg reflector 22 has a semiconductor laminate structure of a second conductivity type (e.g., p-type). The second conductivity type is opposite to the first conductivity type. The semiconductor laminate structure includes semiconductor layers 22a and 22b arranged alternately in the direction of the first axis Ax1. The semiconductor layers 22a and 22b have refractive indices different from each other. The semiconductor layer 22a has a refractive index lower than that of the semiconductor layer 22b, for example. Each of the semiconductor layers 22a and 22b includes a III-V compound semiconductor such as AlGaAs.
[0026] The post PS may include a contact layer 29 of a second conductivity type (e.g., p-type) provided on the semiconductor layer 22b. The contact layer 29 has an upper surface PSa of the post PS. The contact layer 29 includes a III-V compound semiconductor such as AlGaAs.
[0027] The post PS may include a current confinement layer 26 disposed between the active layer 20 and the semiconductor layer 22b. The current confinement layer 26 includes an aperture portion 26a and an oxidized portion 26b surrounding the aperture portion 26a. The first axis Ax1 passes through the aperture portion 26a. The aperture portion 26a is a semiconductor layer of a second conductivity type (e.g., p-type). The aperture portion 26a includes a III-V compound semiconductor containing aluminum as a group III element. The aperture portion 26a includes a III-V compound semiconductor such as AlGaAs. The oxidized portion 26b includes aluminum oxide. The aperture portion 26a has a lower electrical resistance than the oxidized portion 26b. The inner diameter of the oxidized portion 26b (the outer diameter of the aperture portion 26a) may be 7 μm or more and 9 μm or less. A semiconductor layer 22b may be provided between the current confinement layer 26 and the active layer 20.
[0028] A third distributed Bragg reflector 14 may be provided between the substrate 12 and the post PS. The third distributed Bragg reflector 14 has, for example, a semiconductor laminate structure of a first conductivity type (e.g., n-type). The semiconductor laminate structure may be i-type. The semiconductor laminate structure includes a plurality of semiconductor layers alternately arranged in the direction of the first axis Ax1. The plurality of semiconductor layers have refractive indices different from one another. Each semiconductor layer includes, for example, a III-V compound semiconductor such as AlGaAs.
[0029] A contact layer 16 of a first conductivity type (for example, n-type) may be provided between the third distributed Bragg reflector 14 and the post PS. The contact layer 16 includes a III-V compound semiconductor such as AlGaAs.
[0030] The vertical-cavity surface-emitting laser 10 may include an electrode 30 arranged to surround the first axis Ax1. The electrode 30 is, for example, a ring-shaped electrode. The electrode 30 is arranged on the upper surface PSa of the post PS. In the direction of the first axis Ax1, the second distributed Bragg reflector 22 is disposed between the electrode 30 and the active layer 20.
[0031] The vertical-cavity surface-emitting laser 10 may include a semiconductor laminate structure LM provided on a major surface 12a of a substrate 12. A third distributed Bragg reflector 14 and a contact layer 16 are provided between the substrate 12 and the semiconductor laminate structure LM. The semiconductor laminate structure LM has the same layer structure as the post PS. The semiconductor laminate structure LM and the post PS are arranged in a direction (e.g., the X-axis) perpendicular to the first axis Ax1. A trench TR surrounding the post PS may be formed between the semiconductor laminate structure LM and the post PS. The bottom of the trench TR reaches the contact layer 16.
[0032] An insulating layer 50 may be provided on the semiconductor laminate structure LM, the trench TR, and the post PS. The insulating layer 50 has a first opening 50a on the upper surface PSa of the post PS. The electrode 30 is provided in the first opening 50a. The insulating layer 50 has a second opening 50b at the bottom of the trench TR. The electrode 40 is provided in the second opening 50b.
[0033] The electrode 30 is in ohmic contact with the upper surface PSa of the post PS. A wiring 32 may be electrically connected to the electrode 30. The wiring 32 extends from the upper surface PSa of the post PS across the trench TR to the semiconductor laminate structure LM.
[0034] The electrode 40 is in ohmic contact with the contact layer 16. A wiring 42 may be electrically connected to the electrode 40. The wiring 42 extends from the trench TR to the semiconductor laminate structure LM.
[0035] The second distributed Bragg reflector 22 includes a semiconductor region SC and a high-resistance region HR. The semiconductor region SC includes a semiconductor layer 22a and a semiconductor layer 22b. The first axis Ax1 passes through the center of the semiconductor region SC. The center of the semiconductor region SC may be the center of gravity of the cross-sectional shape of the semiconductor region SC perpendicular to the first axis Ax1. The semiconductor region SC has, for example, a truncated cone shape. The high-resistance region HR has an electrical resistance higher than the electrical resistance of the semiconductor region SC. The high-resistance region HR may include the same type of semiconductor as the semiconductor included in the semiconductor region SC. The high-resistance region HR includes ions. Examples of ions include protons and first conductivity type dopants (e.g., n-type dopants).
[0036] In a cross section including the first axis Ax1 (e.g., an XZ cross section), the high resistance region HR has an inner edge HRE. The inner edge HRE extends in a first direction DR1 inclined with respect to the first axis Ax1. The angle θ between the first direction DR1 and the first axis Ax1 may be 7° or more and 45° or less. The inner diameter WD of the high resistance region HR increases with increasing distance from the active layer 20 in the direction of the first axis Ax1. The inner diameter WD of the high resistance region HR is the distance between the inner edge HRE and another inner edge facing the inner edge HRE in a direction perpendicular to the first axis Ax1 (e.g., the X axis). The other inner edge may be axisymmetric with the inner edge HRE about the first axis Ax1. The inner diameter WD of the high resistance region HR corresponds to the width of the semiconductor region SC in the direction perpendicular to the first axis Ax1. The high resistance region HR may have an inner edge HRE extending in the first direction DR1 in all cross sections including the first axis Ax1 (e.g., a YZ cross section). In all cross sections including the first axis Ax1, the inner diameter WD of the high resistance region HR may increase with increasing distance from the active layer 20 in the direction of the first axis Ax1.
[0037] In a cross section including the first axis Ax1, the inner edge HRE of the high resistance region HR has a first end E1 and a second end E2. The second end E2 is located farther from the electrode 30 than the first end E1 in the direction of the first axis Ax1 (e.g., the Z axis).
[0038] The first end E1 may be located farther from the first axis Ax1 than the inner edge 30E1 of the electrode 30 in a direction perpendicular to the first axis Ax1 (e.g., the X-axis). The first end E1 may be located closer to the first axis Ax1 than the outer edge 30E2 of the electrode 30 in a direction perpendicular to the first axis Ax1. A distance D between the first end E1 and the inner edge 30E1 of the electrode 30 in a direction perpendicular to the first axis Ax1 may be 1 μm or more and 3 μm or less. The inner diameter of the electrode 30 may be 12 μm or more and 22 μm or less. The outer diameter of the electrode 30 may be 16 μm or more and 26 μm or less.
[0039] The second end E2 is located closer to the first axis Ax1 than the first end E1 in a direction perpendicular to the first axis Ax1. The second end E2 may be located closer to the first axis Ax1 than the inner edge 30E1 of the electrode 30 in a direction perpendicular to the first axis Ax1.
[0040] The high-resistance region HR may include a first high-resistance region HR1 and a second high-resistance region HR2. The first high-resistance region HR1 surrounds the semiconductor region SC. The semiconductor region SC and the first high-resistance region HR1 may be in contact with each other. The width of the first high-resistance region HR1 in a direction perpendicular to the first axis Ax1 (e.g., the X-axis) decreases with increasing distance from the active layer 20 in the direction of the first axis Ax1. The second high-resistance region HR2 surrounds the first high-resistance region HR1. The first high-resistance region HR1 and the second high-resistance region HR2 may be in contact with each other. The second high-resistance region HR2 has a higher electrical resistance than the first high-resistance region HR1. The first high-resistance region HR1 and the second high-resistance region HR2 are, for example, ring-shaped regions.
[0041] The first high-resistance region HR1 and the second high-resistance region HR2 may each contain ions. The ions in the second high-resistance region HR2 have a higher concentration than the ions in the first high-resistance region HR1. The ions in the first high-resistance region HR1 may have a concentration of, for example, 1×10 19 cm -3 or more concentration.
[0042] 3 is a plan view showing a high-resistance region of the vertical-cavity surface-emitting laser of FIG. 1. The first high-resistance region HR1 may have a first portion P1 to a fifth portion P5. The ions in the first portion P1 to the fifth portion P5 have different concentrations. The ion concentrations in the first portion P1 to the fifth portion P5 may increase in order from the first portion P1 to the fifth portion P5. The ions in the first portion P1 may have a concentration of, for example, 1×10 19 cm -3The concentration of ions in the second portion P2 may be twice the concentration of ions in the first portion P1. The concentration of ions in the third portion P3 may be three times the concentration of ions in the first portion P1. The concentration of ions in the fourth portion P4 may be four times the concentration of ions in the first portion P1. The concentration of ions in the fifth portion P5 may be five times the concentration of ions in the first portion P1.
[0043] 1 and 2, the high resistance region HR may extend in the direction of the first axis Ax1 to reach the contact layer 29 and the current confinement layer 26. The high resistance region HR may extend in the direction of the first axis Ax1 to reach a portion of the first distributed Bragg reflector 18.
[0044] In the vertical-cavity surface-emitting laser 10, when a voltage is applied between the electrode 30 and the electrode 40, a bias current from the electrode 30 flows along the inner edge HRE of the high-resistance region HR and is supplied to the active layer 20 through the current confinement layer 26. As a result, laser light L is emitted in the direction of the first axis Ax1.
[0045] According to the vertical-cavity surface-emitting laser 10, it is possible to reduce the capacitance of the portion of the second distributed Bragg reflector 22 that is close to the active layer 20 while suppressing an increase in the electrical resistance of the portion of the second distributed Bragg reflector 22 that is far from the active layer 20. Therefore, it is possible to reduce the capacitance of the second distributed Bragg reflector 22 while suppressing an increase in the electrical resistance of the second distributed Bragg reflector 22. Therefore, the vertical-cavity surface-emitting laser 10 can operate in a wider band. For example, when the volume of the semiconductor region SC is 874 μm 3 When the angle θ between the first direction DR1 and the first axis Ax1 is 25°, the capacitance of the second distributed Bragg reflector 22 can be reduced by 10 fF compared to when the angle θ is 0°.
[0046] When the first end E1 of the inner edge HRE of the high resistance region HR is positioned farther from the first axis Ax1 than the inner edge 30E1 of the electrode 30 in the direction perpendicular to the first axis Ax1, the contact area between the electrode 30 and the upper surface of the semiconductor region SC increases, thereby reducing the contact resistance and further reducing the electrical resistance of the second distributed Bragg reflector 22.
[0047] 4 to 8 are diagrams showing steps in a method for manufacturing a vertical-cavity surface-emitting laser according to an embodiment. The vertical-cavity surface-emitting laser 10 may be manufactured as follows.
[0048] First, as shown in FIG. 4 , a mask MK is formed on a semiconductor stack SL provided on the primary surface 12a of the substrate 12. The semiconductor stack SL includes a first semiconductor layer 118 for the first distributed Bragg reflector 18, an active layer 20, and a second semiconductor layer 122 for the second distributed Bragg reflector 22. The substrate 12, the first semiconductor layer 118, the active layer 20, the second semiconductor layer 122, and the mask MK are arranged in this order along a first axis Ax1 intersecting the primary surface 12a. The semiconductor stack SL may further include a third distributed Bragg reflector 14, a contact layer 16, and a contact layer 29. The third distributed Bragg reflector 14, the contact layer 16, the first semiconductor layer 118, the active layer 20, the second semiconductor layer 122, the contact layer 29, and the mask MK are formed in this order on the substrate 12. Each semiconductor layer is formed by, for example, organometallic vapor phase epitaxy (OMVPE). The mask MK is, for example, a resist mask. The first axis Ax1 passes through the mask MK. When viewed from the first axis Ax1, the mask MK is, for example, circular. The first axis Ax1 may pass through the center of gravity of the surface shape of the mask MK.
[0049] Next, as shown in FIGS. 5 and 6, first ions IN1 are implanted into the second semiconductor layer 122 using a mask MK in a first direction DR1 tilted with respect to the first axis Ax1. This forms a high-resistance region HRa. The first ions IN1 are also implanted into the first portion P1a covered by the mask MK when viewed from the first axis Ax1. The first direction DR1 is tilted by an angle θ with respect to the first axis Ax1. A direction A1 obtained by projecting the first direction DR1 onto a plane (e.g., an XY plane) perpendicular to the first axis Ax1 coincides with the positive direction of the X-axis.
[0050] Next, as shown in FIG. 7, second ions IN2 are implanted into the second semiconductor layer 122 using a mask MK in a second direction DR2 tilted with respect to the first axis Ax1. This forms a high-resistance region HRb. The second ions IN2 are also implanted into the second portion P2a covered by the mask MK as viewed from the first axis Ax1. The type of the second ions IN2 may be the same as the first ions IN1. The second direction DR2 may be tilted by an angle θ with respect to the first axis Ax1. The direction A2, obtained by projecting the second direction DR2 onto a plane perpendicular to the first axis Ax1, is different from the direction A1. The implantation of the second ions IN2 is performed after rotating the substrate 12 relative to the ion implantation device by an angle α between the directions A1 and A2 around the first axis Ax1. The angle α between the directions A1 and A2 may be 360° / k. k may be an integer greater than or equal to 2 or an even number greater than or equal to 4. k may be a divisor of 360. For example, when k is 6, the angle α is 60°. The dose of each ion implantation may be set to x / k, where x is the concentration of ions in the second high-resistance region HR2.
[0051] Next, as shown in FIG. 8 , third to sixth ions may be implanted into the second semiconductor layer 122 using a mask MK in third to sixth directions DR3 to DR6 inclined with respect to the first axis Ax1. The types of the third to sixth ions may be the same as those of the first ions IN1. Each of the third to sixth directions DR3 to DR6 may be inclined by an angle θ with respect to the first axis Ax1. A direction A3 obtained by projecting the third direction DR3 onto a plane perpendicular to the first axis Ax1 is different from the directions A1 and A2. The implantation of the third ions is performed after rotating the substrate 12 relative to the ion implantation device around the first axis Ax1 by an angle α formed by the directions A2 and A3. A direction A4 obtained by projecting a fourth direction DR4 onto a plane perpendicular to the first axis Ax1 is different from the directions A1 to A3. The implantation of the fourth ions is performed after rotating the substrate 12 relative to the ion implantation device around the first axis Ax1 by an angle α between the directions A3 and A4. The direction A5, obtained by projecting the fifth direction DR5 onto a plane perpendicular to the first axis Ax1, differs from the directions A1 to A4. The implantation of the fifth ions is performed after rotating the substrate 12 relative to the ion implantation device around the first axis Ax1 by an angle α between the directions A4 and A5. The direction A6, obtained by projecting the sixth direction DR6 onto a plane perpendicular to the first axis Ax1, differs from the directions A1 to A5. The implantation of the sixth ions is performed after rotating the substrate 12 relative to the ion implantation device around the first axis Ax1 by an angle α between the directions A5 and A6. The above-described ion implantation results in the formation of a high-resistance region HR, which includes a first high-resistance region HR1 and a second high-resistance region HR2. After the ion implantation, the mask MK is removed.
[0052] Next, trenches TR shown in FIG. 1 are formed by, for example, photolithography and etching. This forms posts PS and semiconductor stacked structures LM. Thereafter, the side surfaces of the posts PS are oxidized to form oxidized portions 26b of the current confinement layer 26. Thereafter, an insulating layer 50 is formed. Thereafter, electrodes 30 and 40 are formed. Thereafter, wiring 32 and wiring 42 are formed.
[0053] According to the manufacturing method of the vertical-cavity surface-emitting laser 10, as shown in FIG. 6, first ions IN1 are implanted into the first portion P1a covered by the mask MK by ion implantation in the first direction DR1. Furthermore, as shown in FIG. 7, second ions IN2 are implanted into the second portion P2a covered by the mask MK by ion implantation in the second direction DR2. This ion implantation forms a high-resistance region HR in the second distributed Bragg reflector 22. Therefore, in the manufactured vertical-cavity surface-emitting laser 10, the capacitance of the second distributed Bragg reflector 22 can be reduced while suppressing an increase in the electrical resistance of the second distributed Bragg reflector 22. Furthermore, since the same mask MK can be used to perform ion implantation multiple times, there is no need to prepare a new mask for each ion implantation. This reduces the ion implantation time.
[0054] Although the preferred embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above embodiments.
[0055] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above meaning, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]
[0056] 10...Vertical-cavity surface-emitting laser 12... Circuit board 12a…main surface 14…Third distributed Bragg reflector 16...Contact layer 18...first distributed Bragg reflector 18a...Semiconductor layer 18b...semiconductor layer 20…Active layer 22...Second distributed Bragg reflector 22a...semiconductor layer 22b...semiconductor layer 26…Current confinement layer 26a...Aperture section 26b...oxidized part 29...Contact layer 30...electrode 30E1...Common-law marriage 30E2...outer edge 32...Wiring 40...Electrode 42...Wiring 50...insulating layer 50a...First opening 50b…Second opening 118...First semiconductor layer 122...Second semiconductor layer A1…direction A2…direction A3…direction A4…direction A5…direction A6…direction Ax1…1st axis D...Distance DR1…first direction DR2…Second direction DR3…Third direction DR4…4th direction DR5…5th direction DR6…6th direction E1…1st end E2…Second end HR…High resistance region HR1…1st high resistance region HR2…Second high resistance region HRa…High resistance area HRb…High resistance region HRE…inner rim IN1: First ion IN2: Second ion L...laser light LM…Semiconductor laminated structure MK…Mask P1…first part P1a…first part P2…Second part P2a…Second part P3…3rd part P4...4th part P5…5th part PS…Post PSa…Top surface SC: Semiconductor area SL: Semiconductor laminate TR...Trench WD...inner diameter
Claims
1. A substrate; a post provided on the substrate; Equipped with The post is a first distributed Bragg reflector; an active layer; a second distributed Bragg reflector; Equipped with the first distributed Bragg reflector, the active layer, and the second distributed Bragg reflector are sequentially arranged in a direction of a first axis; the second distributed Bragg reflector includes a semiconductor region and a high resistance region; the high resistance region has a higher electrical resistance than the semiconductor region, the first axis passes through the semiconductor region; the high resistance region surrounds the semiconductor region; In a cross section including the first axis, the high resistance region has an inner edge extending in a direction inclined with respect to the first axis such that an inner diameter of the high resistance region increases with increasing distance from the active layer in the direction of the first axis, the high resistance region includes a first high resistance region surrounding the semiconductor region and a second high resistance region surrounding the first high resistance region; each of the first high resistance region and the second high resistance region includes ions; The ions in the second high resistance region have a higher concentration than the ions in the first high resistance region.
2. the first high resistance region has a plurality of portions, and the ions in the plurality of portions have concentrations different from each other; the plurality of portions includes a first portion and a second portion; the second portion is located farther from the first axis than the first portion in a direction perpendicular to the first axis; 2. The vertical-cavity surface-emitting laser according to claim 1, wherein the concentration of said ions in said second portion is at least twice the concentration of said ions in said first portion.
3. The ions in the first high resistance region are 1×10 19 cm -3 3. The vertical-cavity surface-emitting laser according to claim 1, wherein the concentration is equal to or greater than 100 ppm.
4. further comprising an electrode provided so as to surround the first axis; the second distributed Bragg reflector is disposed between the electrode and the active layer in the direction of the first axis; In the cross section, the inner edge of the high resistance region has a first end and a second end, the second end is located farther from the electrode in the direction of the first axis than the first end; 4. The vertical-cavity surface-emitting laser according to claim 1, wherein the first end is located farther from the first axis than an inner edge of the electrode in a direction perpendicular to the first axis.
5. 5. The vertical-cavity surface-emitting laser according to claim 4, wherein the second end is located closer to the first axis than the inner edge of the electrode in a direction perpendicular to the first axis.
6. a step of forming a mask on a semiconductor stack provided on a primary surface of a substrate, the semiconductor stack including a first semiconductor layer for a first distributed Bragg reflector, an active layer, and a second semiconductor layer for a second distributed Bragg reflector, the substrate, the first semiconductor layer, the active layer, the second semiconductor layer, and the mask being sequentially arranged in a direction of a first axis intersecting the primary surface; implanting ions into the second semiconductor layer in a first direction tilted relative to the first axis using the mask; implanting the ions into the second semiconductor layer using the mask in a second direction tilted relative to the first axis; removing the mask and then etching the semiconductor stack to form a post on the substrate, the post including the first distributed Bragg reflector, the active layer, and the second distributed Bragg reflector; Including, a direction in which the second direction is projected onto a plane perpendicular to the first axis is different from a direction in which the first direction is projected onto the plane, the second distributed Bragg reflector includes a semiconductor region and a high resistance region; the high resistance region has a higher electrical resistance than the semiconductor region, the first axis passes through the semiconductor region; the high resistance region surrounds the semiconductor region; In a cross section including the first axis, the high resistance region has an inner edge extending in a direction inclined with respect to the first axis such that an inner diameter of the high resistance region increases with increasing distance from the active layer in the direction of the first axis, the high resistance region includes a first high resistance region surrounding the semiconductor region and a second high resistance region surrounding the first high resistance region; each of the first high resistance region and the second high resistance region contains the ions; The ions in the second high-resistance region have a higher concentration than the ions in the first high-resistance region.
Citation Information
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