Semiconductor device, pressure sensor, and method of manufacturing the semiconductor device

Abstract

To improve temperature characteristics of a pressure sensor.SOLUTION: A semiconductor device 300A includes a pressure sensor formation region RB and a transistor formation region RA. A pressure sensor 200A formed in the pressure sensor formation region RB has: a p- type semiconductor substrate 50; an n- type semiconductor region 60 corresponding to an n- type deep well 80; and a piezoresistance region 11 corresponding to a p- type well 81.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device, a pressure sensor, and a manufacturing technique for the semiconductor device, and more particularly to a semiconductor device including a pressure sensor and a transistor, and a technique that is effective when applied to the manufacturing technique for the semiconductor device. [Background technology]

[0002] Japanese Patent Laid-Open Publication No. 2019-2781 (Patent Document 1) and Non-Patent Document 1 describe techniques relating to pressure sensors using piezoresistors and methods for manufacturing the same. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-2781 [Non-patent literature]

[0004] [Non-Patent Document 1] X. Li et al. “High-temperature piezoresistive pressure sensor based on implantation of oxygen into silicon wafer” Sensors and Actuators A 179 (2012) 277- 282 Summary of the Invention [Problem to be solved by the invention]

[0005] Pressure sensors are used in a wide range of applications. For example, in the automotive field, pressure sensors were first used as intake pressure sensors for automobile engine control, and have since been used in applications such as suspension hydraulic control, which changes the hardness and characteristics of dampers according to road conditions and driving conditions, and refrigerant pressure control, which controls the cooling rate of air conditioners. Furthermore, in recent years, pressure sensors have been used in a variety of applications, including exhaust pressure, brake pressure, airbags, and tire pressure, in order to improve safety and environmental performance. Therefore, pressure sensors are used in a variety of environments, and therefore are required to exhibit good characteristics even in harsh environments. In particular, since it is important to exhibit good characteristics even in harsh temperature environments, pressure sensors with excellent temperature characteristics are desired. [Means for solving the problem]

[0006] In one embodiment, the semiconductor device includes a pressure sensor formation region and a transistor formation region. The transistor formation region includes a semiconductor substrate of a first conductivity type, a first well of a second conductivity type formed in the semiconductor substrate, a second well of the first conductivity type formed in the first well, and a transistor formed on the second well. The transistor includes a source region and a drain region formed in the second well, a channel formation region sandwiched between the source region and the drain region, a gate insulating film formed on the channel formation region, and a gate electrode formed on the gate insulating film. The pressure sensor formed in the pressure sensor formation region includes a semiconductor substrate, a semiconductor region of the second conductivity type corresponding to the first well, and a piezo-resistance region corresponding to the second well.

[0007] In one embodiment, the semiconductor device includes a pressure sensor formation region and a transistor formation region. The transistor formation region includes a semiconductor substrate of a first conductivity type, a first well of a second conductivity type formed in the semiconductor substrate, a second well of the first conductivity type formed in the first well, and a transistor formed on the second well. The transistor includes a source region and a drain region formed in the second well, a channel formation region sandwiched between the source region and the drain region, a gate insulating film formed on the channel formation region, and a gate electrode formed on the gate insulating film. The pressure sensor formed in the pressure sensor formation region includes a semiconductor substrate, a first semiconductor region of the second conductivity type corresponding to the first well, a second semiconductor region of the first conductivity type corresponding to the second well, and a piezo-resistance region corresponding to the source region and the drain region.

[0008] In one embodiment, a method for manufacturing a semiconductor device includes a pressure sensor formation region and a transistor formation region, and includes the steps of: (a) preparing a semiconductor substrate of a first conductivity type; (b) forming a first well of a second conductivity type in the transistor formation region and forming a semiconductor region of the second conductivity type in the pressure sensor formation region; (c) forming a second well of the first conductivity type in the first well and forming a piezoresistance region of the first conductivity type in the semiconductor region; (d) forming a gate insulating film on the semiconductor substrate in the transistor formation region; (e) forming a gate electrode on the gate insulating film; and (f) forming a source region and a drain region in the second well.

[0009] In one embodiment, a method for manufacturing a semiconductor device is a method for manufacturing a semiconductor device including a pressure sensor formation region and a transistor formation region, and includes the steps of: (a) preparing a semiconductor substrate of a first conductivity type; (b) forming a first well of a second conductivity type in the transistor formation region and forming a first semiconductor region of the second conductivity type in the pressure sensor formation region; (c) forming a second well of the first conductivity type in the first well and forming a second semiconductor region of the first conductivity type in the first semiconductor region; (d) forming a gate insulating film on the semiconductor substrate in the transistor formation region; (e) forming a gate electrode on the gate insulating film; and (f) forming a source region and a drain region in the second well and forming a piezoresistance region of the second conductivity type in the second semiconductor region.

[0010] A pressure sensor in one embodiment includes a semiconductor substrate of a first conductivity type, a semiconductor region of a second conductivity type formed in the semiconductor substrate, and a piezo-resistance region of the first conductivity type contained in the semiconductor region.

[0011] In one embodiment, the pressure sensor comprises a semiconductor substrate of a first conductivity type, a first semiconductor region of a second conductivity type formed on the semiconductor substrate, a second semiconductor region of the first conductivity type contained in the first semiconductor region, and a piezo-resistance region of the second conductivity type contained in the second semiconductor region. [Effects of the Invention]

[0012] According to one embodiment, the temperature characteristics of the pressure sensor can be improved. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is a diagram schematically illustrating a configuration of a pressure sensor according to a first related technology. [Figure 2] FIG. 1 is an equivalent circuit diagram of a pressure sensor according to a first related art. [Figure 3] FIG. 1 is a band diagram showing a state in which a reverse bias is applied to a pn junction diode. [Figure 4]FIG. 10 is a diagram showing a schematic configuration of a pressure sensor according to a second related art. [Figure 5] 1 is a diagram showing a schematic configuration of a pressure sensor according to a first embodiment. [Figure 6] 2 is an equivalent circuit diagram of the pressure sensor according to the first embodiment. FIG. [Figure 7] FIG. 1 is a band diagram showing a state in which a reverse bias V is applied between the piezoresistance region and the n-type semiconductor region and a reverse bias V is applied between the n-type semiconductor region and the p-type semiconductor substrate, while adopting a configuration in which an n-type semiconductor region is provided between the piezoresistance region and the p-type semiconductor substrate. [Figure 8] 10A and 10B are diagrams showing simulation results illustrating the occurrence of leakage current caused by electron current, where (a) is the simulation result at 300°C, (b) is the simulation result at 350°C, and (c) is the simulation result at 400°C. [Figure 9] 10A and 10B are diagrams showing simulation results illustrating the occurrence of leakage current caused by hole current, where (a) is the simulation result at 300°C, (b) is the simulation result at 350°C, and (c) is the simulation result at 400°C. [Figure 10] FIG. 1 is a diagram showing a schematic configuration of a semiconductor device. [Figure 11] 2A to 2C are diagrams illustrating a manufacturing process of the semiconductor device according to the first embodiment. [Figure 12] 12A to 12C are diagrams showing the manufacturing process of the semiconductor device following FIG. 11. [Figure 13] 13 is a diagram showing the manufacturing process of the semiconductor device following FIG. 12. [Figure 14] 14A to 14C are diagrams showing the manufacturing process of the semiconductor device following FIG. 13. [Figure 15] 15A to 15C are diagrams showing the manufacturing process of the semiconductor device following FIG. 14. [Figure 16] 16 is a diagram showing the manufacturing process of the semiconductor device following FIG. 15. [Figure 17] FIG. 10 is a diagram showing a semiconductor device according to a modified example. [Figure 18]FIG. 10 is a diagram showing a configuration of a pressure sensor according to a second embodiment. [Figure 19] FIG. 10 is an equivalent circuit diagram of the pressure sensor according to the second embodiment. [Figure 20] (a) is a simulation result showing the occurrence of leakage current due to electron current, and is a diagram showing the simulation result at 700°C, and (b) is a simulation result showing the occurrence of leakage current due to hole current, and is a diagram showing the simulation result at 700°C. [Figure 21] FIG. 1 is a diagram showing a schematic configuration of a semiconductor device. DETAILED DESCRIPTION OF THE INVENTION

[0014] In all the drawings for explaining the embodiments, the same components are generally designated by the same reference numerals, and repeated explanations thereof will be omitted. In addition, hatching may be used even in plan views to make the drawings easier to understand.

[0015] (Embodiment 1) <Pressure sensor detection principle> The pressure sensor targeted in this first embodiment is a pressure sensor that utilizes the piezoresistance effect. The detection principle of a pressure sensor that utilizes the piezoresistance effect will be described below.

[0016] First, the "piezoresistive effect" is the effect in which electrical resistance changes when mechanical strain is applied to a semiconductor or metal, and a semiconductor that exhibits the "piezoresistive effect" is used as a pressure sensor, for example. Specifically, the pressure sensor is configured so that gas or liquid pressure is applied from the outside to the semiconductor that makes up the pressure sensor. When this happens, the semiconductor that receives the external pressure is distorted, and as a result, the electrical resistance of the semiconductor changes due to the "piezoresistive effect."

[0017] A pair of electrodes is electrically connected to this semiconductor, and the output voltage between the pair of electrodes fluctuates in accordance with changes in electrical resistance. Considering that the change in electrical resistance is caused by strain, and that this strain is due to pressure from a gas or liquid, it is clear that the pressure from a gas or liquid can be calculated indirectly from the change in electrical resistance. In other words, the pressure applied to the pressure sensor from the outside can be detected based on the output voltage output from the semiconductor that constitutes the pressure sensor. In this way, the pressure sensor can detect pressure applied from the outside by utilizing the "piezoresistive effect."

[0018] <First related technology> For example, a pressure sensor utilizing the piezoresistance effect has the following structure: That is, with regard to the structure of a pressure sensor, there is the first related art shown below.

[0019] Here, the term "related art" as used in this specification refers to art that is not publicly known, but has problems that the inventors have discovered, and is a technology that is a premise for the present invention.

[0020] FIG. 1 is a diagram schematically illustrating the configuration of a pressure sensor 100A according to the first related technology.

[0021] In FIG. 1, the pressure sensor 100A has n - The n-type semiconductor substrate 10 - In the p-type semiconductor substrate 10 - A piezoresistive region 11 made of a n-type semiconductor region is formed. The piezoresistive region 11 is electrically connected to a pair of electrodes 20A and 20B. At this time, the piezoresistive region 11 functions as a resistor R1. - A pn junction is formed in the boundary region between the semiconductor substrate 10 and the piezoresistive region 11, resulting in an n - A pn junction diode D1 is formed by the semiconductor substrate 10 and the piezo-resistance region 11. As a result, the equivalent circuit diagram of the pressure sensor 100A according to the first related technology is as shown in FIG.

[0022] In the pressure sensor 100A configured in this way, when pressure is applied from the outside, n - Strain occurs in the piezo-resistance region 11 formed on the semiconductor substrate 10. As a result, the resistance value of the piezo-resistance region 11 changes due to the "piezoresistive effect." A pair of electrodes 20A and 20B are electrically connected to the piezo-resistance region 11, and the output voltage between the electrodes 20A and 20B fluctuates in response to the change in electrical resistance. Therefore, the pressure from the gas or liquid can be indirectly calculated based on the change in output voltage.

[0023] When such a pressure sensor 100A is operated, the piezoresistance region 11 and n - The pn junction diode D1 is made of a semiconductor substrate 10 and has a piezoresistance region 11 and an n - A reverse bias is applied between the gate electrode and the semiconductor substrate 10 .

[0024] FIG. 3 is a band diagram showing the state in which a reverse bias V is applied to the pn junction diode D1. In FIG. 3, even when a reverse bias V is applied to the pn junction diode D1, a small leakage current flows, although it is not as large as the forward current. That is, the p - Since electrons, which are minority carriers, exist in the conduction band Ec1 of the piezo-resistance region 11, the electric field formed in the depletion layer moves these electrons, which are minority carriers, from the conduction band Ec1 of the piezo-resistance region 11 to the n - The conduction band Ec2 of the n-type semiconductor substrate 10 is shifted. - Since holes, which are minority carriers, exist in the valence band Ev2 of the n-type semiconductor substrate 10, these minority carriers are transported to the n-type semiconductor substrate 10 by the electric field formed in the depletion layer. - The electrons move from the valence band Ev2 of the n-type semiconductor substrate 10 to the valence band Ev1 of the piezoresistance region 11, which has a lower hole energy. - A leakage current consisting of electron current and hole current caused by minority carriers flows between the gate electrode and the semiconductor substrate 10.

[0025] Here, at a temperature near room temperature, p - The number of minority carriers (electrons) excited to the conduction band Ec1 of the semiconductor region, and n - Since the number of minority carriers (holes) present in the valence band Ev2 of the semiconductor substrate 10 is small, the leakage current described above does not become so large. However, as the temperature rises, the energy of electrons increases and they are more likely to cross the band gap and become excited. - The number of minority carriers (electrons) excited to the conduction band Ec1 of the semiconductor region, and n - The number of minority carriers (holes) present in the valence band Ev2 of the n-type semiconductor substrate 10 increases. As a result, the piezoresistance region 11 and the n-type semiconductor substrate 10 that constitute the pressure sensor 100A - The leakage current flowing between the n-type semiconductor substrate 10 and the n-type semiconductor substrate 10 increases. - There is a concern that other elements may be adversely affected if the leakage current reaches the semiconductor substrate 10. For this reason, the operating temperature of the pressure sensor 100A is limited to about 125° C. due to the increase in leakage current.

[0026] Therefore, a second related technique has been proposed that reduces the leakage current and enables high temperature operation. The following describes a pressure sensor 100B according to the second related technique.

[0027] <Second related technology> FIG. 4 is a diagram showing a schematic configuration of a pressure sensor 100B according to the second related technology.

[0028] In FIG. 4, the pressure sensor 100B has an SOI (Silicon On Insulator) substrate 1S. The SOI substrate 1S has n - The pressure sensor 100B is composed of a support substrate 10A, which is a type semiconductor substrate, an insulating layer 30 formed on the support substrate 10A, and a silicon layer 40 formed on the insulating layer 30. In this case, the insulating layer 30 is formed of, for example, a silicon oxide film. In the pressure sensor 100B, a p -A piezoresistance region 11, which is a type semiconductor region, is formed on the substrate 10. The piezoresistance region 11 is electrically connected to a pair of electrodes 20A and 20B.

[0029] In the pressure sensor 100B configured as above, the piezoresistance region 11 is - The piezoresistance region 11 is not in contact with the support substrate 10A, which is a type semiconductor substrate. In other words, an insulating layer 30 is interposed between the piezoresistance region 11 and the support substrate 10A. As a result, in the pressure sensor 100B, a pn junction diode is not formed due to contact between the piezoresistance region 11 and the support substrate 10A, and therefore, unlike the first related technology described above, leakage current can be reduced even at high temperatures. Therefore, the second related technology enables high-temperature operation at around 500°C.

[0030] However, the second related technology uses an expensive SOI substrate, which raises concerns about increased manufacturing costs. In other words, the second related technology is useful from the perspective of reducing leakage current at high temperatures, but has the disadvantage of increasing manufacturing costs. Therefore, there is room for improvement in the second related technology from the perspective of improving the performance of pressure sensors by reducing leakage current at high temperatures while suppressing manufacturing costs.

[0031] Therefore, in the present embodiment 1, an effort is made to overcome the room for improvement that exists in the first related art and the second related art. That is, in the present embodiment 1, an effort is made to realize a pressure sensor that can reduce leakage current even during high temperature operation while suppressing manufacturing costs. The technical idea of ​​the present embodiment 1 that incorporates this effort will be described below.

[0032] <Pressure sensor configuration> FIG. 5 is a diagram showing a schematic configuration of the pressure sensor 200A according to the first embodiment.

[0033] In FIG. 5, the pressure sensor 200A is - a p-type semiconductor substrate 50; - The n-type semiconductor substrate 50- The n-type semiconductor region 60 is formed. - Inside the type semiconductor region 60, p - In other words, the piezoresistance region 11 is made of an n-type semiconductor region. - As contained in the p-type semiconductor region 60, - A piezoresistive region 11 made of a type semiconductor region is formed on the substrate 1. The piezoresistive region 11 is electrically connected to a pair of electrodes 20A and 20B.

[0034] At this time, the piezoresistive region 11 functions as a resistor R1. - A pn junction is formed in the boundary region between the semiconductor region 60 and the piezoresistive region 11, resulting in an n - The pn junction diode D1 is formed by the piezo-resistive region 60 and the piezo-resistive region 11. - type semiconductor region 60 and p - A pn junction is also formed in the boundary region with the n-type semiconductor substrate 50. - type semiconductor region 60 and p - A pn junction diode D2 is formed between the semiconductor substrate 50 and the pn junction diode D2. As a result, the equivalent circuit diagram of the pressure sensor 200A becomes as shown in FIG.

[0035] where n - The p-type semiconductor region 60 is connected to the piezoresistance region 11. - It has a function of electrically isolating the n-type semiconductor substrate 50. - In order to realize electrical element isolation by the p-type semiconductor region 60, a reverse bias is applied to the pn junction diode D1 and the pn junction diode D2. - A reverse bias is applied between the n-type semiconductor region 60 and the n-type semiconductor region 61. - type semiconductor region 60 and p - A reverse bias is applied between the gate electrode and the semiconductor substrate 50 .

[0036] <Operation of pressure sensor> Next, the operation of pressure sensor 200A in the first embodiment will be described.

[0037] In pressure sensor 200A, when external pressure is applied, distortion occurs in piezo-resistance region 11. As a result, the resistance value of piezo-resistance region 11 changes due to the "piezoresistive effect." A pair of electrodes 20A and 20B are electrically connected to piezo-resistance region 11, and the output voltage between electrodes 20A and 20B fluctuates in response to changes in electrical resistance. Therefore, the pressure from gas or liquid can be indirectly calculated based on the change in output voltage.

[0038] <Features of the First Embodiment> Next, the features of the first embodiment will be described.

[0039] The feature of the first embodiment is, for example, as shown in FIG. - Between the n-type semiconductor substrate 50 and the piezoresistance region 11 - The piezoresistance region 11 and the n-type semiconductor region 60 are interposed. - between the n-type semiconductor region 60 and - type semiconductor region 60 and p - The point is that a reverse bias is applied to both the gate and the semiconductor substrate 50.

[0040] This allows n - The p-type semiconductor region 60 is connected to the piezoresistance region 11. - The piezoresistance region 11 functions as an element isolation region that electrically isolates the piezoresistance region 11 from the p-type semiconductor substrate 50. - It is possible to reduce the leakage current flowing between the pressure sensor 200A and the semiconductor substrate 50. Therefore, the pressure sensor 200A according to the first embodiment can operate at high temperatures.

[0041] In the following, p - Between the n-type semiconductor substrate 50 and the piezoresistance region 11 - The piezoresistance region 11 and the n-type semiconductor region 60 are interposed. - between the n-type semiconductor region 60 and - type semiconductor region 60 and p -The following describes how the leakage current can be reduced according to the feature of the first embodiment in which a reverse bias is applied to both the gate and gate semiconductor substrate 50.

[0042] Figure 7 shows the piezoresistive region 11 and p - between the n-type semiconductor substrate 50 - While adopting a configuration in which a piezoresistance region 11 and an n-type semiconductor region 60 are provided, - A reverse bias V is applied between the n-type semiconductor region 60 and the n-type semiconductor region 61. - type semiconductor region 60 and p - 1 is a band diagram showing a state in which a reverse bias V is applied between the semiconductor substrate 50 and the semiconductor layer 10.

[0043] As shown in FIG. 7, the p - Since electrons, which are minority carriers, exist in the conduction band Ec1 of the piezo-resistance region 11, the electric field formed in the depletion layer moves these electrons, which are minority carriers, to the n - The conduction band Ec2 of the p-type semiconductor region 60 is shifted to the - Since electrons, which are minority carriers, also exist in the conduction band Ec3 of the semiconductor substrate 50, these electrons, which are minority carriers, are transported to the p - The n-type semiconductor substrate 50 has a lower energy than the conduction band Ec3. - The electrons move to the conduction band Ec2 of the semiconductor region 60.

[0044] Therefore, n - The conduction band Ec2 of the p-type semiconductor region 60 is different from the conduction band Ec1 of the piezoresistance region 11. - Electrons flow in from both the piezoresistance region 11 and the conduction band Ec3 of the p-type semiconductor substrate 50. - A well-shaped potential due to the reverse bias is formed between the piezoresistance region 11 and the n-type semiconductor substrate 50. - Electrons flow into the n-type semiconductor region 60. -The electrons flowing into the n-type semiconductor region 60 are blocked by a potential barrier. - p-type semiconductor region 60 - It becomes difficult to reach the p-type semiconductor substrate 50. - n-type semiconductor substrate 50 - Electrons flow into the n-type semiconductor region 60. - The electrons flowing into the n-type semiconductor region 60 are blocked by a potential barrier. - It becomes difficult to reach the piezoresistance region 11 from the p-type semiconductor region 60. - This means that electrons are prevented from flowing between the semiconductor substrates 50. As a result, it is understood that the pressure sensor 200A according to the first embodiment can reduce the leakage current caused by the electron current.

[0045] On the other hand, as shown in Figure 7, - Since holes, which are minority carriers, exist in the valence band Ev2 of the n-type semiconductor region 60, the minority carrier holes are transported to the n-type semiconductor region 60 by the electric field formed in the depletion layer. - The valence band Ev1 and p of the piezoresistance region 11, which has a lower energy from the valence band Ev2 of the type semiconductor region 60 in terms of holes, - The electrons move to the valence band Ev3 of the semiconductor substrate 50.

[0046] Therefore, the valence bands Ev1 and p in the piezoresistive region 11 - The valence band Ev3 of the n-type semiconductor substrate 50 includes - Holes, which are minority carriers, flow into the n-type semiconductor region 60 from the valence band Ev2. - The movement of majority carriers (holes) into the valence band Ev2 of the p-type semiconductor region 60 is hindered by a potential barrier. - The valence band Ev3 to n - The movement of majority carriers (holes) into the valence band Ev2 of the p-type semiconductor region 60 is also hindered by the potential barrier. -This means that holes are prevented from flowing between the semiconductor substrates 50. As a result, it can be seen that the pressure sensor 200A according to the first embodiment can also reduce the leakage current caused by the hole current.

[0047] From the above, according to the pressure sensor 200A of the first embodiment, it is possible to suppress both the leakage current caused by the electron current and the leakage current caused by the hole current, and therefore it is possible to reduce the total leakage current, which is the sum of the electron current and the hole current. As a result, it is possible to reduce the leakage current even at high temperatures, which improves the temperature characteristics of the pressure sensor 200A, and thereby enables the pressure sensor 200A to operate at high temperatures.

[0048] <<Simulation results>> Next, a description will be given of the results of a simulation verifying that the pressure sensor 200A according to the first embodiment can reduce the leakage current.

[0049] FIG. 8 is a diagram showing the results of evaluating the temperature characteristics of the pressure sensor 200A. In particular, FIG. 8 shows the simulation results showing the occurrence of leakage current density due to electron current, where (a) shows the simulation result at 300°C, (b) shows the simulation result at 350°C, and (c) shows the simulation result at 400°C. Here, the gray area indicates p - 10 shows the leakage current density reaching the semiconductor substrate 50.

[0050] Looking at Figures 8(a) to 8(c), in Figures 8(a) and 8(b), p - While no leakage current flows to the semiconductor substrate 50, in FIG. - It can be seen that the leakage current flows all the way to the semiconductor substrate 50. Therefore, it can be seen that the pressure sensor 200A can suppress the occurrence of leakage current caused by electron current up to at least 350°C.

[0051] Next, Figure 9 shows the simulation results showing the occurrence of leakage current due to hole current, where (a) shows the simulation results at 300°C, (b) shows the simulation results at 350°C, and (c) shows the simulation results at 400°C. Here, the gray area indicates p - 10 shows the leakage current density reaching the semiconductor substrate 50.

[0052] Looking at Figures 9(a) to 9(c), in Figure 9(a), p - 9(b) and 9(c), the leakage current does not flow to the p - It can be seen that the leakage current flows all the way to the semiconductor substrate 50. Therefore, it can be seen that the pressure sensor 200A can suppress the occurrence of leakage current caused by hole current up to at least 300°C.

[0053] From the above, it can be seen that, when the simulation results of the electron current and the hole current are combined, the leakage current can be reduced to at least about 300°C. In other words, it is confirmed that the structure of the pressure sensor 200A in the first embodiment allows high-temperature operation at about 300°C. Therefore, while the maximum operable temperature of the pressure sensor 100A in the first related art is about 125°C, the operable temperature of the pressure sensor 200A in the first embodiment is about 300°C, and therefore the structure of the pressure sensor 200A is found to be extremely useful.

[0054] The purpose of this embodiment 1 is to devise ways to overcome the room for improvement that exists in the first related technology and the second related technology described above, specifically to realize a pressure sensor that can reduce leakage current even when operating at high temperatures while keeping manufacturing costs down.

[0055] Here, for example, the structure of pressure sensor 200A shown in FIG. 7 is excellent from the viewpoint of reducing leakage current and enabling high-temperature operation. Furthermore, if pressure sensor 200A has a structure that is useful from the viewpoint of reducing manufacturing costs, it can also be said to be excellent for mass production, and the above-mentioned objective can be achieved. In this regard, pressure sensor 200A has the potential to be a useful structure that reduces leakage current and enables high-temperature operation while reducing manufacturing costs, and is a structure that is suitable for achieving the above-mentioned objective. Specifically, by embodying the basic concept described below in pressure sensor 200A, a pressure sensor that can reduce leakage current even when operating at high temperatures while suppressing manufacturing costs can be realized.

[0056] <Basic philosophy> The basic idea of ​​the first embodiment is to use a "triple well structure" formed by field-effect transistors in the configuration of the pressure sensor 200A in order to reduce leakage current while suppressing manufacturing costs. This basic idea allows a bulk semiconductor substrate to be used instead of an expensive SOI substrate, thereby reducing manufacturing costs. Furthermore, since the "triple well structure" formed by field-effect transistors is used directly in the configuration of the pressure sensor 200A, it becomes easy to integrate the field-effect transistors and the pressure sensor 200A on a single semiconductor substrate. This means that a semiconductor device including the field-effect transistors and the pressure sensor 200A can be manufactured without changing the manufacturing process of the field-effect transistors, which also reduces the manufacturing cost of the pressure sensor 200A.

[0057] That is, according to the basic concept of using the "triple well structure," (1) a bulk semiconductor substrate (silicon wafer) can be used instead of an SOI substrate, and (2) the pressure sensor 200A with the "triple well structure" can be formed by directly utilizing the manufacturing process of a field effect transistor, which synergistically reduces the manufacturing cost of a semiconductor device including the pressure sensor 200A. Furthermore, the pressure sensor 200A using the "triple well structure" can reduce leakage current. In other words, according to the basic concept, it is possible to realize a pressure sensor 200A that can reduce leakage current even when operating at high temperatures while suppressing manufacturing costs.

[0058] The following describes the configuration of a semiconductor device in which the pressure sensor 200A and a field effect transistor are mounted together, and then describes a method for manufacturing this semiconductor device.

[0059] <Configuration of semiconductor device> FIG. 10 is a diagram showing a schematic configuration of the semiconductor device 300A.

[0060] 10, the semiconductor device 300A has a transistor formation region RA and a pressure sensor formation region RB. The transistor formation region RA includes, for example, a p - a p-type semiconductor substrate 50; - n-type semiconductor substrate 50 - Type well 71 and n - A p-channel field effect transistor Qp is formed on the n-type well 71. The p-channel field effect transistor Qp is - The semiconductor device has a source region 72 and a drain region 73 formed in a well 71, a channel forming region sandwiched between the source region 72 and the drain region 73, a gate insulating film 74 formed on the channel forming region, and a gate electrode 75 formed on the gate insulating film 74. - A contact region 76 is formed in the mold well 71 .

[0061] Furthermore, in the transistor forming region RA, for example, p - n-type semiconductor substrate 50 - Type Deep Well 80 and n - p formed in type deep well 80 - A type well 81 is formed, and p - a type semiconductor substrate 50 and an n - Type Deep Well 80 and P - The n-channel field effect transistor Qn is formed on the triple well structure. - The semiconductor device has a source region 82 and a drain region 83 formed in a p-type well 81, a channel formation region sandwiched between the source region 82 and the drain region 83, a gate insulating film 84 formed on the channel formation region, and a gate electrode 85 formed on the gate insulating film 84. - A contact region 86 is formed in the n-type well 81. - A contact region 87 is formed in the deep well 80. - A contact region 88 is formed in the semiconductor substrate 50 .

[0062] On the other hand, a pressure sensor 200A is formed in the pressure sensor forming region RB. - a type semiconductor substrate 50 and an n - Type Deep Well 80 corresponding to n - a p-type semiconductor region 60; - It is made up of piezo-resistive regions 11 corresponding to mold wells 81 .

[0063] At this time, for example, the impurity concentration of the piezoresistive region 11 is lower than the impurity concentrations of the source region 82 and the drain region 83, while p - The impurity concentration of the n well 81 is the same as that of the n well 82. - The impurity concentration of the n-type semiconductor region 60 is, for example, -The impurity concentration of the piezoresistive region 11 is equal to that of the p-type deep well 80. Here, "the impurity concentration is equal" means that the order of the impurity concentration is the same. For example, "the impurity concentration of the piezoresistive region 11 is equal to that of the p-type deep well 80." - The "impurity concentration of the piezoresistance region 11 is equal to the impurity concentration of the piezoresistance region 11" means that the impurity concentration of the piezoresistance region 11 is equal to the impurity concentration of the piezoresistance region 11. - This means that the order of the impurity concentration of the mold well 81 matches the order of the impurity concentration of the mold well 81 .

[0064] In the transistor formation region RA and the pressure sensor formation region RB configured in this manner, an interlayer insulating film 90 made of, for example, a silicon oxide film is formed, and a plurality of plugs 91 are formed in this interlayer insulating film 90. Then, a plurality of wirings 92 electrically connected to the plurality of plugs 91 are formed on the interlayer insulating film 90.

[0065] <Method of manufacturing a semiconductor device> Next, a method for manufacturing the semiconductor device 300A will be described with reference to the drawings.

[0066] First, for example, as shown in Figure 11, - A p-type semiconductor substrate 50 is prepared. - An STI region 70 is formed in a p-type semiconductor substrate 50. - The insulating film can be formed by forming a groove in the semiconductor substrate 50 and filling the groove with an insulating film.

[0067] Next, as shown in Figure 12, - In the transistor forming region RA of the semiconductor substrate 50, - A deep well 80 is formed, and p - The pressure sensor forming region RB of the semiconductor substrate 50 is - The n-type semiconductor region 60 is formed. - Type Deep Well 80 and n - The p-type semiconductor region 60 can be formed, for example, through the following steps. -After applying a resist film onto the semiconductor substrate 50, the resist film is patterned by using a photolithography technique. Then, using the patterned resist film as a mask, n-type impurities (donors) such as phosphorus (P) or arsenic (As) are implanted into the p - The n-type semiconductor substrate 50 is implanted with ions. - Type Deep Well 80 and n - Here, for example, n-type semiconductor regions 60 can be formed. - Impurity concentration and n of type deep well 80 - When the impurity concentration of the n-type semiconductor region 60 is the same, - Type Deep Well 80 and N - The n-type semiconductor region 60 can be formed in the same process. - Impurity concentration and n of type deep well 80 - When the impurity concentration of the n-type semiconductor region 60 is different from that of the n-type semiconductor region 60, - Type Deep Well 80 and N - The insulating layer 62 and the insulating layer 60 are formed in a separate process.

[0068] Next, as shown in FIG. 13, in the transistor forming region RA, the p-channel field effect transistor forming region is - n-type semiconductor substrate 50 - Form a mold well 71. - The well 71 can also be formed by using photolithography and ion implantation. Then, as shown in FIG. 14, the n-type well 71 is formed by using photolithography and ion implantation. - Deep well type 80 - A type well 81 is formed, and an n - The piezoresistive region 11, which is a p-type semiconductor region, is formed in the p-type semiconductor region 60.

[0069] Specifically, p -After applying a resist film onto the semiconductor substrate 50, the resist film is patterned by using a photolithography technique. Then, using the patterned resist film as a mask, p-type impurities (acceptors) such as boron (B) are implanted into the p-type semiconductor substrate 50 by ion implantation. - The p-type semiconductor substrate 50 is implanted with ions. - As a result, in the pressure sensor forming region RB, p - a type semiconductor substrate 50 and an n - A pressure sensor 200A having a semiconductor region 60 and a piezoresistive region 11 is thus formed.

[0070] where p - When the impurity concentration of the well 81 and the impurity concentration of the piezoresistive region 11 are set to be equal, p - The p-type well 81 and the piezoresistance region 11 can be formed in the same process. - When the impurity concentration of the mold well 81 is made different from the impurity concentration of the piezoresistive region 11, p - The mold well 81 and the piezoresistive region 11 are formed in separate steps.

[0071] Next, p - For example, a silicon oxide film is formed on the semiconductor substrate 50, and then a polysilicon film is formed on the silicon oxide film. Then, the polysilicon film and the silicon oxide film are patterned using photolithography and etching techniques. As a result, as shown in FIG. - A gate insulating film (silicon oxide film) 74 can be formed on the well 71, and a gate electrode (polysilicon film) 75 can be formed on the gate insulating film 74. - A gate insulating film (silicon oxide film) 84 can be formed on the mold well 81, and a gate electrode (polysilicon film) 85 can be formed on the gate insulating film 84.

[0072] Subsequently, as shown in FIG. 16, photolithography and ion implantation are used to form n - In the mold well 71+ a source region 72 and a drain region 73 made of n-type semiconductor regions; + The contact region 76 is formed from a p-type semiconductor region. - n in type well 81 + a source region 82 and a drain region 83 made of a p-type semiconductor region; + A contact region 86 made of a type semiconductor region is formed. Furthermore, by using a photolithography technique and an ion implantation method, an n - Deep well type 80 + A contact region 87 made of a p-type semiconductor region is formed. - In the p-type semiconductor substrate 50 + A contact region 88 made of a p-type semiconductor region is formed in this way. In this way, an n-channel field effect transistor Qn and a p-channel field effect transistor Qp can be formed in the transistor formation region RA.

[0073] 10, an interlayer insulating film 90 having, for example, a silicon oxide film is formed across the transistor formation region RA and the pressure sensor formation region RB, and then a plurality of plugs 91 are formed penetrating the interlayer insulating film 90. Then, a plurality of wirings 92 are formed on the interlayer insulating film 90 with the plurality of plugs 91 formed therein. There is also a step of forming a plurality of wirings in an upper layer, but since this is a similar step, its description will be omitted here. In this manner, the semiconductor device 300A in the first embodiment can be manufactured.

[0074] <Features of semiconductor device> Next, the features of the semiconductor device 300A in the first embodiment will be described.

[0075] The first feature of the semiconductor device 300A is that, for example, as shown in FIG. 10, in order to reduce the leakage current in the pressure sensor 200A while suppressing the manufacturing cost of the pressure sensor 200A, a "triple well structure" in which a field effect transistor is formed is used in the configuration of the pressure sensor 200A. That is, the first feature of the semiconductor device 300A is that the "triple well structure" is used in the configuration of the pressure sensor 200A, assuming that the field effect transistor and the pressure sensor 200A are mounted together. That is, in the semiconductor device 300A of the first embodiment, as shown in FIG. 10, in the transistor formation region RA, - a type semiconductor substrate 50 and an n - Type Deep Well 80 and p - The "triple well structure" consisting of the pressure sensor forming region RB and the p - a type semiconductor substrate 50 and an n - Type Deep Well 80 corresponding to n - a p-type semiconductor region 60; - A pressure sensor 200A is formed, which is composed of a mold well 81 and a corresponding piezoresistance region 11.

[0076] As a result, according to the first embodiment, the pressure sensor 200A shown in FIG. 5 can be manufactured using the manufacturing process of a field-effect transistor (see FIGS. 11 to 16). That is, according to the first embodiment, the pressure sensor 200A can be mounted on a semiconductor device using the same manufacturing process as a field-effect transistor, thereby reducing the manufacturing cost of the pressure sensor 200A. Furthermore, considering that the pressure sensor 200A shown in FIG. 5 can reduce leakage current, it can be seen that the semiconductor device 300A can be used to manufacture the pressure sensor 200A having excellent performance with reduced leakage current while suppressing manufacturing costs.

[0077] Next, the second feature of the semiconductor device 300A is that, for example, as shown in FIG. 10, the piezoresistance region 11 is formed in the transistor forming region RA in a "triple well structure" p -The difference is that the piezoresistance region 11 is formed in correspondence with the p-type well 81. - The fact that the piezoresistance region 11 is formed in correspondence with the type well 81 means that the impurity concentration of the piezoresistance region 11 is p - This means that the impurity concentration is equal to that of the mold well 81 .

[0078] Therefore, p - Considering that the impurity concentration of the mold well 81 is low, it can be considered that the impurity concentration of the piezoresistive region 11 is low in the present embodiment 1. In this case, the size of the pressure sensor 200A can be reduced.

[0079] The reason for this will be explained below.

[0080] The pressure sensor 200A is configured to detect external pressure by changes in the electrical resistance value of the piezoresistive region 11. In this case, the higher the magnitude of the electrical resistance value of the piezoresistive region 11 itself, the greater the change in the electrical resistance value, and the higher the pressure detection sensitivity. Therefore, from the perspective of improving the detection sensitivity of the pressure sensor 200A, it is desirable that the electrical resistance value of the piezoresistive region 11 be high.

[0081] In this regard, if the impurity concentration of the piezoresistive region 11 is the same as that of the source region 72 and the drain region 73, for example, the resistance per unit length will be low, and therefore, in order to increase the resistance, the length of the piezoresistive region 11 must be increased, and for example, the planar shape of the piezoresistive region 11 must be made meandering (serpentine), which means that the size of the pressure sensor itself will increase.

[0082] In contrast, in the first embodiment, the impurity concentration of the piezoresistive region 11 is p -The impurity concentration of the piezoresistive region 11 is as low as that of the mold well 81. Therefore, the resistance value per unit length is higher than when the impurity concentration of the piezoresistive region 11 is the same as that of the source region 72 or the drain region 73. This means that it is no longer necessary to increase the length of the piezoresistive region 11 in order to increase the resistance value, and for example, it means that it is no longer necessary to make the planar shape of the piezoresistive region 11 meandering.

[0083] Therefore, according to the present embodiment 1, it is possible to reduce the size of the pressure sensor 200A itself while maintaining the detection sensitivity. From the above, it can be said that the technical idea of ​​the present embodiment 1 has great technical significance in that it is possible to provide a small pressure sensor 200A having excellent performance with reduced leakage current while suppressing manufacturing costs by combining the first and second features described above.

[0084] Furthermore, according to the pressure sensor 200A of the first embodiment, since it is easy to incorporate a field effect transistor, for example, the field effect transistor incorporated with the pressure sensor 200A can be used as a component of a control circuit for the pressure sensor 200A. As a result, according to the first embodiment, it is possible to achieve high integration of a pressure sensor system including the pressure sensor 200A and a control circuit, and from this perspective as well, the semiconductor device 300A is useful.

[0085] The semiconductor device 300A in this embodiment may be configured so as to be attachable to an object to be measured, and the pressure sensor forming region RB may be configured so as to be attached to an object to be measured. - A groove (diaphragm portion) may be formed on the rear surface of the mold semiconductor substrate 50.

[0086] <Modification> FIG. 17 is a diagram showing a semiconductor device 300A according to a modified example.

[0087] 17, in the modified example, in a pressure sensor 200A formed in the pressure sensor forming region RB, a contact region 95 and a contact region 96 are formed which are included in the piezoresistive region 11. The contact region 95 and the contact region 96 are p + 1. This configuration makes it possible to reduce the contact resistance between the plug 91 and the contact region 95 while maintaining high resistance in the piezoresistive region 11, and also to reduce the contact resistance between the plug 91 and the contact region 96. That is, according to this modification, by providing the contact region 95 and the contact region 96 in the piezoresistive region 11, it is possible to ensure ohmic contact between the plug 91 and the contact region 95, and also to ensure ohmic contact between the plug 91 and the contact region 96.

[0088] (Embodiment 2) <Pressure sensor configuration> FIG. 18 is a diagram showing the configuration of a pressure sensor 200B according to the second embodiment.

[0089] In FIG. 18, the pressure sensor 200B is - a p-type semiconductor substrate 50; - The n-type semiconductor substrate 50 - The n-type semiconductor region 60A is formed. - The inside of the p-type semiconductor region 60A is - The p-type semiconductor region 60B is formed. - The n-type semiconductor region 60B + The piezoresistance region 11A is formed of an n-type semiconductor region. - The p-type semiconductor region 60A is - The p-type semiconductor region 60B is formed. - n-type semiconductor region 60B + A piezoresistive region 11A made of a type semiconductor region is formed on the substrate 1. The piezoresistive region 11A is electrically connected to a pair of electrodes 20A and 20B.

[0090] At this time, the piezoresistive region 11A functions as a resistor R1. - A pn junction is formed in the boundary region between the piezo-semiconductor region 60B and the piezoresistive region 11A. - The pn junction diode D1 is formed by the p-type semiconductor region 60B and the piezoresistance region 11A. - type semiconductor region 60B and n - A pn junction is also formed in the boundary region with the type semiconductor region 60A. - type semiconductor region 60B and n - The pn junction diode D2 is formed by the n-type semiconductor region 60A. - type semiconductor region 60A and p - A pn junction is also formed in the boundary region with the n-type semiconductor substrate 50. - type semiconductor region 60A and p - A pn junction diode D3 is formed between the semiconductor substrate 50 and the pn junction diode D3. As a result, the equivalent circuit diagram of the pressure sensor 200A becomes as shown in FIG.

[0091] where p - The piezo-resistance region 11A and the n-type semiconductor region 60B are - The p-type semiconductor region 60A has a function of electrically isolating the p-type semiconductor region 60B. - In order to realize electrical element isolation by the p-type semiconductor region 60B, a reverse bias is applied to the pn junction diode D1 and the pn junction diode D2. - A reverse bias is applied between the p - type semiconductor region 60B and n - A reverse bias is applied between the gate electrode 60 and the gate semiconductor region 60A.

[0092] Similarly, n - The p-type semiconductor region 60A - type semiconductor region 60B and p - It has a function of electrically isolating the n-type semiconductor substrate 50. - In order to realize electrical element isolation by the type semiconductor region 60A, a reverse bias is applied to the pn junction diode D2 and the pn junction diode D3.- type semiconductor region 60B and n - A reverse bias is applied between the n-type semiconductor region 60A and the n-type semiconductor region 60B. - type semiconductor region 60A and p - A reverse bias is applied between the gate electrode and the semiconductor substrate 50 .

[0093] <Features of the Second Embodiment> Next, the features of the second embodiment will be described.

[0094] The feature of the second embodiment is, for example, as shown in FIG. - Between the n-type semiconductor substrate 50 and the piezoresistance region 11A - type semiconductor region 60A and p - The p-type semiconductor region 60B is interposed between the piezoresistance region 11A and the p - Between the p-type semiconductor region 60B, - type semiconductor region 60B and n - between the n-type semiconductor region 60A and the n-type semiconductor region 60B. - type semiconductor region 60A and p - The point is that a reverse bias is applied between the gate electrode and the semiconductor substrate 50.

[0095] This allows p - type semiconductor region 60B and n - The p-type semiconductor region 60A is connected to the piezoresistance region 11A. - The piezoresistance region 11A functions as an element isolation region that electrically isolates the piezoresistance region 11A from the p-type semiconductor substrate 50. - In other words, in the second embodiment, a "pnpn structure" is realized, and as a result, the piezoresistive region 11A and the p - This reduces the leakage current that flows between the pressure sensor 200B and the semiconductor substrate 50. Therefore, the pressure sensor 200B according to the second embodiment can operate at high temperatures.

[0096] <<Simulation results>> Next, a description will be given of the results of a simulation verifying that the pressure sensor 200B according to the second embodiment can reduce the leakage current.

[0097] FIG. 20 is a diagram showing the results of evaluating the temperature characteristics of the pressure sensor 200B. In particular, FIG. 20(a) shows the simulation results showing the occurrence of leakage current density due to electron current, and shows the simulation results at 700°C. Here, the gray area indicates p - 10 shows the leakage current density reaching the semiconductor substrate 50.

[0098] Looking at Figure 20(a), p - It can be seen that no leakage current flows to the semiconductor substrate 50. Therefore, it can be seen that the pressure sensor 200B can suppress the occurrence of leakage current due to electron current up to at least 700°C.

[0099] Next, FIG. 20(b) shows the simulation results showing the occurrence of leakage current due to hole current, and shows the simulation results at 700°C. Here, the gray area indicates p - 10 shows the leakage current density reaching the semiconductor substrate 50.

[0100] Looking at Figure 20(b), p - Although a small amount of leakage current flows to the semiconductor substrate 50, it is at a level that poses almost no problem. Therefore, it is understood that the pressure sensor 200B can suppress the occurrence of leakage current due to hole current up to at least 700°C.

[0101] From the above, it can be seen that, when the simulation results of the electron current and the hole current are combined, the leakage current can be reduced to at least about 700°C. In other words, it is confirmed that the structure of pressure sensor 200B in the second embodiment allows high-temperature operation at about 700°C. Therefore, while the maximum operable temperature of pressure sensor 100A in the first related art is about 125°C, the operable temperature of pressure sensor 200B in the second embodiment is about 700°C, and therefore the structure of pressure sensor 200B is found to be a very useful structure.

[0102] <Configuration of semiconductor device> FIG. 21 is a diagram showing a schematic configuration of the semiconductor device 300B.

[0103] 21, the semiconductor device 300B has a transistor formation region RA and a pressure sensor formation region RB. In the transistor formation region RA, a structure similar to that in the first embodiment, such as a "triple well structure," is formed. Specifically, n - A p-channel field effect transistor Qp is formed on the well 71, while an n-channel field effect transistor Qn is formed on the "triple well structure".

[0104] On the other hand, a pressure sensor 200B is formed in the pressure sensor forming region RB. - a type semiconductor substrate 50 and an n - Type Deep Well 80 corresponding to n - type semiconductor region 60A, and - p corresponding to type well 81 - The n-type semiconductor region 60B and the n-type semiconductor region 60B corresponding to the source region 82 and the drain region 83 + The pressure sensor 200B has a piezoresistance region 11A made of a type semiconductor region. That is, the pressure sensor 200B is formed corresponding to the "triple well structure" formed in the transistor formation region RA.

[0105] At this time, for example, the impurity concentration of the piezoresistive region 11A is equal to the impurity concentration of each of the source region 82 and the drain region 83. - The impurity concentration of the p-type semiconductor region 60B is - The impurity concentration is equal to that of the n well 81. - The impurity concentration of the n-type semiconductor region 60A is, for example, - The impurity concentration is equal to that of the mold deep well 80 .

[0106] In the transistor formation region RA and the pressure sensor formation region RB configured in this manner, an interlayer insulating film 90 made of, for example, a silicon oxide film is formed, and a plurality of plugs 91 are formed in this interlayer insulating film 90. Then, a plurality of wirings 92 electrically connected to the plurality of plugs 91 are formed on the interlayer insulating film 90.

[0107] <Method of manufacturing a semiconductor device> The manufacturing method of the semiconductor device 300B in the second embodiment is almost the same as the manufacturing method of the semiconductor device 300A in the first embodiment in the steps shown in Figures 11 to 16. The difference is that in the second embodiment, in the step shown in Figure 16, - A source region 82 and a drain region 83 are formed in the well 81, and p - In the n-type semiconductor region 60B + One of the advantages is that the piezoresistive region 11A is formed from a semiconductor region.

[0108] Here, when the impurity concentrations of the source region 82 and the drain region 83 are made equal to the impurity concentration of the piezoresistive region 11A, the source region 82 and the drain region 83 and the piezoresistive region 11A can be formed in the same process. On the other hand, when the impurity concentrations of the source region 82 and the drain region 83 are made different from the impurity concentration of the piezoresistive region 11A, the source region 82 and the drain region 83 and the piezoresistive region 11A are formed in separate processes.

[0109] <Features of semiconductor device> Next, the features of the semiconductor device 300B according to the second embodiment will be described.

[0110] A feature of the semiconductor device 300B is that, for example, as shown in FIG. 21, a "triple well structure" in which a field effect transistor is formed is used in the configuration of the pressure sensor 200B in order to reduce the leakage current in the pressure sensor 200B while suppressing the manufacturing cost of the pressure sensor 200B. That is, a feature of the semiconductor device 300B is that a "triple well structure" is used in the configuration of the pressure sensor 200B, assuming that the field effect transistor and the pressure sensor 200B are mounted together. That is, in the semiconductor device 300B of the second embodiment, as shown in FIG. 21, in the transistor formation region RA, p - a type semiconductor substrate 50 and an n - Type Deep Well 80 and p - The pressure sensor forming region RB has a triple well structure including a p - a type semiconductor substrate 50 and an n - Type Deep Well 80 corresponding to n - type semiconductor region 60A, and - A pressure sensor 200B is formed, which is composed of a p-type semiconductor region 60B corresponding to the type well 81 and a piezoresistive region 11A corresponding to the source region 82 and the drain region 83.

[0111] As a result, according to the second embodiment, the pressure sensor 200B can be manufactured using the manufacturing process of a field effect transistor (see FIGS. 11 to 15 and 21). That is, according to the second embodiment, the pressure sensor 200B can be mounted on a semiconductor device using the same manufacturing process as a field effect transistor, thereby reducing the manufacturing cost of the pressure sensor 200B. Furthermore, considering that the pressure sensor 200B can reduce leakage current up to about 700°C, it can be seen that the semiconductor device 300B can be used to manufacture the pressure sensor 200B, which has excellent performance and reduces leakage current, while suppressing manufacturing costs.

[0112] The invention made by the inventor has been specifically described above based on the embodiments thereof, but it goes without saying that the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the spirit of the invention.

[0113] In the above embodiment, an example has been described in which the "first conductivity type" is p-type and the "second conductivity type" is n-type, but the technical idea of ​​the above embodiment is not limited to this and can also be applied to, for example, an example in which the "first conductivity type" is n-type and the "second conductivity type" is p-type. [Explanation of symbols]

[0114] 1S SOI substrate 10n - semiconductor substrate 10A support board 11 Piezoresistive region 11A Piezoresistive Area 20A electrode 20B electrode 30 insulating layer 40 Silicon Layer 50 p - semiconductor substrate 60n - Type semiconductor region 60A n - Type semiconductor region 60B p - Type semiconductor region 70 STI area 71n - Mold well 72 Source Region 73 Drain region 74 Gate insulating film 75 gate electrode 76 Contact Area 80n - Deep well type 81 pages - Mold well 82 Source Region 83 Drain region 84 Gate insulating film 85 gate electrode 86 Contact Area 87 Contact Area 88 Contact Area 90 Interlayer insulating film 91 Plug 92 Wiring 95 Contact Area 96 Contact Area 100A Pressure Sensor 100B Pressure Sensor 200A Pressure Sensor 200B Pressure Sensor 300A Semiconductor Device 300B Semiconductor device D1 pn junction diode D2 pn junction diode D3 pn junction diode Ec1 conduction band Ec2 conduction band Ec3 conduction band Ev1 valence band Ev2 valence band Ev3 valence band Qn n-channel field effect transistor Qp p-channel field-effect transistor R1 Resistor

Claims

1. A semiconductor device including a pressure sensor formation region and a transistor formation region, The transistor formation region includes: a semiconductor substrate of a first conductivity type; a first well of a second conductivity type formed in the semiconductor substrate; a second well of the first conductivity type formed in the first well; a transistor formed on the second well; is formed, The transistor is a source region and a drain region formed in the second well; a channel forming region sandwiched between the source region and the drain region; a gate insulating film formed on the channel formation region; a gate electrode formed on the gate insulating film; and The pressure sensor formed in the pressure sensor forming region is the semiconductor substrate; a semiconductor region of the second conductivity type corresponding to the first well; a piezoresistive region corresponding to the second well; The semiconductor device has:

2. 2. The semiconductor device according to claim 1, The semiconductor device, wherein the impurity concentration of the piezoresistance region is lower than the impurity concentrations of the source region and the drain region.

3. 3. The semiconductor device according to claim 1, an impurity concentration of the semiconductor region is equal to an impurity concentration of the first well; The semiconductor device, wherein the impurity concentration of the piezoresistance region is equal to the impurity concentration of the second well.

4. The semiconductor device according to any one of claims 1 to 3, the first conductivity type is p-type, The second conductivity type is n-type.

5. The semiconductor device according to any one of claims 1 to 4, The semiconductor device, wherein the transistor is a component of a circuit that controls the pressure sensor.

6. The semiconductor device according to any one of claims 1 to 5, The semiconductor device is configured so as to be attachable to an object to be measured.

7. The semiconductor device according to any one of claims 1 to 5, A semiconductor device, wherein a groove is formed on the back surface of the semiconductor substrate in the pressure sensor formation region.

8. A semiconductor device including a pressure sensor formation region and a transistor formation region, The transistor formation region includes: a semiconductor substrate of a first conductivity type; a first well of a second conductivity type formed in the semiconductor substrate; a second well of the first conductivity type formed in the first well; a transistor formed on the second well; is formed, The transistor is a source region and a drain region formed in the second well; a channel forming region sandwiched between the source region and the drain region; a gate insulating film formed on the channel formation region; a gate electrode formed on the gate insulating film; and The pressure sensor formed in the pressure sensor forming region is the semiconductor substrate; a first semiconductor region of the second conductivity type corresponding to the first well; a second semiconductor region of the first conductivity type corresponding to the second well; piezo-resistive regions corresponding to the source and drain regions; The semiconductor device has:

9. 9. The semiconductor device according to claim 8, an impurity concentration of the first semiconductor region is equal to an impurity concentration of the first well; an impurity concentration of the second semiconductor region is equal to an impurity concentration of the second well; The semiconductor device, wherein the impurity concentration of the piezoresistance region is equal to the impurity concentrations of the source region and the drain region.

10. 10. The semiconductor device according to claim 8, the first conductivity type is p-type, The second conductivity type is n-type.

11. A method for manufacturing a semiconductor device including a pressure sensor formation region and a transistor formation region, (a) providing a semiconductor substrate of a first conductivity type; (b) forming a first well of a second conductivity type in the transistor formation region and forming a semiconductor region of the second conductivity type in the pressure sensor formation region; (c) forming a second well of the first conductivity type within the first well and forming a piezoresistive region of the first conductivity type within the semiconductor region; (d) forming a gate insulating film on the semiconductor substrate; (e) forming a gate electrode on the gate insulating film; (f) forming source and drain regions in the second well; A method for manufacturing a semiconductor device, comprising:

12. 12. The method for manufacturing a semiconductor device according to claim 11, the first well and the semiconductor region are formed in the same process; The method for manufacturing a semiconductor device, wherein the second well and the piezoresistive region are formed in the same process.

13. A method for manufacturing a semiconductor device including a pressure sensor formation region and a transistor formation region, (a) providing a semiconductor substrate of a first conductivity type; (b) forming a first well of a second conductivity type in the transistor formation region and forming a first semiconductor region of the second conductivity type in the pressure sensor formation region; (c) forming a second well of the first conductivity type in the first well and forming a second semiconductor region of the first conductivity type in the first semiconductor region; (d) forming a gate insulating film on the semiconductor substrate; (e) forming a gate electrode on the gate insulating film; (f) forming a source region and a drain region in the second well and a piezoresistive region of the second conductivity type in the second semiconductor region; A method for manufacturing a semiconductor device, comprising:

14. 14. The method for manufacturing a semiconductor device according to claim 13, the first well and the first semiconductor region are formed in the same process; the second well and the second semiconductor region are formed in the same process; The method for manufacturing a semiconductor device, wherein the source region, the drain region and the piezoresistive region are formed in the same process.

15. a semiconductor substrate of a first conductivity type; a first semiconductor region of a second conductivity type formed in the semiconductor substrate; a second semiconductor region of the first conductivity type contained in the first semiconductor region; a piezoresistance region of the second conductivity type contained in the second semiconductor region; A pressure sensor comprising:

16. 16. The pressure sensor according to claim 15, The pressure sensor has a pair of electrodes electrically connected to the piezoresistive region.

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