Plasma generating coil structure and semiconductor processing device

Abstract

The present invention provides a coil structure for plasma generation and a semiconductor processing apparatus. Each coil unit of the coil structure includes M coil groups, where M is an integer of 4 or more. The M coil groups have the same structure and are connected in parallel to each other. The planar coils of each layer of the M coil groups correspond to each other one-to-one and are provided on the same layer. The M planar coils located on the same layer are evenly distributed at intervals in the circumferential direction of the planar coil. The coil groups include N layers of planar coils parallel to each other, where N is an even number of 4 or more. The N layers of planar coils are provided at intervals along a direction perpendicular to the plane in which the planar coils are located, and are connected in series end-to-end in sequence. The orthographic projections of the planar coils of each adjacent two layers on the plane in which the planar coils are located are mirror-symmetric.

Description

[Technical Field]

[0001] The present invention relates to the technical field of semiconductor processing, and more particularly to a coil structure for generating plasma in a semiconductor processing device and the semiconductor processing device. [Background technology]

[0002] Inductively coupled plasma (ICP) sources are commonly used in semiconductor dry etching and thin film deposition. ICP sources generate plasma by exciting gas with a high-frequency electromagnetic field generated by passing a high-frequency current through a coil. They can operate at low chamber pressures, have high plasma density, and minimize damage to the workpiece. As critical dimensions shrink, the challenges faced during processing become increasingly severe, with one of the most important requirements being the consistency of the plasma source. For ICP sources, coil distribution plays a key role in the etching morphology and its uniformity. It is therefore necessary to continuously optimize the uniformity and symmetry of the radial and angular distribution of the coil current, thereby further enhancing the process capabilities of plasma processing equipment for highly integrated device manufacturing.

[0003] FIG. 1 is a schematic diagram of a conventional coil structure. FIG. 2A is a projection view of the coil structure in FIG. 1 in a radial cross section. As shown in FIGS. 1 and 2A, the coil structure includes an inner coil group 11 and an outer coil group 12, each of which consists of two planar coils. The two planar coils are distributed with 180° rotational symmetry about their axial directions. The orthogonal projection shape of each planar coil in the radial cross section is an involute shape, and the number of coil turns is 1.5. The outer ends of the two planar coils located on the outer ring of each of the inner coil group 11 and the outer coil group 12 are connected in parallel and electrically connected to the output terminal of a matching device 13, and the inner ends located on the inner ring are connected in parallel and electrically connected to the input terminal of the matching device 13.

[0004] As shown in FIG. 2A, for example, a planar coil has an involute shape and the involute has 1.5 turns. The geometric distribution of the left and right parts of the involute located on either side of the dashed line in FIG. 2A is uneven, which causes an asymmetric distribution of the electromagnetic field on the left and right sides and further causes the current on the left and right sides of the coil to be different. This causes an asymmetric distribution of radical and ion density in the plasma during processing, i.e., an uneven plasma distribution, which results in uneven etching of the wafer and adversely affects the etching quality or efficiency. Summary of the Invention [Problem to be solved by the invention]

[0005] In order to solve at least one of the technical problems existing in the prior art, the present invention proposes a plasma generating coil structure for a semiconductor processing device and a semiconductor processing device that compensates for differences in radial current distribution of the coil and improves the radial and angular distribution uniformity of the binding energy generated below the coil, thereby not only improving the radial distribution uniformity of the radical and ion density in the plasma but also improving the overall voltage resistance capacity of the coil, thereby enabling the supply of large power. [Means for solving the problem]

[0006] To achieve the above object, the present invention provides a coil structure for generating plasma in a semiconductor process device, comprising: at least one coil unit; each of the coil units comprises M coil groups, where M is an integer of 4 or greater; the M coil groups have the same structure and are connected in parallel; each of the coil groups comprises N layers of planar coils parallel to each other, where N is an even number of 4 or greater; the planar coils in each layer of the M coil groups are arranged in one-to-one correspondence on the same layer; the M planar coils located on the same layer are evenly distributed at intervals in the circumferential direction of the planar coil; the planar coils in the N layers of each of the coil groups are arranged at intervals along a direction perpendicular to a plane on which the planar coils are located and are connected in series end to end; and orthogonal projections of the planar coils of each of two adjacent layers on the plane on which the planar coils are located are mirror images of each other.

[0007] Optionally, M is an even number equal to or greater than 4, the input ends of the M coil groups are provided on the same layer and are divided into M / 2 input end groups in the circumferential direction of the planar coil, each of the input end groups including input ends of two adjacent coil groups, a first extension segment is connected between the input ends of the two adjacent coil groups for electrically connecting them, and the first extension segments of the M / 2 input end groups are electrically connected to each other, the output ends of the M coil groups are provided on the same layer and are divided into M / 2 output end groups in the circumferential direction of the planar coil, each of the output end groups including output ends of two adjacent coil groups, a second extension segment is connected between the output ends of the two adjacent coil groups for electrically connecting them, and the second extension segments of the M / 2 output end groups are electrically connected to each other.

[0008] Optionally, the extension direction of the first extension segment coincides with the extension direction of the planar coil connected to the first extension segment of one of the coil groups, and the extension direction of the second extension segment coincides with the extension direction of the planar coil connected to the second extension segment of one of the coil groups.

[0009] Optionally, a first wiring terminal is provided at an intermediate position of the first extension segment for electrically connecting to an output end of an RF power source, and a second wiring terminal is provided at an intermediate position of the second extension segment for electrically connecting to an input end of the RF power source.

[0010] Optionally, the M / 2 first wiring terminals are divided into M / 4 first terminal groups in a circumferential direction of the planar coil, each of the first terminal groups including two adjacent first wiring terminals, a first connection bar is connected between the two adjacent first wiring terminals for electrically connecting the two adjacent first wiring terminals, and an input wiring terminal is provided at an intermediate position of the first connection bar for electrically connecting to an output end of an RF power supply; the M / 2 second wiring terminals are divided into M / 4 second terminal groups in a circumferential direction of the planar coil, each of the second terminal groups including two adjacent second wiring terminals, a second connection bar is connected between the two adjacent second wiring terminals for electrically connecting the two adjacent second wiring terminals, and an output wiring terminal is provided at an intermediate position of the second connection bar for electrically connecting to an input end of an RF power supply.

[0011] Optionally, the M / 4 first connection bars are evenly distributed in the circumferential direction of the planar coil, the M / 4 second connection bars are evenly distributed in the circumferential direction of the planar coil, the diameter of a circumference on which the M / 4 first connection bars are located is the same as the diameter of a circumference on which the M / 4 second connection bars are located, and the M / 4 first connection bars and the M / 4 second connection bars are offset from each other in the circumferential direction of the planar coil.

[0012] Optionally, N is equal to 4 and the number of turns of the planar coil in each layer is 0.25 turns.

[0013] Optionally, there are a plurality of the coil units, and the coil groups of the plurality of the coil units have different dimensions and are nested with each other.

[0014] Optionally, there are two coil units, a first coil unit and a second coil unit, the outer diameter of the second coil unit is smaller than the inner diameter of the first coil unit, and the number of layers of the planar coils in the coil group of the first coil unit and the number of layers of the planar coils in the coil group of the second coil unit are set based on the amount of power to be supplied.

[0015] As another technical solution, the present invention further provides a coil structure including a first coil structure and a second coil structure nested in each other, wherein the first coil structure employs the coil structure for plasma generation of the semiconductor processing device according to the present invention, and the second coil structure includes two layers of planar coils connected in series end-to-end in parallel with each other, and the orthogonal projections of the two layers of planar coils on a plane on which the planar coils are located are mirror-symmetric.

[0016] Optionally, the spacing between each two adjacent layers of said planar coils is 10 mm or less.

[0017] Optionally, the number of coil groups is between 4 and 64, inclusive.

[0018] Optionally, the height of the planar coil in a direction perpendicular to the plane in which the planar coil is located is between 2 mm and 15 mm.

[0019] As another technical solution, the present invention further provides a semiconductor processing apparatus including an RF source, a reaction chamber, and a coil structure for plasma generation of the semiconductor processing apparatus according to the present invention, wherein a dielectric window is provided at the top of the reaction chamber, the coil structure is provided above the dielectric window, and the RF source is used to supply RF power to the coil structure. [Effects of the Invention]

[0020] The plasma generation coil structure of the semiconductor processing apparatus according to the present invention includes M coil groups, where M is an integer greater than or equal to 4, the M coil groups having the same shape and connected in parallel, each coil group including N layers of parallel planar coils, where N is an even number greater than or equal to 4, the planar coils of each layer of the M coil groups being arranged in one-to-one correspondence on the same layer, and the M planar coils located on the same layer being evenly distributed with intervals around the circumferential direction of the planar coil, so that the M coil groups have angular symmetry around the circumferential direction of the planar coil, i.e., are symmetrical around the circumferential direction of the planar coil, thereby preventing differences in circumferential current distribution and improving the uniformity of the angular distribution of plasma density, thereby improving the uniformity of the process.

[0021] The N layers of planar coils in each coil group are spaced apart along a direction perpendicular to the plane on which the planar coils are located, and are connected in series end-to-end in order, and the orthogonal projections of the planar coils of each of two adjacent layers on the plane on which the planar coils are located are mirror-symmetric. By making the planar coils of two adjacent layers mirror-symmetric, the magnetic and electric fields generated by the planar coils of one layer and the planar coils of the other adjacent layer can compensate for each other, thereby compensating for differences in radial current distribution of the coils and improving the radial distribution uniformity of the binding energy generated below the coils, thereby improving the radial distribution uniformity of the radical and ion density in the plasma and improving the process uniformity.

[0022] In addition, the even number of planar coils in four or more layers of each coil group are spaced apart along a direction perpendicular to the plane on which the planar coils are located, thereby increasing the distance between the input and output ends of the coil group (i.e., the distance between the planar coil in the top layer and the planar coil in the bottom layer). Furthermore, since the total voltage applied by the RF power source to the input and output ends of the coil group is constant, the voltage received by the planar coil in each layer is only 1 / N of the total voltage. This improves the overall voltage resistance of the coil group and enables high power supply while meeting the requirements for process uniformity.

[0023] The present invention further provides a coil structure, and by combining the above coil structure of the present invention with two parallel layers of planar coils, it can be applied when the power supply magnitudes of the inner and outer rings are different, i.e., the above coil structure of the present invention is applicable to high power supply (greater than 5 kW), while the two parallel layers of planar coils connected in series to each other can be applied to low power supply (less than 2 kW), thereby meeting various different process requirements.

[0024] By adopting the coil structure of the present invention, the semiconductor processing apparatus of the present invention can compensate for the difference in radial current distribution of the coil and improve the radial distribution uniformity of the binding energy generated below the coil, thereby not only improving the radial and angular distribution uniformity of the radical and ion density in the plasma, but also improving the overall voltage resistance of the coil, thereby enabling the supply of large power. [Brief explanation of the drawings]

[0025] [Figure 1] FIG. 1 is a schematic diagram of a conventional coil structure. [Figure 2A] FIG. 1 is a schematic diagram of an electromagnetic field distribution in the prior art. [Figure 2B] FIG. 2 is a projection of the coil structure in FIG. 1 in a radial cross section. [Figure 3A] FIG. 2 is a structural schematic diagram of a double-layer coil. [Figure 3B] FIG. 10 is a structural schematic diagram of another double-layer coil. [Figure 4A] 1 is a schematic diagram of a coil structure according to an embodiment of the present invention; [Figure 4B] FIG. 2 is a perspective view of one coil group of the coil structure according to the embodiment of the present invention. [Figure 5] FIG. 2 is another perspective view of one coil group of the coil structure according to the embodiment of the present invention. [Figure 6] FIG. 2 is a top view of one coil group of the coil structure according to the embodiment of the present invention. [Figure 7] FIG. 7 is a side view taken in the direction A1 in FIG. 6. [Figure 8] FIG. 7 is a side view taken in the direction A2 in FIG. 6. [Figure 9A] FIG. 10 is a perspective view of two coil groups with different numbers of turns. [Figure 9B] FIG. 2 is a perspective view of four coil groups of a coil structure according to an embodiment of the present invention. [Figure 10] FIG. 2 is a top view of four coil groups of a coil structure according to an embodiment of the present invention. [Figure 11] FIG. 11 is a side view of the direction A1 in FIG. [Figure 12] FIG. 11 is a side view taken in the direction A2 in FIG. [Figure 13] FIG. 2 is a perspective view of 16 coil groups of a coil structure according to an embodiment of the present invention. [Figure 14] FIG. 2 is a top view of 16 coil groups of a coil structure according to an embodiment of the present invention. [Figure 15] FIG. 14 is a perspective view of two coil groups out of the 16 coil groups in FIG. 13. [Figure 16] FIG. 14 is a top view of two of the 16 coil groups in FIG. 13. [Figure 17] 1 is a top view of 16 coil groups, a first connecting bar, and a second connecting bar of a coil structure according to an embodiment of the present invention. FIG. [Figure 18] FIG. 10 is another top view of the 16 coil groups, first connecting bars, and second connecting bars of the coil structure according to the embodiment of the present invention. [Figure 19] 2A and 2B are structural schematic diagrams of a first coil unit and a second coil unit of a coil structure according to an embodiment of the present invention. [Figure 20] 10A and 10B are structural schematic diagrams of another coil structure according to an embodiment of the present invention. [Figure 21] FIG. 10 is a schematic diagram of yet another coil structure according to an embodiment of the present invention. [Figure 22] 1 is a structural schematic diagram of a semiconductor processing device according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0026] In order to enable those skilled in the art to better understand the technical solution of the present invention, the plasma generating coil structure of a semiconductor processing device and the semiconductor processing device according to the present invention will be described in detail below with reference to the accompanying drawings.

[0027] This embodiment provides a coil structure for generating plasma in a semiconductor processing device, which can be used to perform an etching process on a wafer, and the coil structure serves as an upper electrode to excite a process gas in a reaction chamber to form plasma.

[0028] The coil structure includes M coil groups, where M is an integer greater than or equal to 4, and each coil group includes N layers of planar coils parallel to each other, where N is an even number greater than or equal to 4, the N layers of planar coils are spaced apart along a direction perpendicular to a plane on which the planar coils are located and connected in series end-to-end, and the orthogonal projections of the planar coils of each of two adjacent layers on the plane on which the planar coils are located are mirror images. The term "mirror image" refers to the fact that the orthogonal projections of the planar coils of one layer on the plane on which the planar coils are located (hereinafter referred to as "first projection A") and the orthogonal projections of the planar coils of the other layer on the plane on which the planar coils are located (hereinafter referred to as "second projection B") have the same shape but opposite spiral directions. Specifically, both the first projection A and the second projection B have both front and back surfaces parallel to the plane on which the planar coils are located, but the shape of one of the front surfaces of the first projection A and the second projection B is the same as the shape of the back surface of the other of the first projection A and the second projection B. Symmetrical means that all parameters of the shape of the front surface of one of the first projection A and the second projection B and the shape of the back surface of the other of the first projection A and the second projection B are completely the same.

[0029] By making the planar coils of two adjacent layers in each coil group mirror-symmetrical, the magnetic and electric fields generated by the planar coils of one layer and the planar coils of the other adjacent layer can compensate for each other, thereby compensating for differences in radial current distribution of the coils and improving the radial distribution uniformity of the binding energy generated below the coils, thereby improving the radial distribution uniformity of the radical and ion density in the plasma and improving process uniformity.

[0030] 3A , as a comparative example of the embodiment of the present invention, a coil structure 03 is electrically connected to an RF power source 1 via a matching box 2, and the RF power source 1 is used to apply RF power to the coil structure 03. The coil structure 03 includes a first coil unit 03a located in an outer ring and a second coil unit 03b located in an inner ring, which have the same structure but different dimensions and are nested together. Taking the structure of the first coil unit 03a as an example, the first coil unit 03a includes a first planar coil 031 and a second planar coil 032, which are spaced apart vertically and connected in series, and the first planar coil 031 and the second planar coil 032 are mirror-symmetrical when projected on a plane on which the planar coils are located. In this way, the difference in radial current distribution of the coil can be compensated for, and the radial distribution uniformity of the coupling energy generated below the coil can be improved. However, to avoid the effect of compensating for the difference in current distribution between the first planar coil 031 and the second planar coil 032 being ineffective, the vertical distance D1 between the first planar coil 031 and the second planar coil 032 should not be too large (for example, if it is 10 mm or less, the process uniformity is 1% or less). As a result, the coil structure 03 has a low voltage resistance (4 kV or less), and therefore the maximum allowable supply power of the coil structure 03 is 2 kW, which makes it unsuitable for processes that supply high power (greater than 5 kW).

[0031] 3B , in another coil structure 03′, the vertical distance between the first planar coil 031 and the second planar coil 032 is increased to D2, for example, 30 mm, compared with the coil structure 03. By increasing the vertical distance, the withstand voltage capability of the coil structure 03′ can be improved to 12 KV or more, making it suitable for processes supplying high power (greater than 5 KW). However, because the vertical distance is too large, the compensation effect for the difference in current distribution between the first planar coil 031 and the second planar coil 032 is ineffective, and the process uniformity deteriorates from 1% to 2.7%, failing to meet the process uniformity requirement (1.5% or less).

[0032] To solve the above problem, as shown in FIG. 4A, a coil structure 3 according to an embodiment of the present invention includes at least one coil unit, each of which includes M coil groups, where M is an integer greater than or equal to 4. When there are multiple coil units, the coil groups of the multiple coil units have different dimensions and are nested together. For example, FIG. 4A shows two coil units, a first coil unit 3a and a second coil unit 3b, which are nested together, with the outer diameter of the second coil unit 3b being smaller than the inner diameter of the first coil unit 3a. Of course, the present invention is not limited to this example. In actual applications, the number of coil units may be one or more, depending on specific needs.

[0033] The first coil unit 3a and the second coil unit 3b have the same structure and differ only in size. For example, the first coil unit 3a includes M coil groups, each of which includes N layers of parallel planar coils, where N is an even number greater than or equal to 4. For example, assuming N=4, the four layers of planar coils are, from top to bottom, first planar coil 31, second planar coil 32, third planar coil 33, and fourth planar coil 34. The N layers of planar coils are spaced apart along a direction perpendicular to the plane on which they are located (i.e., the vertical direction in FIG. 4A ) and connected end-to-end in series. The N layers of planar coils are connected in series, and the orthogonal projections of the planar coils of each of the two adjacent layers on the plane on which they are located are mirror images. Note that FIG. 4A merely shows a schematic representation of the planar coils, and does not represent the specific structure of the planar coils.

[0034] The coil group includes N layers of planar coils parallel to each other, where N is an even number equal to or greater than 4, i.e., the coil group has an even number of planar coils equal to or greater than 4 layers, thereby increasing the vertical spacing D5 between the input and output ends of the coil group, i.e., the spacing between first planar coil 31 in the top layer and fourth planar coil 34 in the bottom layer, compared to coil structure 03 shown in FIG. 3A above, and verticalDistance D5 is, for example, 30 mm or more. In this way, the withstand voltage capability between first planar coil 31 on the top layer and fourth planar coil 34 on the bottom layer can be improved to 12 KV or more, which is applicable to processes supplying large power (greater than 5 KW). In addition, second planar coil 32 is provided adjacent to first planar coil 31 in the top layer below it, and the orthogonal projections of second planar coil 32 and first planar coil 31 on the plane where the planar coils are located are mirror-symmetrical, i.e., they have the same shape but opposite spiral directions, so that the magnetic fields and electric fields generated by them can compensate for each other. That is, the magnetic field and electric field generated by second planar coil 32 and the magnetic field and electric field generated by first planar coil 31 are superimposed on each other to form total magnetic field and total electric field distributions that are mirror-symmetrical, so that the difference in radial current distribution of the planar coils in each layer can be compensated for. Similarly, third planar coil 33 is provided adjacent to fourth planar coil 34 in the bottom layer above it, and the orthogonal projections of third planar coil 33 and fourth planar coil 34 on the plane where the planar coils are located are mirror-symmetrical, so that the magnetic fields and electric fields generated by them can compensate for each other. In addition, the orthogonal projections of adjacent second planar coil 32 and third planar coil 33 on the plane where the planar coils are located are mirror-symmetric, allowing the magnetic and electric fields generated by the two coils to compensate for each other, thereby compensating for differences in the radial current distribution of the planar coils in each layer and improving the radial distribution uniformity of the binding energy generated below the coils, thereby improving the radial distribution uniformity of the radical and ion densities in the plasma and improving process uniformity.

[0035] Based on this, an even number of planar coils in four or more layers are spaced apart along a direction perpendicular to the plane on which the planar coils are located, so that the distance D5 between the input end and the output end of the coil group (i.e., the distance between the planar coil in the top layer and the planar coil in the bottom layer) can be increased compared to the coil structure 03 in FIG. 3A, and the verticalThe distance D5 is increased to, for example, 30 mm or more, and the distance between first planar coil 31 in the top layer and adjacent second planar coil 32 and the distance between fourth planar coil 34 and adjacent third planar coil 33 in the bottom layer are both D3, and the distance between adjacent second planar coil 32 and third planar coil 33 is D4, with the distances D3 and D4 each being, for example, 10 mm or less, ensuring that the mutual compensation effect of the current distribution differences between the planar coils in each of the two adjacent layers is not invalidated and thereby meeting the process uniformity requirements. Furthermore, because the total voltage applied by RF power source 1 to the input and output ends of the coil group via matching box 2 is constant, the voltage received by the planar coil in each layer is only 1 / N of the total voltage, thereby improving the overall voltage resistance of the coil group and achieving high power supply while meeting the process uniformity requirements.

[0036] In actual applications, the number of layers of planar coils can be set according to specific needs; that is, the greater the supplied power and the greater the distance between the input and output ends of the coil group (i.e., the distance between the top planar coil and the bottom planar coil), the greater the required value of N.

[0037] Furthermore, the spacing between the planar coils of each of the two adjacent layers should not be too large to ensure that the mutual compensation action of the difference in current distribution between the planar coils of each of the two adjacent layers is not invalid, but should also not be too small to avoid ignition caused by the spacing between the planar coils of each of the two adjacent layers being too close.Optionally, the spacing between the planar coils of each of the two adjacent layers is 10 mm or less, for example, 5 mm, 7 mm, etc.

[0038] In some alternative embodiments, the shape of the planar coils on each layer is a spiral involute.

[0039] In some alternative embodiments, the height of the planar coils in each layer in a direction perpendicular to the plane in which the planar coils lie is between 2 mm and 15 mm.

[0040] In some alternative embodiments, the number of turns of the planar coils on each layer can be set according to the required inductance, where the greater the required inductance, the greater the number of turns. Specifically, the inductance is proportional to the square of the number of turns. The planar coils on different layers have the same number of turns. It is also undesirable for the planar coils on each layer to have too many turns, as this will occupy too much space in the circumferential direction, thereby limiting the number of coil groups (i.e., the value of M). Preferably, N=4, and the number of turns of the planar coils on each layer is 0.25 turns. In this way, the total number of turns of the planar coils on the four layers is 1 turn, i.e., one full turn in the circumferential direction.

[0041] In one specific embodiment, as shown in FIG. 4B , first coil unit 3a is used as an example. N=4, and each layer of planar coils has two turns. The four layers of planar coils are, from top to bottom, first planar coil 31, second planar coil 32, third planar coil 33, and fourth planar coil 34. The four layers of planar coils are spaced apart along a direction perpendicular to the plane on which the planar coils are located and connected end-to-end in series. Specifically, the planar coils in each of two adjacent layers are connected in series and electrically connected via connecting posts 4, which are, for example, arranged along a direction perpendicular to the plane on which the planar coils are located. Input end 31a and output end 31b of the coil group are, respectively, one end of the outer ring of first planar coil 31 in the top layer and fourth planar coil 34 in the bottom layer. Each of the four planar coils is a spiral involute, with the same parameters, and the spiral directions of the planar coils in two adjacent layers are opposite. Specifically, in a direction perpendicular to the plane on which the planar coils are located, when viewed from above, the spiral direction of first planar coil 31 is clockwise, and the spiral direction of adjacent second planar coil 32 is counterclockwise, and they are mirror images of each other; the spiral direction of third planar coil 33 adjacent to second planar coil 32 is clockwise, i.e., third planar coil 33 is mirror image symmetric with second planar coil 32 and overlaps with first planar coil 31; and the spiral direction of fourth planar coil 34 adjacent to third planar coil 33 is counterclockwise, i.e., fourth planar coil 34 is mirror image symmetric with third planar coil 33 and overlaps with second planar coil 32.

[0042] 5 to 8, first coil unit 3a is used as an example, where N=4 and the number of turns of the planar coils in each layer is 0.25. The four layers of planar coils are, from top to bottom, first planar coil 31, second planar coil 32, third planar coil 33, and fourth planar coil 34. The four layers of planar coils are spaced apart along a direction perpendicular to the plane on which the planar coils are located (i.e., the Z direction in FIG. 7) and connected in series end-to-end. Specifically, the planar coils in each of two adjacent layers are connected in series and electrically connected via connecting posts 4, which are, for example, arranged along a direction perpendicular to the plane on which the planar coils are located. Input end 31a and output end 31b of the coil group are adjacent ends of first planar coil 31 in the top layer and fourth planar coil 34 in the bottom layer, respectively. Each of the four layers of planar coils is a spiral involute and has the same parameters, with the spiral directions of the planar coils in two adjacent layers being opposite. Specifically, as shown in FIG. 6 , first planar coil 31 and second planar coil 32 are symmetrical with respect to second axis O2 parallel to the plane on which the planar coils are located (with opposite spiral directions), second planar coil 32 and third planar coil 33 are symmetrical with respect to first axis O1 parallel to the plane on which the planar coils are located (with opposite spiral directions), and third planar coil 33 and fourth planar coil 34 are symmetrical with respect to second axis O2 parallel to the plane on which the planar coils are located (with opposite spiral directions).

[0043] 8, vertical spacing D5 between input end 31a and output end 31b of the coil group is equal to twice spacing D3 and the sum of spacing D4, height H1 of second planar coil 32, and height H2 of third planar coil 33, i.e., D5=2×D3+D4+H1+H2. For example, assuming that spacing D3 and spacing D4 are both equal to 7 mm and height H1 and height H2 are both equal to 5 mm, vertical The distance D5 is 31 mm, which can meet the process requirements for the voltage resistance capability of the coil structure.

[0044] In the coil structure shown in FIG. 1, the shape of the orthogonal projection on its radial cross section has asymmetry in the circumferential direction (i.e., angular direction). Specifically, as shown in FIG. 2B, the radial cross section is divided into four quadrants (I, II, III, IV). As the involute of each planar coil extends from the inner end to the outer end, its radius gradually increases. As a result, the parts of the coil structure in the first quadrant I and the third quadrant III are significantly different from the parts of the coil structure in the second quadrant II and the fourth quadrant IV. As a result, a difference in current distribution occurs in the circumferential direction (i.e., angular direction) of the coil structure, which in turn leads to a non-uniform distribution of the electromagnetic field. This causes an asymmetric distribution of radical and ion densities in the plasma during the process, which in turn leads to a non-uniform angular distribution of plasma density, ultimately affecting the process uniformity.

[0045] To solve the above technical problems, M coil groups are designed, where M is an integer greater than or equal to 4, the M coil groups have the same structure and are connected in parallel to each other, the planar coils of each layer of the M coil groups are arranged in one-to-one correspondence on the same layer, and the M planar coils located on the same layer are evenly distributed and spaced apart from each other in the circumferential direction of the planar coil, that is, the M planar coils located on the same layer are arranged at different rotation angles in the circumferential direction. Specifically, taking M=4 as an example, and referring also to FIGS. 9B to 12, the four coil groups are first coil group 3a1, second coil group 3a2, third coil group 3a3, and fourth coil group 3a4, respectively, and each of the four coil groups includes N layers of planar coils (e.g., N=4) that are parallel to one another. Taking the four-layer planar coil shown in FIG. 5 as an example, in the M coil groups, M first planar coils 31 are provided in the same layer and are evenly distributed at intervals from one another in the circumferential direction of the planar coil, M second planar coils 32 are provided in the same layer and are evenly distributed at intervals from one another in the circumferential direction of the planar coil, M third planar coils 33 are provided in the same layer and are evenly distributed at intervals from one another in the circumferential direction of the planar coil, and M fourth planar coils 34 are provided in the same layer and are evenly distributed at intervals from one another in the circumferential direction of the planar coil. In other words, when any one coil group is rotated clockwise or counterclockwise by a predetermined angle in the circumferential direction of the planar coil, it overlaps with another adjacent coil group. For example, four coil groups are shown in Fig. 9B. In this case, taking the first coil group 3a1 as an example, when it is rotated clockwise or counterclockwise by 90 degrees in the circumferential direction of the planar coil, it overlaps with another adjacent coil group (e.g., the second coil group 3a2 or the fourth coil group 3a4). In the M coil groups, the M planar coils provided on the same layer are distributed on the same circumference, so it can be easily understood that the first ends and second ends of the M planar coils are respectively on two concentric circumferences.

[0046] Since the M coil groups have the same shape and can be evenly distributed around the circumferential direction of the planar coil, the M planar coils corresponding to each layer of the M coil groups jointly form a nearly circular shape around the circumferential direction of the planar coil, so that the M coil groups have angular symmetry around the circumferential direction of the planar coil, i.e., are symmetrical around the circumferential direction of the planar coil, which can avoid differences in circumferential current distribution and further improve the uniformity of the angular distribution of plasma density and the process uniformity.

[0047] In addition, when the number of coil groups is less than four, for example, (a) of FIG. 9A shows one coil group, which has a two-layer planar coil structure, (b) of FIG. 9A shows two coil groups, each of which has a two-layer planar coil structure, and (c) of FIG. 9A As can be seen from (a), each layer of the coil group has only one planar coil, and the coil structure is asymmetric in the circumferential direction (i.e., angular direction) of the planar coil, so there is still a difference in current distribution. 9A As can be seen from (b), each layer of each coil group has two planar coils, and although the number of planar coils increases, the two planar coils in the same layer are mirror-symmetric, so the coil structure shown in (b) is still asymmetric in the circumferential direction (i.e., angular direction) of the planar coils. The inventors have discovered that only when there are four or more (i.e., M≧4) coil groups and the M planar coils located in the same layer are arranged at different rotation angles in the circumferential direction can a nearly circular shape be formed, thereby meeting the process requirement for angular uniformity; and the more the number of coil groups, i.e., the larger the value of M, the higher the angular uniformity, preferably M=4, 8, or 16.

[0048] In some alternative embodiments, as also shown in Figures 13 and 14, M=16, and the 16 coil groups are the first coil group 3a1 to the sixteenth coil group 3a16. Note that the greater the number of coil groups, i.e., the greater the numerical value of M, the better the angular symmetry of the coil structure formed by the M coil groups, which is advantageous for improving the symmetry of the angular distribution of plasma density. In some preferred embodiments, the number of coil groups (i.e., the numerical value of M) is 2 or more and 64 or less.

[0049] In some alternative embodiments, the M coil groups may be connected in parallel to each other, specifically, the input and output terminals of each coil group (i.e., the adjacent ends of the top-layer planar coil and the bottom-layer planar coil) may be electrically connected to the input and output terminals of the RF power supply 1 via a matching device 2, respectively. Optionally, in order to reduce the number of wiring terminals of the RF power supply 1, M is an even number equal to or greater than 2, and the input terminals of the M coil groups are provided on the same layer (all located on the top or bottom layer) and are divided into M / 2 input terminal groups (two groups forming a pair) in the circumferential direction of the planar coil, and each input terminal group includes the input terminals of two adjacent coil groups, and a first extension segment is connected between the input terminals of the two adjacent coil groups to electrically connect them, and the first extension segments of the M / 2 input terminal groups are electrically connected to each other. Similarly, the output terminals of the M coil groups are provided on the same layer (all located on the bottom or top layer) and are divided into M / 2 output terminal groups (two groups forming a pair) in the circumferential direction of the planar coil, and each output terminal group includes the output terminals of two adjacent coil groups, and a second extension segment is connected between the output terminals of the two adjacent coil groups to electrically connect them, and the second extension segments of the M / 2 output terminal groups are electrically connected to each other.

[0050] Taking M=16 as an example, the input terminals of the 16 coil groups are arranged on the same layer and are divided into eight input terminal groups circumferentially of the planar coil, with each input terminal group including the input terminals of two adjacent coil groups. Figures 15 and 16 show the input terminals 31a of two adjacent coil groups (3a1, 3a2) of the 16 coil groups, with a first extension segment 5a electrically connecting the input terminals 31a of the two adjacent coil groups (3a1, 3a2) and electrically connecting the first extension segment 5a to another adjacent first extension segment 5a. Similarly, Figures 15 and 16 show the output terminals 31b of two adjacent coil groups (3a1, 3a2) of the 16 coil groups, with a second extension segment 5b electrically connecting the output terminals 31b of the two adjacent coil groups (3a1, 3a2) and electrically connecting the second extension segment 5b to another adjacent second extension segment 5b. This makes it possible to realize that 16 coil groups are connected in parallel with each other.

[0051] In some alternative embodiments, as shown in FIG. 15, the extension direction of the first extension segment 5a coincides with the extension direction of the planar coil connected to the first extension segment 5a of one coil group; for example, in FIG. 15, the first extension segment 5a coincides with the extension direction of the planar coil (e.g., the top-layer planar coil) connected to it of the first coil group 3a1, and the extension direction of the second extension segment 5b coincides with the extension direction of the planar coil connected to the second extension segment 5b of one coil group; for example, in FIG. 15, the second extension segment 5b coincides with the extension direction of the planar coil (e.g., the bottom-layer planar coil) connected to it of the second coil group 3a2.

[0052] In some alternative embodiments, as shown in FIG. 15, a first wiring terminal 51a is provided at the intermediate position of the first extension segment 5a for electrically connecting to the output end of the RF power supply 1, and a second wiring terminal 51b is provided at the intermediate position of the second extension segment 5b for electrically connecting to the input end of the RF power supply 1. In this way, it is possible to ensure that the total lengths of two adjacent coil groups are the same, thereby making it possible to make the paths through which current flows through the two coil groups the same.

[0053] In addition, the M coil groups may be connected in parallel with each other in any other manner, for example, the input terminals of the M coil groups are directly electrically connected, and the output terminals of the M coil groups are directly electrically connected.

[0054] In some alternative embodiments, in order to further reduce the number of wiring terminals of the RF power supply 1, the M / 2 first wiring terminals 51a are divided into M / 4 first terminal groups (two terminals in one pair) in the circumferential direction of the planar coil, and as shown in FIG. 17, each first terminal group includes two adjacent first wiring terminals 51a, and a first connection bar 6a is connected between the two adjacent first wiring terminals 51a to electrically connect them, and a first connection bar 6a is connected at the intermediate position of the first connection bar 6a to the output terminal of the RF power supply 1. Similarly, the M / 2 second wiring terminals 51b are divided into M / 4 second terminal groups (two of which form a pair) in the circumferential direction of the planar coil, each second terminal group including two adjacent second wiring terminals 51b, a second connection bar 6b ​​is connected between the two adjacent second wiring terminals 51b to electrically connect them, and an output wiring terminal 61b is provided at the middle position of the second connection bar 6b ​​to electrically connect to the input end of the RF power supply 1. Taking M=16 as an example, the eight first wiring terminals 51a are divided into four first terminal groups in the circumferential direction of the planar coil, and the eight second wiring terminals 51b are divided into four second terminal groups in the circumferential direction of the planar coil.

[0055] In some alternative embodiments, to ensure circumferential symmetry of the coil structure, as shown in Fig. 17, the M / 4 first connection bars 6a are evenly distributed in the circumferential direction of the planar coil, and the M / 4 second connection bars 6b are evenly distributed in the circumferential direction of the planar coil, the diameter of the circumference where the M / 4 first connection bars 6a are located is the same as the diameter of the circumference where the M / 4 second connection bars 6b are located, and the M / 4 first connection bars 6a and the M / 4 second connection bars 6b are offset from each other in the circumferential direction of the planar coil, i.e., are staggered in the circumferential direction of the planar coil. The M / 4 first connection bars 6a and the M / 4 second connection bars 6b are offset from each other in the circumferential direction of the planar coil, which makes it easier to design the wiring connection layout between the RF power source and the connection bars. Of course, embodiments of the present invention are not limited thereto. For example, as shown in FIG. 18, M / 4 first connection bars 6a and M / 4 second connection bars 6b may overlap each other in a one-to-one correspondence in a direction perpendicular to the plane on which the planar coil is located.

[0056] In some alternative embodiments, the coil structure 3 includes multiple coil units, each having a different coil size and nested within the others. For example, Figure 19 shows two coil units, a first coil unit 3a and a second coil unit 3b, where the outer diameter of the second coil unit 3b is smaller than the inner diameter of the first coil unit 3a and the two coil units are nested within each other.

[0057] Optionally, the number of layers of the planar coils in the coil group of the first coil unit 3a and the number of layers of the planar coils in the coil group of the second coil unit 3b are the same, for example, four layers in each. However, embodiments of the present invention are not limited thereto, and the number of layers of the planar coils in the coil group of the first coil unit 3a and the number of layers of the planar coils in the coil group of the second coil unit 3b may be different depending on the power ratio between the first coil unit 3a and the second coil unit 3b. Specifically, the higher the supplied power, the more layers there are, and conversely, the lower the supplied power, the fewer layers there are.

[0058] As another technical solution, this embodiment further provides a coil structure, which includes a first coil structure and a second coil structure nested together, specifically, as shown in FIG. 20, a first coil structure 201 and a second coil structure 202 are all annular, but have different dimensions, with the first coil structure 201 located on the outer ring and the second coil structure 202 located on the inner ring, or as shown in FIG. 21, the second coil structure 202 located on the outer ring and the first coil structure 201 located on the inner ring.

[0059] The first coil structure 201 employs the coil structure of this embodiment, and the first coil structure 201 has one coil unit, which includes M coil groups, where M is an integer greater than or equal to 4. Each coil group includes N parallel layers of planar coils, where N is an even number greater than or equal to 4. The orthogonal projections of two adjacent layers of planar coils on a plane where the planar coils are located are mirror images. Figures 20 and 21 show a schematic diagram of a four-layer planar coil. Each coil group includes N parallel layers of planar coils, where N is an even number greater than or equal to 4. That is, each coil group has an even number of planar coils, or four or more layers. In this way, the withstand voltage between the top and bottom planar coils can be increased to 12KV or more, which is suitable for the process of supplying high power (greater than 5KW) to the inner or outer ring.

[0060] The second coil structure 202 includes two layers of planar coils connected in series end-to-end in parallel with each other, and the orthogonal projections of the two layers of planar coils on a plane on which the planar coils are located are mirror-symmetric. The two layers of planar coils in the second coil structure 202 are, for example, the first planar coil 031 and the second planar coil 032 shown in FIG. 3A. The second coil structure 202 is applicable when the power supplied to the outer or inner ring is small (2 kW or less).

[0061] The coil structure according to the embodiment of the present invention can be applied to situations where the power supply magnitudes of the inner and outer rings are different by using the above coil structure according to the embodiment of the present invention in combination with two layers of planar coils connected in series end-to-end in parallel with each other, i.e., the first coil structure 201 can be applied to high power supply (greater than 5 kW), and the second coil structure 202 can be applied to low power supply (less than 2 kW), thereby meeting various different process requirements.

[0062] As another technical solution, this embodiment further provides a semiconductor processing apparatus. For example, as shown in FIG. 22 , the semiconductor processing apparatus includes an upper electrode RF power supply 1, a matching box 2, a reaction chamber 100, and a coil structure 3, wherein a dielectric window 101 is provided on the top of the reaction chamber 100, and the coil structure 3 is provided above the dielectric window 101. The coil structure 3 adopts the coil structure according to each of the above embodiments of the present invention, for example, the coil structure 3 shown in FIG. 4A.

[0063] The RF power supply 1 supplies RF power to the coil structure 3 via the matching box 2 to excite the process gas in the reaction chamber 100 and form plasma. A base 102 for placing a wafer is provided in the reaction chamber 100, and the base 102 is electrically connected to an RF source 103, which is a lower electrode. The RF source 103 applies an RF bias to the base 102 to attract and move the plasma to the surface of the wafer.

[0064] By adopting the coil structure of the present invention, the semiconductor processing apparatus of the present invention can compensate for differences in radial current distribution of the coil and improve the radial distribution uniformity of the binding energy generated below the coil, thereby not only improving the radial distribution uniformity of the radical and ion density in the plasma, but also improving the overall voltage resistance of the coil, thereby realizing high power supply.

[0065] It should be understood that the above embodiments are merely exemplary embodiments for explaining the principles of the present invention, and the present invention is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A coil structure for generating plasma in a semiconductor process device, the coil structure including at least one coil unit, each of the coil units including M coil groups, where M is an integer of 4 or more, the M coil groups having the same structure and connected in parallel to each other, each of the coil groups including N layers of planar coils parallel to each other, where N is an even number of 4 or more, the planar coils of each layer of the M coil groups being provided in one-to-one correspondence on the same layer, and the M planar coils located on the same layer being evenly distributed at intervals from each other in a circumferential direction of the planar coil, the planar coils of the N layers of each of the coil groups are spaced apart along a direction perpendicular to a plane on which the planar coils are located, and are connected in series end-to-end in order, and orthogonal projections of the planar coils of each of two adjacent layers on the plane on which the planar coils are located are mirror-symmetric; The M is an even number equal to or greater than 4, input ends of the M coil groups are provided on the same layer and are divided into M / 2 input end groups in the circumferential direction of the planar coil, each of the input end groups includes input ends of two adjacent coil groups, a first extension segment is connected between the input ends of the two adjacent coil groups to electrically connect them, and the first extension segments of the M / 2 input end groups are electrically connected to each other, A coil structure for generating plasma in a semiconductor process device, characterized in that output ends of the M coil groups are provided on the same layer and are divided into M / 2 output end groups in the circumferential direction of the planar coil, each of the output end groups includes output ends of two adjacent coil groups, a second extension segment is connected between the output ends of the two adjacent coil groups to electrically connect them, and the second extension segments of the M / 2 output end groups are electrically connected to each other.

2. an extension direction of the first extension segment coincides with an extension direction of the planar coil connected to the first extension segment of one of the coil groups; 2. The coil structure according to claim 1, wherein the extending direction of the second extension segment coincides with the extending direction of the planar coil connected to the second extension segment of one of the coil groups.

3. 2. The coil structure according to claim 1, wherein a first wiring terminal is provided at an intermediate position of the first extension segment for electrically connecting to an output end of an RF power source, and a second wiring terminal is provided at an intermediate position of the second extension segment for electrically connecting to an input end of the RF power source.

4. the M / 2 first wiring terminals are divided into M / 4 first terminal groups in a circumferential direction of the planar coil, each of the first terminal groups includes two adjacent first wiring terminals, a first connection bar is connected between the two adjacent first wiring terminals for electrically connecting them, and an input wiring terminal for electrically connecting to an output end of an RF power supply is provided at an intermediate position of the first connection bar; 4. The coil structure according to claim 3, wherein the M / 2 second wiring terminals are divided into M / 4 second terminal groups in a circumferential direction of the planar coil, each of the second terminal groups includes two adjacent second wiring terminals, a second connection bar is connected between the two adjacent second wiring terminals to electrically connect them, and an output wiring terminal is provided at an intermediate position of the second connection bar to electrically connect to an input end of an RF power supply.

5. 5. The coil structure of claim 4, wherein the M / 4 first connection bars are evenly distributed in a circumferential direction of the planar coil, the M / 4 second connection bars are evenly distributed in a circumferential direction of the planar coil, a diameter of a circumference on which the M / 4 first connection bars are located is the same as a diameter of a circumference on which the M / 4 second connection bars are located, and the M / 4 first connection bars and the M / 4 second connection bars are offset from each other in the circumferential direction of the planar coil.

6. 2. The coil structure of claim 1, wherein N is equal to 4 and the number of turns of the planar coil in each layer is 0.25 turns.

7. 2. The coil structure according to claim 1, wherein there are a plurality of the coil units, and the coil groups of the plurality of the coil units have different dimensions and are nested with each other.

8. There are two coil units, a first coil unit and a second coil unit, and the outer diameter of the second coil unit is smaller than the inner diameter of the first coil unit. The coil structure according to claim 7, characterized in that the number of layers of the planar coils of the coil group of the first coil unit and the number of layers of the planar coils of the coil group of the second coil unit are set based on the amount of power supplied thereto.

9. 2. The coil structure according to claim 1, wherein the spacing between each two adjacent layers of the planar coil is 10 mm or less.

10. 2. The coil structure according to claim 1, wherein the number of the coil groups is 4 or more and 64 or less.

11. 2. The coil structure according to claim 1, wherein the height of the planar coil in a direction perpendicular to the plane on which the planar coil is located is 2 mm or more and 15 mm or less.

12. The present invention includes a first coil structure and a second coil structure nested together, the first coil structure adopting the coil structure according to any one of claims 1 to 11; The second coil structure includes two layers of planar coils connected in series end-to-end in parallel to each other, and orthogonal projections of the two layers of planar coils on a plane in which the planar coils are located are mirror symmetric.

13. 12. A semiconductor processing apparatus comprising: an RF source; a reaction chamber; and the coil structure according to claim 1, wherein a dielectric window is provided at a top of the reaction chamber; the coil structure is provided above the dielectric window; and the RF source is used to supply RF power to the coil structure.

14. A semiconductor process apparatus comprising an RF source, a reaction chamber, and the coil structure described in claim 12, wherein a dielectric window is provided at the top of the reaction chamber, the coil structure is provided above the dielectric window, and the RF source is used to supply RF power to the coil structure.

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