Manufacturing method
The method integrates plasma etching and cleaning to efficiently process die attach layers on semiconductor wafers, reducing the number of steps and time by using a resin and filler-containing die attach layer, and a second gas to remove residue, thus enhancing manufacturing efficiency.
Patent Information
- Application Number
- JP2021109570
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-06-30
- Publication Date
- 2025-12-15
- Estimated Expiration
- 2041-06-30
AI Technical Summary
The use of fluorine-based gases in plasma etching for semiconductor wafers prevents the processing of die-attach layers, necessitating separate dicing steps, increasing the number of work steps and time consumption in semiconductor device manufacturing.
A manufacturing method involving plasma etching of a wafer with a die attach layer containing a resin and filler, where the wafer is divided along planned lines, followed by plasma etching the die attach layer and cleaning to remove residue, using a second gas and fluid to facilitate complete separation.
This method reduces the number of work steps required to manufacture chips with a die attach layer by integrating plasma etching and cleaning processes, ensuring efficient division and removal of residue.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to a manufacturing method for manufacturing a chip on which a die attach layer is laminated. [Background technology]
[0002] In the manufacturing process of semiconductor devices, a semiconductor wafer on which a plurality of devices are formed is divided to manufacture a plurality of semiconductor devices.
[0003] Dicing machines using cutting blades or laser beams are widely used to divide wafers, but plasma etching has also been proposed, and a method of processing a wafer laminated with a die attach film by plasma etching has also been proposed (see, for example, Patent Document 1). [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-18797 Summary of the Invention [Problem to be solved by the invention]
[0005] Incidentally, when a die-attach layer is used when mounting devices, the die-attach layer is formed on the wafer before being divided into individual pieces, and the wafer is divided together with the die-attach layer.
[0006] However, the die attach layer cannot be processed using the fluorine-based gases widely used in plasma etching of wafers. Therefore, after processing the wafer with plasma etching, the die attach layer is processed using a separate dicing device, etc. This increases the number of work steps, is time-consuming, and an improvement was desperately needed.
[0007] An object of the present invention is to provide a manufacturing method that can suppress an increase in the number of work steps required to manufacture a chip on which a die attach layer is laminated. [Means for solving the problem]
[0008] In order to solve the above-mentioned problems and achieve the object, the manufacturing method of the present invention is a method for manufacturing a chip on which a die attach layer containing a resin and a filler is laminated, and includes the steps of: preparing a wafer unit in which a wafer on which devices are formed in each region defined by a plurality of intersecting planned division lines on the surface is attached to a tape via a die attach layer containing a filler and the tape is attached to an annular frame, the devices are protected by a protective member, and the wafer surface is exposed along the planned division lines; and supplying a first gas to the wafer unit to perform plasma etching from the front surface side of the wafer. a wafer processing step of dividing the wafer along the planned dividing lines to expose the die attach layer; a die attach layer processing step of supplying a second gas to the wafer unit and plasma etching the die attach layer from the front surface side of the wafer to plasma etch the resin of the die attach layer after the wafer processing step; and a cleaning step of spraying a fluid onto the front surface of the wafer unit after the die attach layer processing step to remove filler residue remaining in the die attach layer processing step from the wafer unit along the planned dividing lines. In the cleaning step, the wafer and the nozzle are moved relatively along the division grooves formed on the division lines, and the fluid is sprayed from the nozzle toward the groove bottoms of the division grooves, so that the fluid is sprayed along the division lines. It is characterized by:
[0009] BookThe manufacturing method of the invention is a method for manufacturing a chip having a die attach layer laminated thereon, and includes the steps of: preparing a wafer unit in which a wafer having devices formed in each region defined by a plurality of intersecting planned division lines on its surface is attached to a tape via a die attach layer containing a filler, the tape is attached to an annular frame, the devices are protected by a protective member, and the wafer surface is exposed along the planned division lines; and supplying a first gas to the wafer unit and performing plasma etching from the front surface side of the wafer to divide the wafer along the planned division lines and expose the die attach layer. a die attach layer processing step in which, after the wafer processing step, a second gas is supplied to the wafer unit and plasma etching is performed on the die attach layer from the front surface side of the wafer; and a cleaning step in which, after the die attach layer processing step, a fluid is sprayed onto the front surface of the wafer unit to remove filler residue left behind in the die attach layer processing step from the wafer unit along the planned division line, wherein in the cleaning step, the fluid is sprayed toward the front surface of the wafer with the front surface of the wafer of the wafer unit facing downward. [Effects of the Invention]
[0010] The present invention has an effect of suppressing an increase in the number of work steps required for manufacturing a chip on which a die attach layer is laminated. [Brief explanation of the drawings]
[0011] [Figure 1] FIG. 1 is a perspective view showing an example of a wafer to be processed by the manufacturing method according to the first embodiment. [Figure 2] FIG. 2 is a perspective view showing an example of a chip manufactured by dividing the wafer shown in FIG. [Figure 3] FIG. 3 is a flowchart showing the flow of the manufacturing method according to the first embodiment. [Figure 4]FIG. 4 is a perspective view showing a state in which a die attach film and tape are attached to the back surface of the wafer in the preparation step of the manufacturing method shown in FIG. [Figure 5] FIG. 5 is a cross-sectional view schematically showing a state in which a wafer is placed on a spinner table of a protective film coating device in the preparation step of the manufacturing method shown in FIG. [Figure 6] FIG. 6 is a cross-sectional view schematically showing a state in which a protective film is formed on the surface of a wafer in the preparation step of the manufacturing method shown in FIG. [Figure 7] FIG. 7 is a perspective view schematically showing a state in which a part of the protective film on the surface of the wafer is removed in the preparation step of the manufacturing method shown in FIG. [Figure 8] FIG. 8 is a cross-sectional view of a main part of a wafer unit prepared in the preparation step of the manufacturing method shown in FIG. [Figure 9] FIG. 9 is a cross-sectional view schematically showing an example of the configuration of a plasma etching apparatus for carrying out the wafer processing step and the die attach layer processing step of the manufacturing method shown in FIG. [Figure 10] FIG. 10 is a cross-sectional view of a main part of the wafer unit after the wafer processing step of the manufacturing method shown in FIG. [Figure 11] FIG. 11 is a cross-sectional view of a main part of the wafer unit after the die-attach layer processing step of the manufacturing method shown in FIG. [Figure 12] FIG. 12 is a cross-sectional view of a main part of a wafer showing the cleaning step of the manufacturing method shown in FIG. [Figure 13] FIG. 13 is a cross-sectional view of a main part of a wafer in a state where filler residue remaining at the groove bottoms of the dividing grooves has been removed in the cleaning step of the manufacturing method shown in FIG. [Figure 14] FIG. 14 is a cross-sectional view of a main portion of the wafer after the mask removal step of the manufacturing method shown in FIG. [Figure 15] FIG. 15 is a cross-sectional view of a main part of a wafer showing the pick-up step of the manufacturing method shown in FIG. [Figure 16]FIG. 16 is a cross-sectional view of a main part of a wafer showing a cleaning step in the manufacturing method according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0012] Modes (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. Furthermore, the components described below include those that can be easily imagined by a person skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. Furthermore, various omissions, substitutions, or modifications of the configuration can be made within the scope of the gist of the present invention.
[0013] [Embodiment 1] A manufacturing method according to a first embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a perspective view showing an example of a wafer to be processed by the manufacturing method according to the first embodiment. Fig. 2 is a perspective view showing an example of a chip manufactured by dividing the wafer shown in Fig. 1. Fig. 3 is a flowchart showing the flow of the manufacturing method according to the first embodiment.
[0014] The manufacturing method according to the first embodiment is a method for processing a wafer 1 shown in Fig. 1. In the first embodiment, the wafer 1 is a disk-shaped semiconductor wafer, an optical device wafer, or the like, with a substrate 2 made of silicon, sapphire, gallium arsenide, or the like. As shown in Fig. 2, the wafer 1 has a surface 3 partitioned by a plurality of mutually intersecting planned dividing lines 4, and devices 5 are formed in each of the regions.
[0015] The device 5 is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration), or an image sensor such as a CCD (Charge Coupled Device) or a CMOS (Complementary Metal Oxide Semiconductor). The device 5 is smaller than the devices separated from the wafer 1 by cutting, for example, about 1 mm x 1 mm in size, and is suitable for being separated into individual devices by plasma etching (also called plasma dicing).
[0016] The wafer 1 has a die attach layer 20 (shown in FIG. 2) laminated on the back surface 6 behind the front surface 3, and is divided into individual chips 10 shown in FIG. 2 along the planned division lines 4. As shown in FIG. 2, each chip 10 includes a portion of the substrate 2 divided along the planned division lines 4 and a device 5 formed on the front surface of the substrate 2, and the divided die attach layer 20 is laminated on the back surface 6 of the substrate 2. Note that in FIG. 2, the same parts as those in the wafer 1 are designated by the same reference numerals, and their explanation will be omitted.
[0017] The die-attach layer 20 is an adhesive film for die bonding to fix the individually separated chips 10 to other chips or a substrate. The die-attach layer 20 contains a resin and a filler 21. In the first embodiment, the resin contained in the die-attach layer 20 is an acrylic resin or an epoxy resin. In the first embodiment, the filler 21 is made of silica, aluminum oxide, or SiC.
[0018] The manufacturing method according to the first embodiment is a method of dividing a wafer 1 along planned dividing lines 4 to manufacture chips 10 having a die attach layer 20 laminated on the back surface 6, as shown in Fig. 2. As shown in Fig. 3, the manufacturing method includes a preparation step 101, a wafer processing step 102, a die attach layer processing step 103, a cleaning step 104, a mask removal step 105, and a pick-up step 106.
[0019] (Preparation step) FIG. 4 is a perspective view showing a state in which a die attach film and tape are attached to the backside of a wafer in the preparation step of the manufacturing method shown in FIG. 3. FIG. 5 is a cross-sectional view schematically showing a state in which a wafer is placed on a spinner table of a protective film coating apparatus in the preparation step of the manufacturing method shown in FIG. 3. FIG. 6 is a cross-sectional view schematically showing a state in which a protective film is formed on the front side of a wafer in the preparation step of the manufacturing method shown in FIG. 3. FIG. 7 is a perspective view schematically showing a state in which a portion of the protective film on the front side of a wafer is removed in the preparation step of the manufacturing method shown in FIG. 3. FIG. 8 is a cross-sectional view of a main part of a wafer unit prepared in the preparation step of the manufacturing method shown in FIG. 3.
[0020] The preparation step 101 is a step of preparing a wafer unit 14 (shown in Figure 8) in which the wafer 1 is attached to a tape 11 (shown in Figures 4, 5, 6 and 7) via a die attach layer 20, the tape 11 is attached to an annular frame 12, the device 5 is protected by a protective film 13 (shown in Figures 7 and 8) which is a protective member, and the surface 3 of the wafer 1 is exposed along the planned division line 4.
[0021] 4, in preparation step 101, the back surface 6 of the wafer 1 is attached to a die attach layer 20 attached to the center of a tape 11 whose outer diameter is larger than that of the wafer 1, and an annular frame 12 whose inner diameter is larger than that of the wafer 1 is attached to the outer edge of the tape 11. The die attach layer 20 is attached to the back surface 6 of the wafer 1 in the form of a disk whose outer diameter is larger than that of the wafer 1 and smaller than the inner diameter of the annular frame 12.
[0022] In embodiment 1, tape 11 is a so-called 2-in-1 tape in which a disk-shaped die attach layer 20 is attached in advance, and the back surface 6 of wafer 1 is attached to the die attach layer 20, thereby attaching tape 11 to the back surface 6 of wafer 1 via the die attach layer 20. For this reason, in embodiment 1, in preparation step 101, the back surface 6 of wafer 1 is attached to the die attach layer 20 attached to the center of tape 11, and an annular frame 12 is attached to the outer edge of tape 11.
[0023] 5, the back surface 6 of the wafer 1 is placed on the holding surface 32 of the spinner table 31 via the die attach layer 20 and tape 11, and the back surface 6 of the wafer 1 is suction-held on the holding surface 32 via the die attach layer 20 and tape 11, and the annular frame 12 is clamped by clamps 33 provided around the periphery of the spinner table 31. In the preparation step 101, the protective film coating device 30 applies a liquid water-soluble resin 35 to the front surface 3 of the wafer 1 from an application nozzle 34 above the wafer 1 while rotating the spinner table 31 around its axis, as shown in FIG.
[0024] The water-soluble resin 35 includes a water-soluble liquid resin such as polyvinyl alcohol (PVA) or polyvinyl pyrrolidone (PVP). The water-soluble resin 35 applied to the front surface 3 of the wafer 1 is spread toward the outer edge of the wafer 1 by centrifugal force generated by the rotation of the spinner table 31, and covers the entire front surface 3 of the wafer 1. In the preparation step 101, the protective film coating device 30 applies the water-soluble resin 35 to the front surface 3 of the wafer 1, and then dries or heats the water-soluble resin 35 to harden it, thereby covering the entire front surface 3 of the wafer 1, i.e., the device 5, with the protective film 13, which is a protective member.
[0025] In embodiment 1, in preparation step 101, water-soluble resin 35 is applied to surface 3 of wafer 1 to form protective film 13, which is a protective member. However, in the present invention, surface 3 of wafer 1 may be coated with a water-insoluble resist film as a protective member, or a resist film may be attached to surface 3 of wafer 1 as a protective member.
[0026] 7 suction-holds the back surface 6 of the wafer 1 on the holding surface of the chuck table via the die attach layer 20 and the tape 11. In the preparation step 101, the laser processing device 40 captures an image of the front surface 3 of the wafer 1 with the imaging camera 43 and performs alignment to align the wafer 1 with the laser beam application unit 41.
[0027] 7, the laser processing device 40 irradiates each of the planned dividing lines 4 with a laser beam 42 having a wavelength that is absorbed by the protective film 13 while moving the chuck table and the laser beam application unit 41 relatively along the planned dividing lines 4, thereby removing the protective film 13 on the planned dividing lines 4 and exposing the surface 3 of the wafer 1 at the planned dividing lines 4. In the preparation step 101, the laser processing device 40 irradiates all of the planned dividing lines 4 of the wafer 1 with the laser beam 42, thereby preparing a wafer unit 14 shown in FIG. 8 in which the devices 5 are protected by the protective film 13 and the surface 3 of the wafer 1 is exposed along the planned dividing lines 4.
[0028] In embodiment 1, in preparation step 101, a laser beam 42 having a wavelength that is absorbent for the protective film 13 is irradiated to remove the protective film 13 on the planned dividing line 4, but in the present invention, the cutting device may cut a cutting blade into the protective film 13 on the planned dividing line 4 to remove the protective film 13 on the planned dividing line 4 and expose the surface 3 of the wafer 1 along the planned dividing line 4.
[0029] Furthermore, in the present invention, the wafer 1 may have a passivation film formed on the surface of the substrate 2 of the wafer 1, the passivation film being a protective member resistant to both the first plasma gas used in the wafer processing step 102 and the second plasma gas used in the die attach layer processing step 103. In this case, if the dividing lines 4 are covered with a passivation film, it is desirable that the laser processing device 40 irradiate the dividing lines 4 with a laser beam 42 or the cutting device cut the cutting blade into the passivation film on the dividing lines 4 to expose the surface 3 of the wafer 1 at the dividing lines 4. Furthermore, if the dividing lines 4 are not covered with a passivation film, it is not necessary for the laser processing device 40 to irradiate the dividing lines 4 with a laser beam 42 or for the cutting device to cut the cutting blade into the dividing lines 4.
[0030] Next, a description will be given of plasma etching apparatus 50 that performs wafer processing step 102 and die attach layer processing step 103 with reference to the drawings. Fig. 9 is a cross-sectional view that schematically shows an example of the configuration of a plasma etching apparatus that performs the wafer processing step and die attach layer processing step of the manufacturing method shown in Fig. 3.
[0031] As shown in FIG. 8, the plasma etching apparatus 50 includes a rectangular parallelepiped chamber 51, a chuck table 52, an upper electrode 53, a frame fixing unit 54, and a control unit 55.
[0032] The chamber 51 has a processing space 511 formed therein where plasma etching is performed. The chamber 51 has an opening 513 for loading and unloading the wafer unit 14, and an opening / closing door 514 for opening and closing the opening 513, provided on one side wall 512. The opening / closing door 514 opens and closes the opening 513 by being raised and lowered by an opening / closing mechanism 515 formed of an air cylinder or the like.
[0033] Furthermore, the chamber 51 has an exhaust port 517 formed in the bottom wall 516, which connects the inside and outside of the chamber 51. The exhaust port 517 is connected to an exhaust mechanism 510 such as a vacuum pump.
[0034] The chuck table 52 and the upper electrode 53 are disposed opposite each other in the processing space 511 of the chamber 51. The upper surface of the chuck table 52 is a holding surface that holds the wafer 1 via the tape 17. The chuck table 52 is also made of a conductive material and functions as a lower electrode.
[0035] The chuck table 52 includes a disk-shaped holding portion 521 and a cylindrical support portion 520 that protrudes downward from the center of the lower surface of the holding portion 521. The support portion 520 is inserted into an opening 522 formed in the bottom wall 516 of the chamber 51. Within the opening 522, an annular insulating member 523 is disposed between the bottom wall 516 and the support portion 520, thereby electrically insulating the chamber 51 and the chuck table 52. The chuck table 52 is also connected to a high-frequency power supply 56 outside the chamber 51.
[0036] The chuck table 52 has a circular recess formed in a plan view on the upper surface of the holding portion 521. A disk-shaped heat conduction sheet 524 is fitted into the recess. The heat conduction sheet 524 is made of, for example, a resin such as acrylic or silicone. The heat conduction sheet 524 preferably has a thermal conductivity of 2.0 W / m·K or higher. The upper surface of this heat conduction sheet 524 forms part of the holding surface of the chuck table 52. However, the entire holding surface may be made of the heat conduction sheet 524.
[0037] The holding surface of the chuck table 52 is connected to a suction source 526 such as an ejector via a flow path 525 formed inside the chuck table 52. The wafer 1 is placed on the holding surface of the chuck table 52 via the tape 17, and the holding surface is sucked by the suction source 526, thereby suction-holding the wafer 1 to the holding surface via the die attach layer 20 and the tape 17.
[0038] Furthermore, cooling channels 527 through which a cooling fluid flows for cooling the chuck table 52 are formed inside the holding portion 521 and the support portion 520 of the chuck table 52. Both ends of the cooling channel 527 are connected to a refrigerant circulation mechanism 528. When the refrigerant circulation mechanism 528 is operated, the cooling fluid, such as water, circulates through the cooling channel 527, thereby cooling the chuck table 52.
[0039] The upper electrode 53 is made of a conductive material and includes a disk-shaped gas ejection part 531 and a cylindrical support part 530 that protrudes upward from the center of the upper surface of the gas ejection part 531. The support part 530 is inserted into an opening 532 formed in the upper wall 518 of the chamber 51. Inside the opening 532, an annular insulating member 533 is disposed between the upper wall 518 and the support part 530, and the chamber 51 and the upper electrode 53 are electrically insulated from each other.
[0040] The upper electrode 53 is connected to a high-frequency power source 57 outside the chamber 51. A support arm of a lifting mechanism 534 is attached to the upper end of the support part 530. The upper electrode 53 is raised and lowered by the lifting mechanism 534.
[0041] A plurality of gas outlets 535 are provided on the lower surface of the gas outlet part 531. The outlets 535 are connected to a first gas supply source 58 and a second gas supply source 59 via flow paths 536 formed in the gas outlet part 531 and the support part 530. The first gas supply source 58 supplies a first gas from the outlets 535 through the flow paths 536 into the chamber 51. In the first embodiment, when the substrate 2 of the wafer 1 is made of silicon, the first gas supply source 58 supplies a fluorine-based gas as the first gas into the chamber 51. The second gas supply source 59 supplies a second gas from the outlets 535 through the flow path 536 into the chamber 51. In the first embodiment, the second gas supply source 59 supplies an oxygen-based gas as the second gas into the chamber 51.
[0042] The frame fixing unit 54 is provided in the processing space 511 inside the chamber 51. The frame fixing unit 54 includes an annular frame mounting plate 541 having an inner diameter larger than the outer diameter of the holding portion 521 of the chuck table 52, an annular frame clamping plate 542 provided above the frame mounting plate 541 and having an inner diameter larger than the outer diameter of the holding portion 521 of the chuck table 52, and an elevating mechanism (not shown) that raises and lowers the frame clamping plate 542.
[0043] The upper surface of the frame mounting plate 541 is flat along the horizontal direction. The frame mounting plate 541 is fixed to the chamber 51 with its upper surface slightly lower than the holding surface. The lower surface of the frame clamping plate 542 is flat along the horizontal direction. The frame fixing unit 54 clamps the annular frame 12 between the upper surface of the frame mounting plate 541 and the lower surface of the frame clamping plate 542 by lowering the frame clamping plate using the lifting mechanism.
[0044] The control unit 55 controls each component of the plasma etching apparatus 50 to cause the plasma etching apparatus 50 to perform plasma etching on the wafer 1. The control unit 55 is a computer having an arithmetic processing device with a microprocessor such as a CPU (central processing unit), a storage device with memory such as a ROM (read only memory) or RAM (random access memory), and an input / output interface device. The arithmetic processing device of the control unit 55 performs arithmetic processing in accordance with a computer program stored in the storage device, and outputs control signals for controlling the plasma etching apparatus 50 to each component of the plasma etching apparatus 50 via the input / output interface device.
[0045] The control unit 55 is also connected to a display unit configured with a liquid crystal display device or the like that displays various information and images, and an input unit that the operator uses to register processing content information, etc. The input unit is configured with at least one of a touch panel provided on the display unit and an external input device such as a keyboard.
[0046] (Wafer processing step) Figure 10 is a cross-sectional view of a main portion of the wafer unit after the wafer processing step of the manufacturing method shown in Figure 3. In the wafer processing step 102, a first gas is supplied to the wafer unit 14, and plasma etching is performed from the front surface 3 side of the wafer 1 to divide the wafer 1 along the planned division lines 4 and expose the die attach layer 20. In the wafer processing step 102, the plasma etching apparatus 50 raises the upper electrode 53 with the lifting mechanism 534, and, with the lifting mechanism also raising the frame clamping plate 542, lowers the opening / closing door 514 with the opening / closing mechanism 515 to open the opening 513.
[0047] In the wafer processing step 102, the wafer unit 14 prepared in the preparation step 101 is carried into the processing space 511 by a transport unit (not shown), the wafer 1 is placed on the holding surface of the chuck table 52 via the die attach layer 20 and tape 11, and the annular frame 12 is placed on the upper surface of the frame mounting plate 541 via the tape 11. In the wafer processing step 102, the plasma etching apparatus 50 activates the suction source 526 to suck the holding surface, thereby suction-holding the back surface 6 of the wafer 1 on the holding surface via the die attach layer 20 and tape 11, and then lowers the frame clamping plate 542 by the lifting mechanism, thereby clamping and fixing the annular frame 12 between the frame mounting plate 541 and the frame clamping plate 542.
[0048] In the wafer processing step 102, the plasma etching apparatus 50 uses the opening / closing mechanism 515 to raise the opening / closing door 514 to close the opening 513, operates the exhaust mechanism 510 to reduce the pressure inside the chamber 51 and place the processing space 511 in a vacuum state (low-pressure state), and operates the refrigerant circulation mechanism 528 to circulate a cooling fluid such as water inside the cooling flow path 527 to suppress abnormal temperature rise of the chuck table 52. In the wafer processing step 102, the plasma etching apparatus 50 uses the lifting mechanism 534 to lower the upper electrode 53, and positions the distance between the lower surface of the upper electrode 53 and the wafer 1 held on the chuck table 52 constituting the lower electrode at a predetermined inter-electrode distance suitable for plasma etching.
[0049] It should be noted that as the processing space 511 is depressurized, the suction force of the suction source 526 acting on the wafer 1 weakens, and the wafer 1 may become difficult to suck by the chuck table 52. However, when the processing space 511 is depressurized, the annular frame 12 is fixed by the frame fixing unit 54, and the tape 17 is pressed against the holding surface of the chuck table 52. Therefore, the wafer unit 14 remains properly held on the chuck table 52 even in a depressurized environment.
[0050] In the wafer processing step 102, the plasma etching apparatus 50 supplies a first gas from the first gas supply source 58 at a predetermined flow rate and ejects the gas from the plurality of ejection ports 535 of the gas ejection unit 531 toward the wafer 1 held on the chuck table 52. In the wafer processing step 102, while the first gas is being supplied from the first gas supply source 58, the plasma etching apparatus 50 applies high-frequency power from the high-frequency power supply 57 to the upper electrode 53 to generate and maintain plasma, and applies high-frequency power from the high-frequency power supply 56 to the chuck table 52, which is the lower electrode, to attract ions.
[0051] In the wafer processing step 102, the plasma etching apparatus 50 converts the first gas in the space between the chuck table 52 and the upper electrode 53 into plasma, and this plasmatized first gas is drawn toward the wafer 1, etching (so-called plasma etching) the surface 3 of the wafer 1 along the division lines 4 that are exposed from the protective film 13, thereby forming division grooves 7 (shown in Figure 10) on the surface 3 along the division lines 4, and causing the division grooves 7 to extend toward the back surface 6 of the substrate 2.
[0052] In the first embodiment, when the substrate 2 is made of silicon, a fluorine-based gas such as SF, C4F, or CF4 is used as the first gas, but the first gas is not limited to these. In addition to etching with a single gas, for example, SF and C4F may be used alternately.
[0053] In the wafer processing step 102, the plasma etching apparatus 50 has a predetermined time set in advance for plasma etching the substrate 2 of the wafer 1, depending on the thickness of the substrate 2 of the wafer 1. In the wafer processing step 102, the plasma etching apparatus 50 applies high-frequency power to the chuck table 52 and the upper electrode 53 while supplying the first gas for a predetermined time, thereby completely removing the substrate 2 exposed from the protective film 13 on the intended division lines 4, dividing the wafer 1 into individual chips 10, and exposing the die attach layer 20 at the groove bottoms 8 of the division grooves 7, as shown in FIG.
[0054] (Die attach layer processing step) Figure 11 is a cross-sectional view of a main portion of the wafer unit after the die-attach layer processing step of the manufacturing method shown in Figure 3. In die-attach layer processing step 103, after wafer processing step 102 has been performed, a second gas is supplied to wafer unit 14 and plasma etching is performed on die-attach layer 20 from front surface 3 of wafer 1. In die-attach layer processing step 103, plasma etching apparatus 50 supplies second gas at a predetermined flow rate from second gas supply source 59 in the state after wafer processing step 102, and sprays the second gas from multiple nozzles 535 of gas ejection unit 531 toward wafer 1 held on chuck table 52.
[0055] In die attach layer processing step 103, plasma etching apparatus 50 applies high frequency power from high frequency power supply 57 to upper electrode 53 to create and maintain plasma, while supplying a second gas from second gas supply source 59, and applies high frequency power from high frequency power supply 56 to chuck table 52, which is the lower electrode, to attract ions. In die attach layer processing step 103, plasma etching apparatus 50 converts the second gas in the space between chuck table 52 and upper electrode 53 into plasma, and this plasmatized second gas is drawn toward wafer 1, etching (so-called plasma etching) the resin of die attach layer 20 exposed at groove bottoms 8 of division grooves 7 of wafer 1, causing division grooves 7 to advance toward tape 11.
[0056] In the first embodiment, when the die-attach layer 20 is made of an acrylic resin or an epoxy resin, an oxygen-based gas such as O2 is used as the second gas, but the second gas is not limited to an oxygen-based gas.
[0057] In the die-attach layer processing step 103, the plasma etching apparatus 50 has a predetermined time for plasma etching the resin of the die-attach layer 20, set in advance according to the thickness of the die-attach layer 20. In the die-attach layer processing step 103, the plasma etching apparatus 50 applies high-frequency power to the chuck table 52 and upper electrode 53 while supplying the second gas for a predetermined time, thereby removing the resin of the die-attach layer 20 and the substrate 2 on the division lines 4 exposed from the protective film 13, as shown in FIG. 11 . When the resin of the die-attach layer 20 is removed by etching, the fillers 21 of the die-attach layer 20 remain at the groove bottoms 8 of the division grooves 7, and the resin between the fillers 21 also remains. The fillers 21 of the die-attach layer 20 remaining at the groove bottoms 8 of the division grooves 7 and the resin between the fillers 21 are hereinafter referred to as filler residue 22.
[0058] (Washing step) Fig. 12 is a cross-sectional view of a main part of a wafer showing a cleaning step of the manufacturing method shown in Fig. 3. Fig. 13 is a cross-sectional view of a main part of a wafer in a state where filler residue remaining at the groove bottoms of the dividing grooves has been removed in the cleaning step of the manufacturing method shown in Fig. 3.
[0059] The cleaning step 104 is a step in which, after the die attach layer processing step 103, cleaning water 64, which is a fluid, is sprayed onto the surface 3 of the wafer 1 of the wafer unit 14 along the planned division line 4 to remove filler residue 22 remaining on the groove bottom 8 of the division groove 7 in the die attach layer processing step 103 from the wafer unit 14.
[0060] 12, the back surface 6 side of the wafer 1 is placed on the holding surface 62 of the table 61 via the die attach layer 20 and tape 11, and the front surface 3 side of the wafer 1 faces upward, and the back surface 6 side of the wafer 1 is suction-held to the holding surface 62 of the table 61 via the die attach layer 20 and tape 11. In the cleaning step 104, as shown in FIG. 12, the cleaning device 60 sprays cleaning water 64 from the cleaning water nozzle 63 toward the groove bottom 8 of the division groove 7 while moving the wafer 1 suction-held on the holding surface 62 and a cleaning water nozzle 63 above the table 61 relatively along the division grooves 7 formed on the planned division lines 4.
[0061] 13 , cleaning water 64 sprayed from cleaning water nozzle 63 peels off filler residue 22 from tape 11 on groove bottoms 8 of division grooves 7, and removes filler residue 22 from wafer unit 14. In cleaning step 104, remaining filler residue 22 is removed from groove bottoms 8 of division grooves 7, and die attach layer 20 is divided into individual chips 10. In cleaning step 104, cleaning device 60 sprays cleaning water 64 from cleaning water nozzle 63 onto groove bottoms 8 of all division grooves 7.
[0062] In the first embodiment, spraying the cleaning water 64 along the dividing grooves 7 allows the cleaning water 64 to easily enter the dividing grooves 7 and reach the groove bottoms 8, making it easy to remove the filler residue 22. In addition, in the present invention, the table 61 may be rotated about its axis, and the cleaning water 64 may be sprayed onto the wafer 1 to clean the entire surface of the wafer 1. In this case, the cleaning step 104 and the mask removal step 105 can be performed simultaneously.
[0063] (Mask removal step) Fig. 14 is a cross-sectional view of a main portion of a wafer after the mask removal step of the manufacturing method shown in Fig. 3. Mask removal step 105 is a step of cleaning front surface 3 of wafer 1 in wafer unit 14 after wafer processing step 102 and die attach layer processing step 103, and removing protective film 13. In mask removal step 105, cleaning device 60 rotates table 61 about its axis while moving cleaning water nozzle 63 above wafer 1 along holding surface 62, spraying cleaning water 64 from cleaning water nozzle 63 toward front surface 3 of wafer 1.
[0064] The cleaning water 64 may be pressurized pure water, or a two-fluid mixture of pressurized pure water and pressurized gas. The cleaning water 64 sprayed onto the front surface 3 of the wafer 1 is spread toward the outer edge of the wafer 1 by the centrifugal force generated by the rotation of the table 61, and flows over the front surface 3 of the wafer 1, removing the protective film 13 made of water-soluble resin from the front surface 3 of the wafer 1, as shown in Figure 14. In the mask removal step 105, the cleaning device 60 or the like dries the front surface 3 of the wafer 1.
[0065] Thus, in the first embodiment, in the cleaning step 104, the cleaning water 64, which is a fluid, is sprayed along the division line 4 toward the groove bottom 8 of the dividing groove 7.
[0066] In the first embodiment, when the protective film 13 protecting the device 5 is made of a water-soluble resin, after the die attach layer 20 is divided in the cleaning step 104, cleaning water 64 is supplied to the front surface 3 of the wafer 1 in the mask removal step 105 to remove the protective film 13. However, in the present invention, when the protective member is a passivation film, the protective member is not removed.
[0067] (Pickup step) Fig. 15 is a cross-sectional view of a main part of a wafer showing the pick-up step of the manufacturing method shown in Fig. 3. Pick-up step 106 is a step of picking up the individually separated chips 10 after cleaning step 104. In embodiment 1, in pick-up step 106, as shown in Fig. 15, a well-known pickup (not shown) picks up the chips 10 one by one from tape 11.
[0068] Die-attach layer 20 is generally made of a resin such as acrylic resin or epoxy resin, and contains filler 21 made of silica, aluminum oxide, SiC, or the like to obtain the desired viscosity during mounting. The applicant has discovered that the oxygen-based gas used as an etching gas for resins such as acrylic resin or epoxy resin cannot etch the filler, and the filler and the resin between adjacent fillers remain as filler residue 22 after etching, making it impossible to completely separate die-attach layer 20 using plasma etching.
[0069] Therefore, in the manufacturing method according to the first embodiment described above, die attach layer 20 is plasma etched with a second gas consisting of an oxygen-based gas, and then cleaning water 64, which is a fluid, is sprayed onto filler residue 22 to peel this filler residue 22 from tape 11 and remove it from wafer unit 14. For this reason, in the manufacturing method according to the first embodiment, die attach layer 20 can be divided along planned division lines 4 by cleaning step 104, and chips 10 on which die attach layer 20 is stacked can be manufactured.
[0070] As a result, the manufacturing method of embodiment 1 has the advantage of being able to suppress an increase in the number of work steps required to manufacture a chip 10 on which a die attach layer 20 is laminated, since the die attach layer 20 can be divided along the planned dividing line 4 in the cleaning step 104 in which the surface 3 of the wafer 1 of the wafer unit 14 is cleaned to remove the protective film 13.
[0071] Furthermore, in the manufacturing method of embodiment 1, in the cleaning step 104 in which the surface 3 of the wafer 1 of the wafer unit 14 is cleaned to remove the protective film 13, cleaning water 64 is sprayed along the planned division line 4, so that the filler residue 22 can be reliably peeled off from the tape 11 at the groove bottom 8 of the division groove 7 formed along the planned division line 4.
[0072] [Modification] A manufacturing method according to a modification of the first embodiment of the present invention will be described with reference to the drawings. Fig. 16 is a cross-sectional view of a main part of a wafer showing the cleaning step of the manufacturing method according to the second embodiment. In Fig. 16, the same parts as those in the first embodiment are given the same reference numerals, and their description will be omitted. In the cleaning step 104 and mask removal step 105 of the manufacturing method according to the modification, the cleaning device 60-1 shown in Fig. 12 has a holding surface 62 of a table 61 facing downward, and a cleaning water nozzle 63 disposed below the table 61, and the back surface 6 side of the wafer 1 is suction-held to the holding surface 62 of the table 61 via the die attach layer 20 and the tape 11, with the front surface 3 side of the wafer 1 facing downward.
[0073] In the cleaning step 104 and the mask removal step 105, the cleaning device 60 rotates the table 61 about its axis, as shown in FIG. 16 , and sprays cleaning water 64 toward the wafer 1 while swinging a cleaning water nozzle 63 below the table 61 in the radial direction of the wafer 1. In the cleaning step 104 and the mask removal step 105, the cleaning device 60 peels the filler residue 22 from the tape 11 on the groove bottom 8 of the division groove 7, removes the filler residue 22 from the wafer unit 14, and divides the die attach layer 20 into individual chips 10. Thus, in the modified example, in the cleaning step 104, the cleaning water 64 is sprayed toward the front surface 3 of the wafer 1 while the front surface 3 of the wafer 1 of the wafer unit 14 faces downward. Therefore, in the modified example, in the cleaning step 104 and the mask removal step, the filler residue 22 removed from the wafer unit 14 falls downward. In the cleaning step 104 and the mask removal step 105, the cleaning device 60 removes the protective film 13 from the front surface 3 of the wafer 1 with cleaning water 64, as in the first embodiment, and dries the front surface 3 side of the wafer 1.
[0074] Furthermore, in the present invention, in cleaning step 104 of the manufacturing method according to the modified example of embodiment 1, cleaning device 60 may move wafer 1 held by suction on holding surface 62 and cleaning water nozzle 63 below table 61 relatively along division grooves 7 formed on division lines 4, while spraying cleaning water 64 from cleaning water nozzle 63 toward groove bottoms 8 of division grooves 7, thereby peeling filler residue 22 from tape 11 at groove bottoms 8 of division grooves 7 and removing filler residue 22 from wafer unit 14, and dividing die attach layer 20 into individual chips 10. In this case, in mask removal step 105, cleaning device 60 may rotate spinner table 31 about its axis while moving cleaning water nozzle 63 along holding surface 62 below wafer 1, while spraying cleaning water 64 from cleaning water nozzle 63 toward front surface 3 of wafer 1, desirably removing protective film 13 from the front surface of wafer 1 with cleaning water 64 and drying front surface 3 of wafer 1, as in embodiment 1.
[0075] In the manufacturing method according to the modified example, die attach layer 20 is plasma etched with a second gas made of an oxygen-based gas, and then in cleaning step 104, cleaning water 64, which is a fluid, is sprayed onto filler residue 22 to peel this filler residue 22 from tape 11 and remove it from wafer unit 14. As a result, similar to embodiment 1, in cleaning step 104, the manufacturing method according to the modified example can divide die attach layer 20 along planned division lines 4 to manufacture chips 10 on which die attach layer 20 is laminated, thereby achieving the effect of suppressing an increase in the number of work steps required to manufacture chips 10 on which die attach layer 20 is laminated.
[0076] Furthermore, in the manufacturing method according to the modified example, in the cleaning step 104, cleaning water 64 is sprayed toward the surface 3 of the wafer 1 while the surface 3 of the wafer 1 of the wafer unit 14 faces downward, so that the filler residue 22 removed from the wafer unit 14 falls downward. As a result, the manufacturing method according to the modified example can suppress the risk of the filler residue 22 adhering to the surface 3 of the wafer 1, i.e., the chips 10, and can also suppress the risk of the filler residue 22 damaging the surface 3 of the wafer 1, i.e., the chips 10.
[0077] The present invention is not limited to the above-described embodiment. In other words, various modifications can be made without departing from the gist of the present invention. For example, in the present invention, in the wafer processing step 102 and the die-attach layer processing step 103, instead of applying high-frequency power to the chuck table 52 and the upper electrode 53 (the lower electrode) to generate plasma from the first gas and the second gas in the processing space 511, a remote plasma type plasma etching apparatus may be used in which the plasma-generated first gas and the second gas are introduced into the processing space 511 in the chamber 51. [Explanation of symbols]
[0078] 1 wafer 3 surface 4 Planned division line 5 Devices 10 chips 11 Tape 12 Annular frame 13 Protective film (protective material) 14 wafer unit 20 Die attach layer 21 Filler 22 Filler residue 64 Cleaning water (fluid) 101 Preparation Steps 102 Wafer Processing Steps 103 Die attach layer processing step 104 Wash Steps
Claims
1. A manufacturing method for manufacturing a chip on which a die attach layer containing a resin and a filler is laminated, comprising: a preparation step of preparing a wafer unit in which a wafer having devices formed in each area partitioned by a plurality of intersecting planned division lines on its surface is attached to a tape via a die attach layer containing a filler, the tape is attached to an annular frame, the devices are protected by a protective member, and the wafer surface is exposed along the planned division lines; a wafer processing step of supplying a first gas to the wafer unit and performing plasma etching from the front surface side of the wafer to divide the wafer along the planned division lines and expose the die attach layer; a die attach layer processing step of supplying a second gas to the wafer unit after the wafer processing step, and plasma etching the die attach layer from the front surface side of the wafer to plasma etch the resin of the die attach layer; a cleaning step of spraying a fluid onto the surface of the wafer unit after the die-attach layer processing step to remove filler residue remaining in the die-attach layer processing step from the wafer unit along the planned dividing line; In the cleaning step, the wafer and a nozzle are moved relatively along a division groove formed on the planned division line while the fluid is sprayed from the nozzle toward the bottom of the division groove, so that the fluid is sprayed along the planned division line.
2. A manufacturing method for manufacturing a chip having a die attach layer stacked thereon, comprising: a preparation step of preparing a wafer unit in which a wafer having devices formed in each area partitioned by a plurality of intersecting planned division lines on its surface is attached to a tape via a die attach layer containing a filler, the tape is attached to an annular frame, the devices are protected by a protective member, and the wafer surface is exposed along the planned division lines; a wafer processing step of supplying a first gas to the wafer unit and performing plasma etching from the front surface side of the wafer to divide the wafer along the planned division lines and expose the die attach layer; a die attach layer processing step of supplying a second gas to the wafer unit after the wafer processing step is performed, and performing plasma etching on the die attach layer from the front surface side of the wafer; a cleaning step of spraying a fluid onto the surface of the wafer unit after the die-attach layer processing step to remove filler residue remaining in the die-attach layer processing step from the wafer unit along the planned dividing line; In the cleaning step, a fluid is sprayed toward the surface of the wafer in the wafer unit with the surface facing downward.
Citation Information
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