Wired circuit board and method of manufacturing the same

Abstract

To provide a wiring circuit board comprising a conduction section having high adhesiveness and high connection reliability, and a manufacturing method thereof.SOLUTION: A wiring circuit board 1 comprises: an insulation layer 2 including a via 20 penetrating in a thickness direction; a first conductor layer 3 disposed on one surface 27 of the insulation layer 2 in the thickness direction; a second conductor layer 4 disposed on another surface 28 of the insulation layer 2 in the thickness direction; and a conduction section 5 which is disposed on an inner side face 25 of the via 20 and electrically connects the first conductor layer 3 and the second conductor layer 4. A length L measured as follows is 1 μm or longer and 10 μm or shorter. In a cross-sectional view, for the length L, a line segment S is drawn, the line segment connecting a first connection point C1 where the one surface 27 of the insulation layer 2 is connected with the inner side face 25 in the thickness direction and a second connection point C2 where the other surface 28 of the insulation layer 2 is connected with the inner side face 25 in the thickness direction. In the cross-sectional view, an outermost position P separated most outside from the line segment S is identified on the inner side face 25. The length L is measured as a shortest distance from the line segment S to the outermost position P.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a printed circuit board and a method for manufacturing the same. [Background technology]

[0002] There is known a wired circuit board having a first conductor layer, an insulating layer, and a second conductor layer arranged in that order in the thickness direction (see, for example, Patent Document 1 below). In the wired circuit board described in Patent Document 1, the insulating layer has a blind via. The wired circuit board further includes a conductive portion. The conductive portion is arranged on an inner surface of the insulating layer facing the blind via. In the wired circuit board, the first conductor layer and the second conductor layer are electrically connected by the conductive portion. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-123851 Summary of the Invention [Problem to be solved by the invention]

[0004] In wired circuit boards, high adhesion to the inner surfaces of conductive parts is required, and high connection reliability of the conductive parts is also required.

[0005] However, the wired circuit board described in Patent Document 1 may not satisfy the above-mentioned requirements.

[0006] The present invention provides a wired circuit board having conductive parts with high adhesion and high connection reliability, and a method for manufacturing the same. [Means for solving the problem]

[0007] The present invention (1) includes a wired circuit board comprising an insulating layer having a via penetrating in a thickness direction, a first conductor layer disposed on one side of the insulating layer in the thickness direction, a second conductor layer disposed on the other side of the insulating layer in the thickness direction, and a conductive portion disposed on an inner surface of the via and electrically connecting the first conductor layer and the second conductor layer, wherein the length L measured as described below is 1 μm or more and 10 μm or less.

[0008] Length L: In a cross-sectional view, a line segment S is drawn connecting a first connection point C1 where the one surface of the insulating layer and the inner surface in the thickness direction are connected, and a second connection point C2 where the other surface of the insulating layer and the inner surface in the thickness direction are connected. In a cross-sectional view, an outermost position P that is the furthest from the line segment S on the inner surface is identified. The length L is measured as the shortest distance from the line segment S to the outermost position P.

[0009] In this wired circuit board, the length L is 1 μm or more, and therefore, due to the high anchor effect on the inner surface of the conductive part, the adhesiveness to the inner surface of the conductive part is excellent.

[0010] In this wired circuit board, since the length L is 10 μm or less, defective formation of the conductive portion is suppressed, and therefore the connection reliability of the conductive portion to the first conductive layer and the second conductive layer is excellent.

[0011] The present invention (2) includes the wired circuit board according to (1), in which the insulating layer includes a porous insulating layer.

[0012] In this wired circuit board, the insulating layer includes a porous insulating layer, so that the length L can be reliably set to 1 μm or more.

[0013] The present invention (3) includes the wired circuit board according to (1) or (2), wherein the inner surface has a tapered shape when viewed macroscopically in cross section.

[0014] In this wired circuit board, the inner side surface has a tapered shape when viewed macroscopically in cross section, which further reduces the possibility of poor formation of the conductive portion.

[0015] The present invention (4) is a method for manufacturing a wired circuit board according to any one of (1) to (3), comprising the steps of: preparing a laminate including a second conductor layer, an insulating layer, and an underlying conductor layer; irradiating the laminate with a laser from one side in the thickness direction to form vias in the underlying conductor layer and the insulating layer; and forming an additional conductor layer on the one surface of the laminate and forming a conductive portion on an inner surface of the via, wherein the step of forming the vias is performed using a laser beam of 1 J / cm 2 Above, 20J / cm 2 The present invention includes a method for manufacturing a printed circuit board, which includes a step of irradiating a laser with the following energy density.

[0016] According to this manufacturing method, the via formation step is performed at 1 J / cm 2 Above, 20J / cm 2 Since the method includes a step of irradiating a laser with the following energy density, it is possible to control the length L on the inner surface to 10 μm or less while improving manufacturing efficiency.

[0017] The present invention (5) includes the method for manufacturing a wired circuit board according to (4), wherein in the step of forming the via, the laser is rotated from the inside to the outside within the region where the via is to be formed, when viewed in the thickness direction.

[0018] According to this method, the laser is rotated from the inside to the outside, which makes it easy to form a tapered shape on the inner surface.

[0019] The present invention (6) includes the method for manufacturing a wired circuit board according to (4) or (5), wherein in the step of preparing the laminate, the insulating layer comprises an adhesive insulating layer and a porous insulating layer in that order in the thickness direction. [Effects of the Invention]

[0020] The wired circuit board and the method for producing the same of the present invention are provided with conductive parts having high adhesion and high connection reliability. [Brief explanation of the drawings]

[0021] [Figure 1] FIG. 1 is a cross-sectional view of one embodiment of the wired circuit board of the present invention. [Figure 2] Figures 2A and 2B are both plan views of the printed circuit board shown in Figure 1. Figure 2A shows a mode in which a laser is rotated from the inside to the outside in a region where a via is to be formed. Figure 2B shows a mode in which a laser is rotated from the outside to the inside in a region where a via is to be formed. [Figure 3] FIG. 3 is a cross-sectional view of the inner surface viewed macroscopically. [Figure 4] 4A to 4C are diagrams showing the manufacturing process of the printed circuit board shown in FIG. 4A shows a process of preparing a laminate, FIG. 4B shows a process of forming vias, and FIG. 4C shows a process of forming an additional conductor layer and a conductive portion. [Figure 5] FIG. 5 is a cross-sectional view of the first modified example. [Figure 6] FIG. 6 is a cross-sectional view of the second modified example. [Figure 7] FIG. 7 is an image-processed SEM photograph of the inner surface of Example 1. DETAILED DESCRIPTION OF THE INVENTION

[0022] 1. Wired circuit board 1 One embodiment of the wired circuit board of the present invention will be described with reference to Figs. 1 to 4C. As shown in Fig. 1, the wired circuit board 1 has a sheet shape. The wired circuit board 1 has a thickness. The wired circuit board 1 extends in a planar direction. The planar direction is perpendicular to the thickness direction. The wired circuit board 1 includes an insulating layer 2, a first conductor layer 3, a second conductor layer 4, and a conductive portion 5.

[0023] 1.2 Insulating layer 2 The insulating layer 2 has a sheet shape. The insulating layer 2 extends in the plane direction. The insulating layer 2 has the same outer shape in a plan view as the wired circuit board 1. The insulating layer 2 has one surface 27 and another surface 28 that face each other in the thickness direction. The one surface 27 and the other surface 28 are each flat. The other surface 28 is parallel to the one surface 27.

[0024] The material of the insulating layer 2 may be a resin. Examples of the resin include polyimide resin, fluororesin, and liquid crystal polymer. The resin includes an adhesive. Examples of the adhesive include acrylic adhesive, epoxy adhesive, and silicone adhesive. These may be used alone or in combination. The thickness of the insulating layer 2 is, for example, 2 μm or more, preferably 5 μm or more, and, for example, 1,000 μm or less, preferably 500 μm or less.

[0025] The insulating layer 2 includes, in order toward one side in the thickness direction, an adhesive insulating layer 21 and a porous insulating layer 22. In this embodiment, the insulating layer 2 preferably includes only the adhesive insulating layer 21 and the porous insulating layer 22.

[0026] 1.2.1 Adhesive insulating layer 21 The adhesive insulating layer 21 is the other side portion of the insulating layer 2 in the thickness direction. The adhesive insulating layer 21 forms the other surface 28 of the insulating layer 2. The adhesive insulating layer 21 is dense and not porous. The adhesive insulating layer 21 bonds the porous insulating layer 22 and the second conductor layer 4. The material of the adhesive insulating layer 21 is, for example, the adhesive described above. The thickness of the adhesive insulating layer 21 is, for example, 2 μm or more, preferably 5 μm or more, and for example, 50 μm or less, preferably 25 μm or less. The ratio of the thickness of the adhesive insulating layer 21 to the thickness of the insulating layer 2 is, for example, 1% or more, preferably 3% or more, and for example, 70% or less, preferably 50% or less. The material and physical properties of the adhesive insulating layer 21 are described in JP 2020-049905 A.

[0027] 1.2.2 Porous insulating layer 22 The porous insulating layer 22 is one side portion of the insulating layer 2 in the thickness direction. The porous insulating layer 22 forms one surface 27 of the insulating layer 2. The porous insulating layer 22 is disposed on one surface of the adhesive insulating layer 21 in the thickness direction. Specifically, the porous insulating layer 22 is in contact with the entire one surface of the adhesive insulating layer 21 in the thickness direction. The porous insulating layer 22 has a large number of fine pores (air pores). The thickness of the porous insulating layer 22 is, for example, 2 μm or more, preferably 5 μm or more, and for example, 1,000 μm or less, preferably 500 μm or less. The ratio of the thickness of the porous insulating layer 22 to the thickness of the insulating layer 2 is, for example, 20% or more, preferably 50% or more, and for example, 95% or less, preferably 90% or less. The ratio of the thickness of the porous insulating layer 22 to the thickness of the adhesive insulating layer 21 is, for example, 0.5 or more, preferably 1 or more, and for example, 50 or less, preferably 20 or less. Examples of materials for the porous insulating layer 22 include the resins described above. The average pore size in the porous insulating layer 22 is, for example, 10 μm or less, or for example, 0.1 μm or more. The porosity of the porous insulating layer 22 is, for example, 60% or more, preferably 70% or more, and for example, 99% or less, preferably 90% or less. The material and physical properties of the porous insulating layer 22 are described in JP 2018-021171 A and JP 2020-049905 A.

[0028] The insulating layer 2 including the adhesive insulating layer 21 and the porous insulating layer 22 described above is described in Japanese Patent Application Laid-Open No. 2020-049905.

[0029] 1.2.3 Via 20 The insulating layer 2 further includes a via 20. One or more vias 20 are provided in the insulating layer 2. The via 20 penetrates the insulating layer 2 in the thickness direction. The via 20 also penetrates the first conductor layer 3. On the other hand, the via 20 does not penetrate the second conductor layer 4. The via 20 is visible from one side in the thickness direction and invisible from the other side. Therefore, the via 20 is called a blind via. As shown by the dashed lines in Figures 2A and 2B, in this embodiment, the via 20 has a substantially circular shape when viewed from one side in the thickness direction. As shown in Figure 1, the insulating layer 2 has an inner surface 25 facing the via 20. The inner surface 25 will be described later.

[0030] 1.3 First Conductor Layer 3 The first conductor layer 3 is disposed on one surface of the insulating layer 2 in the thickness direction. The first conductor layer 3 contacts the entire one surface of the insulating layer 2 in the thickness direction. Examples of materials for the first conductor layer 3 include metals, and preferably copper. The thickness of the first conductor layer 3 is, for example, 0.1 μm or more, preferably 1 μm or more, and for example, 100 μm or less, preferably 50 μm or less. The first conductor layer 3 is described in JP 2020-049905 A.

[0031] 1.4 Second Conductor Layer 4 The second conductor layer 4 is disposed on the other surface of the insulating layer 2 in the thickness direction. The second conductor layer 4 contacts the entire other surface of the insulating layer 2 in the thickness direction. Furthermore, the second conductor layer 4 blocks the lower ends of the vias 20 in the insulating layer 2. The material of the second conductor layer 4 is, for example, the same as the material of the first conductor layer 3, specifically copper. The thickness of the second conductor layer 4 is, for example, 0.1 μm or more, preferably 1 μm or more, and, for example, 100 μm or less, preferably 50 μm or less. The second conductor layer 4 is described in JP 2020-049905 A.

[0032] 1.5 Conductive part 5 The conductive portion 5 is disposed inside the via 20. More specifically, the conductive portion 5 is disposed on an inner surface 25 of the insulating layer 2 facing the via 20. The conductive portion 5 is continuous with a portion of the first conductor layer 3 facing one end of the via 20 in the thickness direction and with a peripheral end of a portion of the second conductor layer 4 that blocks the via 20. In other words, the conductive portion 5 is continuous with the first conductor layer 3 and the second conductor layer 4. This allows the conductive portion 5 to electrically connect the first conductor layer 3 and the second conductor layer 4. The conductive portion 5 has a film shape that conforms to the inner surface 25. The material of the conductive portion 5 is, for example, the same as the material of the first conductor layer 3, and specifically includes copper.

[0033] 1.6 Inner surface 25 The inner surface 25 has, for example, a finely uneven shape. The uneven shape is formed, for example, by the physical properties of the insulating layer 2 (for example, the fine pores in the porous insulating layer 22) and the manufacturing method of the wired circuit board 1. The length L1 of the inner surface 25, measured as follows, is 1 μm or more and 10 μm or less.

[0034] Length L: In a cross-sectional view, a line segment S is drawn connecting a first connection point C1 where one surface 27 of the insulating layer 2 in the thickness direction is connected to the inner surface 25, and a second connection point C2 where the other surface 28 of the insulating layer 2 in the thickness direction is connected to the inner surface 25. In a cross-sectional view, an outermost position P that is the furthest from the line segment S on the inner surface 25 is identified. The length L is measured as the shortest distance from the line segment S to the outermost position P.

[0035] If the length L1 is less than 1 μm, the anchor effect on the inner surface 25 of the conductive portion 5 is low, and therefore the adhesiveness of the conductive portion 5 to the inner surface 25 is low.

[0036] If the length L1 exceeds 10 μm, the conductive portion 5 is likely to be poorly formed in the manufacturing method described below, and the connection reliability of the conductive portion 5 to the first conductive layer 3 and the second conductive layer 4 will be low.

[0037] The length L1 is preferably 2 μm or more, more preferably 4 μm or more, and even more preferably 5 μm or more. When the length L1 is equal to or greater than the above-mentioned lower limit, the anchor effect on the inner surface 25 of the conductive portion 5 is enhanced, thereby further improving the adhesion of the conductive portion 5 to the inner surface 25.

[0038] The length L1 is preferably 9 μm or less, more preferably 8 μm or less, and even more preferably 7 μm or less. When the length L1 is equal to or less than the above-mentioned upper limit, defective formation of the conductive portion 5 in the manufacturing method is further suppressed, and the connection reliability of the conductive portion 5 to the first conductor layer 3 and the second conductor layer 4 can be further improved.

[0039] The length L1 is adjusted by the average pore size and porosity of the porous insulating layer 22 and / or the irradiation conditions of the laser (described later).

[0040] In this embodiment, the outermost position P is preferably present in the porous insulating layer 22 .

[0041] The cross-sectional view is performed by observing an image processed SEM photograph, for example, as shown in FIG.

[0042] As shown in Fig. 3, the inner surface 25 has a tapered shape when viewed macroscopically in cross section. "Viewed macroscopically" means that the above-described irregularities are smoothed out to roughly grasp the shape of the inner surface 25. In the tapered shape described above, when the cross section is viewed macroscopically, the opening area gradually increases toward one side in the thickness direction.

[0043] 1.7 Manufacturing method of the wired circuit board 1 Next, a description will be given of a method for manufacturing the wired circuit board 1. The method for manufacturing the wired circuit board 1 includes the steps of preparing the laminate 6, forming the vias 20, and forming the conductive parts 5, in that order.

[0044] 1.7.1 Step of Preparing the Laminate 6 As shown in FIG. 4A, the laminate 6 includes a second conductor layer 4, an insulating layer 2, and an underlying conductor layer 31, arranged in this order toward one side in the thickness direction. The insulating layer 2 in the laminate 6 does not yet have vias 20 (see FIG. 1). The underlying conductor layer 31 is disposed on one side of the insulating layer 2 in the thickness direction. The underlying conductor layer 31 corresponds to the other side portion of the first conductor layer 3 in the thickness direction. In this embodiment, the underlying conductor layer 31 is a base for forming an additional conductor layer 32 (described below, see FIG. 4C) by plating. The laminate 6 and a method for preparing it are described in JP 2020-049905 A.

[0045] 1.7.2 Process for forming vias 20 As shown in FIG. 4B, the laminate 6 is then irradiated with a laser from one side in the thickness direction to form vias 20 in the underlying conductor layer 31 and the insulating layer 2.

[0046] Examples of the laser include a YAG laser and a carbon dioxide laser. The laser irradiation step may be single or multiple, and is preferably two from the viewpoints of high manufacturing efficiency and improving the shape of the via 20. That is, the step of forming the via 20 includes a first irradiation step and a second irradiation step in this order. In both the first irradiation step and the second irradiation step, the laminate 6 is irradiated with a laser.

[0047] The energy density in the first irradiation step is, for example, 1 J / cm 2 More than 10 J / cm 2 or more, and for example, 20 J / cm 2 Less than 18 J / cm, preferably 18 J / cm 2 If the energy density in the first irradiation step is equal to or greater than the above-mentioned lower limit, the manufacturing efficiency can be improved. If the energy density in the first irradiation step is equal to or less than the above-mentioned upper limit, the length L can be controlled to be equal to or less than the above-mentioned upper limit, and further, the via 20 can be made tapered.

[0048] The energy density in the second irradiation step is, for example, lower than the energy density in the first irradiation step. By making the energy density in the second irradiation step lower than the energy density in the first irradiation step, the insulating layer 2 can be removed while leaving the underlying conductor layer 31.

[0049] Specifically, the ratio of the energy density in the second irradiation step to the energy density in the first irradiation step is, for example, 0.01 or more, preferably 0.02 or more, and for example, 0.4 or less, preferably 0.1 or less. Specifically, the energy density in the second irradiation step is, for example, 0.01 J / cm 2 or more, and for example, 0.1 J / cm 2 The following is the result.

[0050] In the process of forming the via 20, two irradiation methods are used: an irradiation method in which the laser rotates from the inside to the outside within the region where the via 20 is to be formed, as shown by the arrows in FIG. 2A , and an irradiation method in which the laser rotates from the outside to the inside, as shown by the arrows in FIG. 2B . The number of rotations is multiple. Preferably, the laser rotates from the inside to the outside within the region where the via 20 is to be formed, as shown by the arrows in FIG. 2A . With this irradiation method, the spot with the highest energy during laser irradiation exists on the wall surface of the via 20 for a long period of time during the first half of the irradiation time, so the inner surface 25 can be tapered when viewed macroscopically in cross section. On the other hand, if the laser rotates from the outside to the inside, as shown by the arrows in FIG. 2B , leakage light during laser irradiation in the area inside the portion that will become the inner surface 25 of the via 20 also affects the above-mentioned portion, and the inner surface 25 may have a shape in which the middle portion in the thickness direction bulges outward, as in the first modified example described below.

[0051] 4B, this step results in the formation of vias 20 in the underlying conductor layer 31 and the insulating layer 2. On the other hand, no vias 20 are formed in the second conductor layer 4.

[0052] 1.7.3 Step of forming the conductive portion 5 Next, as shown in FIG. 4C, an additional conductor layer 32 is formed on one surface of the laminate 6 in the thickness direction, and a conductive portion 5 is formed on the inner surface 25 of the via 20.

[0053] The additional conductor layer 32 corresponds to one side portion of the first conductor layer 3 in the thickness direction. The additional conductor layer 32 is added to the underlying conductor layer 31 to form the first conductor layer 3. In this step, for example, plating or sputtering is performed, and preferably plating is performed. By this step, the additional conductor layer 32 and the conductive portion 5 are simultaneously formed. Note that the additional conductor layer 32 is also added to a portion of the second conductor layer 4 that closes the lower end of the via 20. If the additional conductor layer 32 and the underlying conductor layer 31 are made of the same material, the boundary between them becomes unclear.

[0054] The conductive portion 5 penetrates into the uneven portion of the inner surface 25 and exerts an anchor effect on the inner surface 25 .

[0055] 2. Effects of one embodiment In this wired circuit board 1, the length L is 1 μm or more, and therefore the conductive portion 5 has a high anchor effect on the inner surface 25 thereof, resulting in excellent adhesion to the inner surface 25 thereof.

[0056] In this wired circuit board 1, the length L is 10 μm or less, which suppresses defective formation of the conductive portion 5, resulting in excellent connection reliability of the conductive portion 5 to the first conductive layer 3 and the second conductive layer 4. Defective formation of the conductive portion 5 includes cracks and / or voids.

[0057] In this wired circuit board 1, the insulating layer 2 includes the porous insulating layer 22, so that the length L can be reliably set to 1 μm or more.

[0058] As shown in FIG. 3, in this wired circuit board 1, the inner side surface 25 has a tapered shape when viewed macroscopically in cross section, so that poor formation of the conductive portion 5 can be further suppressed.

[0059] According to this manufacturing method, the step of forming the via 20 is performed at 1 J / cm 2 Above, 20J / cm 2 Since the method includes the first irradiation step of irradiating with a laser at the following energy density, the length L on the inner surface 25 can be controlled to 10 μm or less while improving manufacturing efficiency.

[0060] 3. Variations In the modified example, the same components and steps as those in the first embodiment are denoted by the same reference numerals, and detailed descriptions thereof will be omitted. Furthermore, the modified example can achieve the same effects as those in the first embodiment unless otherwise specified. Furthermore, the first embodiment and its modified example can be combined as appropriate.

[0061] 3.1 First Modification 5, when viewed macroscopically in cross section, the inner surface 25 has a middle portion in the thickness direction that bulges outward, so that the via 20 has a generally pot-like cross section.

[0062] 3, in the embodiment, the inner surface 25 has a tapered shape when viewed macroscopically in cross section, and therefore, the conductive portion 5 can be stably formed as a uniform film by plating, for example.

[0063] 3.2 Second Modification As shown in FIG. 6, the insulating layer 2 includes a porous insulating layer 22 and an adhesive insulating layer 21 in this order toward one side in the thickness direction.

[0064] 3.3 Third Modification Although not shown, the insulating layer 2 includes only the porous insulating layer 22 .

[0065] 3.4 Fourth Variant Although not shown, the insulating layer 2 includes an adhesive insulating layer 21 (see FIG. 1), a porous insulating layer 22, and another adhesive insulating layer 21 (see FIG. 6) in this order toward one side in the thickness direction.

[0066] 3.5 Fifth Variant A skin layer (not shown) may be provided on one or both of the one and other surfaces of the porous insulating layer 22. The skin layer is smooth. The skin layer is a non-porous layer. When a skin layer is provided only on the other surface of the porous insulating layer 22, the insulating layer 2 includes an adhesive insulating layer 21, a skin layer (not shown), and a porous insulating layer 22, in that order toward one side in the thickness direction. [Example]

[0067] The present invention will be described in more detail below with reference to examples and comparative examples. It should be noted that the present invention is in no way limited to these examples and comparative examples. The specific numerical values ​​of the blending ratios (content ratios), physical property values, parameters, etc. used in the following description can be replaced with the corresponding upper limit values ​​(numeric values ​​defined as "equal to or less than" or "less than") or lower limit values ​​(numeric values ​​defined as "equal to or greater than" or "exceeding") of the blending ratios (content ratios), physical property values, parameters, etc. described in the "Description of the Invention" above.

[0068] Example 1 As shown in FIG. 4A, a laminate 6 was prepared according to the description in JP 2020-049905 A. The laminate 6 includes a second conductor layer 4, an insulating layer 2, and an underlying conductor layer 31. The second conductor layer 4 is 18 μm thick and made of copper. The insulating layer 2 includes an adhesive insulating layer 21 that is 20 μm thick and a porous insulating layer 22 that is 45 μm thick. The porous insulating layer 22 is made of polyimide resin, has an average pore diameter of 4.5 μm, and a porosity of 75%. The underlying conductor layer 31 is 18 μm thick and made of copper.

[0069] As shown in FIG. 4B, the laminate 6 was irradiated with a YAG laser from one side in the thickness direction to form vias 20 in the underlying conductor layer 31 and the insulating layer 2. The number of vias 20 was multiple. The energy density of the laser in the first irradiation step was 17.2 J / cm. 2 The laser energy density in the second irradiation step was 0.05 J / cm 2That was all. When viewed in the thickness direction, the laser was rotated from the inside to the outside within the region where via 20 was to be formed, as shown by the arrow in Fig. 2A. As shown in Fig. 3, inner surface 25 had a tapered shape when viewed macroscopically in cross section.

[0070] As shown in FIG. 4C, next, an additional conductor layer 32 was formed on one surface of the laminate 6 in the thickness direction, and conductive portions 5 were formed on the inner surfaces 25 of the vias 20. In this step, copper plating was performed. The thickness of the additional conductor layer 32 was 6 μm. Therefore, the thickness of the first conductor layer 3 was 24 μm.

[0071] As shown in FIG. 1, a wired circuit board 1 including an insulating layer 2, a first conductor layer 3, a second conductor layer 4, and a conductive portion 5 was thus manufactured.

[0072] Example 2, Comparative Example 2, Comparative Example 3 A wired circuit board 1 was produced in the same manner as in Example 1. However, as shown in Table 1, the conditions for the first irradiation step were changed.

[0073] Comparative Example 1 A wired circuit board 1 was manufactured in the same manner as in Example 1. However, the insulating layer 2 included only a dense polyimide sheet. As shown in Fig. 2B, when viewed in the thickness direction, the laser was rotated from the outside to the inside in the region where the via 20 was to be formed, as indicated by the arrow in Fig. 2A.

[0074] <Measurement> Cross-sectional SEM photographs were taken of the inner surface 25 of each of the wired circuit boards 1 of Examples 1 and 2 and Comparative Examples 1 to 3, and image-processed diagrams were obtained to measure the above-mentioned length L. The results are shown in Table 1. Also, an image-processed diagram of the cross-sectional SEM photograph of Example 1 is shown in FIG.

[0075] <Evaluation of connection reliability of conductive portion 5> A thermal shock test was carried out on the wired circuit boards 1 of Examples 1 and 2 and Comparative Examples 1 to 3 to evaluate the connection reliability of the conductive portions 5. In the thermal shock test, the wired circuit boards 1 were alternately immersed in two liquid baths. The temperature of one liquid bath was -65°C. The temperature of the other liquid bath was 150°C. The time for immersing the wired circuit board 1 in one liquid bath was 5 minutes. A cycle of immersion in each of the two liquid baths was carried out 1,000 times.

[0076] Thereafter, a cross-section of each of the ten conductive parts 5 was observed using an SEM. The connection reliability of the conductive parts 5 was evaluated according to the following criteria. The results are shown in Table 1.

[0077] ◯: Not a single crack or void was found in any of the 10 conductive portions 5. △: One crack or one void was observed. ×: Cracks and voids were observed, and the total number of cracks and voids was two or more.

[0078] [Table 1] [Explanation of symbols]

[0079] 1 Wiring circuit board 2. Insulation layer 3 First conductor layer 4 Second conductor layer 5 Conductive part 20 Beer 22 Porous insulating layer 25 Inner surface 27 One side 28 Other side 31 Undercoat conductor layer 32 Additional conductor layer C1 First connection point C2 Second connection point P1 outermost position S line segment

Claims

1. an insulating layer having a via penetrating through the thickness direction; a first conductor layer disposed on one surface of the insulating layer in the thickness direction; a second conductor layer disposed on the other surface of the insulating layer in the thickness direction; a conductive portion disposed on an inner surface of the via and electrically connecting the first conductor layer and the second conductor layer; the insulating layer is a multi-layer structure including a porous insulating layer; The length L measured as follows is 1 μm or more and 10 μm or less, A wired circuit board in which an outermost position P specified below is present in the porous insulating layer. Length L: In a cross-sectional view, a line segment S is drawn connecting a first connection point C1 where the one surface of the insulating layer and the inner surface in the thickness direction are connected, and a second connection point C2 where the other surface of the insulating layer and the inner surface in the thickness direction are connected. In a cross-sectional view, an outermost position P on the inner surface that is the furthest from the line segment S is identified. The length L is measured as the shortest distance from the line segment S to the outermost position P.

2. The printed circuit board according to claim 1 , wherein the insulating layer comprises an adhesive insulating layer and the porous insulating layer in that order in the thickness direction.

3. 3. The wired circuit board according to claim 1, wherein the inner surface has a tapered shape when viewed macroscopically in cross section.

4. A wired circuit board described in any one of claims 1 to 3, wherein the ratio of the thickness of the porous insulating layer to the thickness of the insulating layer is 20% or more and 95% or less.

5. The average pore diameter in the porous insulating layer is 0.1 μm or more and 10 μm or less, 5. The wired circuit board according to claim 1, wherein the porous insulating layer has a porosity of 60% or more.

6. A method for producing the wired circuit board according to any one of claims 1 to 5, preparing a laminate including a second conductor layer, an insulating layer, and an underlying conductor layer; a step of irradiating the laminate with a laser from one side in the thickness direction to form vias in the underlying conductor layer and the insulating layer; forming an additional conductor layer on the one surface of the laminate and forming a conductive portion on an inner surface of the via; The step of forming the vias is performed at 1 J / cm ２ Above, 20J / cm ２ A method for manufacturing a printed circuit board, comprising the step of irradiating a laser with the following energy density.

7. 7. The method for manufacturing a wired circuit board according to claim 6, wherein in the step of forming the via, the laser is rotated from the inside to the outside within a region where the via is to be formed, as viewed in the thickness direction.

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