Deriving foundry manufacturing models from performance measurements of fabricated devices.

The reverse design process optimizes photonic device manufacturing models through iterative gradient-based optimization and first-principles simulation, addressing manufacturing deviations to enhance optical fiber communication efficiency.

JP7814519B2Active Publication Date: 2026-02-16X DEVELOPMENT LLC
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Patent Information

Application Number
JP2024535577
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-12-15
Filing Date
2022-08-23
Publication Date
2026-02-16
Estimated Expiration
2042-08-23

AI Technical Summary

Technical Problem

Manufacturing processes for photonic devices, such as optical multiplexers and demultiplexers, often result in devices that deviate from the intended design due to manufacturing system intricacies, leading to inefficiencies in using available bandwidth in optical fiber communications.

Method used

A reverse design process is employed using a non-transitory computer-readable medium to derive a manufacturing model by determining test designs, measuring as-manufactured performance, optimizing designs with loss functions, and storing optimized models for new device designs, incorporating iterative gradient-based optimization and first-principles simulation.

Benefits of technology

This approach allows for the optimization of photonic device designs to achieve nearly unlimited design parameters, ensuring manufacturability and performance within a given area, thereby enhancing the efficiency of optical fiber communication systems.

✦ Generated by Eureka AI based on patent content.

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Abstract

The aim is to optimise the manufacturing model. In some embodiments, a non-transitory computer-readable medium is provided having logic stored thereon that, in response to execution by one or more processors of a computing system, causes the computing system to perform actions to derive a manufacturing model for a manufacturing system using a reverse design process. The actions include determining a test design for a test physical device, measuring performance of instances of the test physical device manufactured by the manufacturing system using the test design to determine as-manufactured performance metrics, optimizing the test design using a first loss function based on differences between simulated performance metrics and as-manufactured performance metrics of the test design to determine an as-manufactured design, and optimizing the manufacturing model using a second loss function based on differences between the test design and the as-manufactured design.
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Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Patent Application No. 17 / 551,514, filed December 15, 2021, the contents of which are incorporated herein by reference.

[0002] The present disclosure relates generally to the design of physical devices for manufacturing, and particularly to photonic devices, including but not limited to optical multiplexers and demultiplexers. [Background technology]

[0003] Optical fiber communications are typically used to transmit information from one location to another via light modulated to carry the information. For example, many telecommunications companies use optical fibers to transmit telephone signals, internet communications, and cable television signals. However, the cost of deploying optical fibers for optical fiber communications can be prohibitive. Therefore, technologies have been developed to more efficiently use the available bandwidth within a single optical fiber. Wavelength division multiplexing is one such technique that bundles multiple optical carrier signals onto a single optical fiber using different wavelengths. While manufacturing techniques used to create physical devices, such as photonic devices for use in these contexts, can produce complex physical structures, the manufactured physical device may differ from the physical device design due to the details of the manufacturing process implemented by a particular manufacturing system. Summary of the Invention

[0004] In some embodiments, a non-transitory computer-readable medium is provided having logic stored thereon that, when executed by one or more processors of the computing system, causes the computing system to perform actions to derive a manufacturing model for a manufacturing system using a reverse design process. The actions include determining a test design for a test physical device, measuring performance of instances of the test physical device manufactured by the manufacturing system using the test design to determine as-manufactured performance metrics, optimizing the test design using a first loss function based on differences between the simulated performance metrics and the as-manufactured performance metrics of the test design to determine an as-manufactured design, optimizing the manufacturing model using a second loss function based on differences between the test design and the as-manufactured design, and storing the optimized manufacturing model for use in optimizing a new design for a new physical device.

[0005] In some embodiments, a non-transitory computer-readable medium is provided having logic stored thereon that, when executed by one or more processors of a computing system, causes the computing system to perform actions to derive a manufacturing model for a manufacturing system using a reverse design process, including determining a test design for a test physical device, measuring performance of instances of the test physical device manufactured by the manufacturing system using the test design to determine as-manufactured performance metrics, determining structural parameters for simulation based on the test design and the manufacturing model, simulating performance of the test design using the structural parameters to determine simulated performance metrics, optimizing the manufacturing model using a loss function based on differences between the simulated performance metrics and the as-manufactured performance metrics, and storing the optimized manufacturing model for use in optimizing a new design for a new physical device. [Brief explanation of the drawings]

[0006] Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, in which like reference numerals refer to like parts throughout the various figures unless otherwise specified. Not every instance of an element is necessarily labeled, so as to avoid cluttering the figures where appropriate. The figures are not necessarily to scale, emphasis instead being placed on illustrating the principles described. To easily identify discussion of any particular element or operation, the most significant digit(s) in a reference numeral refers to the figure number in which that element is first introduced. [Figure 1] FIG. 1 is a functional block diagram illustrating a non-limiting exemplary embodiment of a system for optical communication between two optical communication devices via optical signals, in accordance with various aspects of the present disclosure. [Figure 2A] 1A-1C illustrate non-limiting exemplary embodiments of a demultiplexer and a multiplexer, respectively, according to various aspects of the present disclosure. [Figure 2B] 1A-1C illustrate non-limiting exemplary embodiments of a demultiplexer and a multiplexer, respectively, according to various aspects of the present disclosure. [Figure 2C] 1 illustrates non-limiting exemplary embodiments of distinct wavelength channels of a multi-channel optical signal in accordance with various aspects of the present disclosure. [Figure 3A] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 3B] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 3C] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 3D] 1 illustrates different views of non-limiting exemplary embodiments of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 4A]1 illustrates a more detailed cross-sectional view of a dispersion region of a non-limiting exemplary embodiment of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 4B] 1 illustrates a more detailed cross-sectional view of a dispersion region of a non-limiting exemplary embodiment of a photonic demultiplexer, in accordance with various aspects of the present disclosure. [Figure 5] FIG. 1 is a functional block diagram illustrating a non-limiting exemplary embodiment of a system for generating designs of photonic integrated circuits in accordance with various aspects of the present disclosure. [Figure 6A] 1 illustrates a non-limiting exemplary embodiment of a virtual prototype describing a photonic integrated circuit in accordance with various aspects of the present disclosure. [Figure 6B] 1 illustrates a non-limiting exemplary embodiment of a photonic integrated circuit operational simulation in accordance with various aspects of the present disclosure. [Figure 6C] 1 illustrates a non-limiting exemplary embodiment of adjoint simulation in a virtual prototype by backpropagating loss values, in accordance with various aspects of the present disclosure. [Figure 7A] 1 is a flowchart illustrating exemplary time steps for motion simulation and adjoint simulation in accordance with various aspects of the present disclosure. [Figure 7B] 10 is a chart illustrating the relationship between update operations of a motion simulation and ad joint simulation (e.g., backpropagation), according to an embodiment of the present disclosure. [Figure 8A] 8 is a flowchart illustrating a non-limiting example embodiment of a method 800 for optimizing a manufacturing model that can be used to simulate the manufacturing of a physical device, such as a photonic integrated circuit, in accordance with various aspects of the present disclosure. [Figure 8B] 8 is a flowchart illustrating a non-limiting example embodiment of a method 800 for optimizing a manufacturing model that can be used to simulate the manufacturing of a physical device, such as a photonic integrated circuit, in accordance with various aspects of the present disclosure. [Figure 9A]9 is a flowchart illustrating a non-limiting example embodiment of a method 900 for optimizing a manufacturing model that can be used to simulate the manufacturing of a physical device, such as a photonic integrated circuit, in accordance with various aspects of the present disclosure. [Figure 9B] 9 is a flowchart illustrating a non-limiting example embodiment of a method 900 for optimizing a manufacturing model that can be used to simulate the manufacturing of a physical device, such as a photonic integrated circuit, in accordance with various aspects of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0007] 1 is a functional block diagram illustrating a system 100 for optical communication (e.g., via wavelength division multiplexing or other techniques) between an optical communication device 102 and an optical communication device 120 via an optical signal 110, in accordance with various aspects of the present disclosure. More generally, the optical communication device 102 is configured to transmit information by modulating light from one or more optical sources into a multi-channel optical signal 110 (e.g., a single optical signal including multiple distinct wavelength channels), which is then transmitted from the optical communication device 102 to the optical communication device 120 via an optical fiber, light guide, waveguide, or other photonic device. The optical communication device 120 receives the multi-channel optical signal 110 and demultiplexes each of the multiple distinct wavelength channels from the multi-channel optical signal 110 to extract the transmitted information. It will be understood that in some embodiments, the optical communication device 102 and the optical communication device 120 may be separate, individual devices (e.g., an optical transceiver or transmitter is communicatively coupled to a separate optical transceiver or receiver via one or more optical fibers). However, it is understood that in other embodiments, optical communication device 102 and optical communication device 120 may be part of a single component or device (e.g., a smartphone, a tablet, a computer, an optical device, etc.) For example, optical communication device 102 and optical communication device 120 may both be components on a monolithic integrated circuit embedded within the monolithic integrated circuit and coupled to each other via a waveguide adapted to carry optical signal 110 between optical communication device 102 and optical communication device 120 or otherwise transmit optical signals between one location and another.

[0008] In the illustrated embodiment, optical communication device 102 includes a controller 104, one or more interface devices 112 (e.g., fiber optic couplers, light guides, waveguides, etc.), a multiplexer (mux), a demultiplexer (demux), or a combination thereof (MUX / DEMUX 114), one or more light sources 116 (e.g., light emitting diodes, lasers, etc.), and one or more light sensors 118 (e.g., photodiodes, phototransistors, photoresistors, etc.), coupled to each other. The controller includes one or more processors 106 (e.g., one or more central processing units, application specific circuits, field programmable gate arrays, or otherwise) and memory 108 (e.g., volatile memory such as DRAM and SAM, non-volatile memory such as ROM, flash memory, etc.). It is understood that optical communication device 120 may include the same or similar elements as optical communication device 102, which are omitted for clarity.

[0009] The controller 104 coordinates operation of the optical communication device 102 to transmit and / or receive an optical signal 110 (e.g., a multi-channel optical signal having multiple distinct wavelength channels or otherwise). The controller 104 includes software (e.g., instructions contained in a memory 108 coupled to the processor 106) and / or hardware logic (e.g., an application specific integrated circuit, a field programmable gate array, etc.) that, when executed by the controller 104, causes the controller 104 and / or the optical communication device 102 to perform operations.

[0010] In one embodiment, the controller 104 may direct the operation of the optical communication device 102 to cause the light source 116 to generate multiple distinct wavelength channels, which are multiplexed via the MUX / DEMUX 114 into a multi-channel optical signal 110, which is then transmitted via the interface device 112 to the optical communication device 120. In other words, the light source 116 may output light having different wavelengths (e.g., 1271 nm, 1291 nm, 1311 nm, 1331 nm, 1506 nm, 1514 nm, 1551 nm, 1571 nm, or another) that may be modulated or pulsed via the controller 104 to generate multiple distinct wavelength channels representing information. The multiple distinct wavelength channels are then combined or otherwise multiplexed via the MUX / DEMUX 114 into the multi-channel optical signal 110, which is transmitted via the interface device 112 to the optical communication device 120. In the same or another embodiment, the controller 104 may direct the operation of the optical communication device 102 so that multiple separate wavelength channels are demultiplexed via the MUX / DEMUX 114 from the multi-channel optical signal 110 received from the optical communication device 120 via the interface device 112.

[0011] It is understood that in some embodiments, certain elements of optical communication device 102 and / or optical communication device 120 may be omitted to avoid obscuring certain aspects of the present disclosure. For example, optical communication device 102 and optical communication device 120 may include amplification circuitry, lenses, or components to facilitate transmission and reception of optical signal 110. Furthermore, it is understood that in some embodiments, optical communication device 102 and / or optical communication device 120 may not necessarily include all elements illustrated in FIG. 1 . For example, in one embodiment, optical communication device 102 and / or optical communication device 120 are passive devices that operate as intermediate devices that may passively multiplex multiple distinct wavelength channels into and / or demultiplex multiple distinct wavelength channels from multi-channel optical signal 110.

[0012] 2A and 2B illustrate an exemplary demultiplexer 206 and multiplexer 208, respectively, in accordance with various aspects of the present disclosure. The demultiplexer 206 and multiplexer 208 are possible implementations of the MUX / DEMUX 114 illustrated in FIG. 1 and may be part of an integrated photonic circuit, a silicon photonic device, or otherwise.

[0013] 2A, the demultiplexer 206 includes an input region 202 and multiple output regions 204. The demultiplexer 206 outputs multiple distinct wavelength channels (e.g., each of λ1, λ2, λ3, ... λ N 1), to optically separate each of the plurality of distinct wavelength channels from the multi-channel optical signal 110, and to guide each of the plurality of distinct wavelength channels to a corresponding one of a plurality of output regions 204 (e.g., a plurality of waveguides that may correspond to the interface device 112 illustrated in FIG. 1). More specifically, in the illustrated embodiment, each of the output regions 204 is configured to receive a multi-channel optical signal 110 including multiple optical signals (e.g., λ1, λ2, λ3, ... λN) having center wavelengths corresponding to λ1, λ2, λ3, ... λN, respectively. N ) may be output as a demultiplexed optical signal 110. Each output region 204 may be coupled to a respective optical sensor (e.g., corresponding to optical sensor 118 illustrated in FIG. 1), which may be utilized to convert the demultiplexed optical signal from multi-channel optical signal 110 into an electrical signal for further processing.

[0014] 2B, multiplexer 208 includes a plurality of input regions 216 and an output region 210. Multiplexer 208 multiplexes a plurality of separate optical signals (e.g., λ1, λ2, λ3, ... λ N2A and 2B are configured to receive the multiplexers 206 and 208, respectively, at a respective one of a plurality of input regions 216 (e.g., a plurality of waveguides that may correspond to the interface devices 112 illustrated in FIG. 1). The multiplexers 208 are structured or otherwise configured to optically combine (i.e., multiplex) each of the plurality of distinct wavelength channels into a multi-channel optical signal 110 that is guided to an output region 210 (e.g., a waveguide that may correspond to the interface devices 112 illustrated in FIG. 1). It will be appreciated that in some embodiments, the demultiplexer 206 illustrated in FIG. 2A and the multiplexer 208 illustrated in FIG. 2B may be bidirectional, such that each device may function as both a demultiplexer and a multiplexer.

[0015] 2C illustrates exemplary distinct wavelength channels of a multi-channel optical signal (e.g., Ch. N is the multi-channel optical signal 110 illustrated in FIGS. 1, 2A, and 2B) in accordance with various aspects of the present disclosure. The exemplary channels may represent individual channels included in a plurality of distinct wavelength channels of the multi-channel optical signal that may be demultiplexed and / or multiplexed by the demultiplexer 206 of FIG. 2A and / or the multiplexer 208 of FIG. 2B. Each of the distinct wavelength channels has a different center wavelength (λ) including at least one of 1271 nm, 1291 nm, 1311 nm, 1331 nm, 1506 nm, 1514 nm, 1551 nm, or 1571 nm, or others. N2C , the distinct wavelength channels may have a channel bandwidth 212 that is approximately 13 nm wide. However, in other embodiments, the channel bandwidth may differ from 13 nm wide. Rather, the channel bandwidth may be considered a configurable parameter depending on the structure of the MUX / DEMUX 114 of FIG. 1 , the demultiplexer 206 of FIG. 2A , and / or the multiplexer 208 of FIG. 2B . For example, in some embodiments, each of the multiple distinct wavelength channels may share a common bandwidth that may correspond to 13 nm or others. Referring again to FIG. 2C , the channel bandwidth 212 may be defined as the width of the passband region 218 (i.e., defined as being between PB1 and PB2). The passband region 218 may represent the approximate power transmission of the demultiplexer or multiplexer. It is understood that in some embodiments, the passband region 218 may include ripples, as illustrated in FIG. 2C , corresponding to variations in the passband region 218. In one or more embodiments, the ripple in the passband region about the center value 214 may be + / - 2 dB or less, + / - 1 dB or less, + / - 0.5 dB or less, or other. In some embodiments, the channel bandwidth 212 may be defined by the passband region 218. In other embodiments, the channel bandwidth 212 may be defined by a threshold (e.g., dB th 2A optically separates channel N from multi-channel optical signal 110 and separates the corresponding channel bandwidth (i.e., λ ) of channel N, which is equal to the range of wavelengths above a threshold that are transmitted to output region 204 mapped to channel N. N) In the same or other embodiments, channel isolation (i.e., as defined by channel bandwidth 212) may also be considered when optimizing the design. Isolation may be defined as the ratio between the passband area 218 and the stopband area (e.g., the area less than SB1 and greater than SB2). It should be further understood that the transition band areas (e.g., the first transition area between SB1 and PB1, and the second transition area between PB2 and SB2) are exemplary and may be exaggerated for illustrative purposes. In some embodiments, optimizing the design of a photonic demultiplexer may also include target metrics such as the slope, width, etc. of the transition band areas.

[0016] 3A-3D illustrate different views of an exemplary photonic demultiplexer in accordance with one embodiment of the present disclosure. Photonic demultiplexer 316 is one possible implementation of MUX / DEMUX 114 illustrated in FIG. 1 and demultiplexer 206 illustrated in FIG. 2A. While the following discussion may be directed to photonic integrated circuits capable of demultiplexing multiple separate wavelength channels from a multi-channel optical signal, it is further understood that in other embodiments, a demultiplexer (e.g., demultiplexer 316) may also, or alternatively, be capable of multiplexing multiple separate wavelength channels into a multi-channel optical signal in accordance with embodiments of the present disclosure.

[0017] 3A illustrates a cross-sectional view of demultiplexer 316 along a lateral plane within the active layer defined by width 320 and length 322 of demultiplexer 316. As illustrated, demultiplexer 316 includes an input region 302 (e.g., corresponding to input region 202 illustrated in FIG. 2A), a plurality of output regions 304 (e.g., corresponding to plurality of output regions 204 illustrated in FIG. 2A), and a dispersive region optically disposed between input region 302 and plurality of output regions 304. Input region 302 and plurality of output regions 304 (e.g., output region 308, output region 310, output region 312, and output region 314) may each be a waveguide (e.g., a slab waveguide, a strip waveguide, a slot waveguide, etc.) capable of propagating light along a waveguide path. The dispersion region 332 includes a first material and a second material that are non-uniformly interspersed to form a plurality of interfaces, each corresponding to a change in refractive index of the dispersion region 332, and that collectively structure the dispersion region 332 to optically separate each of the plurality of distinct wavelength channels (e.g., Ch. 1, Ch. 2, Ch. 3, ... Ch. N illustrated in FIG. 2A ) from the multi-channel optical signal (e.g., optical signal 110 illustrated in FIG. 2A ) when the input region 302 receives the multi-channel optical signal, and guide each of the plurality of distinct wavelength channels to a corresponding one of the plurality of output regions 304 (see, e.g., FIG. 3D ). In other words, the input region 302 is adapted to receive a multi-channel optical signal including the plurality of distinct wavelength channels, and the plurality of output regions 304 are each adapted to receive a corresponding one of the plurality of distinct wavelength channels demultiplexed from the multi-channel optical signal via the dispersion region 332.

[0018] As illustrated in FIG. 3A and more clearly shown in FIGS. 3D and 4A-4B, the shape and arrangement of the non-uniformly interspersed first and second materials creates a plurality of interfaces that collectively form a material interface pattern along the cross-sectional area of ​​the dispersion region 332, which is at least partially surrounded by the peripheral region 318, which includes the second material. In some embodiments, the peripheral region 318 has a substantially homogeneous composition, including the second material. In the illustrated embodiment, the dispersion region 332 includes a first side 328 and a second side 330, each of which has an interface with an inner boundary (i.e., the unlabeled dashed line of the peripheral region 318 disposed between the dispersion region 332 and the dash-dotted line corresponding to the outer boundary of the peripheral region 318). The first side 328 and the second side 330 are disposed on opposite sides of the dispersion region 332. The input region 302 is disposed adjacent to the first side 328 (e.g., one side of the input region 302 abuts the first side 328 of the dispersion region 332), while each of the multiple output regions 304 is disposed adjacent to the second side 330 (e.g., one side of each of the multiple output regions 304 abuts the second side 330 of the dispersion region 332).

[0019] In the illustrated embodiment, each of the multiple output regions 304 is parallel to another one of the multiple output regions 304. However, in other embodiments, the multiple output regions 304 may not be parallel to one another or disposed on the same side (e.g., one or more of the multiple output regions 304 and / or the input region 302 may be disposed adjacent to a side of the dispersion region 332 adjacent to the first side 328 and / or the second side 330). In some embodiments, when the multiple output regions include at least three output regions, adjacent ones of the multiple output regions are separated from one another by a common separation distance. For example, as illustrated, adjacent output regions 308 and 310 are separated from one another by distance 306, which may be common to the separation distance between other pairs of adjacent output regions.

[0020] 3A , demultiplexer 316 includes four output regions 304 (e.g., output region 308, output region 310, output region 312, output region 314), each mapped to a respective one of the four channels included in the plurality of distinct wavelength channels (i.e., by the structure of dispersion region 332). More specifically, the multiple interfaces of dispersion region 332 defined by the non-uniform interspersion of the first and second materials form a material interface pattern along the cross-sectional area of ​​dispersion region 332 (e.g., as shown in FIG. 3A , 4A , or 4B ) such that when input region 302 splits the multi-channel optical signal, dispersion region 332 optically separates each of the four channels from the multi-channel optical signal and routes each of the four channels to a respective one of four output regions 304.

[0021] It is noted that the first and second materials of the dispersion region 332 are positioned and shaped within the dispersion region such that the material interface pattern is substantially proportional to the design resulting from the inverse design process. The inverse design process is discussed in more detail later in this disclosure. More specifically, in some embodiments, the inverse design process may include iterative gradient-based optimization of a design based at least in part on a loss function incorporating performance losses (e.g., to implement a function) and manufacturing losses (e.g., to implement manufacturability and binarization of the first and second materials), which are reduced or otherwise adjusted via iterative gradient-based optimization to generate a design. In the same or other embodiments, other optimization techniques may be used in place of or in conjunction with the gradient-based optimization. Advantageously, this allows for the optimization of a nearly unlimited number of design parameters to achieve function and performance within a given area that may not have been possible with traditional design techniques.

[0022] For example, in one embodiment, dispersion region 332 is structured to optically separate each of the four channels from the multi-channel optical signal within a predetermined area of ​​35 μm×35 μm (e.g., as defined by width 324 and length 326 of dispersion region 332) when input region 302 receives the multi-channel optical signal. In the same or another embodiment, the dispersion region is structured to accommodate a common bandwidth for each of the four channels, each of which has a different center wavelength. In one embodiment, the common bandwidth is approximately 13 nm wide, and the different center wavelengths are selected from the group consisting of 1271 nm, 1291 nm, 1311 nm, 1331 nm, 1506 nm, 1514 nm, 1551 nm, and 1571 nm. In some embodiments, the entire structure of the demultiplexer 316 (e.g., including the input region 302, the peripheral region 318, the dispersion region 332, and the plurality of output regions 304) fits within a predetermined area (e.g., as defined by the width 320 and the length 322). In one embodiment, the predetermined area is 35 μm by 35 μm. In other embodiments, the dispersion region 332 and / or the demultiplexer 316 fit within other areas that are larger or smaller than 35 μm by 35 μm, it being understood that this may result in changes to the structure of the dispersion region 332 (e.g., the arrangement and shape of the first and second materials and / or other components of the demultiplexer 316).

[0023] In the same or another embodiment, the dispersion region is structured to have, for a given wavelength of one of the plurality of distinct wavelength channels, a power transmission of −2 dB or greater from input region 302 through dispersion region 332 to a corresponding one of the plurality of output regions 304. For example, if channel 1 of a multi-channel optical signal is mapped to output region 308, when demultiplexer 316 receives the multi-channel optical signal at input region 302, dispersion region 332 optically separates channel 1 from the multi-channel optical signal and guides a portion of the multi-channel optical signal corresponding to channel 1 to output region 308 with a power transmission of −2 dB or greater. In the same or another embodiment, dispersion region 332 is structured to have an adverse power transmission (i.e., isolation) for a given wavelength from the input region to any of the plurality of output regions other than the corresponding one of the plurality of output regions of −30 dB or less, −22 dB or less, or other. For example, if channel 1 of the multi-channel optical signal is mapped to output region 308, the adverse power transmission from input region 302 to any other one of the plurality of output regions (e.g., output region 310, output region 312, output region 314) other than the corresponding one of the plurality of output regions (e.g., output region 308) is −30 dB or less, −22 dB or less, or other. In some embodiments, the maximum power reflection from demultiplexer 316 of an input signal (e.g., multi-channel optical signal) received at an input region (e.g., input region 302) reflected back to the input region by dispersive region 332 or otherwise is −40 dB or less, −20 dB or less, −8 dB or less, or other. It is understood that in other embodiments, the power transmission, adverse power transmission, maximum power, or other performance characteristics may differ from the respective values ​​discussed herein, and the structure of dispersive region 332 may vary due to the inherent relationship between the structure, function, and performance of demultiplexer 316.

[0024] 3B illustrates a vertical schematic view or stack of various layers included in an illustrated embodiment of demultiplexer 316. However, it is understood that the illustrated embodiments are not exhaustive and that certain features or elements may be omitted to avoid obscuring certain aspects of the invention. In the illustrated embodiment, demultiplexer 316 includes a substrate 334, a dielectric layer 336, an active layer 338 (e.g., as shown in cross-section in FIG. 3A), and a cladding layer 340. In some embodiments, demultiplexer 316 may be a photonic integrated circuit or a silicon photonic device that is partially or otherwise compatible with conventional fabrication techniques (e.g., lithography techniques such as photolithography, electron beam lithography, sputtering, thermal evaporation, physical and chemical vapor deposition, etc.).

[0025] In one embodiment, a silicon-on-insulator (SOI) wafer may first be provided, including a support substrate (e.g., a silicon substrate) corresponding to substrate 334, a silicon dioxide dielectric layer corresponding to dielectric layer 336, a silicon layer (e.g., intrinsic, doped, or other), and an oxide layer (e.g., intrinsic, grown, or other). In one embodiment, the silicon in active layer 338 may be selectively etched by lithographically creating a pattern on the SOI wafer that is transferred to the SOI wafer via a dry etching process (e.g., via a photoresist mask or other hard mask) to remove portions of the silicon. The silicon may be etched all the way down to dielectric layer 336 to form voids, which may then be backfilled with silicon dioxide, which is then encapsulated with silicon dioxide to form cladding layer 340. In one embodiment, there may be several etch depths, including a full etch depth of silicon, to obtain the target structure. In one embodiment, the silicon may be 206 nm thick, so the full etch depth may be 206 nm. In some embodiments, this may be a two-step encapsulation process, where two silicon dioxide depositions are performed with an intermediate chemical mechanical planarization used to provide a flat surface.

[0026] 3C illustrates a more detailed view of the active layer 338 (relative to FIG. 3B) along a portion of the peripheral region 318 that includes the input region 302 of FIG. 3A. In the illustrated embodiment, the active layer 338 includes a first material 342 having a refractive index of ε1 and a second material 344 having a refractive index of ε2, different from ε1. The homogeneous regions of the first material 342 and the second material 344 may form a waveguide or portions of a waveguide that correspond to the input region 302 and multiple output regions 304, as illustrated in FIGS. 3A and 3C.

[0027] 3D illustrates a more detailed view of the active layer 338 along the dispersive region 332 (relative to FIG. 3B ). As previously described, the active layer 338 includes a first material 342 (e.g., silicon) and a second material 344 (e.g., silicon dioxide) that are non-uniformly interspersed to form a plurality of interfaces 346 that collectively form a material interface pattern. Each of the plurality of interfaces 346 forming the interface pattern corresponds to a change in the refractive index of the dispersive region 332 to structure the dispersive region (i.e., the shape and arrangement of the first material 342 and the second material 344) to at least partially provide the functionality of the demultiplexer 316 (i.e., optical separation of a plurality of distinct wavelength channels from a multi-channel optical signal when the input region 302 receives the multi-channel optical signal and respective guidance of each of the plurality of distinct wavelength channels to a corresponding one of the plurality of output regions 304).

[0028] As shown in FIGS. 3A-3D, in the illustrated embodiment of demultiplexer 316, the change in refractive index is shown as being consistent in the vertical direction (i.e., it is understood that first material 342 and second material 344 form an interface that is substantially perpendicular or orthogonal to the lateral plane or cross-section of demultiplexer 316). However, in the same or other embodiments, multiple interfaces (e.g., interface 346 illustrated in FIG. 3D) may not be substantially orthogonal to the lateral plane or cross-section of demultiplexer 316.

[0029] Figure 4A illustrates a more detailed cross-sectional view of the dispersion region of an exemplary photonic demultiplexer 400, according to an embodiment of the present disclosure. Figure 4B illustrates a more detailed view of the interface pattern formed by the shape and arrangement of the first material 410 and the second material 412 for the dispersion region of the photonic demultiplexer 400 of Figure 4A. The photonic demultiplexer 400 is one possible implementation of the MUX / DEMUX 114 illustrated in Figure 1, the demultiplexer 206 illustrated in Figure 2A, and the demultiplexer 316 illustrated in Figures 3A-3D.

[0030] 4A and 4B, photonic demultiplexer 400 includes an input region 402, a plurality of output regions 404a-404d, and a dispersive region 406 optically disposed between input region 402 and the plurality of output regions 404a-404d. Dispersive region 406 is at least partially surrounded by a peripheral region 408 that includes an inner boundary 414 and an outer boundary 416. It will be understood that like-named or labeled elements of photonic demultiplexer 400 may similarly correspond to like-named or labeled elements of other demultiplexers described in embodiments of the present disclosure.

[0031] The first material 410 (i.e., the black regions within the dispersive region 406) and the second material 412 (i.e., the white regions within the dispersive region 406) of the photonic demultiplexer 400 are non-uniformly interspersed to create a plurality of interfaces that collectively form the material interface pattern 420 illustrated in FIG. 4B . More specifically, an inverse design process utilizing iterative gradient-based optimization, Markov chain Monte Carlo optimization, or other optimization techniques is combined with first-principles simulation to generate a design that is substantially replicated by the dispersive region 406 in a proportional or scaled manner to provide the desired functionality of the photonic demultiplexer 400. In the illustrated embodiment, the dispersive region 406 is structured to optically separate each of a plurality of distinct wavelength channels from the multi-channel optical signal when the input region 402 receives the multi-channel optical signal and to respectively guide each of the plurality of distinct wavelength channels to a corresponding one of the plurality of output regions 404 a–404 d. More specifically, the plurality of output regions 404a-404d are respectively mapped to wavelength channels having center wavelengths corresponding to 1271 nm, 1291 nm, 1311 nm, and 1331 nm. In another embodiment, the plurality of output regions 404a-404d are respectively mapped to wavelength channels having center wavelengths corresponding to 1506 nm, 1514 nm, 1551 nm, and 1571 nm.

[0032] As illustrated in FIG. 4B , material interface pattern 420, which is defined by the black lines in dispersion region 406 and corresponds to the refractive index change in dispersion region 406, includes multiple protrusions 422a and 422b. First protrusion 422a is formed from first material 410 and extends from peripheral region 408 into dispersion region 406. Similarly, second protrusion 422b is formed from second material 412 and extends from peripheral region 408 into dispersion region 406. As further illustrated in FIG. 4B , dispersion region 406 includes multiple islands 424a and 424b formed from either first material 410 or second material 412. Multiple islands 424a and 424b include a first island 424a formed from first material 410 and surrounded by second material 412. The plurality of islands 424 a and 424 b also includes a second island 424 b formed from a second material 412 and surrounded by a first material 410 .

[0033] In some embodiments, the material interface pattern 420 includes one or more dendritic shapes, each of which is defined as a branched structure formed from the first material 410 or the second material 412 and having widths that alternately increase and decrease in size along a corresponding direction. Referring back to FIG. 4A , for clarity, the dendritic structure 418 has a black border and is labeled with a white arrow. As can be seen, the width of the dendritic structure 418 alternatively increases and decreases in size along a corresponding direction (i.e., the white arrow overlapping the length of the dendritic structure 418) to create a branched structure. It is understood that in other embodiments, there may be no protrusions, no islands, no dendritic structures, or any number, including zero, of protrusions, islands of any material included in the dispersion region 406, dendritic structures, or a combination thereof.

[0034] In some embodiments, the inverse design process includes manufacturing steps to enforce a minimum feature size to ensure the manufacturability of the design. In the illustrated embodiment of the photonic demultiplexer 400 illustrated in FIGS. 4A and 4B, the material interface pattern 420 is shaped to enforce a minimum feature size within the dispersion region 406 such that no interfaces within the cross-sectional area formed by the first material 410 and the second material 412 have a radius of curvature less than a threshold size. For example, if the minimum feature size is 150 nm, the radius of curvature for any of the interfaces is the reciprocal of half the minimum feature size (i.e., 1 / 75 nm -1 ) has a dimension below a threshold size corresponding to a minimum feature size. Enforcing such a minimum feature size prevents the reverse design process from generating designs that are not manufacturable by considering manufacturing constraints, limitations, and / or yield. In the same or other embodiments, different or additional checks on metrics related to manufacturability may be utilized to enforce a minimum width or spacing as the minimum feature size.

[0035] FIG. 5 is a functional block diagram illustrating a system 500 for generating designs for photonic integrated circuits (i.e., photonic devices) according to one embodiment of the present disclosure. System 500 can be utilized to perform an inverse design process that generates designs using iterative gradient-based optimization that considers the fundamental physics governing the operation of photonic integrated circuits. More specifically, system 500 is a design tool that can be utilized to optimize structural parameters of photonic integrated circuits (e.g., the shape and placement of first and second materials within the dispersion regions of embodiments of the present disclosure) based on first-principles simulations (e.g., electromagnetic simulations to determine the field response of a photonic device to an excitation source) and iterative gradient-based optimization. In other words, system 500 can provide designs resulting from the inverse design process that are substantially replicated (i.e., proportionally scaled) by dispersion regions 332 and 406 of demultiplexer 316 and photonic demultiplexer 400, respectively, as illustrated in FIGS. 3A and 4A.

[0036] As illustrated, system 500 includes a controller 512, a display 502, an input device 504, a communication device 506, a network 508, a remote resource 510, a bus 534, and a bus 520. Controller 512 includes a processor 514, a memory 516, local storage 518, and a photonic device simulator 522. Photonic device simulator 522 includes an operational simulation engine 526, manufacturing loss calculation logic 528, calculation logic 524, an adjoint simulation engine 530, and an optimization engine 532. It will be appreciated that in some embodiments, controller 512 may be a distributed system.

[0037] The controller 512 is coupled to a display 502 (e.g., a light emitting diode display, a liquid crystal display, etc.) coupled through a bus 520 to a bus 534 for displaying information to a user utilizing the system 500 to optimize structural parameters of a photonic device (i.e., a demultiplexer). An input device 504 is coupled to the bus 534 through the bus 520 for communicating information and command selections to the processor 514. The input device 504 may include a mouse, trackball, keyboard, stylus, or other computer peripheral to facilitate interaction between a user and the controller 512. In response, the controller 512 can provide verification of the interaction through the display 502.

[0038] Another device that may optionally be coupled to the controller 512 is one or more communications devices 506 for accessing remote resources 510 of the distributed system via a network 508. The communications devices 506 may include any number of networking peripheral devices, such as those used to couple to an Ethernet, the Internet, a wide area network, or the like. The communications devices 506 may further include mechanisms that provide connectivity between the controller 512 and the outside world. Note that any or all of the components and associated hardware of the system 500 illustrated in FIG. 5 may be used in various embodiments of the present disclosure. The remote resources 510 may be part of a distributed system and may include any number of processors, memory, and other resources for optimizing the structural parameters of the photonic device.

[0039] The controller 512 orchestrates the operation of the system 500 to optimize structural parameters of a photonic device. The processor 514 (e.g., one or more central processing units, graphics processing units, and / or tensor processing units, etc.), the memory 516 (e.g., volatile memory such as DRAM and SRAM, non-volatile memory such as ROM, flash memory, etc.), the local storage 518 (e.g., magnetic memory such as a computer disk drive), and the photonic device simulator 522 are coupled to each other through a bus 520. The controller 512 includes software (e.g., instructions contained in the memory 516 coupled to the processor 514) and / or hardware logic (e.g., an application-specific integrated circuit, a field-programmable gate array, etc.) that, when executed by the controller 512, cause the controller 512 or the system 500 to perform operations. The operations may be based on instructions stored in any one or combination of the memory 516, the local storage 518, the physical device simulator 522, and the remote resources 510 accessed through the network 508.

[0040] In the illustrated embodiment, components of the photonic device simulator 522 are utilized to optimize structural parameters of photonic devices (e.g., MUX / DEMUX 114 of FIG. 1 , demultiplexer 206 of FIG. 2A , multiplexer 208 of FIG. 2B , demultiplexer 316 of FIGS. 3A-3D , and photonic demultiplexer 400 of FIGS. 4A-4B ). In some embodiments, the system 500 may optimize the structural parameters of the photonic devices via simulations (e.g., behavioral simulations and adjoint simulations) that utilize finite-difference time-domain (FDTD) methods to model field responses (e.g., electric and magnetic fields within the photonic device), finite-difference frequency-domain (FDFD) methods, or any other suitable techniques, among others. The behavioral simulation engine 526 provides instructions for performing electromagnetic simulations of the photonic devices operating in response to excitation sources within the virtual prototype. In particular, the operational simulation determines the field response of the virtual prototype (and thus the photonic device described by the virtual prototype) in response to an excitation source to determine performance metrics of the physical device (e.g., based on an initial photonic device description or input design describing structural parameters of the photonic device within the virtual prototype having a plurality of voxels). The structural parameters may correspond, for example, to the particular design, material composition, dimensions, etc. of the physical device. The fabrication loss calculation logic 528 provides instructions for determining fabrication losses utilized to enforce minimum feature sizes to ensure manufacturability. In some embodiments, the fabrication losses are also used to perform binarization of the design (i.e., so that the photonic device includes a first material and a second material interspersed to form multiple interfaces). The calculation logic 524 computes a loss metric based on the performance metric and the fabrication losses, which is determined via a loss function incorporating the performance losses.An adjoint simulation engine 530 is utilized in conjunction with the behavioral simulation engine 526 to perform adjoint simulation of the photonic device to back-propagate the loss metric through the virtual prototype via the loss function to determine how changes in the structural parameters of the photonic device affect the loss metric (i.e., the slope of the loss function with respect to the structural parameters, also known as a sensitivity map). An optimization engine 532 is utilized to update the structural parameters of the photonic device to reduce the loss metric and generate a revised description of the photonic device (i.e., revise the design).

[0041] 6A-6C illustrate non-limiting exemplary embodiments of an initial setup of a virtual prototype 606 that describes a photonic device, performs a behavioral simulation of the photonic device in response to an excitation source in virtual prototype 608, and performs an adjoint simulation of the photonic device in virtual prototype 610, according to various aspects of the present disclosure. The initial setup of the virtual prototype, the one-dimensional representation of the virtual prototype, the behavioral simulation of the physical device, and the adjoint simulation of the physical device may be implemented using system 500 illustrated in FIG.

[0042] As illustrated in Figures 6A-6C, the virtual prototype is represented in two dimensions. However, it is understood that other dimensionality (e.g., three-dimensional space) may be used to describe the virtual prototype and the photonic device. In some embodiments, optimization of the structural parameters of the photonic device illustrated in Figures 6A-6C may be achieved through an inverse design process that includes, among other things, simulations (e.g., motional simulations and adjoint simulations) that model field responses (e.g., electric and magnetic fields) to excitation sources using the finite-difference time-domain (FDTD) method, the finite-difference frequency-domain (FDFD) method, or any other suitable technique.

[0043] FIG. 6A illustrates an exemplary virtual prototype 606 describing a photonic integrated circuit (i.e., a photonic device such as a waveguide, demultiplexer, etc.) in accordance with a non-limiting embodiment of the present disclosure. More specifically, in response to receiving an initial description (e.g., an input design) of a photonic device defined by one or more structural parameters, a system (e.g., system 500 of FIG. 5) configures the virtual prototype 606 to represent the photonic device. As illustrated, the virtual prototype 606 (and subsequent photonic device) is described by a plurality of voxels 612, each representing an individual (i.e., discretized) element of two-dimensional (or other dimensional) space. Each of the voxels 612 is illustrated as a two-dimensional square. However, it will be understood that a voxel may be represented as a cube or other shape in three-dimensional space. It will be understood that the particular shape and dimensions of the plurality of voxels 612 may be adjusted depending on the virtual prototype 606 and the photonic device being simulated. Furthermore, note that only a portion of the voxels 612 are shown to avoid obscuring other aspects of the virtual prototype 606 .

[0044] Each of the plurality of voxels 612 may be associated with a structural value, a field value, and a source value. Collectively, the structural values ​​of the virtual prototype 606 describe structural parameters of the photonic device. In one embodiment, the structural values ​​may correspond to the permittivity, permeability, and / or refractive index that collectively describe the structural (i.e., material) boundaries or interfaces (e.g., material interface pattern 420 of FIG. 4B ) of the photonic device. For example, the interfaces 616 may represent locations within the virtual prototype 606 where the permittivity changes and define boundaries of the photonic device where a first material contacts or otherwise creates an interface with a second material. The field values ​​describe the field (or loss) response calculated (e.g., via Maxwell's equations) in response to the excitation sources described by the source values. The field response may correspond, for example, to vectors describing the electric and / or magnetic fields (e.g., in one or more orthogonal directions) at a particular time step for each of the plurality of voxels 612. Thus, the field response may be based at least in part on the structural parameters of the photonic device and the excitation source.

[0045] In the illustrated embodiment, the photonic device corresponds to an optical demultiplexer having a design region 614 (e.g., corresponding to dispersion region 332 of FIG. 3A and / or dispersion region 406 of FIG. 4A), where structural parameters of the physical device may be updated or otherwise modified. More specifically, through an inverse design process, an iterative gradient-based optimization of a loss metric determined from a loss function is performed to generate a design of a photonic device that functionally causes a multi-channel optical signal to be demultiplexed and guided from input port 602 to a corresponding one of output ports 604. Thus, input port 602 of the photonic device (e.g., corresponding to input region 302 of FIG. 3A, input region 402 of FIG. 4A, etc.) corresponds to the location of a pump source for providing an output (e.g., a Gaussian pulse, a wave, a waveguide mode response, etc.). The output of the excitation source interacts with the photonic device based on the structural parameters (e.g., the electromagnetic wave corresponding to the excitation source may be perturbed, retransmitted, attenuated, refracted, reflected, diffracted, scattered, absorbed, dispersed, amplified, or otherwise altered as the wave propagates through the photonic device in virtual prototype 606). In other words, the excitation source may alter the field response of the photonic device, which depends on the underlying physics governing the physical domain and structural parameters of the photonic device. The excitation source is positioned to originate from or otherwise be proximate to input port 602 and propagate through design space 614 toward output port 604 of the photonic device (or otherwise affect the field values ​​of multiple voxels). In the illustrated embodiment, input port 602 and output port 604 are positioned outside of design space 614. In other words, in the illustrated embodiment, only a portion of the structural parameters of the photonic device are optimizable.

[0046] However, in other embodiments, the entire photonic device may be placed within the design domain 614, such that the structural parameters may represent any portion or the entire photonic device design. The electric and magnetic fields within the virtual prototype 606 (and subsequently the photonic device) may vary in response to an excitation source (e.g., represented by field values ​​at individual voxels that collectively correspond to the field response of the virtual prototype). The output ports 604 of the optical demultiplexer may be used to determine performance metrics of the photonic device in response to an excitation source (e.g., power transmission from the input port 602 to a particular one of the output ports 604). An initial description of the photonic device, including initial structural parameters, excitation sources, performance parameters or metrics, and other parameters describing the photonic device, is received by a system (e.g., system 500 of FIG. 5) and used to construct the virtual prototype 606 for performing first-principles-based simulations of the photonic device. These specific values ​​and parameters may be defined directly by a user (e.g., a user of system 500 of FIG. 5), indirectly (e.g., via controller 512, by culling predefined values ​​stored in memory 516, local storage 518, or remote resource 510), or by a combination thereof.

[0047] 6B illustrates a non-limiting exemplary embodiment of an operational simulation of a photonic device in response to an excitation source within a virtual prototype 608 in accordance with various aspects of the present disclosure. In the illustrated embodiment, the photonic device is an optical demultiplexer structured to optically separate each of a plurality of distinct wavelength channels included in a multi-channel optical signal received at an input port 602 and respectively guide each of the plurality of distinct wavelength channels to a corresponding one of a plurality of output ports 604. An excitation source may be selected (randomly or otherwise) from the plurality of distinct wavelength channels and originates from the input port 602 with a specified spatial, phase, and / or temporal profile. The operational simulation is performed over multiple time steps, including the illustrated time step. When performing the operational simulation, changes to the field response (e.g., field values) of each of a plurality of voxels 612 are incrementally updated in response to the excitation source over the multiple time steps. The change in the field response at a particular time step is based at least in part on the structural parameters, excitation source, and field response of the virtual prototype 610 at an immediately preceding time step included in the multiple time steps. Similarly, in some embodiments, the source values ​​of the plurality of voxels 612 are updated (e.g., based on a spatial and / or temporal profile describing the excitation source). It is understood that the motion simulation is incremental, and the field values ​​(and source values) of the virtual prototype 610 are incrementally updated at each time step as time progresses for each of the plurality of time steps during the motion simulation. It is further noted that in some embodiments, the updating is an iterative process, and each field and source value update is based at least in part on previous updates of the respective field and source values.

[0048] Once the operational simulation reaches a steady state (e.g., changes in field values ​​in response to the pump source substantially stabilize or reduce to a negligible value) or otherwise terminates, one or more performance metrics can be determined. In one embodiment, the performance metric corresponds to the power transmitted at a corresponding one of the output ports 604 mapped to the distinct wavelength channels being simulated by the pump source. In other words, in some embodiments, the performance metric represents the power (at one or more frequencies of interest) in the target mode shape at a particular location of the output port 604. A loss value or metric of the input design (e.g., the initial design and / or any refined design with updated structural parameters) based at least in part on the performance metric can be determined via a loss function. The loss metric, in conjunction with the adjoint simulation, can be utilized to determine a structural gradient (e.g., the effect of the structural parameters on the loss metric) to update or otherwise modify the structural parameters to reduce the loss metric (i.e., increase the performance metric). Note that the loss metric can be further based on manufacturing loss values ​​and / or other loss values ​​utilized to enforce a minimum feature size of the photonic device to facilitate the manufacturability of the device.

[0049] FIG. 6C illustrates a non-limiting exemplary embodiment of adjoint simulation within a virtual prototype 610 by backpropagating a loss metric in accordance with various aspects of the present disclosure. More specifically, an adjoint simulation is a backward-in-time simulation in which the loss metric is treated as an excitation source that interacts with a photonic device to cause a loss response. In other words, an adjoint (or virtual source) based on the loss metric is placed at an output domain (e.g., output port 604) or other location corresponding to the location used when determining the performance metric. The adjoint source is treated as a physical stimulus or excitation source during the adjoint simulation. The loss response of the virtual prototype 608 is computed for each of multiple time steps (e.g., backward in time) in response to the adjoint source. The loss response collectively refers to the loss values ​​of multiple voxels 612 that are incrementally updated in response to the adjoint source over multiple time steps. A change in the loss response based on the loss metric may correspond to a loss gradient, which indicates how changes in the field response of the physical device affect the loss metric. The fields computed in response to the adjoint source are combined with fields from the operational simulation to obtain the structural gradient of the photonic device / virtual prototype (e.g., how changes in the structural parameters of the photonic device in the virtual prototype affect the loss metric). Once the structural gradient of a particular cycle (e.g., the operational simulation and the adjoint simulation) is known, the structural parameters can be updated to reduce the loss metric and generate a modified description or design of the photonic device.

[0050] In some embodiments, the iterative cycle of performing operational and adjoint simulations, determining structural gradients, and updating structural parameters to reduce the loss metric is performed continuously as part of an inverse design process utilizing iterative gradient-based optimization. An optimization scheme such as gradient descent may be utilized to determine a specific amount or degree of change to the structural parameters of the photonic device to incrementally reduce the loss metric. More specifically, after each cycle, the structural parameters are updated (e.g., optimized) to reduce the loss metric. The operational simulations, adjoint simulations, and structural parameter updates are repeated iteratively until the loss metric substantially converges or is otherwise below or within a threshold or range such that the photonic device provides desired performance while maintaining manufacturability.

[0051] One problem in designing physical devices such as the photonic devices described above is that manufacturing systems generally do not produce photonic devices with the exact structures simulated using the techniques described above. Fabrication of photonic devices using manufacturing systems such as semiconductor foundries involves a complex, multi-step process of transferring a design from a photomask to a silicon wafer. Despite pre-corrections performed on the photomask to compensate for distortion effects introduced by the photolithography process, the fabricated physical device may still exhibit shape distortions, including, but not limited to, rounding of sharp corners, erosion or extension of feature contours, oblique sidewall angles, and non-uniform layer thicknesses. These distortions are due to statistical variations in semiconductor processing and can affect the performance of the fabricated physical device in unexpected ways, given the delicate wave interference physics underlying the performance of physical devices such as the photonic devices described herein.

[0052] Characterizing these non-uniformities is a priority for manufacturing system operators and typically requires a large sample of wafer runs. The process design kit (PDK) provided by a given manufacturing system / foundry typically includes specifications and tolerances for critical feature sizes, such as minimum line width and spacing, curvature, and minimum area (e.g., island) and enclosed area (e.g., hole). However, the detailed processing capabilities, including optical proximity correction (OPC), and yield of a given foundry node are trade secrets and not publicly available during the design process of the physical device to be manufactured. To ensure reliable and consistent manufacturing of the reverse-engineered physical device, it is desirable to know a priori what the fabricated structures in the silicon wafer will be for a given photomask / design. Furthermore, it is desirable for this information to be available without detailed knowledge of the manufacturing system's capabilities beyond what is made publicly available (e.g., as part of the PDK).

[0053] One approach to generating a foundry manufacturing model is to take a scanning electron microscope (SEM) image of the fabricated structure or a prototype generated by a processing simulation and devise a series of differentiable operations (i.e., convolution / filter, projection / threshold, etc.) that can be applied sequentially to transform the photomask design into the image / prototype. Each of these individual operations is parameterized by several degrees of freedom, and the problem is to determine these unknowns using gradient-based optimization with inverse-mode automatic differentiation of a scalar loss function. The transformation function can have any number of parameters to incorporate the equivalent of the combined effects of foundry OPC and processing.

[0054] In general, it is difficult to generate a large set of input data using SEM images or simulated prototypes to train a foundry manufacturing model. This approach, where the inputs to the manufacturing model are either SEM images or prototypes of the photomask design and the manufactured device, presents three main challenges: 1. Obtaining SEM images of fabricated structures requires manual post-processing of silicon wafers, which is time-consuming and expensive. Also, large-area devices that cannot fit within the microscope's field of view (e.g., Bragg grating couplers, ring resonators, etc.) require stitching together multiple separate images. When taking SEM images at high resolution, chips tend not to be mounted perfectly flat on the microscope stage, so individual images typically exhibit uneven image contrast. 2. Given a 2D representation of an SEM image or simulated prototype, the loss function takes as input the shape contour from a planar cross-section of the device, and the actual 3D topology is generally ignored. As a result, there is an incomplete characterization of the overall device structure, and potentially important features that affect device performance, such as layer thickness non-uniformity, sloped surface sidewall angle, and surface roughness, are excluded from the analysis. 3. The process simulations used to generate the prototypes depend on proprietary inputs related to the foundry's manufacturing capabilities and tooling specifications that cannot be easily shared with third parties.

[0055] To improve the performance of designed physical devices, design techniques are desired that can accurately model manufacturing processes within a manufacturing system without requiring proprietary knowledge of the manufacturing process.

[0056] In some embodiments of the present disclosure, a novel approach to creating manufacturing models for modeling foundry manufacturing processes is based on combining optical measurements of fabricated devices with topology optimization and full-wave electromagnetic simulation. In some embodiments, these techniques begin by determining a photomask design and then use topology optimization to evolve an initial 3D structure based on the 2D photomask design until its simulated performance matches the experimental measurements of the as-fabricated design. Similar to the SEM image / prototype-based approach described above, the optimization problem involves finding a set of parameters for a sequence of differentiable operations that minimizes the difference between the simulated performance of the virtual prototype and the measured optical response of the as-fabricated design (e.g., minimizes the mean squared error over a set of frequencies). This approach can use the same or similar topology optimization framework originally used to design photomasks to match a pre-specified target output. Because this technique starts with a known initial design and applies a similar set of constraints in the two stages of topology optimization, the design space is sufficiently constrained so that the final design is likely to match the as-fabricated design.

[0057] Using an approach where a manufacturing model is created based on the photomask design and optical measurements of the manufactured device provides many advantages, including but not limited to: 1. No input is required from the foundry or contract manufacturer beyond that provided by their PDK. This input is often not publicly available or shared with third parties due to trade secret protection or other reasons of the foundry / manufacturing system not sharing the information. 2. A single 300mm wafer can potentially provide a testbed of tens of thousands of different structures. This large labeled dataset can be used as the basis for developing and validating any transformation function or, more generally, neural networks, as long as it is differentiable. 3. The output of the manufacturing model can still be verified against SEM images of the actual manufactured structure. This provides a mechanism to independently verify the accuracy of the foundry manufacturing model, but SEM images are not required to determine the manufacturing model.

[0058] 7A is a flowchart 700 illustrating example time steps for an operational simulation 702 and an adjoint simulation 704 according to various aspects of the present disclosure. The flowchart 700 is one possible implementation that a system may use to perform operational simulation 702 and adjoint simulation 704 of a virtual prototype describing a photonic integrated circuit (e.g., an optical device operating in the electromagnetic domain, such as a photonic demultiplexer). In the illustrated embodiment, the operational simulation 702 utilizes a technique such as the finite-difference time-domain (FDTD) method to model the field response (both electric and magnetic) or loss response at each of a plurality of voxels for a plurality of time steps in response to physical stimuli corresponding to excitation sources and / or adjoint sources. In some embodiments, a manufacturing model may be used to improve the accuracy of the simulation, and the manufacturing model may be updated using similar operational simulation / adjoint simulation techniques, as described in further detail below.

[0059] 7A , operational simulation 702 includes a configuration portion 754 and a simulation portion 742. In configuration portion 754, an initial design 730 is received, including structural parameters of a physical device, such as a photonic device, to be simulated. In some embodiments, initial design 730 may also include additional or different information about the design, including, but not limited to, linear functions for defining the structural parameters (instead of the structural parameters themselves), desired performance values, a performance loss function used to compare simulated performance to desired performance, or other information.

[0060] After receiving the initial design 730, the operational simulation 702 simulates the fabrication of the photonic device based on the initial structural parameters using a fabrication model 744 to produce simulated structural parameters 706 in the simulation portion 742. In some embodiments, the fabrication model 744 is a sequence of differentiable operations that embodies the differences from the initial design 730 that will be introduced by the fabrication system during fabrication. In some embodiments, instead of a sequence of differentiable operations, the fabrication model 744 may be represented by a neural network. The parameters of the fabrication model 744 may be learned using an optimization process, which is described in more detail below.

[0061] After the structural parameters 706 are determined using the fabrication model 744, the operational simulation 702 proceeds to a simulation portion 742. The simulation portion 742 occurs over multiple time steps (e.g., from an initial time step to a final time step over a predetermined or conditional number of time steps having a specified time step size) to model changes (e.g., from initial field values ​​710) in the electric and magnetic fields of multiple voxels that collectively describe the virtual prototype and / or photonic device corresponding to the field response. More specifically, the update operations (e.g., update operation 712, update operation 714, and update operation 716) are iterative and based on the field response, the structural parameters 706, and one or more excitation sources 708. Each update operation is followed by another update operation and represents successive steps forward in time within the multiple time steps. For example, update operation 714 updates field values ​​734 (e.g., see FIG. 7B ) based on the field response determined from the previous update operation 712, the excitation sources 708, and the structural parameters 706. Similarly, update operation 716 updates field values ​​736 (see, e.g., FIG. 7B) based on the field response determined from update operation 714. In other words, at each time step of operational simulation 702, the field values ​​(and therefore the field response) are updated based on the previous field response and structural parameters of the photonic device.

[0062] Once the final time step of the simulation portion 742 has occurred (three update operations are shown for clarity and brevity, although in some embodiments, more than three update operations are performed), the simulated performance metric 718 is used to determine a performance loss value 720 associated with the structural parameter 706. In some embodiments, the simulated performance metric 718 is a characterization of the performance of the simulated device at one or more points (e.g., output ports of the device) and one or more bandwidths, similar to the illustration in FIG. 2C , and the performance loss value 720 may include a comparison of the simulated performance metric 718 with a desired performance metric. The performance loss value 720 may then be used to determine (or as) the loss metric 722. In some embodiments, the performance loss value 720 or loss metric 722 may include multiple values ​​for multiple aspects of performance (e.g., for separate output ports).

[0063] From loss metric 722, loss gradient 724 may be determined. Loss gradient 724 may be treated as an adjoint or virtual source (e.g., a physical stimulus or excitation source originating from an output field or port), which is backpropagated inversely (incrementally from the final time step through multiple time steps, via update operation 726, update operation 750, and update operation 752, until reaching the initial time step) to determine gradient 728. As determined based on simulated performance metric 718, gradient 728 is related to initial design 730 as modified by manufacturing model 744.

[0064] In the illustrated embodiment, the FDTD solution (e.g., simulation portion 742 of the operational simulation 702) and backward solution (e.g., adjoint simulation 704) problems are described graphically from a high level using only "update" and "loss" operations and their corresponding gradient operations. The simulation is initially set up, and the structural parameters of the virtual prototype (and photonic device), physical stimuli (i.e., excitation sources), and initial field states are provided (e.g., via an initial description and / or input design). As discussed above, the field values ​​are updated in response to the excitation sources based on the structural parameters. More specifically, the update operation is given by φ, where x, for i=1,...,n i+1 =φ(x i ,b i , z), where n corresponds to the total number of time steps (e.g., multiple time steps) for the behavioral simulation, and x i corresponds to the field response of the virtual prototype at time step i (the field values ​​associated with the electric and magnetic fields at each of the voxels), and b i where σ corresponds to the excitation source (the source values ​​associated with the electric and magnetic fields for each of the voxels) of the virtual prototype at time step i, and z corresponds to the structural parameters (e.g., relative dielectric constants, refractive index, etc.) describing the topology and / or material properties of the physical device.

[0065] Note that using the FDTD method, the update operation can be specifically written as follows:

[0066]

number

[0067] That is, the FDTD update is linear in the field and source terms. Specifically,

[0068]

number

[0069]

number

[0070] In terms of modifying or otherwise optimizing the structural parameters of a physical device, the relevant quantities that generate

[0071]

number

[0072] 7B is a chart 732 illustrating the relationship between update operations and adjoint simulation (e.g., backpropagation) for motion simulation, according to an embodiment of the present disclosure. More specifically, FIG. 7B summarizes the relationship between motion simulation and adjoint simulation with the computation of structural gradients, and the structural gradients

[0073]

number

[0074]

number

[0075]

number

[0076]

number

[0077]

number

[0078]

number

[0079]

number

[0080]

number

[0081]

number

[0082]

number

[0083] In particular, directly

[0084]

number

[0085]

number

[0086] Structural gradient

[0087]

number

[0088]

number

[0089] For completeness, the full form of the first term in the sum:

[0090]

number

[0091]

number

[0092] Based on the definition of φ as explained by Eq. (1),

[0093]

number

[0094]

number

[0095] The adjoint update is the backpropagation of the loss gradient (e.g., from the loss metric) from a later time step to an earlier time step,

[0096]

number

[0097]

number

[0098]

number

[0099] Therefore, each term in the associated sum depends on both i>=i0 and i<0. The dependency chains of these two terms are in opposite directions, so

[0100]

number

[0101] 7A , the operational simulation 702 and adjoint simulation 704 described above are typically used to optimize an initial design 730 with respect to a loss metric 722 that represents the desired performance of a physical device. In some embodiments, a loss metric 722 that represents the desired performance of a manufacturing model 744 may instead be used, and the operational simulation 702 and adjoint simulation 704 may be used to update the manufacturing model 744 instead of (or in addition to) the initial design 730. In this way, the manufacturing model 744 may be improved to more accurately represent the actual results of the manufacturing process performed by a manufacturing system 746.

[0102] 7A thus illustrates an optional flow in which an initial design 730 is provided to a manufacturing system 746. The initial design 730 is then used by the manufacturing system 746 to manufacture instances of a physical device based on the initial design 730. The actual (unsimulated) performance of the manufactured instances of the physical device is then measured to determine as-manufactured performance metrics 748. The as-manufactured performance metrics 748 are similar to the simulated performance metrics 718 in that they may include characterizations of the performance of the physical device at one or more points (e.g., output ports of the device) and one or more bandwidths, similar to the illustration of FIG. Performance loss value 720 and / or loss metric 722 may be based on a comparison of simulated performance metric 718 and as-manufactured performance metric 748, which may be back-propagated in adjoint simulation 704 to create gradients 728 that may be used to update initial design 730 (and the difference between updated initial design 730 and initial design 730 may be used to update manufacturing model 744) or to directly update manufacturing model 744, as described in further detail below. The flow from initial design 730 to manufacturing system 746 and as-manufactured performance metric 748 is shown as optional because, in some embodiments, this part of the flow may be performed once for a given initial design 730, although operational simulation 702 and adjoint simulation 704 may be performed multiple times for iterative optimization.

[0103] 8A and 8B are flowcharts illustrating a non-limiting example embodiment of a method 800 for optimizing a manufacturing model that can be used to simulate the manufacturing of a physical device, such as a photonic integrated circuit, in accordance with various aspects of the present disclosure. In method 800, performance metrics for a simulation of a test design are compared with performance metrics for a test physical device manufactured based on the same test design. The test design is optimized until the simulated performance metrics converge to the as-manufactured performance metrics to derive a manufacturing structure for the test physical device that is affected by details of the manufacturing process. Differences between the test design and the derived manufacturing structure are used to optimize a manufacturing model that represents details of the manufacturing process, and the manufacturing model can then be used in optimizing future designs.

[0104] It is understood that method 800 is a process that may be accomplished by performing operations on a system to perform an iterative gradient-based optimization of a loss metric determined from a loss function that includes at least a comparison between simulated performance metrics 718 and as-manufactured performance metrics 748. In the same or other embodiments, method 800 may be included as instructions provided by at least one machine-accessible storage medium (e.g., non-transitory memory) that, when executed by a machine, cause the machine to perform operations to generate and / or improve manufacturing model 744. It is further understood that the order in which some or all of the process blocks appear in method 800 should not be considered limiting. Rather, one skilled in the art with the benefit of this disclosure will understand that some of the process blocks may be performed in various orders not illustrated, or even in parallel.

[0105] From a start block, method 800 proceeds to block 802, where a test design (e.g., initial design 730) for a test physical device, such as a photonic integrated circuit, is received. In some embodiments, the physical device may be expected to have a particular function (e.g., function as an optical demultiplexer). The test design may describe desired structural parameters of the physical device to be used for both fabrication and simulation. The virtual prototype may include a plurality of voxels that collectively describe the structural parameters of the test device. Each of the plurality of voxels may be associated with a structural value to describe the structural parameter, a field value to describe a field response (e.g., electric and magnetic fields in one or more orthogonal directions) to a physical stimulus (e.g., one or more excitation sources), and a source value to describe the physical stimulus.

[0106] It is understood that an “initial” test design may be a relative term. Thus, in some embodiments, the initial description may be a first description of a test device described within the context of a virtual prototype (e.g., a first input design for performing a first operational simulation). However, in other embodiments, the term initial description may refer to an initial description of a particular cycle (e.g., performing operational simulation 702, running adjoint simulation 704, and updating structural parameters). In such embodiments, the test design or the design of that particular cycle may correspond to a revised description or refined design (e.g., generated from a previous cycle). In some embodiments, the virtual prototype includes a design domain that includes a portion of multiple voxels having structural parameters that may be updated, revised, or otherwise changed to optimize the structural parameters. In the same or other embodiments, the structural parameters are related to the geometric boundaries and / or material composition of the physical device based on the material properties (e.g., dielectric constant, refractive index, etc.) of the virtual prototype.

[0107] In block 804, the test design is provided to a manufacturing system for fabricating test physical devices. The manufacturing system can use any suitable technique or combination of techniques to fabricate the test physical devices, including, but not limited to, lithography techniques such as photolithography and electron beam lithography, sputtering, thermal evaporation, and physical and / or chemical vapor deposition. As described further below, although method 800 describes receiving and processing a single test design at a time for clarity, in some embodiments, multiple test physical devices based on multiple test designs may be received and provided to the manufacturing system at one time for fabrication on a single wafer. In some embodiments, up to tens of thousands of test physical devices may be fabricated on a single wafer and tested using wafer-scale test techniques, thus allowing many test designs to be efficiently processed and used to further refine the manufacturing model.

[0108] At block 806, the performance of the test physical device is measured to determine as-manufactured performance metrics. The performance of the test physical device may be measured at one or more points on the test physical device, including, but not limited to, one or more output ports. Performance may be measured by providing various inputs, including, but not limited to, light sources producing various wavelengths, to one or more input ports of the physical device. In some embodiments, performance may be measured using one or more dedicated test input or output ports on the physical device that are used during testing but are not considered during design optimization. Furthermore, the performance of the test physical device may be tested both within and outside of the frequencies intended for use to increase the amount of data available for the optimization process. Also, similar to the description above, while method 800 is illustrated and described as measuring the performance of a single test physical device, in some embodiments, method 800 can test two or more test physical devices simultaneously using wafer-scale test techniques.

[0109] At block 808, the manufacturing model is used to determine structural parameters based on the test design. Because the manufacturing model is intended to represent variations from the structure specified in the test design introduced by the manufacturing process used by the manufacturing system, the structural parameters are likely to be at least slightly different from the structure specified in the test design. In some embodiments, the manufacturing model may initially not make any changes to the structure provided in the test design, but may begin to make changes once one or more iterations of method 800 are completed. In some embodiments, the actions of block 808 may be skipped, and the structural parameters of the test design may be provided directly to the virtual prototype without being modified by the manufacturing model.

[0110] In block 810, a virtual prototype is configured to represent the structural parameters. Once the structural parameters are determined using the manufacturing model, the virtual prototype is constructed (e.g., the number of voxels, the shape / arrangement of the voxels, and specific values ​​of the voxel's structural, field, and / or source values ​​are set based on the structural parameters). In some embodiments, the virtual prototype includes a design region optically coupled between a first communication region and multiple second communication regions. In some embodiments, the first communication region may correspond to an input region or port (e.g., where an excitation source originates), and the second communication regions may correspond to multiple output regions or ports (e.g., when designing an optical demultiplexer that optically separates multiple distinct wavelength channels included in a multi-channel optical signal received at an input port and guides each distinct wavelength channel to a corresponding one of multiple output ports). However, in other embodiments, the first communication area may correspond to an output area or port, and the multiple second communication areas correspond to multiple input ports or areas (e.g., when designing an optical multiplexer that optically combines multiple separate wavelength signals received at each of multiple input ports to form a multi-channel optical signal that is guided to an output port).

[0111] Block 812 indicates mapping each of the plurality of distinct wavelength channels to a respective one of a plurality of second communication regions within the virtual prototype. The distinct wavelength channels may be mapped to the second communication regions by a test design. For example, the test design may associate performance metrics of a physical device with power transmission from an input port to individual output ports for the mapped channel. In one embodiment, a first channel included in the plurality of distinct wavelength channels is mapped to a first output port, meaning that the performance metrics of the physical device for the first channel are tied to the first output port. Similarly, other output ports may be mapped to the same or different channels included in the plurality of distinct wavelength channels such that each distinct wavelength channel is mapped to a respective one of the plurality of output ports (i.e., second communication regions) within the virtual prototype. In one embodiment, the plurality of second communication regions includes four regions, and the plurality of distinct wavelength channels includes four channels each mapped to a corresponding one of the four regions. In other embodiments, there may be a different number of second communication regions (e.g., eight regions) and a different number of channels (e.g., eight channels) each mapped to a respective one of the second communication regions.

[0112] Block 814 illustrates performing a behavioral simulation of structural parameters in response to one or more excitation sources to determine simulated performance metrics. More specifically, in some embodiments, an electromagnetic simulation is performed in which the field response of the photonic integrated circuit is incrementally updated over multiple time steps to determine how the field response of the simulated physical device changes due to the excitation sources. The field values ​​of multiple voxels are updated based at least in part on the structural parameters of the integrated photonic circuit in response to the excitation sources. Additionally, each update operation at a particular time step may also be based at least in part on the previous (e.g., immediately preceding) time step.

[0113] As a result, the operational simulation simulates the interaction between the photonic device (i.e., the photonic integrated circuit) and the physical stimulus (i.e., one or more excitation sources) to determine a simulated output of the photonic device (e.g., at one or more of the output ports or regions) in response to the physical stimulus. The interaction may correspond to any one or combination of perturbations, retransmissions, attenuation, dispersion, refraction, reflection, diffraction, absorption, scattering, amplification, or other perturbations of the physical stimulus in the electromagnetic domain due at least in part to the structural parameters of the photonic device and the underlying physics governing the operation of the photonic device. Thus, the operational simulation simulates how the field response of the virtual prototype changes due to the excitation sources over multiple time steps (e.g., from an initial time step to a final time step having a predetermined step size).

[0114] In some embodiments, the simulated output may be utilized to determine one or more simulated performance metrics. For example, a pump source may correspond to a selected one of a plurality of distinct wavelength channels, each mapped to one of a plurality of output ports. The pump source may begin at or be disposed proximate to a first communication region (i.e., input port) when performing an operational simulation. Then, during the operational simulation, a field response at the output port mapped to the selected one of the plurality of distinct wavelength channels may be utilized to determine a simulated power transmission of the photonic integrated circuit for the selected distinct wavelength channel. In other words, the operational simulation may be utilized to determine a simulated performance metric that includes determining a simulated power transmission of the pump source from the first communication region, through the design region, to a respective one of a plurality of second communication regions mapped to the selected one of the plurality of distinct wavelength channels. In some embodiments, the pump source may cover the entire spectrum of the multiple output ports (e.g., the pump source spans a target frequency range of at least a portion of the bandpass region, corresponding transition band region, and corresponding stopband region of each of the multiple separate wavelength channels) to determine a performance metric (i.e., simulated power transfer) associated with each of the separate wavelength channels of the photonic integrated circuit. In some embodiments, one or more frequencies spanning the passband of a given one of the multiple separate wavelength channels are randomly selected to optimize the design (e.g., batch gradient descent while having the full width of each passband, including ripples within the passband, meet the target specifications). In the same or other embodiments, each of the multiple separate wavelength channels has a common bandwidth with a different center wavelength.

[0115] The method 800 then proceeds to a continuation terminal ("terminal A"). From terminal A (FIG. 8B), the method 800 proceeds to block 816, which illustrates determining a loss metric based on a comparison of the simulated performance metric and the as-manufactured performance metric. In some embodiments, the loss metric is determined via a loss function that includes both the simulated performance metric and the as-manufactured performance metric as input values. In some embodiments, the loss function may be a measure of the difference between the simulated performance metric and the as-manufactured performance metric, including, but not limited to, the mean squared error between the values.

[0116] At decision block 818, a determination is made as to whether the difference between the simulated performance metrics and the as-manufactured performance metrics is within a threshold range and / or the loss metrics have substantially converged such that improvement is stopped. In some embodiments, the structural parameters of the integrated photonic circuit design domain are modified as the iterations are performed to match as closely as possible the structure of the fabricated physical device, as indicated by this convergence. In some embodiments, the determination at decision block 818 is based solely on whether a predetermined number of iterations have been performed.

[0117] If it is determined that the loss metric has not converged, then the result of decision block 818 is NO and method 800 proceeds to block 820. Block 820 illustrates backpropagating the loss metric via a loss function through virtual prototypes to determine the effect of changes in structural parameters on the loss metric (i.e., structural gradient). The loss metric is treated as an adjoint or virtual source and is incrementally backpropagated from the final time step to earlier time steps in a backward simulation to determine the structural gradient.

[0118] Block 822 indicates updating structural parameters of the test design based on the structural gradient to adjust the loss metric. In some embodiments, adjusting the loss metric may reduce the loss metric. However, in other embodiments, the loss metric may be adjusted or otherwise compensated for in a manner that does not necessarily reduce the loss metric. In one embodiment, adjusting the loss metric maintains manufacturability while providing a general direction within the parameterization space, ultimately resulting in a design that results in performance that more closely matches the as-manufactured performance metric. In some embodiments, the revised description is generated by utilizing an optimization scheme after cycles of adjoint simulation and operation via a gradient descent algorithm, a Markov chain Monte Carlo algorithm, or other optimization technique. In other words, the iterative cycles of simulating the physical device, determining the loss metric, backpropagating the loss metric, and updating the structural parameters to adjust the loss metric may be performed continuously until the loss metric substantially converges such that the difference between the simulated performance metric and the as-manufactured performance metric is within a threshold range. In some embodiments, the term “converge” may simply indicate that the difference is within a threshold range and / or below some threshold. In some embodiments, the term "converge" may indicate that the error between the simulated performance metric and the as-manufactured performance metric is no longer shrinking (i.e., reaching a local or global minimum) after one or more optimization iterations. The method 800 then returns to block 808 via a continuation terminal ("terminal B") to iterate using the updated test design.

[0119] Returning to decision block 818, if it is determined that the loss metric has converged, then the result of decision block 818 is YES and method 800 proceeds to block 824. At block 824, the test design updated by one or more iterations of method 800 is designated as the as-manufactured design, i.e., the optimized test design is deemed to accurately represent the actual structure of the test physical device when it is manufactured by the manufacturing system.

[0120] Method 800 then proceeds to decision block 826, where a determination is made as to whether additional devices remain to be processed. As mentioned above, in some embodiments, method 800 may be performed using multiple devices to highlight the diverse capabilities of the manufacturing system. In some embodiments, method 800 may include testing multiple devices fabricated on a single wafer. Because a large number of devices can be fabricated on a single 300 mm wafer, this may allow a large number of different designs to be efficiently tested. In some embodiments, multiple devices fabricated on a single wafer may be tested using wafer-scale test tools. In some embodiments, multiple devices fabricated on a wafer may be designed using a “design-for-test” approach to exercise the full range of capabilities of the manufacturing system. Additionally, simulated performance metrics and as-manufactured performance metrics may be collected using wavelengths other than those intended for device operation to provide additional data for the optimization process.

[0121] Thus, if method 800 has processed two or more devices and more devices remain to be processed, then the result of decision block 826 is YES and method 800 returns to block 802 via the continuation terminal ("terminal C") to process the test design for the next device. In this subsequent iteration, if the test designs for each device were provided together to a manufacturing system to fabricate test physical devices on a single wafer, at least some of the actions of blocks 802, 804, and / or 806 may have been performed during the previous iteration for the next device and may be skipped in the subsequent iteration.

[0122] Returning to decision block 826, if all of the devices have been processed, then the result of decision block 826 is NO and method 800 proceeds to block 828. Block 828 depicts updating the manufacturing model based on the differences between the as-manufactured design and the test design. In some embodiments, the manufacturing model includes a sequence of differentiable operations (or composable functions), each of which is parameterized with several degrees of freedom. Some non-limiting examples of differentiable operations in the manufacturing model may include filter operations (e.g., convolution with a square, rhombus, or cone-shaped function, etc.) and projection operations (e.g., sigmoid, etc.). Updates may be applied to the manufacturing model using any suitable technique. For example, because the manufacturing model includes differentiable operations, a gradient of the error of the manufacturing model may be determined, and the manufacturing model may be updated based on the gradient. As another example, the JAX machine learning framework provided by Google, LLC may be used to optimize / update parameters of the manufacturing model. In some embodiments, the manufacturing model may include a neural network, which may be updated using any suitable technique, including, but not limited to, gradient descent or Adam optimizer.

[0123] In block 830, the updated manufacturing model is provided for simulation of a new initial design, for which the updated manufacturing model can be used in an iterative design process similar to that described above in Figures 7A-7B, with the components 754 generating structural parameters 706 that accurately replicate the actual results produced by the manufacturing system, thus enabling the reverse design of high performance devices.

[0124] The method 800 then proceeds to an end block and ends.

[0125] It will be appreciated that method 800 derives an as-manufactured design for each test design. One advantage of using method 800 to optimize a manufacturing model is that the test design and as-manufactured design pair can be stored for future reference, and the stored test design / as-manufactured design pair can be used to derive multiple different manufacturing models (including manufacturing models for different architectures) without having to reprocess the test design (i.e., once a test design and as-manufactured design pair is obtained, block 828 can be executed multiple times to optimize different manufacturing models without repeating previous portions of method 800). This allows for greater exploration of manufacturing model architectures with reduced computational burden.

[0126] That said, in some embodiments, it may be desirable to reduce the amount of computational time required to train a given manufacturing model. Thus, in some embodiments, the optimization technique may directly optimize the manufacturing model instead of deriving an as-manufactured design as an intermediate step. FIGS. 9A and 9B are flowcharts illustrating a non-limiting exemplary embodiment of a method 900 for optimizing a manufacturing model that can be used to simulate the manufacturing of a physical device, such as a photonic integrated circuit, in accordance with various aspects of the present disclosure. In method 900, similar to method 800, performance metrics for a simulation of a test design are compared to performance metrics for a test physical device manufactured based on the same test design. However, instead of optimizing the test design as described in method 800, method 900 directly optimizes the manufacturing model using the difference between the simulated performance metrics and the as-manufactured performance metrics.

[0127] From a start block, method 900 proceeds to block 902, where device specifications for a plurality of physical devices are received. At block 904, the test design is provided to a manufacturing system to manufacture the test physical device. At block 906, performance of the test physical device is measured to determine as-manufactured performance metrics. At block 908, structural parameters are determined based on the test design using a manufacturing model. At block 910, a virtual prototype is configured to represent the structural parameters. Block 912 illustrates mapping each of a plurality of distinct wavelength channels to a respective one of a plurality of second communication regions within the virtual prototype, and block 914 illustrates performing operational simulations of the structural parameters in response to one or more excitation sources to determine simulated performance metrics.

[0128] It will be understood that the steps of method 900 from block 902 to block 914 are the same as the steps of method 800 from block 802 to block 814. Therefore, the steps of blocks 902 to 914 will not be described again here for the sake of brevity. However, it should be noted that while the use of the manufacturing model to determine the structural parameters based on the test design was optional in block 808, these actions are not optional in block 908 because the manufacturing model is optimized in an iterative loop to affect the structural parameters.

[0129] From block 914, the method 900 proceeds to a continuation terminal ("terminal A"). From terminal A (FIG. 9B), the method 900 proceeds to block 916, where a loss metric is determined based on a comparison of the simulated performance metric and the as-manufactured performance metric. Again, block 916 is similar to block 816 of method 800 and, therefore, for the sake of brevity, will not be described again here.

[0130] At decision block 918, a determination is made as to whether the difference between the simulated performance metrics and the as-manufactured performance metrics is within a threshold range and / or the loss metrics have substantially converged such that improvement is stopped. In some embodiments, the structural parameters generated by the manufacturing model are modified as the iterations proceed to match as closely as possible the structure of the manufactured physical device, as indicated by this convergence. In some embodiments, the determination at decision block 918 is based solely on whether a predetermined number of iterations have been performed.

[0131] If it is determined that the loss metric has not converged, then the result of decision block 918 is NO and method 900 proceeds to block 920. In block 920, the loss metric is backpropagated through the virtual prototypes to determine the structural gradient. Again, block 920 is similar to block 820 of method 800 and, therefore, for the sake of brevity, will not be described again here.

[0132] At block 922, the manufacturing model is updated based on the structural gradient to adjust the loss metric. This is a departure from the actions of method 800 in which the structural gradient was used to adjust the test design. Instead, updating the manufacturing model means that instead of optimizing the test design to more closely resemble the as-manufactured structure of the test physical device, the manufacturing model is optimized so that, given the test design, the structural parameters it generates more closely resemble the as-manufactured structure of the test physical device. The structural gradient may be used to update the manufacturing model in any suitable manner. In some embodiments, the structural gradient may be used to determine the gradient of the manufacturing model, which may then be used in the optimization process. In some embodiments, backpropagation of the loss metric may also determine the gradient of the manufacturing model. In some embodiments, the optimization process may include JAX, gradient descent, or Adam optimizer, as described above. Method 900 then returns to block 908 via a continuation terminal (“terminal B”) to iterate using the updated manufacturing model.

[0133] Returning to decision block 918, if it is determined that the loss metric has converged, then the result of decision block 918 is YES and method 900 proceeds to block 924. At decision block 924, a determination is made as to whether additional devices remain to be processed. As described above, similar to method 800, in some embodiments, method 900 may be performed using multiple devices to illustrate a wide variety of functions of the manufacturing system. Thus, if method 900 has processed one device and additional devices and then additional devices remain to be processed, then the result of decision block 924 is YES and method 900 returns to block 902 via the continuation terminal (“terminal C”) to process the test design for the next device. In this subsequent iteration, if the test designs for each device were provided together to the manufacturing system to fabricate test physical devices on a single wafer, then at least some of the actions of blocks 902, 904, and / or 906 may have been performed during the previous iteration for the next device and may be skipped in the subsequent iteration.

[0134] Returning to decision block 924, if all of the devices have been processed, then the result of decision block 924 is NO and method 900 proceeds to block 926, where an updated manufacturing model is provided for simulation of a new initial design. Again, the updated manufacturing model can be used in an iterative design process similar to that described above in FIGS. 7A-7B for the new initial design, with component parts 754 generating structural parameters 706 that accurately replicate the actual results produced by the manufacturing system, thus enabling the reverse design of high performance devices. Note that in method 900, the manufacturing model is optimized without also deriving the as-manufactured design, reducing the computational complexity of the optimization process.

[0135] The method 900 then proceeds to an end block and ends.

[0136] In the foregoing description, numerous specific details are set forth to provide an understanding of various embodiments of the present disclosure. However, those skilled in the art will recognize that the techniques described herein may be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.

[0137] Throughout this specification, the references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0138] The order in which some or all of the blocks appear in each method flowchart should not be considered limiting. Rather, one skilled in the art having the benefit of this disclosure will understand that the actions associated with some of the blocks may be performed in various orders not illustrated, or even in parallel.

[0139] The processes described above are described with reference to computer software and hardware. The described techniques may constitute machine-executable instructions embodied in a tangible or non-transitory machine (e.g., computer) readable storage medium that, when executed by a machine, causes the machine to perform the described operations. Furthermore, the processes may be embodied in application specific integrated circuits ("ASICs") or other hardware, such as

[0140] The above description of illustrated embodiments of the present invention, including what is described in the Abstract, is not intended to be exhaustive or to limit the invention to the precise form disclosed. While specific embodiments of and examples for the present invention have been described herein for illustrative purposes, those skilled in the art will recognize that various modifications are possible within the scope of the present invention.

[0141] These modifications can be made to the invention in light of the above detailed description. In general, the terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed herein. Rather, the scope of the invention should be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.

Claims

1. 1. A non-transitory computer-readable medium having stored thereon computer-executable instructions that, upon execution by one or more processors of a computing system, cause the computing system to perform actions for deriving a manufacturing model for a manufacturing system using a reverse engineering process, the actions comprising: determining a test design for a test physical device; measuring performance of instances of the test physical device manufactured by the manufacturing system using the test design to determine as-manufactured performance metrics; optimizing the test design via a first loss function based on a difference between a simulated performance metric of the test design and the as-manufactured performance metric to determine an as-manufactured design, the first loss function determining a structural gradient by back-propagating a loss metric through the test design; optimizing a manufacturing model using a second loss function based on differences between the test design and the as-manufactured design; storing the optimized manufacturing model for use in optimizing new designs for new physical devices; 1. A non-transitory computer-readable medium, comprising:

2. The action is optimizing the new design for the new physical device using the manufacturing model; and submitting the optimized new design for the new physical device to the manufacturing system for manufacturing instances of the new physical device; The non-transitory computer-readable medium of claim 1 , further comprising:

3. The action is The non-transitory computer-readable medium of claim 1 , further comprising transmitting the test design to the manufacturing system for manufacturing the instance of the test physical device.

4. The action is 4. The non-transitory computer-readable medium of claim 3, further comprising validating an output of the manufacturing model by comparing the output of the manufacturing model with a scanning electron microscope (SEM) image of the instance of the test physical device.

5. the manufacturing model includes a neural network; 10. The non-transitory computer-readable medium of claim 1, wherein optimizing the manufacturing model includes using at least one of a gradient descent and an Adam optimizer.

6. the manufacturing model includes a sequence of differentiable operations; The non-transitory computer-readable medium of claim 1 , wherein optimizing the manufacturing model includes using a JAX framework.

7. The non-transitory computer-readable medium of claim 1 , wherein the test design includes at least one performance objective given expected inputs.

8. The non-transitory computer-readable medium of claim 7 , wherein determining the test design comprises providing the at least one performance goal to a reverse engineering process to generate the test design.

9. the expected input includes one or more intended wavelength spectrums for operation of the test physical device; 8. The non-transitory computer-readable medium of claim 7, wherein measuring performance of the instance of the test physical device comprises measuring performance of the instance of the test physical device within the one or more intended wavelength spectrums and outside the one or more intended wavelength spectrums.

10. determining the test design for the test physical device includes determining a plurality of test designs for a plurality of test physical devices fabricated on a single wafer; 10. The non-transitory computer-readable medium of claim 1, wherein measuring performance of the instance of the test physical device comprises measuring performance of instances of the multiple test physical devices fabricated on the single wafer.

11. 1. A computer-implemented method that, in response to execution by one or more processors of a computing system, causes the computing system to perform actions for deriving a manufacturing model for a manufacturing system using a reverse engineering process, the actions comprising: determining a test design for a test physical device; measuring performance of instances of the test physical device manufactured by the manufacturing system using the test design to determine as-manufactured performance metrics; determining structural parameters for simulation based on the test design and the manufacturing model; simulating performance of the test design using the structural parameters to determine simulated performance metrics; optimizing the manufacturing model via a loss function based on a difference between the simulated performance metric and the as-manufactured performance metric, the optimization being performed by updating the manufacturing model based on a structural gradient, the structural gradient being determined by backpropagating a loss metric through the test design; and storing the optimized manufacturing model for use in optimizing new designs for new physical devices; 11. A computer-implemented method comprising:

12. optimizing the new design for the new physical device using the manufacturing model; and submitting the optimized new design for the new physical device to the manufacturing system for manufacturing instances of the new physical device; The computer-implemented method of claim 11 further comprising:

13. transmitting the test design to the manufacturing system for manufacturing the instance of the test physical device; The computer-implemented method of claim 11 further comprising:

14. Validating the output of the manufacturing model by comparing the output of the manufacturing model with a scanning electron microscope (SEM) image of the instance of the test physical device; The computer-implemented method of claim 13 further comprising:

15. the manufacturing model includes a neural network; 12. The computer-implemented method of claim 11, wherein optimizing the manufacturing model includes using at least one of a gradient descent and an Adam optimizer.

16. the manufacturing model includes a sequence of differentiable operations; The computer-implemented method of claim 11 , wherein optimizing the manufacturing model includes using a JAX framework.

17. The computer-implemented method of claim 11 , wherein the test design includes at least one performance objective given expected inputs.

18. 20. The computer-implemented method of claim 17, wherein determining the test design comprises providing the at least one performance goal given the predicted input to a reverse engineering process to generate the test design.

19. the expected input includes one or more intended wavelength spectrums for operation of the test physical device; 20. The computer-implemented method of claim 17, wherein measuring performance of the instance of the test physical device comprises measuring performance of the instance of the test physical device within the one or more intended wavelength spectrums and outside the one or more intended wavelength spectrums.

20. determining the test design for the test physical device includes determining a plurality of test designs for a plurality of test physical devices fabricated on a single wafer; 12. The computer-implemented method of claim 11, wherein measuring performance of the instance of the test physical device comprises measuring performance of instances of the multiple test physical devices fabricated on the single wafer.

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