Silicon nitride sintered wafer and method for manufacturing a single crystal using the same

Abstract

The flat wafer made of sintered silicon nitride is characterized in that at least one surface thereof has an average value of the average length RSm of a plurality of roughness curve elements, having a plurality of line segments passing through the center of that surface as the reference length, within the range from 100 μm to 350 μm. Also, each of the average length RSm of the plurality of roughness curve elements is preferably within the range from 10 μm to 800 μm. Also, the average value of the maximum valley depth Rv of a plurality of roughness curves, having a plurality of line segments passing through the center of the surface as the reference length, is preferably within the range from 0.04 μm to 0.4 μm.

Description

Technical Field

[0001] The embodiments described below generally relate to a silicon nitride sintered body wafer and a method for manufacturing a single crystal using the same.

Background Art

[0002] Silicon nitride substrates are used as circuit boards by taking advantage of their high strength and high thermal conductivity. For example, Japanese Patent No. 6293772 (Patent Document 1) discloses a substrate having a thermal conductivity of 50 W / m·K or more and a three-point bending strength of 600 MPa or more. The silicon nitride substrate of Patent Document 1 has excellent insulation performance such as dielectric breakdown voltage. In order to utilize the insulation property of the silicon nitride substrate, its application to uses other than circuit boards has also been studied. For example, Japanese Patent No. 6992364 (Patent Document 2) and Japanese Unexamined Patent Application Publication No. 2006-282500 (Patent Document 3) use a silicon nitride substrate as a substrate for arranging a single crystal. Such a substrate for arranging a single crystal is called a wafer.

Prior Art Documents

[0005] The silicon nitride sintered wafer according to the embodiment is a flat silicon nitride sintered wafer characterized in that at least one surface has an average value RSm of the average length of a plurality of roughness curve elements, the average length of a plurality of line segments passing through the center of that surface, within the range of 100 μm to 350 μm. [Brief explanation of the drawing]

[0006] [Figure 1] A perspective view showing an example of a silicon nitride sintered wafer according to an embodiment. [Figure 2] A top view showing an example of a silicon nitride sintered wafer according to an embodiment. [Figure 3] A side view showing an example of a method for manufacturing a single crystal (without a thin film) according to the embodiment. [Figure 4] A side view showing an example of a method for manufacturing a single crystal (with a thin film) according to the embodiment. Embodiment

[0007] The silicon nitride sintered wafer according to the embodiment is formed in a flat plate shape, and at least one surface is characterized in that the average value of the average length RSm of a plurality of roughness curve elements, whose reference length is a plurality of line segments passing through the center of the surface, is in the range of 100 μm to 350 μm.

[0008] Figures 1 and 2 show an example of a silicon nitride sintered wafer according to an embodiment. In the figures, reference numeral 1 denotes a silicon nitride sintered wafer, reference numeral 2 denotes one face of the silicon nitride sintered wafer 1, reference numeral 3 denotes the center of face 2, reference numeral 4 denotes multiple line segments passing through the center 3 (for example, in the case of a disc shape, "line segment" means the diameter, and in the case of a polygonal shape, "line segment" means the diagonal), and reference numerals 41 and 42 denotes two line segments of line segment 4.

[0009] The silicon nitride sintered wafer 1 consists of a flat silicon nitride sintered body. Figure 1 shows an example of a disc shape. The wafer according to this embodiment is not limited to a disc shape, but can be made into various shapes such as polygons (squares, etc.) or ellipses. Furthermore, the silicon nitride sintered wafer 1 according to this embodiment is used to arrange single crystals 5 (shown in Figures 3 and 4) in order to manufacture single crystals 7 (shown in Figures 3 and 4). In other words, surface 2 is used as a place to arrange the single crystals 5. For this reason, it is distinguished from those used in silicon nitride circuit boards in which a metal plate is bonded to a silicon nitride substrate.

[0010] The silicon nitride sintered wafer 1 is characterized in that at least one surface has an average value RSm of the average length of multiple roughness curve elements, whose reference length is a plurality of line segments passing through the center of that surface, within the range of 100 μm to 350 μm. Hereafter, the silicon nitride sintered wafer 1 may simply be referred to as wafer 1.

[0011] First, let's explain the center 3 and the multiple line segments 4. The center 3 is the centroid of face 2. If face 2 is circular, then the center 3 is the center point. Therefore, if face 2 is circular, each of the multiple line segments 4 is a diameter. Also, if face 2 is not circular, then the centroid is the center 3. The multiple line segments 4 pass through the center 3 and form straight lines from one end of face 2 to the opposite end. The silicon nitride sintered wafer 1 according to this embodiment is characterized in that the average value of the average length RSm of a plurality of roughness curve elements, with a plurality of line segments passing through the center 3 as the reference length, is in the range of 100 μm to 350 μm.

[0012] The average length RSm of the roughness curve element is the average value of the length Xs of the contour curve element at the reference length. It is a parameter that evaluates the surface irregularities of the silicon nitride sintered wafer 1 in the depth direction as the magnitude of the line segment passing through the center 3 of the surface 2. The average length RSm of the roughness curve element is defined in JIS-B-0601 (2013). As defined in JIS-B-0601 (2013), determining the average length RSm of the roughness curve element requires identifying the minimum height and minimum length that can be judged as peaks and valleys. The standard value for the minimum identifiable height is 10% of the maximum height roughness Rz. The standard value for the minimum identifiable length is 1% of the reference length. The average value of the length Xs of the contour curve element shall be calculated after determining the peaks and valleys so as to satisfy both of these conditions. Note that JIS-B-0601 corresponds to ISO 4287.

[0013] Furthermore, the measurement methods for RSm, Rt, and Rv shall be in accordance with JIS-B-0601 (2013). The measurement conditions shall be: reference length: 10 mm or more (for example, the diameter in the case of a disc-shaped wafer 1), measurement speed: 0.6 mm / s, shape removal: least squares line, λs filter: yes, λs cutoff ratio: 300, cutoff type: Gaussian, cutoff wavelength (λc): 0.8 mm. If a reference length of 10 mm or more cannot be secured in a single measurement, it may be divided into multiple measurements. Measurements shall be taken along a straight line passing through the center under these conditions. In addition, a contact-type roughness meter shall be used for measurement. If an optical roughness meter is used, there is a possibility that the polished surface cannot be measured due to reflection. Laser type is an example of an optical roughness meter.

[0014] Furthermore, RSm, Rt, and Rv are measured along multiple line segments 4. The multiple line segments 4 can be any number as long as they pass through the center 3. For example, if there are 5 line segments 4 passing through the center 3, the average value of the 5 RSm values ​​is measured. The wafer 1 according to this embodiment is characterized in that the average value of RSm on any of the line segments 4 is within the range of 100 μm to 350 μm.

[0015] The silicon nitride sintered wafer 1 according to the embodiment has an average value of RSm on a plurality of line segments 4 within the range of 100 μm or more and 350 μm or less. As described above, RSm is the length of one cycle of mountains and valleys. As will be described later, the silicon nitride sintered wafer 1 is used in the process of arranging the single crystal 5. When the average value of RSm is within a predetermined range, both the bonding strength and the adhesion can be achieved.

[0016] When RSm is small, it indicates that one cycle of mountains and valleys is short. Also, when RSm is large, it indicates that one cycle of mountains and valleys is long. When RSm is small, the anchor effect can be obtained. On the other hand, when RSm is small, a gap is likely to be formed between the wafer 1 and the single crystal 5. Therefore, it is preferable that the average value of RSm on the plurality of line segments 4 is within the range of 100 μm or more and 350 μm or less, and further within the range of 150 μm or more and 300 μm.

[0017] The fact that the average value of RSm of the plurality of line segments 4 passing through the center 3 is within a predetermined range indicates that the variation of RSm in the diameter direction is small. Thereby, the variation in adhesion when arranging the single crystal 5 can be suppressed. When RSm is less than 100 μm, although the anchor effect can be obtained, there is a possibility that a gap may be formed between the wafer 1 and the single crystal 5. Also, when RSm is larger than 350 μm, although the gap between the wafer 1 and the single crystal 5 can be suppressed, the bonding strength may decrease.

[0018] Also, the back surface (the surface on the side where the single crystal 5 is not arranged), which is the other surface of the wafer 1, may be a polished surface similar to the front surface, or may not be polished. By making the back surface of the wafer 1 a polished surface similar to the front surface (the average value of RSm is within the range of 100 μm or more and 350 μm or less), both the front and back surfaces can be used as surfaces for arranging the single crystal 5. Thereby, in the process of arranging the single crystal 5, the front and back of the wafer 1 can be dealt with without concern. In other words, if the front and back of the wafer 1 can be distinguished, it is preferable not to polish the back surface. Not polishing the back surface can prevent cost increase.

[0019] As described below, the wafer 1 on which the single crystal 5 is disposed is preferably circular. By controlling the RSm of the plurality of line segments 4, it is possible to suppress variations in the bonding strength and adhesion in the diameter direction of the circle.

[0020] Also, the RSm is preferably within the range of 10 μm or more and 800 μm or less. As described above, the RSm is measured with a reference length of 10 mm or more. By ensuring that the RSm measured under this condition is within the range of 10 μm or more and 800 μm or less respectively, variations in the RSm can be suppressed. Thereby, the adhesion can be further improved. When considering the bonding strength between the wafer 1 made of a silicon nitride sintered body and the single crystal 5, if the bonding strength of the outer peripheral portion is good, defects such as peeling and displacement can be suppressed.

[0021] Also, the average value of the maximum valley depth Rv of a plurality of roughness curves with a plurality of line segments 4 passing through the center 3 as the reference length is preferably within the range of 0.04 μm or more and 0.4 μm or less. For example, the number of the plurality of line segments 4 passing through the center 3 is set to 5, and the average value of the 5 Rv values is measured. The average value of Rv is the average value when Rv on the plurality of line segments 4 is measured with a reference length of 10 mm or more.

[0022] Also, the maximum valley depth Rv of a plurality of roughness curves with a plurality of line segments 4 passing through the center 3 as the reference length is preferably within the range of 0.02 μm or more and 2 μm or less respectively. Here, these are the respective Rv values obtained with a reference length of 10 mm or more on the plurality of line segments 4. The maximum valley depth Rv of the roughness curve is the depth of the largest valley of the roughness curve. When the valley is deep, the Rv becomes large. By ensuring that the average value of Rv of the plurality of line segments 4 passing through the center 3 is within the range of 0.04 μm or more and 0.4 μm or less, the bonding strength and adhesion can be further improved. Also, by ensuring that the respective Rv values obtained with a reference length of 10 mm or more are within the range of 0.02 μm or more and 2 μm or less, further improvement can be achieved.

[0023] Furthermore, it is preferable that the average value of the maximum height Rt of multiple roughness curves, with multiple line segments 4 passing through the center 3 as the reference length, is within the range of 0.4 μm to 2 μm. For example, the number of multiple line segments 4 passing through the center 3 is set to 5, and the average value of the 5 Rt values ​​is measured. The average value of Rt is the average value obtained when measuring Rt on multiple line segments 4 over a reference length of 10 mm or more (for example, the diameter in the case of a disc-shaped wafer 1). Furthermore, it is preferable that the maximum height Rt of the multiple roughness curves, with multiple line segments 4 passing through the center 3 as the reference length, is within the range of 0.1 μm to 4 μm. These are the Rt values ​​obtained for each of the multiple line segments 4 with a reference length of 10 mm or more. The maximum height Rt of the roughness curve is the height of the largest peak in the roughness curve.

[0024] By having the average value of multiple Rt values, with reference lengths for multiple line segments 4 passing through the center 3, be within the range of 0.4 μm to 2 μm, the bonding strength and adhesion can be further improved. Furthermore, by having the individual Rt values ​​obtained for reference lengths of 10 mm or more be within the range of 0.1 μm to 4 μm, further improvements can be made.

[0025] As described above, it is effective to control RSm first, and then control Rv and Rt. Furthermore, Rv and Rt can be applied individually or in combination. RSm controls one cycle of peaks and valleys, Rv controls the depth of the valleys, and Rt controls the height of the peaks. This ensures a balance between joint strength and adhesion.

[0026] Furthermore, the silicon nitride sintered body preferably has a thermal conductivity of 50 W / m·K or higher and a three-point bending strength of 600 MPa or higher. High thermal conductivity improves heat dissipation. Also, high strength reduces the possibility of damage during transportation when the single crystal 5 is placed. In other words, throughput improves. In addition, the silicon nitride substrate mainly consists of silicon nitride crystal particles with an aspect ratio of 1.5 or higher. Strength can be increased by the entanglement of elongated silicon nitride crystal particles. Also, the random orientation of elongated silicon nitride crystal particles makes it easier to control RSm.

[0027] Furthermore, it is preferable that the silicon nitride sintered body contains grain boundary phase in the range of 1% to 20% by mass. The inclusion of grain boundary phase allows the density of the silicon nitride sintered body to be within the range of 95% to 100% of the theoretical density. It is also effective in controlling surface roughness.

[0028] Furthermore, the coefficient of linear expansion of the silicon nitride sintered body is 2.4 × 10⁻⁶. ―6 / K or more 3.2×10 ―6 It is preferable that the temperature be within the range of / K or less. The coefficient of linear expansion is the value from room temperature to 300°C, as measured by the average coefficient of linear expansion test in JIS-C-2141. The coefficient of linear expansion is the rate at which the length or volume of an object expands per unit temperature due to the rise in temperature. The coefficient of linear expansion is sometimes called the coefficient of thermal expansion. Examples of substrates on which the single crystal 5 is placed include sapphire substrates and aluminum nitride substrates. The coefficient of linear expansion of a sapphire substrate is 5.5 × 10⁻⁶. ―6 It is approximately / K. Furthermore, the coefficient of linear thermal expansion of the aluminum nitride substrate is 4.5 × 10⁻⁶. ―6 The thermal expansion coefficient is approximately / K. Silicon nitride sintered bodies exhibit low linear expansion. Therefore, thermal deformation is suppressed. By suppressing thermal deformation, the aforementioned advantages of surface roughness can be taken advantage of. For example, the epitaxial growth of gallium nitride (GaN) rises to around 1000°C. Also, the epitaxial growth of silicon carbide (SiC) rises to around 1500°C. The linear expansion coefficient of silicon nitride sintered bodies can be controlled by the content of the grain boundary phase. For this reason, the content of the grain boundary phase is preferably within the range of 1% by mass to 20% by mass, and more preferably within the range of 3% by mass to 15% by mass.

[0029] Furthermore, the surface 2 of the silicon nitride sintered wafer 1 is preferably disc-shaped. The shape of the surface 2 of the silicon nitride sintered wafer 1 can be circular or polygonal when viewed from above. Examples of circular shapes include perfect circles and ellipses. Examples of polygonal shapes include triangles, squares, pentagons, and hexagons.

[0030] Single crystals 5 are often disc-shaped. For example, the diameter and thickness of silicon single crystals are specified by SEMI standards (Semiconductor Equipment and Materials International). Silicon single crystals are sometimes called silicon wafers. By making the diameter (the line segment passing through the center 3) of the single crystal 5 and the silicon nitride sintered wafer 1 the same, it becomes easier to use them in the semiconductor device manufacturing process.

[0031] Furthermore, the diameter of the surface 2 (the line segment passing through the center 3) of the silicon nitride sintered wafer 1 is preferably 40 mm or more. Also, the diameter of the surface 2 (the line segment passing through the center 3) of the silicon nitride sintered wafer 1 is preferably the same as the diameter of the single crystal 5. Furthermore, the thickness of the silicon nitride sintered wafer 1 is preferably within the range of 0.2 mm to 3 mm.

[0032] The silicon nitride sintered wafer 1 described above can be used in the process of placing the single crystal 5. Figures 3 and 4 show an example of the structure of a single crystal 7 obtained by placing the single crystal 5 on the silicon nitride sintered wafer 1. In the figures, reference numeral 1 denotes the silicon nitride sintered wafer, reference numeral 5 denotes the single crystal, reference numeral 6 denotes the thin film, and reference numeral 7 denotes the single crystal.

[0033] Examples of single crystals include silicon and compound semiconductors. Compound semiconductors include GaN-based, InN-based, AlN-based, and SiC-based materials. GaN-based materials include GaN, GaInN, GaAlN, and GaInAlN.

[0034] The process of placing a single crystal 5 on a silicon nitride sintered wafer 1 includes steps such as stacking the single crystal 5 on the silicon nitride sintered wafer 1 or growing the single crystal 5.

[0035] Furthermore, the process of stacking single crystals 5 on a silicon nitride sintered wafer 1 can be carried out by directly placing the single crystals 5 on the silicon nitride sintered wafer 1, as shown in Figure 3. Alternatively, a thin film 6 may be formed on the silicon nitride sintered wafer 1, and then the single crystals 5 may be placed on the formed thin film 6. The process of growing the single crystals 5 can be carried out by a vapor phase method, a liquid phase method, etc. A thin film 6 may be formed on the silicon nitride sintered wafer 1 before carrying out the crystal growth process. It is preferable that the thin film 6 formed on the silicon nitride sintered wafer 1 has the same composition as the single crystals 5. A thin film 6 with the same composition as the single crystals 5 can play the role of a seed crystal in the crystal growth process. The wafer 1 according to this embodiment functions effectively even if the single crystals 5 are placed via a thin film 6.

[0036] A process for manufacturing a semiconductor device can be carried out after placing a single crystal 5 on a silicon nitride sintered wafer 1. In the semiconductor device manufacturing process, the silicon nitride sintered wafer 1 may be used as a substrate. Alternatively, the silicon nitride sintered wafer 1 may be removed and only the single crystal 5 may be used in the semiconductor device manufacturing process. A silicon nitride sintered wafer 1 with a single crystal 5 placed on it, or a wafer with a single crystal 5 placed via a thin film 6, is called a single crystal body.

[0037] By controlling the RSm of the surface 2 of the silicon nitride sintered wafer 1 on which the single crystal 5 is placed, it is possible to achieve both bonding strength and adhesion. The widening of the gap between the silicon nitride sintered wafer 1 and the single crystal 5 due to stress caused by the difference in thermal expansion between the silicon nitride sintered wafer 1 and the single crystal 5 can be suppressed. Furthermore, this can be improved by controlling Rv and Rt.

[0038] Next, a method for manufacturing the silicon nitride sintered wafer 1 according to the embodiment will be described. The silicon nitride sintered wafer 1 according to the embodiment is not limited to the above configuration, but the following are examples of methods for obtaining it with good yield. First, silicon nitride powder and sintering aid powder are prepared. The amount of sintering aid added should be within the range of 1% to 20% by mass. The sintering aid may be one or more oxides selected from rare earth elements, magnesium, hafnium, and titanium. In particular, it is preferable to use a rare earth element oxide as an essential component and to add one or more oxides selected from magnesium, hafnium, and titanium.

[0039] A mixed raw material powder of silicon nitride powder and sintering aid powder is prepared. The mixed raw material powder is mixed with a binder and other components to prepare a raw material powder slurry.

[0040] Next, a molding process is carried out using the raw material powder slurry. Known methods such as the doctor blade method and the mold molding method can be used for the molding process.

[0041] Furthermore, it is preferable to process the obtained molded body into the desired shape. For example, if a disc-shaped silicon nitride sintered wafer is to be obtained, it is preferable to make the molded body disc-shaped. Also, the molded bodies may be stacked to adjust the thickness.

[0042] Next, the molded body is degreased. The degreasing process is preferably carried out at a temperature between 300°C and 700°C. Then, the degreased body is sintered. The sintering process is preferably carried out at a temperature between 1600°C and 1900°C.

[0043] Next, the surface of the obtained silicon nitride sintered body is polished. The surface is polished so that the RSm, Rv, and Rt of multiple line segments 4 passing through the center 3 of surface 2 are within a predetermined range. To achieve this, it is effective to perform the polishing process while rotating the flat silicon nitride sintered body.

[0044] (Examples) (Examples 1-5, Comparative Examples 1-2) The silicon nitride sintered bodies shown in Table 1 were prepared. These silicon nitride sintered bodies were prepared by adding one or more rare earth element oxides and oxides of magnesium, hafnium, and titanium as sintering aids. All were disc-shaped silicon nitride sintered bodies.

[0045] [Table 1] TIFF0007830668000001.tif40170

[0046] Next, the surface roughness of the disc-shaped silicon nitride sintered body was controlled by polishing, thereby producing silicon nitride sintered wafer 1 according to the example and silicon nitride sintered wafer according to the comparative example. The surface roughness, disc diameter, and thickness are as shown in Tables 2 and 3. Note that a diameter of 125 mm corresponds to 5 inches, and a diameter of 150 mm corresponds to 6 inches.

[0047] Furthermore, surface roughness was expressed using Rsm, Rv, and Rt, and the measurement conditions were as described above. The average value is the average of multiple values ​​obtained by passing through multiple line segments 4 (or the diameter in the case of a circular wafer) passing through the center of one face of the disk. For each of RSm, Rv, and Rt, the average, minimum, and maximum values ​​are shown when the reference length is the diameter.

[0048] [Table 2] TIFF0007830668000002.tif55170

[0049] [Table 3] TIFF0007830668000003.tif62170

[0050] In the silicon nitride sintered wafer 1 according to the example, the RSm of multiple line segments 4 (diameter in the case of a circular wafer) passing through the center 3 was within the range of 100 μm to 350 μm. In addition, Rv and Rt were also within the predetermined range.

[0051] On the other hand, the silicon nitride sintered wafer of Comparative Example 1 has a large average value of RSm. Also, the average values ​​of Rv and Rt are large. In other words, Comparative Example 1 has a large number of peaks and troughs per cycle, and the peaks and troughs are large.

[0052] Furthermore, the silicon nitride sintered wafer in Comparative Example 2 has a small average RSm value. Also, the average Rv and Rt values ​​are small. In other words, Comparative Example 2 has a small number of peaks and valleys per cycle, and the peaks and valleys themselves are small.

[0053] Furthermore, the surface roughness Ra of the silicon nitride sintered wafer 1 in the example and the silicon nitride sintered wafer in the comparative example was 0.1 μm or less in both cases. It was found that even if the Ra values ​​were the same, the effects obtained differed depending on the RSm values.

[0054] Next, a process was carried out to place single crystals on the silicon nitride sintered wafer 1 according to the example and the silicon nitride sintered wafer according to the comparative example. An AlN thin film was formed on the surface of the silicon nitride sintered wafer by sputtering. A GaN single crystal was placed on the AlN film. This produced a sample in which a single crystal was placed on a silicon nitride sintered wafer.

[0055] As an adhesion test for single crystals, TCT tests were performed on each sample. One cycle of the TCT test consisted of -40°C for 30 minutes, room temperature for 10 minutes, 170°C for 30 minutes, and room temperature for 10 minutes. The presence or absence of delamination of the single crystal and AlN thin film was measured after 1000 cycles. The presence or absence of delamination was confirmed by SAT (ultrasonic testing).

[0056] Products with a peeling area of ​​0% to 3% were classified as good products, while those with a peeling area exceeding 3% were classified as defective products.

[0057] [Table 4] TIFF0007830668000004.tif53170

[0058] As can be seen from the table, the silicon nitride sintered wafer 1 in the example shows improved bonding strength with the single crystal. Therefore, it can be seen that controlling the average value of RSm is effective. In contrast, in Comparative Examples 1 and 2, where the average RSm value was outside the range, the joint strength decreased. In other words, the performance deteriorates when thermal stress is added, as in the TCT characteristics.

[0059] Although several embodiments of the present invention have been illustrated above, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. Furthermore, the embodiments described above can be implemented in combination with each other.

Claims

1. A flat wafer made of silicon nitride sintered body, In accordance with JIS-B-0601 (2013), under the following measurement conditions, the reference length is 10 mm or more, the measurement speed is 0.6 mm / s, the shape removal is least squares linear, a λs filter is enabled, the λs cutoff ratio is 300, the cutoff type is Gaussian, and the cutoff wavelength (λc) is 0.8 mm, The surface roughness Ra is 0.1 μm or less. At least one surface has an average value RSm of the average length of multiple roughness curve elements, whose reference length is determined by multiple line segments passing through the center of that surface, within the range of 100 μm to 350 μm. A silicon nitride sintered wafer characterized in that the average length RSm of each of the plurality of roughness curve elements is within the range of 10 μm to 800 μm.

2. The silicon nitride sintered wafer according to claim 1, characterized in that the average value of the maximum valley depth Rv of a plurality of roughness curves, whose reference lengths are a plurality of line segments passing through the center of the aforementioned surface, is within the range of 0.04 μm or more and 0.4 μm or less.

3. The silicon nitride sintered wafer according to claim 1, characterized in that each of the multiple roughness curves, whose reference length is a plurality of line segments passing through the center of the aforementioned surface, has a maximum valley depth Rv within the range of 0.02 μm or more and 2 μm or less.

4. The silicon nitride sintered wafer according to claim 2, characterized in that each of the multiple roughness curves, whose reference length is a plurality of line segments passing through the center of the aforementioned surface, has a maximum valley depth Rv within the range of 0.02 μm or more and 2 μm or less.

5. The silicon nitride sintered wafer according to claim 1, characterized in that the average value of the maximum height Rt of a plurality of roughness curves, whose reference lengths are a plurality of line segments passing through the center of the aforementioned surface, is within the range of 0.4 μm to 2 μm.

6. The silicon nitride sintered wafer according to claim 1, characterized in that each of the multiple roughness curves, whose reference lengths are multiple line segments passing through the center of the aforementioned surface, has a maximum height Rt within the range of 0.1 μm to 4 μm.

7. The silicon nitride sintered wafer according to claim 6, characterized in that the average value of the maximum height Rt of a plurality of roughness curves, whose reference lengths are a plurality of line segments passing through the center of the aforementioned surface, is within the range of 0.4 μm to 1.4 μm.

8. The silicon nitride sintered wafer according to claim 7, characterized in that each of the multiple roughness curves, whose reference lengths are multiple line segments passing through the center of the aforementioned surface, has a maximum height Rt within the range of 0.1 μm to 4 μm.

9. A wafer made of a disc-shaped silicon nitride sintered body, The silicon nitride sintered wafer according to claim 1, characterized in that the plurality of line segments have a plurality of diameters.

10. A wafer made of a disc-shaped silicon nitride sintered body, The silicon nitride sintered wafer according to claim 3, characterized in that the plurality of line segments have a plurality of diameters.

11. A wafer made of a disc-shaped silicon nitride sintered body, The silicon nitride sintered wafer according to claim 8, characterized in that the plurality of line segments have a plurality of diameters.

12. A method for manufacturing a single crystal, characterized by including the step of arranging a single crystal on a silicon nitride sintered wafer according to any one of claims 1 to 11.

13. A method for manufacturing a single crystal according to claim 12, characterized by comprising the steps of forming a thin film on a silicon nitride sintered wafer and arranging the single crystal on the formed thin film.

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