Integrated circuit test system, integrated circuit test device, integrated circuit test method, and program

Abstract

The integrated circuit test system (1) includes an integrated circuit test device (100) and a terminal device (200). The integrated circuit test device (100) includes an integrated circuit (150) including a variable function unit (101) whose response to an input signal can be changed by a user and which outputs an output signal in response to the input signal, and a virtual input unit (102) which inputs a simulated input signal based on simulated data as an input signal to the variable function unit (101), a storage unit (111) which stores the output signal output by the variable function unit (101) as logging data, and a processing device (112). The terminal device (200) includes a virtual input setting unit (203) which defines the simulated data, and a display unit (202) which presents the logging data and the simulated data to a user. The processing device (112) transmits the simulation data defined by the virtual input setting unit (203) to the virtual input unit (102), and transfers the logging data stored in the storage unit (111) to the terminal device (200).

Description

[Technical field]

[0001] The present disclosure relates to an integrated circuit testing system, an integrated circuit testing apparatus, an integrated circuit testing method, and a program. [Background technology]

[0002] Patent Document 1 describes a semiconductor test device having a first FPGA (Field-Programmable Gate Array) that serves as a simulation model of an integrated circuit to be verified, and a second FPGA that serves as a peripheral circuit having circuits necessary for verification. When using this semiconductor test device to test the functions and performance of an integrated circuit, the first FPGA configures a simulation model of the integrated circuit to be verified, and the second FPGA configures the peripheral circuit. After that, test signals are sequentially supplied from the second FPGA to the first FPGA, and a process is performed to verify the operation and functions of the simulation model. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 10-63704 Summary of the Invention [Problem to be solved by the invention]

[0004] In the semiconductor testing device described in Patent Document 1, a peripheral circuit is configured by a second FPGA to generate a signal to be supplied to the first FPGA. Therefore, not only the first FPGA to be verified but also the second FPGA must be designed using a hardware description language. This makes circuit design difficult and time-consuming, and makes testing the verification FPGA difficult and lengthy.

[0005] The present disclosure has been made in consideration of such problems, and aims to provide an integrated circuit testing system, an integrated circuit testing apparatus, an integrated circuit testing method, and a program that enable testing of integrated circuits to be performed more simply and in a shorter time. [Means for solving the problem]

[0006] In order to achieve the above object, an integrated circuit testing system according to the present disclosure includes an integrated circuit testing device and a terminal device. The integrated circuit testing device includes an integrated circuit including a variable function unit whose response to an input signal can be changed by a user and which outputs an output signal in response to the input signal and a virtual input unit which inputs a simulated input signal based on simulated data as an input signal to the variable function unit, a storage unit which stores the output signal output by the variable function unit as logging data, and a processing device. The terminal device includes a virtual input setting unit which defines the simulated data, and a display unit which presents the logging data and the simulated data to a user. The processing device transmits the simulated data defined by the virtual input setting unit to the virtual input unit, and transfers the logging data stored in the storage unit to the terminal device. The integrated circuit includes a transfer notification unit that receives a transfer instruction signal from the variable function unit. When the transfer notification unit receives the transfer instruction signal from the variable function unit or the terminal device, it instructs the processing device to transfer the logging data. When the processing device is instructed by the transfer notification unit to transfer the logging data, it transfers the logging data stored in the storage unit to the terminal device. Effect of the Invention

[0007] According to the present disclosure, simulation data is generated by a terminal device, and further, logging data and the simulation data are presented, thereby making it possible to provide an integrated circuit testing system, an integrated circuit testing device, an integrated circuit testing method, and a program that make it easier to test integrated circuits and enable them to be performed in a short period of time. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram showing a configuration of an integrated circuit test system according to an embodiment; [Diagram 2] FIG. 2 is a diagram showing a system clock and a signal input from a virtual input unit to a variable function unit in the embodiment. [Diagram 3] FIG. 1 shows (A) analog input and output, and (B) pulse input and output displayed on a display unit according to an embodiment. [Figure 4]1 is a flowchart showing an integrated circuit test process executed by an integrated circuit test system according to an embodiment; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] An integrated circuit testing system 1 according to an embodiment of the present disclosure will be described with reference to Figures 1 to 4. In the figures, the same or corresponding parts are given the same reference numerals. When testing the configuration and functions of an integrated circuit, an integrated circuit testing system 1 according to an embodiment sets simulated data representing a signal to be input to the integrated circuit in a terminal device, and supplies a signal based on the simulated data to the integrated circuit. The integrated circuit testing system 1 displays the output of the integrated circuit and the simulated data to the user so that they can be compared. Note that "test" has a broad meaning that includes inspection, evaluation, confirmation, investigation, analysis, and the like, and generally includes checking the configuration, functions, operation, etc. of an integrated circuit.

[0010] Fig. 1 is a block diagram showing a configuration of an integrated circuit test system 1 according to an embodiment. As shown in Fig. 1, the integrated circuit test system 1 includes an integrated circuit test device 100 that inputs simulation data to an integrated circuit and acquires an output, and a terminal device 200 that sets the simulation data and displays the input and output of the integrated circuit to a user.

[0011] The integrated circuit testing apparatus 100 comprises an integrated circuit 150 including a variable function unit 101 that outputs an output signal in response to an input signal, a virtual input unit 102 that inputs simulated data to the variable function unit 101, a timer 103 that generates a system clock, a transfer notification unit 104 that instructs the transfer of logging data, and a selector 105 that selects a signal to be input to the variable function unit 101, a memory unit 111 that stores the output of the variable function unit 101, a processing device 112 that transmits signals between the integrated circuit 150 and a terminal device 200, a pulse / analog input circuit 113 that inputs signals to the variable function unit 101, and a pulse / analog output circuit 114 that outputs the signal transmitted from the variable function unit 101.

[0012] The integrated circuit 150 is a semiconductor integrated circuit that outputs an output signal in response to an input signal, and is an integrated circuit whose response to the input signal can be changed by user settings or programming, and is an FPGA in this embodiment.

[0013] The variable function unit 101 is a circuit that outputs an output signal in response to an input signal, and the user can change the program using a hardware description language to change the output for the input. The variable function unit 101 may be programmed with the same configuration and function as the FPGA under test, or may be programmed with a configuration and function that simulates the integrated circuit under test. The input and output signals of the variable function unit 101 are pulse input / output or, for example, 16-bit digital input / output, but are not limited to this. A pulse input signal or a digital input signal from the outside of the integrated circuit 150 via a pulse / analog input circuit 113 or simulation data from the virtual input unit 102 is selectively supplied to the variable function unit 101 via a selector 105. The variable function unit 101 processes the input signal according to a function designed therein, and outputs a pulse output signal or a digital output signal to an external circuit via a pulse / analog output circuit 114. The output signal of the variable function unit 101 is also supplied to the storage unit 111. The variable function unit 101 also has a function of outputting a transfer instruction signal, which will be described later, to the transfer notification unit 104 and a function of adding a signal indicating the state of the internal circuitry of the variable function unit 101 to the output signal.

[0014] The virtual input unit 102 is a circuit that is connected to the variable function unit 101 via the selector 105 and supplies a simulated input signal including a pulse signal or a digital signal and a control signal to the variable function unit 101 as an input signal. The virtual input unit 102 inputs a signal to the variable function unit 101 at a period that is changeable in units of a system clock of the integrated circuit 150. The virtual input unit 102 is connected to a virtual input setting unit 203 (described later) of the terminal device 200 via the processing device 112 and obtains simulated data from the virtual input setting unit 203 via the processing device 112.

[0015] 2A to 2E are diagrams showing examples of signals supplied from the system clock and the virtual input unit 102 to the variable function unit 101. The signals shown in FIG. 2 are (A) the system clock signal of the integrated circuit 150, (B) the operation clock signal of the variable function unit 101, (C) an input control signal A indicating a division of a digital input signal, (D) an input control signal B indicating a read timing of a digital input signal, and (E) a digital input signal. FIG. 2B to 2E are examples of virtual input signals supplied from the virtual input unit 102 to the variable function unit 101. The operation clock signal shown in FIG. 2B is generated by dividing the system clock signal, and the period T can be changed by multiplying the system clock signal. In the examples shown in FIG. 2A and (B), the period T of the operation clock signal is twice the period of the system clock signal. The variable function unit 101 operates in response to the operation clock signal. The input control signal A shown in FIG. 2C indicates a division of digital data, and the input control signal B shown in FIG. 2D indicates a latch timing of digital data. 2(C) and (D) are examples of control signals generated by the virtual input unit 102 and supplied to the variable function unit 101. The variable function unit 101 latches and acquires the digital input signal shown in Fig. 2(E) separated by the rising and falling edges of the input control signal A shown in Fig. 2(C) at the timing of the rising and falling edges of the input control signal B shown in Fig. 2(D).

[0016] The timer 103 is a circuit that generates a system clock for the integrated circuit 150. The timer 103 is also connected to the storage unit 111 and provides time information to the storage unit 111. The period of the system clock is, for example, 10 ns, but is not limited to this.

[0017] The storage unit 111 is a circuit connected to the variable function unit 101 and stores the output of the variable function unit 101. The storage unit 111 may store any signal inside the variable function unit 101, or time information generated inside the integrated circuit 150. The period during which the storage unit 111 stores the output of the variable function unit 101, the signal inside the integrated circuit 150, or data including time information, i.e., logs, may be set in units of 1 μs within a range of 1-65535 μs, but the range and unit of the setting are not limited thereto. The logging period may be set and changed via the processing device 112 by the user operating the terminal device 200. The storage unit 111 may include, but is not limited to, a First In First Out (FIFO) memory.

[0018] The transfer notification unit 104 is a circuit that is connected to the variable function unit 101 and the processing device 112, receives a transfer instruction signal from the variable function unit 101, and, upon receiving the transfer instruction signal, instructs the processing device 112 to transfer the data logged by the memory unit 111 to the terminal device 200.

[0019] The selector 105 is connected to the virtual input unit 102 , the pulse / analog input circuit 113 and the variable function unit 101 , and selects one of the output signal of the virtual input unit 102 and the output signal of the pulse / analog input circuit 113 and supplies it to the variable function unit 101 .

[0020] The processing device 112 is connected to the virtual input unit 102 of the integrated circuit 150 and the virtual input setting unit 203 of the terminal device 200, and transmits the simulation data acquired from the virtual input setting unit 203 to the virtual input unit 102. The processing device 112 is connected to the transfer notification unit 104 and the storage unit 111, and when the transfer notification unit 104 instructs the transfer of data logged by the storage unit 111, the processing device 112 acquires the data logged by the storage unit 111 from the storage unit 111, and transfers the acquired data to the terminal device 200 in the order in which it was logged. The communication protocol for transferring the data may be, for example, FTP (File Transfer Protocol), but is not limited thereto. The processing device 112 is, for example, a data transfer device composed of a microprocessor having a CPU (Central Processing Unit) and a memory. However, the present invention is not limited thereto.

[0021] The pulse / analog input circuit 113 is a circuit used when testing the variable function unit 101 using a device external to the integrated circuit test system 1. The pulse / analog input circuit 113 is connected to the device external to the integrated circuit test system 1 and the selector 105. When the pulse / analog input circuit 113 receives a pulse signal from the device external to the integrated circuit test system 1, it supplies the received pulse signal to the variable function unit 101 via the selector 105. The pulse signal includes a digital signal. When the pulse / analog input circuit 113 receives an analog signal from the device external to the integrated circuit test system 1, it A / D converts the received analog signal into a digital signal and supplies the digital signal to the variable function unit 101 via the selector 105.

[0022] The pulse / analog output circuit 114 is connected to a device external to the integrated circuit test system 1 and to the variable function unit 101 of the integrated circuit 150, and outputs a pulse signal output from the variable function unit 101 to the outside of the integrated circuit test system 1. When the output destination circuit is an analog circuit, the pulse / analog output circuit 114 performs D / A conversion of the pulse signal and outputs it to the outside of the integrated circuit test system 1 as an analog signal.

[0023] When the virtual input unit 102 supplies a signal to the variable function unit 101 to perform a test, the pulse / analog input circuit 113 does not need to supply a signal to the variable function unit 101, and the pulse / analog output circuit 114 does not need to output a signal from the variable function unit 101.

[0024] The integrated circuit testing system 1 includes an integrated circuit 150 that includes a variable function unit 101 that mimics an integrated circuit whose performance is to be tested, a virtual input unit 102, a timer 103, and a transfer notification unit 104, and an FPGA designed to transmit a signal output by the variable function unit 101 to a memory unit 111.

[0025] The terminal device 200 includes an operation unit 201 that accepts user operations, a display unit 202 that visually presents information to the user, and a virtual input setting unit 203 that defines simulation data. The terminal device 200 may be a personal computer that includes a CPU, a memory, an input device, a display device, and a communication device, but is not limited to this. The terminal device 200 functions as an engineering tool that sets the simulation data and displays data indicating the input and output of the variable function unit 101.

[0026] The operation unit 201 is a user interface that accepts user operations including power on / off, simulation data setting, and instructions to start or end processing. The operation unit 201 may include, but is not limited to, a keyboard, a mouse, and a touch panel.

[0027] The display unit 202 visually presents to the user the logging data acquired from the processing device 112 of the integrated circuit test apparatus 100 and the simulation data output by the virtual input setting unit 203. The display unit 202 may display the digital signal output by the virtual input setting unit 203 as an analog signal obtained by D / A conversion, or may display the digital signal as is. The same applies to the digital signal included in the logging data. The display unit 202 may include a monitor, but is not limited to this.

[0028] 3 is a diagram showing an example of (A) an analog input signal and an analog output signal, and (B) a pulse input signal and a pulse output signal displayed by the display unit 202. FIG. 3(A) shows a display example in the case where the variable function unit 101 has a function of performing a phase offset process of an analog signal represented by a PCM (Pulse Code Modulation) signal. In this example, for example, a digital input signal for testing is generated in the terminal device 200 and supplied to the virtual input unit 102. The virtual input unit 102 supplies this digital input signal to the variable function unit 101. The variable function unit 101 performs a phase offset process on the supplied digital signal and outputs it. The display unit 202 displays a digital input inputted from the virtual input unit 102 to the variable function unit 101 that has been D / A converted and a digital output outputted from the variable function unit 101 that has been D / A converted, for example, side by side, with the time axis aligned, the unit of the vertical axis aligned, and the size adjusted so that the entirety can be seen, so that the user can easily compare and consider them.

[0029] 3B shows a display example in the case where the variable function unit 101 has a PWM (Pulse Width Modulation) conversion function, which includes a function of starting counting the number of pulses of an operating clock signal using the rising edge of a pulse input signal as a trigger, resetting when the count value reaches a certain value, and outputting a pulse signal when the count value reaches a threshold value or more. The display unit 202 aligns the pulse input inputted from the virtual input unit 102 of the integrated circuit testing device 100 to the variable function unit 101, the sawtooth wave indicated by the count value outputted from the variable function unit 101, the threshold value, and the PWM pulse output, aligning the time axis, adding links to related timing, and adjusting the size so that the whole is displayed. Note that the user can of course adjust the display.

[0030] The virtual input setting unit 203 is connected to the processing unit 112 of the integrated circuit testing apparatus 100, determines simulation data, and outputs the simulation data to the processing unit 112. The simulation data may be any data set by the user via the operation unit 201, or may be a standard waveform including a sine wave stored in the virtual input setting unit 203.

[0031] 4 is a flowchart showing an integrated circuit test process executed by the integrated circuit test system 1 according to the embodiment. The integrated circuit test process will be described with reference to the flowchart in FIG.

[0032] Before starting the test, the variable function unit 101 is designed using a hardware description language for the configuration and functions to be tested. The designed configuration and functions may be those of an FPGA to be tested, or may simulate those of another integrated circuit. The selector 105 is set to select the output of the virtual input unit 102 and supply it to the variable function unit 101.

[0033] When the integrated circuit test process is started, the operation unit 201 of the terminal device 200 accepts a user's operation for defining the simulation data to be output by the virtual input setting unit 203 (step S101).

[0034] When the operation unit 201 accepts a user's operation to define the simulation data, the virtual input setting unit 203 outputs the simulation data and transmits it to the processing device 112 of the integrated circuit testing equipment 100 (step S102).

[0035] When the virtual input setting unit 203 transmits the simulation data to the processing device 112, the processing device 112 transmits the acquired simulation data to the virtual input unit 102 (step S103).

[0036] When the processing device 112 transmits the simulation data to the virtual input unit 102, the virtual input unit 102 inputs a simulation input signal based on the acquired simulation data to the variable function unit 101 at each sampling timing (step S104).

[0037] When the virtual input unit 102 inputs a signal to the variable function unit 101, the variable function unit 101 outputs a signal in response to the input signal (step S105).

[0038] When the variable function unit 101 outputs a signal, the storage unit 111 acquires the signal output by the variable function unit 101 and stores it as logging data for each logging period (step S106). The storage unit 111 may store any signal inside the variable function unit 101 and time information generated inside the integrated circuit 150 as logging data.

[0039] When the memory unit 111 stores the logging data, the variable function unit 101 outputs a transfer instruction signal to the transfer notification unit 104 (step S107).

[0040] When the variable function unit 101 outputs a transfer instruction signal to the transfer notification unit 104, the transfer notification unit 104 instructs the processing device 112 to transfer the logging data to the terminal device 200 (step S108).

[0041] When the transfer notifier 104 instructs the processor 112 to transfer the logging data, the processor 112 acquires the logging data from the memory 111 and transfers the acquired logging data to the terminal device 200 in the order in which it was logged (step S109).

[0042] When the processing device 112 transfers the logging data to the terminal device 200, the display unit 202 acquires the transferred logging data, acquires the simulated data from the virtual input setting unit 203, and displays to the user the simulated input signal contained in the simulated data and the output signal contained in the logging data (step S110).

[0043] When the display unit 202 displays the input and output signals, the processing device 112 judges whether the virtual input unit 102 has input all signals based on all the simulation data to the variable function unit 101 (step S111). If it is judged that the signals have not been input (step S111: NO), the process returns to step S104. If it is judged that the signals have been input (step S111: YES), the integrated circuit test process ends.

[0044] Although the flow chart has been described sequentially, in reality, a plurality of steps are processed in parallel. For example, when the variable function unit 101 outputs a signal in step S105 in response to a signal input to the variable function unit 101 at a certain sampling timing in step S104, a signal may be input to the variable function unit 101 at the next sampling timing in step S104 of the next loop.

[0045] If necessary, the selector 105 can be switched to select the output signal of the pulse / analog input circuit 113, and the variable function unit 101 can be tested by an input signal from an external device. Also, if necessary, the variable function unit 101 can be tested by an external device using the output signal of the pulse / analog output circuit 114.

[0046] With the above-described configuration and by executing integrated circuit test processing, the integrated circuit test system 1 according to the embodiment can simplify and shorten the testing time of the integrated circuit 150 by having the integrated circuit 150, which is an FPGA, generate a simulated input signal based on simulated data.

[0047] When designing a circuit for reproducing the input of the FPGA, the user needs to use a specialized programming language, which makes the design difficult and time-consuming, and adds to the time and effort required for debugging the FPGA, lengthening the development time. According to the integrated circuit testing system 1 according to the embodiment, there is no need to design a circuit for reproducing the input of the FPGA, so the user does not need to learn a specialized programming language, and the overall time and effort required for debugging the FPGA can be reduced.

[0048] In order to evaluate the function of the FPGA, it is necessary to observe the input and output of the FPGA. According to the integrated circuit test system 1 according to the embodiment, the display unit of the terminal device 200 displays the simulation data and the logging data, so that the input and output of the integrated circuit 150 can be observed without using a measuring device including a logic analyzer, and the variable function unit 101 of the integrated circuit 150 can be easily evaluated.

[0049] According to the integrated circuit testing system 1 of the embodiment, the memory unit 111 stores any signal inside the variable function unit 101 and time information generated inside the integrated circuit 150, so that the input timing and output timing inside the integrated circuit 150 can be grasped in detail, and if there is a problem with the variable function unit 101, the location of the problem can be easily determined.

[0050] (Modification) The terminal device 200 can be connected to the processing device 112 of the integrated circuit test system 1 by wire or wirelessly. The terminal device 200 may be connected to the processing device 112 via a network including the Internet.

[0051] The transfer notification unit 104 acquires a transfer instruction signal from the variable function unit 101, and when the transfer instruction signal is acquired, instructs the processing device 112 to transfer the data logged by the storage unit 111 to the terminal device 200; however, this is not limited to the above. The transfer instruction signal may be acquired from the terminal device 200 via the processing device 112. The processing device 112 may receive an instruction to transfer logging data from the terminal device 200, and transfer the logging data without going through the transfer notification unit 104.

[0052] The means and methods for performing various processes in the integrated circuit test system 1 according to the embodiment can be realized by either a dedicated hardware circuit or a programmed computer. The program for the computer may be provided by a computer-readable recording medium including a flexible disk or a CD-ROM, or may be provided online via a network including the Internet. In this case, the program recorded on the computer-readable recording medium is usually transmitted to and stored in a storage unit including a hard disk. The program may be provided as a standalone application software, or may be incorporated into the software of the device as one of its functions.

[0053] Various embodiments and modifications of the present disclosure are possible without departing from the broad spirit and scope of the present disclosure. The above-described embodiments are for explaining the present disclosure and do not limit the scope of the present disclosure. That is, the scope of the present disclosure is indicated by the claims, not the embodiments. Various modifications made within the scope of the claims and the scope of the disclosure equivalent thereto are considered to be within the scope of the present disclosure. [Industrial Applicability]

[0054] The present disclosure can be used in an integrated circuit test system, an integrated circuit test apparatus, an integrated circuit test method, and a program. [Explanation of symbols]

[0055] 1 Integrated circuit test system, 100 Integrated circuit test device, 101 Variable function section, 102 Virtual input section, 103 Timer, 104 Transfer notification section, 105 Selector, 111 Memory section, 112 Processing device, 113 Pulse / analog input circuit, 114 Pulse / analog output circuit, 150 Integrated circuit, 200 Terminal device, 201 Operation section, 202 Display section, 203 Virtual input setting section.

Claims

1. an integrated circuit including: a variable function unit whose response to an input signal can be changed by a user and which outputs an output signal in response to the input signal; and a virtual input unit which inputs a simulated input signal based on simulated data to the variable function unit as the input signal; a storage unit that stores the output signal output by the variable function unit as logging data; A processing device; an integrated circuit testing apparatus including: A virtual input setting unit that defines the simulation data; a display unit that presents the logging data and the simulation data to the user; and a terminal device including: The processing device transmits the simulation data defined by the virtual input setting unit to the virtual input unit, and transfers the logging data stored in the storage unit to the terminal device; the integrated circuit includes a transfer notification unit that acquires a transfer instruction signal from the variable function unit, the transfer notification unit instructs the processing device to transfer the logging data when receiving the transfer instruction signal from the variable function unit or the terminal device; the processing device, when instructed by the transfer notifier to transfer the logging data, transfers the logging data stored in the storage unit to the terminal device; Integrated circuit test system.

2. The variable function unit outputs a pulse output signal or a digital output signal as the output signal in response to a pulse input signal or a digital input signal inputted as the input signal.

10. The integrated circuit testing system of claim 1.

3. The integrated circuit testing apparatus includes: an input circuit that inputs the pulse input signal to the variable function unit, or inputs the digital input signal generated by A / D converting an analog input signal to the variable function unit; an output circuit that outputs the pulse output signal acquired from the variable function unit, or outputs an analog output signal generated by D / A converting the digital output signal acquired from the variable function unit, 3. The integrated circuit testing system of claim 2.

4. the virtual input unit inputs the simulated input signal to the variable function unit at a timing that is changeable in units of a system clock of the integrated circuit; 4. An integrated circuit testing system according to any one of claims 1 to 3.

5. The storage unit stores the output signal output by the variable function unit for each logging period as the logging data.

4. An integrated circuit testing system according to any one of claims 1 to 3.

6. the terminal device includes an operation unit that accepts user operations; the processing device changes the logging period based on the user operation accepted by the operation unit.

6. The integrated circuit testing system of claim 5.

7. an integrated circuit including: a variable function unit whose response to an input signal can be changed by a user and which outputs an output signal in response to the input signal; and a virtual input unit which inputs a simulated input signal based on simulated data to the variable function unit as the input signal; A storage unit that stores the output signal output by the variable function unit as logging data. Integrated circuit testing equipment.

8. Define the simulated data, a variable function unit of an integrated circuit that can change a response to an input signal input by a user and outputs an output signal in response to the input signal, said variable function unit inputting a simulated input signal based on simulated data as the input signal; storing the output signal output by the variable function unit as logging data; presenting the logging data and the simulation data to the user; Integrated Circuit Test Methods.

9. On the computer, Define the simulated data, a variable function unit of an integrated circuit, the variable function unit being capable of changing a response to an input signal inputted by a user and outputting an output signal in response to the input signal, inputting a simulated input signal based on the simulated data as the input signal; storing the output signal output by the variable function unit as logging data; presenting the logging data and the simulation data to the user; program.

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