Semiconductor device, power conversion device, and manufacturing method for semiconductor device

Abstract

Provided is a semiconductor device in which pores generated in a junction between an electrode and an object to be joined are reduced. The semiconductor device includes a first electrode, a plurality of granular materials, and a second electrode. The first electrode is provided on a semiconductor substrate. The plurality of granular materials is formed on the first electrode. The second electrode is provided on the first electrode on which the plurality of granular materials is formed. The surface of the second electrode includes an uneven portion. The uneven portion is formed in accordance with the plurality of granular materials on the first electrode, which is the base of the second electrode.

Description

Semiconductor device, power conversion device, and method of manufacturing the semiconductor device

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device.

[0002] A plating method is used as a technique for forming electrodes in semiconductor devices from the viewpoints of productivity and cost. Electrodes formed by the plating method are joined to a joining target, such as a metal member, by soldering (see, for example, Patent Document 1).

[0003] International Publication No. 2018 / 150971

[0004] When a plating layer is bonded to a bonding object, the flux contained in the solder and the hydrogen and moisture contained in the plating layer are generated as gases. If these gases remain inside the solder, voids are formed. These voids inhibit electrical or thermal conduction in the semiconductor device, causing malfunction of the semiconductor device.

[0005] In order to solve the above-mentioned problems, an object of the present disclosure is to provide a semiconductor device in which voids occurring at the joint between an electrode and an object to be joined are reduced.

[0006] The semiconductor device according to the present disclosure includes a first electrode, a plurality of granular objects, and a second electrode. The first electrode is provided on a semiconductor substrate. The plurality of granular objects are formed on the first electrode. The second electrode is provided on the first electrode on which the plurality of granular objects are formed. The surface of the second electrode includes an uneven portion. The uneven portion is formed in accordance with the plurality of granular objects on the first electrode, which is the base of the second electrode.

[0007] According to the present disclosure, a semiconductor device is provided in which voids occurring at the joint between an electrode and an object to be joined are reduced.

[0008] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings.

[0009] Fig. 1 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 1. Fig. 2 is a flowchart showing a manufacturing method of a semiconductor device in embodiment 1. Fig. 3 is a flowchart showing detailed procedures of a plating process. Fig. 4 is a cross-sectional view showing the configuration of a semiconductor device after a mounting process. Fig. 5 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 2. Fig. 6 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 3. Fig. 7 is a cross-sectional view showing the configuration of a semiconductor device in embodiment 4. Fig. 8 is a functional block diagram showing the configuration of a power conversion system in embodiment 5.

[0010] 1 is a cross-sectional view showing the configuration of a semiconductor device 101 in accordance with a first embodiment. The semiconductor device 101 includes a semiconductor substrate 1, a front electrode 2, a back electrode 3, a plurality of granular objects 4, a plating layer 5, an uneven portion 6, and a protective film 7. The front electrode 2 and the back electrode 3 each correspond to a first electrode. The plating layer 5 corresponds to a second electrode. The plating layer 5 includes a nickel plating layer 5A and a gold plating layer 5B. The nickel plating layer 5A corresponds to the first plating layer. The gold plating layer 5B corresponds to the second plating layer.

[0011] The semiconductor substrate 1 may be a Si substrate, a SiC substrate, a GaAs substrate, a GaN substrate, or a Ga ２ O ３ The semiconductor substrate 1 may be, but is not limited to, a silicon substrate, a diamond substrate, or the like. The semiconductor substrate 1 is of a front-to-back conductive type, and current flows between the upper surface 1A and the lower surface 1B of the semiconductor substrate 1. The thickness of the semiconductor substrate 1 is preferably 50 μm or more and 150 μm or less. If the semiconductor substrate 1 is thick, electrical resistance increases, so a thinner semiconductor substrate 1 is preferable. However, if the semiconductor substrate 1 is too thin, warping occurs during electrode formation. Such warping affects subsequent manufacturing processes.

[0012] The semiconductor substrate 1 includes a semiconductor element (not shown). The semiconductor element may be a power semiconductor element, a control integrated circuit (IC) for controlling the power semiconductor element, or the like. The semiconductor element may be, for example, an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), a Schottky barrier diode, or the like. Alternatively, the semiconductor element may be a reverse-conducting IGBT (RC-IGBT) in which an IGBT and a freewheeling diode are formed within a single semiconductor substrate 1. The semiconductor element includes a p-type semiconductor layer, an n-type semiconductor layer, a pn junction layer, a gate insulating film, and the like. In addition, the semiconductor element has other components necessary for its operation. The semiconductor element in the first embodiment is a front-back conductive semiconductor element that controls the current flowing between the upper surface 1A and the lower surface 1B of the semiconductor substrate 1.

[0013] The top electrode 2 and the back electrode 3 are provided on the semiconductor substrate 1. The top electrode 2 is provided on the top surface 1A of the semiconductor substrate 1. The top electrode 2 is, for example, an emitter electrode or gate electrode of an IGBT. The back electrode 3 is provided on the bottom surface 1B of the semiconductor substrate 1. The back electrode 3 is, for example, a collector electrode of the IGBT. The top electrode 2 and the back electrode 3 are in ohmic contact with the semiconductor substrate 1. The top electrode 2 and the back electrode 3 function as underlying electrodes for the plating layer 5 described below. The top electrode 2 and the back electrode 3 are formed of a material such as aluminum or an aluminum alloy. The aluminum alloy preferably contains an element more noble than aluminum. Examples of materials containing such noble elements include iron, nickel, tin, lead, silicon, copper, silver, gold, tungsten, cobalt, platinum, palladium, iridium, and rhodium. The content of the noble element is preferably 1% by mass or more and 3% by mass or less. The thickness of the front electrode 2 is, for example, 1 μm to 10 μm, but is not particularly limited. The thickness of the back electrode 3 is not particularly limited, but is preferably 0.2 μm to 10 μm.

[0014] The granules 4 are formed on the front electrode 2 and the back electrode 3. The granules 4 are provided between the front electrode 2 and the plating layer 5, or between the back electrode 3 and the plating layer 5. The diameter of the granules 4 is 0.1 μm or more and 1 μm or less on the surface of the front electrode 2 or the back electrode 3. The density of the granules 4 is 0.04 pieces / μm or less on the surface of the front electrode 2 or the back electrode 3. ２ 4 or more pieces / μm ２ The shape of the granular material 4 is, for example, a polyhedron.

[0015] The plating layer 5 is provided on the front electrode 2 and the back electrode 3 on which the particulate matter 4 is formed. The plating layer 5 includes a nickel plating layer 5A and a gold plating layer 5B.

[0016] The nickel plating layer 5A contains nickel. The nickel plating layer 5A is provided on the front electrode 2 and the back electrode 3, covering the granular material 4. The thickness of the nickel plating layer 5A is not particularly limited, but is, for example, 1 μm or more and 10 μm or less. If the nickel plating layer 5A is too thin, cracks will occur in the plating layer 5 during the wire bonding process. Therefore, the thickness of the nickel plating layer 5A is preferably 2 μm or more. On the other hand, if the nickel plating layer 5A is too thick, warping will occur in the semiconductor substrate 1. Such warping will affect subsequent manufacturing processes. Therefore, the thickness of the nickel plating layer 5A is preferably 8 μm or less.

[0017] The gold plating layer 5B contains gold and is provided on the nickel plating layer 5A. The thickness of the gold plating layer 5B is not particularly limited, but is, for example, 0.01 μm or more and 0.1 μm or less.

[0018] The uneven portion 6 is formed on the surface of the plating layer 5. In the first embodiment, the uneven portion 6 is formed on the surface of the gold plating layer 5B. The uneven portion 6 is also formed at the interface between the gold plating layer 5B and the nickel plating layer 5A. The uneven portion 6 has a shape in which convex portions and concave portions are alternately arranged. Convex portions are formed directly above the granular materials 4, and concave portions are formed directly above the portions between the granular materials 4. In other words, the uneven portion 6 is formed in accordance with the granular materials 4 formed on the front electrode 2 and the back electrode 3. The diameter of the uneven portion 6 is 1.0 μm or less. The density of the uneven portion 6 is 0.04 pieces / μm ２ From 4 particles / μm ２ The height difference of the uneven portion 6 is 0.01 μm or more and 1 μm or less. If the height difference is small, gas generated from the solder during the mounting process is not discharged to the outside. Conversely, if the height difference is large, solder bonding becomes difficult.

[0019] The protective film 7 is provided on the region of the front electrode 2 where the plating layer 5 is not formed. The protective film 7 has insulating properties. The protective film 7 is preferably made of a material with excellent heat resistance. The protective film 7 is made of, for example, a glass-based material containing silicon, silicon nitride, polyimide, or the like, but is not particularly limited thereto.

[0020] Next, a description will be given of a method for manufacturing the semiconductor device 101. Fig. 2 is a flowchart showing a method for manufacturing the semiconductor device 101 according to the first embodiment.

[0021] In step S10, a semiconductor substrate 1 is prepared, and a semiconductor device is formed on the semiconductor substrate 1. The semiconductor substrate 1 may be, for example, a Si substrate, a SiC substrate, a GaAs substrate, or a GaN substrate. An epitaxially grown layer is formed on the semiconductor substrate 1. Chemical vapor deposition (CVD) is used as a film formation method. The epitaxially grown layer is formed by supplying source gases onto the semiconductor substrate 1 in a temperature-controlled growth chamber. When the semiconductor substrate 1 is a Si substrate, the source gas is silane or the like. Impurities are added as necessary in this epitaxial growth process. Boron or aluminum is added as an acceptor impurity. Phosphorus, arsenic, or nitrogen is added as a donor impurity. After the epitaxially grown layer is formed, structures necessary for the operation of the semiconductor device, such as a pn diffusion layer (not shown), are formed. The pn diffusion layer is formed, for example, by ion implantation and activation processing. Considering productivity, multiple semiconductor devices 101 are fabricated on a single semiconductor substrate 1. After electrodes and the like are formed, the plurality of semiconductor devices 101 are finally diced and cut into individual semiconductor chips.

[0022] In step S20, the front electrode 2 is formed on the upper surface 1A of the semiconductor substrate 1. The front electrode 2 is formed by sputtering. For example, an aluminum alloy containing aluminum and silicon is deposited as the front electrode 2. The front electrode 2 is heat-treated at a temperature of 300°C to 400°C in a reducing atmosphere containing hydrogen or the like. This heat treatment reduces the grain boundary density of the aluminum and ensures ohmic contact with the semiconductor substrate 1. This heat treatment also recrystallizes the electrode material, changing the crystal grain size on the surface of the front electrode 2. The diameter of the grain size is preferably 10 μm to 50 μm. This improves adhesion between the front electrode 2 and the plating layer 5.

[0023] In step S30, the protective film 7 is formed. As the protective film 7, a film containing silicon nitride is formed by a CVD method. Alternatively, a film containing polyimide may be formed by a coating method using spin coating or inkjet printing.

[0024] In step S40, the semiconductor substrate 1 is thinned. A grinding wheel made of alumina abrasive grains or diamond abrasive grains is used to grind the lower surface 1B of the semiconductor substrate 1. The thickness of the semiconductor substrate 1 after grinding is preferably 50 μm or more and 150 μm or less.

[0025] In step S50, the backside electrode 3 is formed on the lower surface 1B of the semiconductor substrate 1. The backside electrode 3 is formed by a sputtering method. As with the frontside electrode 2, for example, an aluminum alloy containing aluminum and silicon is deposited as the backside electrode 3. The backside electrode 3 is heat-treated at a temperature of 300° C. to 400° C. in a reducing atmosphere containing hydrogen or the like. This heat treatment reduces the grain boundary density of the aluminum, ensuring ohmic contact with the semiconductor substrate 1.

[0026] In step S60, plating layers 5 are simultaneously formed on both surfaces of the front electrode 2 and the back electrode 3. Fig. 3 is a flowchart showing the detailed procedure of the plating process. The plating process includes a plasma cleaning process, a degreasing process, an etching process, an acid immersion process, a first zincate treatment process, a zincate stripping process, a second zincate treatment process, a nickel plating process, and a gold plating process. Water rinsing is performed between each process, so that the treatment solution from the previous process is not carried over to the next process.

[0027] Step S61 is a plasma cleaning process. The plasma cleaning process is performed on the surfaces of the front electrode 2 and the back electrode 3. Foreign matter or residue, such as organic matter, oxides, and nitrides, adhering to the surfaces of the front electrode 2 and the back electrode 3 is oxidatively decomposed and removed by the plasma. This ensures reactivity between the surfaces of the front electrode 2 and the back electrode 3 and various treatment solutions used in the plating process. Because the protective film 7 is formed on the top surface 1A of the semiconductor substrate 1, the plasma cleaning process of the front electrode 2 is performed more intensively than the plasma cleaning process of the back electrode 3. It is preferable to first perform the plasma cleaning process on the surface of the back electrode 3, and then perform the plasma cleaning process on the surface of the front electrode 2.

[0028] Step S62 is a degreasing process. The degreasing process is performed on the surfaces of the front electrode 2 and the back electrode 3 on the semiconductor substrate 1. The chemical solution used in the degreasing process is weakly alkaline. Organic matter, oil and grease, and oxide films adhering to the surfaces of the front electrode 2 and the back electrode 3 are removed.

[0029] Step S63 is an etching step. This etching step is performed on the surfaces of the top electrode 2 and the back electrode 3. The oxide film on the surface after the degreasing step is removed, and the surface is roughened. This improves the adhesion between the top electrode 2 and the plating layer 5, and between the back electrode 3 and the plating layer 5. When alkaline etching is performed, the degreasing effect is also achieved, so the degreasing step may be omitted. Since the etching rate varies depending on the composition of the alloy constituting the top electrode 2 and the back electrode 3, the concentration of the etching solution, bath temperature, and treatment time are appropriately controlled.

[0030] Step S64 is an acid immersion step. This acid immersion step is performed on the surfaces of the front electrode 2 and the back electrode 3. After etching, alloying elements (copper, magnesium, silicon, etc.) remain on the aluminum surface as smut. This smut is removed using nitric acid, sulfuric acid, hydrofluoric acid, ammonium acid fluoride, or a mixed acid thereof. This improves the adhesion between the front electrode 2 and the plating layer 5, and between the back electrode 3 and the plating layer 5.

[0031] Step S65 is the first zincate treatment step. The surfaces of the top electrode 2 and the back electrode 3 are zincated. The first zincate solution used in the zincate treatment is a strong alkaline solution containing mainly sodium hydroxide and zinc oxide. This strong alkaline solution etches the oxide films on the surfaces of the top electrode 2 and the back electrode 3. The newly exposed aluminum also dissolves. The standard oxidation-reduction potential of the aluminum or aluminum alloy that constitutes the top electrode 2 and the back electrode 3 is lower than that of zinc. Therefore, aluminum dissolves as ions, and the electrons generated in this process bond with zinc ions in the first zincate solution. This causes zinc to precipitate as metal atoms. In this way, aluminum is replaced by zinc, and the zinc precipitates. The surfaces of the top electrode 2 and the back electrode 3 are ultimately covered with a zinc film.

[0032] The immersion speed of the semiconductor substrate 1 in the first zincate solution is preferably 10 mm / sec or more and 200 mm / sec or less. Such an immersion speed reduces the time difference within the surface of the semiconductor substrate 1, which is the processing target, until the semiconductor substrate 1 is completely immersed in the first zincate solution. In other words, the unevenness of the processing time within the surface of the semiconductor substrate 1 is reduced. The temperature of the first zincate solution is appropriately set depending on the type of the first zincate solution, etc. The temperature of the first zincate solution is, for example, 10°C or more and 30°C or less. The processing time of the first zincate treatment is appropriately set depending on the concentration and temperature of the first zincate solution. The processing time of the first zincate treatment is, for example, 5 seconds or more and 300 seconds or less. More preferably, it is 10 seconds or more and 120 seconds or less, but is not limited to these time ranges.

[0033] Step S66 is a zincate stripping process. The zincate stripping process is performed on the front electrode 2 and the back electrode 3 on which the zinc film is formed. The front electrode 2 and the back electrode 3 are immersed in a nitric acid solution. This dissolves the zinc film formed on the surfaces of the front electrode 2 and the back electrode 3.

[0034] Step S67 is a second zincate treatment step. The surfaces of the top electrode 2 and the bottom electrode 3 are again subjected to a zincate treatment. The top electrode 2 and the bottom electrode 3 are again immersed in the second zincate solution. Aluminum and its oxide film are removed, and a zinc film is formed on the surfaces of the top electrode 2 and the bottom electrode 3.

[0035] As with the first zincate treatment, the immersion speed of the semiconductor substrate 1 in the second zincate solution is preferably 10 mm / sec or more and 200 mm / sec or less. Such an immersion speed reduces the time difference until the semiconductor substrate 1, which is the treatment object, is completely immersed in the second zincate solution. In other words, the unevenness of the treatment time within the surface of the semiconductor substrate 1 is reduced. The temperature of the second zincate solution is appropriately set depending on the type of the second zincate solution, etc. The temperature of the second zincate solution is 10°C or more and 30°C or less. The treatment time of the second zincate treatment is appropriately set depending on the concentration and temperature of the second zincate solution. The treatment time of the second zincate treatment is, for example, 5 seconds or more and 150 seconds or less. More preferably, it is 10 seconds or more and 60 seconds or less, but is not limited to these time ranges. If the treatment time is too long, aluminum dissolution proceeds, resulting in a decrease in adhesion to the nickel plating layer 5A.

[0036] The granules 4 are formed in the second zincate treatment step. The granules 4 are deposited on the front electrode 2 and the back electrode 3 by a substitution reaction caused by the difference in oxidation-reduction potential between the surfaces of the front electrode 2 and the back electrode 3. The material of the granules 4 deposited by this substitution reaction is mainly zinc, but may also contain transition elements such as iron, copper, and cobalt. The concentration of the transition elements is 10 mass % or less, but is not limited to this. The diameter, density, and shape of the deposited granules 4 are, for example, as described above.

[0037] Step S68 is a nickel plating process. The front electrode 2 and the back electrode 3 on which the granular material 4 is deposited are immersed in a nickel plating solution to form a nickel plating layer 5A. The nickel concentration of the nickel plating solution is not particularly limited, but is, for example, 1.0 g / L or more and 10.0 g / L or less. The hydrogen ion concentration (pH) of the nickel plating solution is not particularly limited, but is, for example, 4.0 or more and 8.0 or less. In the case of electroless plating, the phosphorus concentration of the nickel plating solution is, for example, 15 mass% or less, but is not limited thereto. The type of nickel plating solution is not particularly limited, and either electroless plating or electrolytic plating may be used in the nickel plating process.

[0038] During the nickel plating process, the semiconductor substrate 1, which is the object to be plated, may be swung up and down. The swung speed is not particularly limited, but is, for example, 10 mm / min to 500 mm / min. The swung width is also not particularly limited, but is, for example, 10 mm to 500 mm. The temperature of the nickel plating solution is set appropriately depending on the type of nickel plating solution and plating conditions, etc. The temperature of the nickel plating solution is, for example, 50°C to 100°C. In consideration of productivity, the temperature is preferably 70°C to 90°C. The plating time is set appropriately depending on the plating conditions, the thickness of the nickel plating layer 5A, etc. The plating time is, for example, 5 minutes to 60 minutes.

[0039] Step S69 is a gold plating process. In this process, gold plating is performed on the front electrode 2 and the back electrode 3 on which the nickel plating layer 5A has been formed, to form a gold plating layer 5B. An electroless plating method is used for this process. The gold plating is performed by a method known as a substitution type. In substitution type gold plating, the difference between the noble oxidation-reduction potential of the metal ions contained in the chemical solution and the base oxidation-reduction potential of the metal layer affects the deposition rate. By appropriately selecting a complexing agent contained in the gold plating solution, the nickel in the nickel plating layer 5A is replaced with gold. The type of gold plating solution is not particularly limited.

[0040] The gold concentration of the gold plating solution is not particularly limited, but is, for example, 1.0 g / L or more and 5 g / L or less. The pH of the gold plating solution is not particularly limited, but is, for example, 6.0 or more and 8.0 or less. The temperature of the gold plating solution is appropriately set depending on the type of gold plating solution and plating conditions, etc. The temperature of the gold plating solution is, for example, 30°C or more and 100°C or less. When the phosphorus concentration in the nickel plating layer 5A is less than 5 mass%, the temperature of the gold plating solution is preferably 30°C or more and 60°C or less. On the other hand, when the phosphorus concentration is higher than 5 mass%, the temperature of the gold plating solution is preferably 40°C or more and 100°C or less. The plating time is appropriately set depending on the plating conditions, the thickness of the gold plating layer 5B, etc. The plating time is, for example, 5 minutes or more and 60 minutes or less.

[0041] In the gold plating process, unevenness 6 is formed on the surface of the gold plating layer 5B. The unevenness 6 is formed on the surface of the nickel plating layer 5A and the surface of the gold plating layer 5B, starting from the granular matter 4. That is, convex portions are formed directly above the granular matter 4, and concave portions are formed directly above the portions between the granular matter 4. The diameter, density, and height difference of the unevenness 6 are appropriately set as described above. If the height difference is small, gas generated from the solder cannot be discharged to the outside during the mounting process. Conversely, if the height difference is large, solder bonding becomes difficult.

[0042] In step S70, a mounting process is performed. FIG. 4 is a cross-sectional view showing the configuration of the semiconductor device 101 after the mounting process. The plating layer 5 formed on the front electrode 2 is bonded to the external terminal 9 via solder 8A. The external terminal 9 is preferably formed of an inexpensive metal with low electrical resistance. The material of the external terminal 9 is, for example, copper or a copper alloy. The plating layer 5 formed on the back electrode 3 is bonded to the heat dissipation substrate 10 via solder 8B. The heat dissipation substrate 10 is, but is not limited to, a metal plate or a plate formed of an AlSiC composite material. The type of solder 8A, 8B is not particularly limited, but may be, for example, tin-silver-copper solder. The thickness of the solder 8A, 8B is 0.1 μm or more and 500 μm or less.

[0043] In the mounting process, solder 8B is first placed on heat dissipation substrate 10 at room temperature, and semiconductor substrate 1 is placed on solder 8B. Solder 8A is then placed on semiconductor substrate 1, and external terminals 9 are placed on solder 8A. In this state, semiconductor substrate 1, heat dissipation substrate 10, and external terminals 9 are heated in a reflow furnace. During this process, the flux in solder 8A and 8B, and hydrogen or moisture contained in plating layer 5, are generated as gases. If these gases are trapped inside solder 8A and 8B, voids are formed. In the first embodiment, these gases are easily discharged to the outside due to the unevenness of uneven portion 6. Therefore, the occurrence of voids is reduced at the joint between plating layer 5 and external terminal 9 or the joint between plating layer 5 and heat dissipation substrate 10. The voids do not impair electrical or thermal conduction.

[0044] To summarize the above, the semiconductor device 101 in the first embodiment includes a first electrode, a plurality of granular materials 4, and a second electrode. The first electrode is provided on a semiconductor substrate 1. The plurality of granular materials 4 are formed on the first electrode. The second electrode is provided on the first electrode on which the plurality of granular materials 4 are formed. The surface of the second electrode includes an uneven portion 6. The uneven portion 6 is formed in accordance with the plurality of granular materials 4 on the first electrode, which is the base of the second electrode. In the first embodiment, the first electrode corresponds to each of the front electrode 2 and the back electrode 3. The second electrode corresponds to the plating layer 5.

[0045] This configuration makes it easier to expel gas generated from inside the solders 8A, 8B and the plating layer 5 during the mounting process, thereby reducing voids that occur in the joint between the electrode including the plating layer 5 and the object to be joined.

[0046] Furthermore, to prevent voids from being formed inside the solder 8A, 8B during the mounting process, there is no need to apply slight vibrations to the semiconductor substrate 1. Even when mounting multiple semiconductor devices 101 on the heat dissipation substrate 10, no complex mounting equipment is required, improving productivity.

[0047] It is also possible to form recesses on the surface of the nickel plating layer 5A by controlling the conditions of the nickel plating solution. Because the nickel plating solution is consumed in large quantities, adjustments using multiple replenishment solutions are frequently required. This reduces production efficiency. However, the manufacturing method of embodiment 1 makes it possible to form the uneven portion 6 without such a decrease in productivity. In other words, because the granular matter 4 that serves as the starting point for the uneven portion 6 is produced by zincate treatment, adjustments to the nickel plating solution are unnecessary, improving productivity. Furthermore, according to the manufacturing method of embodiment 1, even when a neutral nickel plating solution is used due to a lower phosphorus concentration in the nickel plating solution, changing the conditions does not affect the formation of the uneven portion 6.

[0048] In the first embodiment, the granular materials 4 are formed on the surfaces of both the front electrode 2 and the back electrode 3. However, the granular materials 4 may be formed on only one of the surfaces of the front electrode 2 and the back electrode 3. The above-described effect is obtained on the surface on which the concave and convex portions 6 are formed in accordance with the granular materials 4.

[0049] The material of the particles 4 formed by the substitution reaction is mainly zinc, but may also be tin.

[0050] Electroless plating is used as an electrode formation technique in semiconductor device 101 from the viewpoints of productivity and cost. In semiconductor device 101, in which current flows between upper surface 1A and lower surface 1B of semiconductor substrate 1, plating layer 5 on top electrode 2 is bonded to external terminal 9 via solder 8A. Plating layer 5 on bottom electrode 3 is bonded to heat dissipation substrate 10 or the like via solder 8B. Metal films of aluminum or aluminum alloy are formed as top electrode 2 and bottom electrode 3. To achieve bonding with solders 8A and 8B, it is necessary to form nickel plating layer 5A and gold plating layer 5B on the aluminum-containing metal film.

[0051] Plating technology has the advantage of being able to form a thick nickel plating layer 5A with high productivity. When the nickel plating layer 5A is joined to the solders 8A and 8B, nickel is reduced due to an alloy reaction with tin contained in the solders 8A and 8B. This requires a nickel plating layer 5A several micrometers thick. However, vacuum film formation techniques such as vapor deposition and sputtering can only produce nickel layers with a maximum thickness of about 1.0 micrometers. Achieving the desired film thickness increases manufacturing costs.

[0052] In this regard, electroless plating can reduce manufacturing costs. Electroless plating can selectively form a plating layer 5 only on the surface of aluminum or an aluminum alloy (hereinafter referred to as an aluminum electrode). Commonly used electroless plating methods include a palladium catalyst method and a zincate method. The palladium catalyst method deposits palladium as catalytic nuclei on the surface of an aluminum electrode to form a plating layer 5. When the palladium method is used, the amount of etching of the underlying aluminum electrode is small, resulting in a satisfactory surface smoothness of the plating layer 5. However, because palladium is a precious metal, manufacturing costs increase. The zincate method substitutes zinc for aluminum on the surface of the aluminum electrode, depositing it as catalytic nuclei to form a plating layer 5. Zincate solutions are widely used because they are inexpensive.

[0053] Second Embodiment In a second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0054] 5 is a cross-sectional view showing the configuration of a semiconductor device 102 according to Embodiment 2. The front-side electrode 2 includes a first front-side electrode 2A and a second front-side electrode 2B. The back-side electrode 3 includes a first back-side electrode 3A and a second back-side electrode 3B.

[0055] The first front-side electrode 2A is provided on the upper surface 1A of the semiconductor substrate 1. The second front-side electrode 2B is provided on the first front-side electrode 2A. The first front-side electrode 2A and the second front-side electrode 2B contain aluminum or an aluminum alloy. The aluminum concentration of the second front-side electrode 2B is higher than the aluminum concentration of the first front-side electrode 2A.

[0056] The first back-side electrode 3A is provided on the lower surface 1B of the semiconductor substrate 1. The second back-side electrode 3B is provided on the first back-side electrode 3A. The first back-side electrode 3A and the second back-side electrode 3B are made of aluminum or an aluminum alloy. The aluminum concentration of the second back-side electrode 3B is higher than the aluminum concentration of the first back-side electrode 3A.

[0057] The content of an element nobler than aluminum in the aluminum alloy of second front-side electrode 2B and second back-side electrode 3B is preferably 1 mass % or less.

[0058] After being formed on the semiconductor substrate 1, the front electrode 2 and the back electrode 3 are heat-treated at a temperature of 300° C. to 400° C. in a reducing atmosphere containing hydrogen or the like. Then, a zincate treatment is performed. Adjustment of the zincate treatment conditions is easier than in the first embodiment.

[0059] As described above, the surface of the front-side electrode 2 in embodiment 2 corresponds to the surface of the second front-side electrode 2B, which has a higher aluminum concentration than the first front-side electrode 2A. The surface of the back-side electrode 3 corresponds to the surface of the second back-side electrode 3B, which has a higher aluminum concentration than the first back-side electrode 3A.

[0060] The granules 4 are deposited on the second front electrode 2B and the second back electrode 3B by a substitution reaction caused by the difference in oxidation-reduction potential. During this process, the surfaces of the second front electrode 2B and the second back electrode 3B are dissolved. The higher the aluminum concentration, the greater the amount of dissolution. Therefore, the amount of granules 4 deposited in the zincate treatment is greater than that in the first embodiment.

[0061] In the second embodiment, the number of layers of each of the front electrode 2 and the back electrode 3 is not limited to two, but may be three or more. The higher the aluminum concentration on the surfaces of the front electrode 2 and the back electrode 3, i.e., the surfaces to be subjected to the zincate treatment, the greater the amount of precipitated particulate matter 4.

[0062] Third Embodiment In a third embodiment, the same components as those in the first or second embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0063] FIG. 6 is a cross-sectional view showing the configuration of a semiconductor device 103 according to a third embodiment. The granules 4 are deposited on the top electrode 2 and the back electrode 3 by a substitution reaction resulting from the difference in redox potential. An aluminum oxide film is formed on the surfaces of the top electrode 2 and the back electrode 3. This oxide film is dissolved by the zincate solution. The exposed aluminum on the surfaces of the top electrode 2 and the back electrode 3 is replaced, resulting in the deposition of zinc. However, the zincate solution does not easily penetrate into the aluminum grain boundaries, leaving an oxide film. Therefore, the amount of granules 4 deposited is affected by the aluminum grain boundary density on the surfaces of the top electrode 2 and the back electrode 3. The aluminum grain boundary density is controlled by adjusting the heat treatment temperature or heat treatment time after the formation of the top electrode 2 and the back electrode 3. If the heat treatment temperature is low or the heat treatment time is short, the aluminum grain boundary density does not decrease. Therefore, the granules 4 are formed locally on the surfaces of the top electrode 2 and the back electrode 3.

[0064] The zincate treatment in the third embodiment is performed on the grain boundaries of aluminum in the front electrode 2 and the back electrode 3. Adjustment of the zincate treatment conditions is easier than in the first embodiment.

[0065] After being formed on the semiconductor substrate 1, the front electrode 2 and the back electrode 3 are heat-treated at a temperature of 200° C. or less in a reducing atmosphere containing hydrogen or the like.

[0066] As described above, in the third embodiment, the grain boundary density of aluminum on the surfaces of the front electrode 2 and the back electrode 3 is controlled.

[0067] Fourth Embodiment In a fourth embodiment, the same components as those in the first to third embodiments are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0068] 7 is a cross-sectional view showing the configuration of a semiconductor device 104 according to a fourth embodiment. The sizes of the granules 4 deposited on the top electrode 2 and the bottom electrode 3 are different. Accordingly, the size of the unevenness 6 formed in accordance with the granules 4 also changes depending on the size of the granules 4. By making the grain size of the aluminum constituting the top electrode 2 larger than that of the bottom electrode 3, the unevenness on the surface of the top electrode 2 is increased, and larger granules 4 are deposited on the top electrode 2 than on the bottom electrode 3.

[0069] This is achieved by making the thickness of the front electrode 2 thicker than the thickness of the back electrode 3. The thickness of the front electrode 2 is, for example, 3 μm or more and 10 μm or less. The thickness of the back electrode 3 is, for example, 0.2 μm or more and 3 μm or less.

[0070] The diameter of the particles 4 deposited on the front electrode 2 is 1.1 to 2 times the diameter of the particles 4 deposited on the back electrode 3. The height difference of the unevenness of the uneven portion 6 is also 1.1 to 2 times.

[0071] The method of embodiment 2 or 3 may be used to change the state of the granules 4 deposited on the front electrode 2 and the back electrode 3. That is, the aluminum concentration of the front electrode 2 and the back electrode 3 may be changed to change the size of the granules 4 deposited on the front electrode 2 and the back electrode 3, or the grain boundary density of aluminum may be controlled to change the size of the granules 4 deposited on the front electrode 2 and the back electrode 3.

[0072] As described above, in the fourth embodiment, the grain size, aluminum concentration, or aluminum grain boundary density of each of the front electrode 2 and the back electrode 3 is controlled.

[0073] Fifth Embodiment FIG. 8 is a functional block diagram showing the configuration of a power conversion system according to a fifth embodiment.

[0074] The power conversion system includes a power source 100 , a power conversion device 200 , and a load 300 .

[0075] The power supply 100 is a DC power supply. The power supply 100 supplies DC power to the power conversion device 200. The power supply 100 is, for example, a DC system, a solar cell, a storage battery, or the like. The power supply 100 may be a DC / DC converter that converts DC power output from a DC system into predetermined power. The power supply 100 may also be a rectifier circuit connected to an AC system, an AC / DC converter, or the like.

[0076] The power conversion device 200 is connected to the power supply 100 and the load 300. The power conversion device 200 in the fourth embodiment is a three-phase inverter. The power conversion device 200 converts DC power supplied from the power supply 100 into AC power. The power conversion device 200 supplies the AC power to the load 300.

[0077] The load 300 is driven by AC power supplied from the power conversion device 200. The load 300 in the fourth embodiment is a three-phase motor. The three-phase motor is not limited to a specific application. The three-phase motor is mounted in various electrical devices. For example, the three-phase motor is mounted in hybrid vehicles, electric vehicles, railroad cars, elevators, air conditioning equipment, and the like.

[0078] The power conversion device 200 includes a main conversion circuit 201, a drive circuit 202, and a control circuit 203.

[0079] The main conversion circuit 201 includes a semiconductor device described in any one of the first to fourth embodiments. The semiconductor device configures a two-level three-phase full-bridge circuit (not shown). The three-phase full-bridge circuit includes six switching elements (not shown) and six freewheeling diodes (not shown). At least one of the switching elements and freewheeling diodes corresponds to a semiconductor element included in the semiconductor device described in any one of the first to fourth embodiments.

[0080] The three-phase full-bridge circuit includes three upper arms and three lower arms. Each of the upper arms and lower arms includes one switching element and one freewheeling diode connected in anti-parallel to the switching element. The switching element included in one upper arm is connected in series to the switching element included in one lower arm, forming a pair of upper and lower arms. In other words, the three-phase full-bridge circuit includes three pairs of upper and lower arms. The three pairs of upper and lower arms correspond to the U phase, V phase, and W phase of the three-phase full-bridge circuit, respectively. The output terminals of the three pairs of upper and lower arms, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0081] The main conversion circuit 201 converts DC power supplied from the power supply 100 into AC power by the switching operation of the switching elements. The main conversion circuit 201 supplies the AC power to the load 300 via the output terminals.

[0082] The drive circuit 202 generates a drive signal for driving the switching element of the main conversion circuit 201 in accordance with a control signal output from the control circuit 203. The drive circuit 202 supplies the drive signal to the control electrode of the switching element of the main conversion circuit 201.

[0083] The drive signal is a signal for turning on a switching element or a signal for turning off a switching element. More specifically, when a switching element is maintained in an on state, the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element. When a switching element is maintained in an off state, the drive signal is a voltage signal (off signal) that is smaller than the threshold voltage of the switching element.

[0084] The control circuit 203 outputs a control signal to the drive circuit 202 for controlling the drive circuit 202. At that time, the control circuit 203 calculates the time (on time) for which each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 300, and generates the control signal. In other words, the control circuit 203 generates a control signal so that the main conversion circuit 201 is PWM-controlled. The control circuit 203 outputs a control signal to the drive circuit 202 so that the drive circuit 202 outputs an on signal to switching elements that should be in the on state and an off signal to switching elements that should be in the off state. In this way, the control circuit 203 controls the switching elements of the main conversion circuit 201 so that a predetermined power is supplied to the load 300.

[0085] The main conversion circuit 201 in the fifth embodiment employs the semiconductor device shown in any one of the first to fourth embodiments, thereby improving reliability.

[0086] In the fifth embodiment, an example has been shown in which the power conversion device 200 is a two-level three-phase inverter, but the configuration of the power conversion device 200 is not limited thereto. For example, the power conversion device 200 may be a multi-level power conversion device, such as a three-level power conversion device. Alternatively, the power conversion device 200 may be a single-phase inverter for supplying power to a single-phase load. When the load 300 is a DC load, the power conversion device 200 may be a DC / DC converter or an AC / DC converter. When the load 300 is a photovoltaic power generation system, a power storage system, or the like, the power conversion device 200 may be a power conditioner.

[0087] Although the fifth embodiment has been described with reference to an example in which the load 300 is a three-phase motor, the configuration of the load 300 is not limited thereto. For example, the load 300 may be an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system.

[0088] Although the present disclosure has been described in detail, the above description is illustrative in all respects and is not restrictive. It is understood that countless variations not illustrated can be envisioned.

[0089] In the present disclosure, the embodiments can be freely combined, and the embodiments can be modified or omitted as appropriate.

[0090] Various aspects of the present disclosure are summarized below as appendices.

[0091] (Supplementary Note 1) A semiconductor device comprising: a first electrode provided on a semiconductor substrate; a plurality of granular objects formed on the first electrode; and a second electrode provided on the first electrode on which the plurality of granular objects are formed, wherein the surface of the second electrode includes an uneven portion formed in accordance with the plurality of granular objects on the first electrode, which is an underlayer of the second electrode.

[0092] (Appendix 2) The semiconductor device described in Appendix 1, wherein the first electrode corresponds to at least one of a front electrode provided on the upper surface of the semiconductor substrate and a back electrode provided on the lower surface of the semiconductor substrate, the first electrode includes aluminum, and the second electrode includes a first plating layer including nickel and provided on the first electrode to cover the plurality of granular particles, and a second plating layer including gold and provided on the first plating layer.

[0093] (Supplementary Note 3) The semiconductor device according to Supplementary Note 1 or Supplementary Note 2, wherein the unevenness of the uneven portion has a height difference of 0.01 μm or more and 1 μm or less.

[0094] (Supplementary Note 4) The semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 3, wherein the diameter of the concave and convex portions is 1.0 μm or less.

[0095] (Note 5) The density of the plurality of granular particles is 0.04 particles / μm ２ 4 or more pieces / μm ２ 5. The semiconductor device according to claim 1, wherein:

[0096] (Supplementary Note 6) The semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 5, wherein the diameter of each of the plurality of granular objects is 0.1 μm or more and 1 μm or less.

[0097] (Appendix 7) The semiconductor device according to any one of Appendix 1 to Appendix 6, wherein the first electrode corresponds to a front-side electrode provided on the top surface of the semiconductor substrate and a back-side electrode provided on the bottom surface of the semiconductor substrate, the size of the plurality of granular objects formed on the front-side electrode is larger than the size of the plurality of granular objects formed on the back-side electrode, and the height difference of the uneven portion formed in accordance with the plurality of granular objects on the front-side electrode is larger than the height difference of the uneven portion formed in accordance with the plurality of granular objects on the back-side electrode.

[0098] (Supplementary Note 8) A power conversion device including: a main conversion circuit including the semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 7, which converts power and outputs it to a load; a drive circuit which outputs a drive signal to the semiconductor device for driving the semiconductor device; and a control circuit which outputs a control signal to the drive circuit for controlling the drive circuit.

[0099] (Appendix 9) A method for manufacturing a semiconductor device, comprising: a step of forming a first electrode on a semiconductor substrate; a step of forming a plurality of granular objects on the first electrode; and a step of forming a second electrode on the first electrode on which the plurality of granular objects have been formed, wherein a surface of the second electrode includes an uneven portion formed in accordance with the plurality of granular objects on the first electrode, which is an underlayer of the second electrode.

[0100] 1 Semiconductor substrate, 1A upper surface, 1B lower surface, 2 front electrode, 2A first front electrode, 2B second front electrode, 3 rear electrode, 3A first rear electrode, 3B second rear electrode, 4 granular material, 5 plating layer, 5A nickel plating layer, 5B gold plating layer, 6 uneven portion, 7 protective film, 8A solder, 8B solder, 9 external terminal, 10 heat dissipation substrate, 100 power supply, 101 semiconductor device, 102 semiconductor device, 103 semiconductor device, 200 power conversion device, 201 main conversion circuit, 202 drive circuit, 203 control circuit, 300 load.

Claims

1. a first electrode provided on a semiconductor substrate; a plurality of particulates formed on the first electrode; a second electrode provided on the first electrode on which the plurality of particulates are formed, a surface of the second electrode including an uneven portion formed in accordance with the plurality of granular objects on the first electrode that is a base of the second electrode; the first electrode corresponds to a front-side electrode provided on an upper surface of the semiconductor substrate and a back-side electrode provided on a lower surface of the semiconductor substrate; the size of the plurality of granules formed on the front electrode is larger than the size of the plurality of granules formed on the back electrode, A semiconductor device, wherein the height difference of the uneven portion formed in accordance with the plurality of granular objects on the front electrode is greater than the height difference of the uneven portion formed in accordance with the plurality of granular objects on the back electrode.

2. The first electrode includes aluminum, 2. The semiconductor device of claim 1, wherein the second electrode includes a first plating layer containing nickel and covering the plurality of granular particles and provided on the first electrode, and a second plating layer containing gold and provided on the first plating layer.

3. 3. The semiconductor device according to claim 1, wherein the height difference between the projections and depressions of the projections and depressions is 0.01 [mu]m or more and 1 [mu]m or less.

4. 3. The semiconductor device according to claim 1, wherein the diameter of the concave and convex portions is 1.0 [mu]m or less.

5. The density of the plurality of particles is 0.04 particles / μm ２ 4 or more pieces / μm ２ 3. The semiconductor device according to claim 1, wherein:

6. 3. The semiconductor device according to claim 1, wherein each of said plurality of particles has a diameter of 0.1 [mu]m or more and 1 [mu]m or less.

7. a main conversion circuit including the semiconductor device according to claim 1 or 2, which converts power and outputs the power to a load; a drive circuit that outputs a drive signal to the semiconductor device for driving the semiconductor device; a control circuit that outputs a control signal to the drive circuit for controlling the drive circuit.

8. forming a first electrode on a semiconductor substrate; forming a plurality of particles on the first electrode; forming a second electrode on the first electrode on which the plurality of particulates are formed, a surface of the second electrode including an uneven portion formed in accordance with the plurality of granular objects on the first electrode that is a base of the second electrode; the first electrode corresponds to a front-side electrode provided on an upper surface of the semiconductor substrate and a back-side electrode provided on a lower surface of the semiconductor substrate; the size of the plurality of granules formed on the front electrode is larger than the size of the plurality of granules formed on the back electrode, A method for manufacturing a semiconductor device, wherein the height difference of the uneven portion formed in accordance with the plurality of granular objects on the front electrode is greater than the height difference of the uneven portion formed in accordance with the plurality of granular objects on the back electrode.