Display substrate and display apparatus

By setting a partition structure on the OLED display substrate and disconnecting the common layer of the charge generation layer, the color chain problem caused by leakage between sub-pixels in the series OLED display panel is solved, and the display effect is improved.

WO2024192934A9PCT designated stage expired Publication Date: 2025-03-20BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
PCT/CN2023/108154
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-03-21
Filing Date
2023-07-19
Publication Date
2025-03-20

AI Technical Summary

Technical Problem

In the series OLED display panel, the charge generation layer has a large lateral conductivity, resulting in leakage between sub-pixels and causing color chain problems.

Method used

By providing a partition structure on the display substrate, including grooves between adjacent anodes and protrusions between adjacent pixel openings, the common layer in the light functional layer is broken, and the charge generation layer is prevented from being between sub-pixels. continuous.

Benefits of technology

It effectively prevents leakage between sub-pixels, reduces the color chain problem, and improves the brightness and color performance of the display substrate.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display substrate and a display apparatus. The display substrate comprises a driving structure layer (131) and a light-emitting structure layer, which are sequentially stacked on a substrate (121), wherein the light-emitting structure layer comprises an anode layer, a pixel definition layer (171), a light-emission functional layer (181) and a cathode layer (191), which are sequentially arranged in the direction away from the substrate (121); the anode layer comprises a plurality of anodes (24); the pixel definition layer (171) is arranged on one side of the plurality of anodes (24) that is away from the substrate (121), and is provided with a plurality of pixel openings (172); the pixel openings (172) expose the anodes (24); and the light-emission functional layer (181) and the cathode layer (191) are sequentially stacked on the side of the anodes (24) that is away from the substrate (121). The display substrate further comprises a partition structure, wherein the partition structure comprises a groove (142), which is located between adjacent anodes (24), and a protrusion (143), which is located between adjacent pixel openings (172).
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Description

Display substrate and display device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on March 21, 2023, with application number 202310279509.3 and invention name “A display substrate and display device”, the contents of which should be understood as incorporated into this application by reference. Technical Field

[0002] The embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and more particularly to a display substrate and a display device. Background Art

[0003] To improve brightness, some organic light emitting diode (OLED) display panels use a tandem structure for their light-emitting elements. However, this structure contains a charge generation layer (CGL), which generates mobile charges under the action of voltage. Due to the high lateral conductivity of the CGL and the relatively close distance between sub-pixels, leakage between sub-pixels can occur, resulting in cross-color problems between sub-pixels.

[0004] Summary of the Invention

[0005] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0006] In a first aspect, an embodiment of the present disclosure provides a display substrate, comprising a plurality of sub-pixels disposed on a substrate, the plurality of sub-pixels including a first sub-pixel emitting a first color light, a second sub-pixel emitting a second color light, and a third sub-pixel emitting a third color light; the sub-pixels including light-emitting elements;

[0007] The display substrate includes a driving structure layer and a light-emitting structure layer sequentially stacked on the base; the light-emitting structure layer includes an anode layer, a pixel defining layer, a light-emitting functional layer, and a cathode layer sequentially arranged in a direction away from the base; the anode layer includes a plurality of anodes, the pixel defining layer is arranged on a side of the plurality of anodes away from the base and is provided with a plurality of pixel openings, the pixel openings exposing the anodes, the light-emitting functional layer and the cathode layer sequentially stacked on a side of the anodes away from the base; the pixel openings define the sub-pixels, and the light-emitting element includes the anode, the light-emitting functional layer, and the cathode layer;

[0008] The display substrate further includes a partition structure, wherein the partition structure includes grooves located between adjacent anodes and protrusions located between adjacent pixel openings.

[0009] In a second aspect, an embodiment of the present disclosure provides a display device, comprising the display substrate in the above embodiment.

[0010] Other features and advantages of the present disclosure will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present disclosure. Other advantages of the present disclosure can be realized and obtained through the solutions described in the description and the drawings.

[0011] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The accompanying drawings are intended to provide a further understanding of the technical solutions of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solutions of the present disclosure and do not constitute a limitation of the technical solutions of the present disclosure. The shapes and sizes of the components in the accompanying drawings do not reflect the actual scale and are intended only to illustrate the contents of the present disclosure.

[0013] FIG1 is a schematic diagram of a partial planar structure of a display area of ​​a display substrate according to an exemplary embodiment of the present disclosure;

[0014] FIG2 is a schematic diagram of another partial planar structure of a display area of ​​a display substrate according to an exemplary embodiment of the present disclosure;

[0015] FIG3 is a schematic diagram of the cross-sectional structure at the cutting line C in FIG1 or FIG2;

[0016] FIG4 is a schematic diagram of a partial structure of FIG3 ;

[0017] FIG5 is a schematic diagram of a partial top view of a display substrate according to an exemplary embodiment of the present disclosure;

[0018] FIG6 is another partial structural schematic diagram of FIG3;

[0019] FIG7 is another partial structural diagram of FIG3;

[0020] FIG8 is a schematic diagram of a partial cross-sectional structure of a display substrate according to an exemplary embodiment of the present disclosure;

[0021] FIG9 is another partial top view schematic diagram of the display substrate according to an exemplary embodiment of the present disclosure;

[0022] FIG10 is another partial cross-sectional structural schematic diagram of a display substrate according to an exemplary embodiment of the present disclosure;

[0023] FIG. 11 is a schematic diagram of a partial planar structure of a display substrate according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] Those skilled in the art should understand that the technical solutions of the embodiments of the present disclosure may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the embodiments of the present disclosure, and all should be included in the scope of the claims of the present disclosure.

[0025] FIG1 is a schematic diagram of a partial planar structure of a display area of ​​a display substrate according to an exemplary embodiment of the present disclosure. As shown in FIG1 , the display area of ​​the display substrate may include: a plurality of sub-pixels disposed on a substrate, wherein the plurality of sub-pixels may include a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, and a third sub-pixel P3 emitting a third color light. A pixel unit may include three sub-pixels, i.e., a first sub-pixel P1, a second sub-pixel P2, and a third sub-pixel P3; or a pixel unit may include four sub-pixels, i.e., two first sub-pixels P1, a second sub-pixel P2, and a third sub-pixel P3. For example, the first sub-pixel P1 may emit green light, the second sub-pixel P2 may emit blue light, and the third sub-pixel P3 may emit red light. Herein, sub-pixels emitting light of different colors may be referred to as sub-pixels of different colors, or may be referred to as sub-pixels of different types.

[0026] In some exemplary embodiments, as shown in FIG1 , the plurality of sub-pixels in the display area may be arranged into a plurality of pixel rows extending along a first direction X and a plurality of pixel columns extending along a second direction Y. For example, the plurality of sub-pixels may be arranged into a plurality of first pixel rows, a plurality of second pixel rows, a plurality of first pixel columns, and a plurality of second pixel columns. Second sub-pixels P2 and third sub-pixels P3 are alternately arranged in the first direction X to form a first pixel row, a plurality of first sub-pixels P1 are sequentially arranged in the first direction X to form a second pixel row, the first pixel row and the second pixel row are alternately arranged in the second direction Y, and the sub-pixels in adjacent pixel rows are staggered. Second sub-pixels P2 and third sub-pixels P3 are alternately arranged in the second direction Y to form a first pixel column, a plurality of first sub-pixels P1 are sequentially arranged in the second direction Y to form a second pixel column, the first pixel column and the second pixel column are alternately arranged in the first direction X, and the sub-pixels in adjacent pixel columns are staggered. In other exemplary embodiments, the types and arrangements of the plurality of sub-pixels in the display area may be other. The present disclosure does not limit the types and arrangements of the plurality of sub-pixels in the display area. In an exemplary embodiment, the first direction X and the second direction Y intersect. For example, the first direction X may be an extending direction of scan signal lines in the display panel (horizontal row direction), and the second direction Y may be an extending direction of data signal lines in the display panel (vertical column direction). The first direction X and the second direction Y may be perpendicular to each other.

[0027] For example, each sub-pixel may include a light-emitting element, which may be an OLED (organic light-emitting diode) or a QLED (quantum-dot light-emitting diode) device. The present disclosure does not limit the color of light emitted by the light-emitting element of the sub-pixel. For example, the light-emitting element may emit white light, and cooperate with a color filter layer (i.e., a color filter layer) to enable the sub-pixel to emit light of a set color. Alternatively, the color of light emitted by the light-emitting element of the sub-pixel may be the same as the color of the light emitted by the sub-pixel.

[0028] In some exemplary embodiments, the light-emitting element may include: an anode, a light-emitting functional layer, and a cathode layer stacked in sequence in a direction away from the substrate. The light-emitting functional layer may include an organic light-emitting layer, and may also include any one or more film layers of a hole injection layer, a hole transport layer, and an electron blocking layer located between the anode and the organic light-emitting layer, and may also include any one or more film layers of an electron injection layer, an electron transport layer, and a hole blocking layer located between the cathode layer and the organic light-emitting layer. The light-emitting functional layer may include one organic light-emitting layer, or the light-emitting functional layer may include multiple organic light-emitting layers and one or more charge generation layers, wherein the organic light-emitting layers and the charge generation layers are alternately arranged in a direction away from the substrate to form a tandem light-emitting structure. The use of a tandem light-emitting structure helps to improve the luminance of the display substrate and reduce power consumption. However, the charge generation layer in the tandem light-emitting structure is generally a common layer, that is, the charge generation layers of multiple sub-pixels are an integrated structure, and the charge generation layer is continuous between adjacent sub-pixels. Due to the large lateral conductivity of the charge generation layer, leakage between sub-pixels is easily caused, resulting in cross-color problems between sub-pixels.

[0029] In some exemplary embodiments, the display substrate may further include a pixel defining layer having a plurality of pixel openings, wherein the light-emitting element is disposed at each pixel opening, and each pixel opening defines a sub-pixel. Herein, a sub-pixel area may be understood as the effective light-emitting area of ​​the sub-pixel (i.e., the area defined by the pixel opening of the sub-pixel).

[0030] In some exemplary embodiments, a partition structure may also be provided on the display substrate, and the partition structure is configured to isolate at least one common layer in the light-emitting functional layer (such as a charge generation layer) so that at least one common layer in the light-emitting functional layer (such as a charge generation layer) is disconnected between adjacent sub-pixels.

[0031] In some exemplary embodiments, as shown in FIG. 1 , anodes 24 of a plurality of sub-pixels are illustrated, including anode 24 a of a first sub-pixel P1, anode 24 b of a second sub-pixel P2, and anode 24 c of a third sub-pixel P3. The partition structure may include a groove (not shown) and a protrusion 143. The groove is provided in the region between adjacent anodes 24. For example, the region indicated by the arrowed line M in FIG. 1 may represent the region between the adjacent anodes 24 a of the first sub-pixel P1 and the anode 24 c of the third sub-pixel P3.

[0032] In some exemplary embodiments, as shown in FIG1 , a protrusion 143 is disposed in the region between the pixel openings of adjacent sub-pixels. The shape of the protrusion 143 can be substantially the same as that of the anode 24, or at least partially substantially the same. For example, when the anode 24 is circular or substantially circular, the protrusion 143 can be circular, substantially circular, or at least partially arc-shaped. When the anode 24 is a polygon with straight edges, the protrusion 143 can be a polygon with straight edges, or at least partially have straight edges. This arrangement is beneficial to process stability. When the anode 24 is a regular octagon or other shape with an outer contour close to a circle, the protrusion 143 can be circular, or at least partially have an arc shape. This arrangement can simplify the process while ensuring process stability.

[0033] Here, the grooves and protrusions may refer to structures having protrusions or depressions in a direction perpendicular to the substrate.

[0034] In some exemplary embodiments, the anode may include: a first anode and a second anode sequentially disposed in a direction away from the substrate, an insulating layer may be disposed between the first anode and the second anode, and the second anode is connected to the first anode via a first via hole disposed in the insulating layer. For example, in the example of FIG1 , the anode of each sub-pixel may be understood as the first anode of each sub-pixel.

[0035] FIG2 is another partial planar structural diagram of the display area of ​​a display substrate according to an exemplary embodiment of the present disclosure, and FIG2 illustrates another pixel arrangement structure. As shown in FIG2 , the display area of ​​the display substrate may include: a plurality of pixel units arranged in an array on a substrate ( FIG2 illustrates one pixel unit), wherein one pixel unit may include four sub-pixels, for example, two first sub-pixels P1, one second sub-pixel P2, and one third sub-pixel P3. The four sub-pixels in the pixel unit may be arranged in two rows and two columns and generally rectangular, with the two first sub-pixels P1 located in the same column, and the second sub-pixel P2 and the third sub-pixel P3 located in the same column. The row direction is the first direction X in FIG2 , and the column direction is the second direction Y in FIG2 . That is, in the pixel unit, one first sub-pixel P1 and the third sub-pixel P3 are located in the same row and arranged along the first direction X, another first sub-pixel P1 and the second sub-pixel P2 are located in the same row and arranged along the first direction X, the two first sub-pixels P1 are located in the same column and arranged along the second direction Y, and the second sub-pixel P2 and the third sub-pixel P3 are located in the same column and arranged along the second direction Y. The first direction X and the second direction Y intersect, for example, the first direction X and the second direction Y may be perpendicular to each other.

[0036] Exemplarily, the second sub-pixel P2 emits a wavelength smaller than that of the first sub-pixel P1, and the first sub-pixel P1 emits a wavelength smaller than that of the third sub-pixel P3. For example, the first sub-pixel P1 may emit green light, the second sub-pixel P2 may emit blue light, and the third sub-pixel P3 may emit red light.

[0037] In some exemplary embodiments, as shown in FIG2 , the size of each sub-pixel in the display area in a direction parallel to the substrate may be less than 10 micrometers. The total area of ​​the two anodes 24 a - 1 and 24 a - 2 of the two first sub-pixels P1 in a pixel unit may be larger than the area of ​​the anode 24 b of the second sub-pixel P2, and the area of ​​the anode 24 b of the second sub-pixel P2 may be larger than the area of ​​the anode 24 c of the third sub-pixel P3.

[0038] For example, as shown in FIG2 , the two anodes 24a-1 and 24a-2 of the two first sub-pixels P1 in the pixel unit can be connected as an integral structure. The two anodes 24a-1 and 24a-2 of the two first sub-pixels P1 can have equal potentials. The sizes of the pixel openings 172 of the two first sub-pixels P1 in the pixel unit can be equal or unequal. This structure helps to adjust the hue of the full-color display. Here, “A and B can be connected as an integral structure” described in the present disclosure may mean that A and B are connected to each other and A is part of B, or, A and B can be arranged in the same layer using the same material and A and B can be made by a single patterning process.

[0039] In some other exemplary embodiments, the anode may include a first anode and a second anode sequentially arranged in a direction away from the substrate, an insulating layer may be provided between the first anode and the second anode, and the second anode is connected to the first anode through a first via provided in the insulating layer.

[0040] For example, as shown in FIG2 , FIG2 illustrates a first anode 141a of a first subpixel P1, a first anode 141b of a second subpixel P2, and a first anode 141c of a third subpixel P3. The two first anodes 141a-1 and 141a-2 of two first subpixels P1 in a pixel unit can be connected as an integral structure, or the two second anodes of two first subpixels P1 can be connected as an integral structure, or the two first anodes 141a-1 and 141a-2 of two first subpixels P1 can be connected as an integral structure, and the two second anodes of two first subpixels P1 can be connected as an integral structure. The anodes of the two first subpixels P1 can have equal potentials.

[0041] For example, as shown in FIG2 , the total area of ​​the two first anodes 141a-1 and 141a-2 of the two first sub-pixels P1 in a pixel unit may be greater than the area of ​​the first anode 141b of the second sub-pixel P2, and the area of ​​the first anode 141b of the second sub-pixel P2 may be greater than the area of ​​the first anode 141c of the third sub-pixel P3.

[0042] Exemplarily, as shown in Figure 2, in the pixel unit, the area of ​​the pixel opening 172 of the second sub-pixel P2 is larger than the area of ​​the pixel opening 172 of the third sub-pixel P3, the area of ​​the pixel opening 172 of the third sub-pixel P3 is larger than the area of ​​the pixel opening 172 of any first sub-pixel P1, and is smaller than the sum of the areas of the pixel openings 172 of the two first sub-pixels P1 in a pixel unit.

[0043] For example, as shown in FIG2 , in a direction parallel to the substrate, a protrusion 143 is provided around the periphery of the pixel opening 172 of at least one color sub-pixel. For example, a protrusion 143 may be provided around the periphery of the pixel opening 172 of only one color sub-pixel, or a protrusion 143 may be provided around the periphery of the pixel opening 172 of each color sub-pixel. FIG2 illustrates an example in which a protrusion 143 is provided around the periphery of the pixel opening 172 of each sub-pixel in a pixel unit.

[0044] In some exemplary embodiments, the protrusion 143 may surround at least one sub-pixel. The shape of the protrusion 143 is not limited, and the number of protrusions 143 surrounding at least one sub-pixel is not limited. For example, a sub-pixel may be surrounded by a closed or open annular protrusion 143, or a sub-pixel may be surrounded by multiple protrusions 143 spaced apart. The shape of the protrusion 143 may be annular, straight, broken, or curved, etc.

[0045] In some exemplary embodiments, as shown in FIG2 , the orthographic projection of the anode 24 of at least one sub-pixel on the substrate may include the orthographic projection of the pixel opening 172 of the sub-pixel on the substrate, and may also include the orthographic projection of the protrusion 143 surrounding the sub-pixel on the substrate. For example, the shape of the anode 24 may be approximately octagonal, and the shape of the protrusion 143 may be approximately hexagonal, with both the shape of the anode 24 and the shape of the protrusion 143 being approximately circular.

[0046] In some other exemplary embodiments, the anode may include a first anode and a second anode sequentially arranged in a direction away from the substrate, an insulating layer may be provided between the first anode and the second anode, and the second anode is connected to the first anode through a first via provided in the insulating layer.

[0047] For example, as shown in FIG2 , FIG2 illustrates a first anode 141a of a first sub-pixel P1, a first anode 141b of a second sub-pixel P2, and a first anode 141c of a third sub-pixel P3. The orthographic projection of the first anode 141 of at least one sub-pixel on the substrate includes the orthographic projection of the pixel opening 172 of the sub-pixel on the substrate, and may include the orthographic projection of the protrusion 143 surrounding the sub-pixel on the substrate. For example, the shape of the first anode 141 may be approximately octagonal, the shape of the protrusion 143 may be approximately hexagonal, and the shapes of the first anode 141 and the protrusion 143 are both approximately circular. In other embodiments, in a direction parallel to the substrate, the protrusion 143 may be arranged close to the edge of the first anode 141 and be approximately the same as the outline shape of the first anode 141.

[0048] Figure 3 is a schematic diagram of the cross-sectional structure at the cutting line C in Figure 1 or Figure 2. As shown in Figure 3, in the direction perpendicular to the substrate 121, the display substrate may include a driving structure layer 131 and a light-emitting structure layer stacked in sequence on the substrate 121; the light-emitting structure layer may include an anode layer, a pixel defining layer 171, a light-emitting functional layer 181 and a cathode layer 191 arranged in sequence along a direction away from the substrate 121.

[0049] In some exemplary embodiments, the anode layer may include a plurality of anodes 24, the pixel defining layer 171 is arranged on the side of the plurality of anodes 24 away from the substrate 121 and is provided with a plurality of pixel openings 172, the pixel openings 172 expose the anodes 24, the light-emitting functional layer 181 and the cathode layer 191 are stacked in sequence on the side of the anode 24 away from the substrate 121; the pixel openings 172 define the sub-pixels, and the light-emitting element may include the anode 24, the light-emitting functional layer 181 and the cathode layer 191.

[0050] In some exemplary embodiments, the display substrate may further include a partition structure, which may include a groove 142 located between adjacent anodes 24 and a protrusion 143 located between adjacent pixel openings 172, and at least one film layer in the light-emitting functional layer 181 is disconnected at a position corresponding to the partition structure.

[0051] In the embodiment of the present disclosure, by setting the partition structure, and the partition structure includes a groove 142 and a protrusion 143, at least one film layer in the light-emitting functional layer 181 (such as a charge generation layer) can be disconnected at a position corresponding to the partition structure (the area indicated by the dotted box N), thereby preventing the color cross-talk problem between sub-pixels caused by the continuity of the charge generation layer between adjacent sub-pixels.

[0052] In some exemplary embodiments, as shown in FIG3 , the anode layer may include a first anode layer and a second anode layer sequentially disposed in a direction away from the substrate 121 , and the light emitting structure layer may further include an insulating layer 15 disposed between the first anode layer and the second anode layer;

[0053] The first anode layer includes a plurality of first anodes 141, the second anode layer includes a plurality of second anodes 161, and the second anodes 161 are connected to the first anodes 141 through first vias provided in the insulating layer 15; the anode 24 includes the first anodes 141 and the second anodes 161 connected through the first vias; the pixel defining layer 171 is provided on a side of the plurality of second anodes 161 and the insulating layer 15 away from the substrate 121, and the pixel opening 172 exposes the second anodes 161; the light-emitting functional layer 181 and the cathode layer 191 are sequentially stacked on a side of the second anodes 161 away from the substrate 121;

[0054] The groove 142 is arranged on the surface of the driving structure layer 131 away from the substrate 121, and the protrusion 143 is arranged on the surface of the insulating layer 15 away from the substrate 121; in the direction parallel to the substrate 121, the groove 142 is located between adjacent first anodes 141, and the protrusion 143 is located between adjacent pixel openings 172.

[0055] In the embodiment of the present disclosure, the anode includes a first anode 141 and a second anode 161 that are electrically connected, and an insulating layer 15 is provided between the first anode 141 and the second anode 161, and the protrusion 143 is provided on the surface of the insulating layer 15 away from the substrate 121. In this way, in some embodiments, a microcavity structure can be formed between the first anode 141 and the cathode layer 191 (the microcavity structure can be used to enhance the output light of the light-emitting element), and the cavity length of the microcavity structure can be adjusted by adjusting the thickness of the insulating layer 15, so that the light output bands of different sub-pixels can be adjusted, thereby optimizing the full-color display effect of the display substrate.

[0056] In some exemplary embodiments, the driving structure layer 131 may include a plurality of pixel driving circuits and a plurality of signal lines (including gate lines, data lines, power lines, etc.). The pixel driving circuit may include a plurality of transistors (T) and storage capacitors (C). For example, the pixel driving circuit may be a 3T1C, 7T1C or other structure. The embodiment of the present disclosure does not limit the structure of the pixel driving circuit. In some embodiments, the display substrate may be a silicon-based micro organic light emitting diode (micro OLED) display substrate, and the pixel driving circuit may be prepared using a complementary metal oxide semiconductor (CMOS) integrated circuit process. The pixel driving circuit is connected to the first anode 141 of the light emitting element and is configured to drive the light emitting element to emit light.

[0057] In some exemplary embodiments, as shown in FIG. 3 , the groove 142 may also be located between adjacent protrusions 143 in a direction parallel to the substrate 121 , thereby enhancing the isolation effect of the isolation structure on the charge generation layer and reducing the possibility of cross-color between adjacent sub-pixels.

[0058] In some exemplary embodiments, as shown in FIG. 3 , an orthographic projection of the protrusion 143 on the substrate 121 may overlap with an orthographic projection of the first anode 141 on the substrate 121 .

[0059] In some exemplary embodiments, as shown in FIG3 , the thickness of the insulating layer 15 can be different for sub-pixels of different colors. This allows the microcavity structures of the sub-pixels of different colors to have different cavity lengths, thereby optimizing the light emission wavelengths of the different sub-pixels and, in turn, optimizing the full-color display effect of the display substrate. For sub-pixels of different colors, the longer the light emission wavelength of the sub-pixel, the thicker the insulating layer can be.

[0060] In some exemplary embodiments, as shown in FIG3 , the insulating layer 15 may include a plurality of stacked film layers, with at least one film layer in the insulating layer 15 being discontinuous between the pixel openings 172 of sub-pixels of different colors. Thus, by adjusting the thickness of the discontinuous film layer in the insulating layer 15 between the pixel openings 172 of sub-pixels of different colors, the thickness of the insulating layer 15 in the sub-pixels of different colors can be adjusted, thereby adjusting the cavity length of the microcavity structure in the sub-pixels of different colors.

[0061] In some exemplary embodiments, as shown in Figure 3, the insulating layer 15 may include a plurality of stacked film layers, at least one film layer in the insulating layer 15 close to the substrate is discontinuous between the pixel openings 172 of sub-pixels of different colors and is not arranged in the groove 142, and at least one film layer in the insulating layer 15 away from the substrate is continuous between the pixel openings 172 of sub-pixels of different colors.

[0062] Illustratively, the film layer in the insulating layer 15 near the substrate 121 may include multiple insulating sublayers 1511, each insulating sublayer 1511 being disposed on a side of a corresponding first anode 141 away from the substrate 121, and the orthographic projection of the first anode 141 on the substrate 121 may include the orthographic projection of the insulating sublayer 1511 on the substrate 121. The thickness of the insulating sublayer 1511 of different color subpixels may be different, and the microcavity length of the different color subpixels can be adjusted by adjusting the thickness of the insulating sublayer 1511 of the different color subpixels.

[0063] In some exemplary embodiments, as shown in FIG3 , the insulating layer 15 may include a plurality of stacked film layers, and the light-emitting structure layer may further include a filling layer 23 disposed in the groove 142 , and the film layer in the insulating layer 15 located on the side of the filling layer 23 away from the substrate 121 is provided with the protrusion 143 .

[0064] For example, as shown in FIG3 , the insulating layer 15 may include a first insulating layer 151, a second insulating layer 152, a third insulating layer 153, and a fourth insulating layer 154 stacked sequentially in a direction away from the substrate 121, and the second anode 161 is disposed on a surface of the fourth insulating layer 154 away from the substrate 121. The first insulating layer 151 may include a plurality of insulating sublayers 1511, each of which is disposed on a side of a corresponding first anode 141 away from the substrate 121, and the orthographic projection of the first anode 141 on the substrate 121 includes the orthographic projection of the insulating sublayer 1511 on the substrate 121; the second insulating layer 152, the third insulating layer 153, and the fourth insulating layer 154 may all be continuous between the pixel openings 172 of sub-pixels of different colors, and the second insulating layer 152, the third insulating layer 153, and the fourth insulating layer 154 may all be solid-surface structures. In this way, the cavity lengths of the microcavity structures of the different color subpixels can be adjusted by adjusting the thickness of the insulating sublayer 1511 in the different color subpixels, and the cavity lengths of the microcavity structures of the different color subpixels can be adjusted by adjusting the local thicknesses of the second insulating layer 152, the third insulating layer 153, and the fourth insulating layer 154. The second insulating layer 152 can be disposed on the surfaces of the plurality of insulating sublayers 1511 away from the substrate 121, on the circumferential sidewalls of the plurality of insulating sublayers 1511 and the plurality of first anodes 141, and on the walls of the groove 142. The second insulating layer 152 can include: a first portion located on the surface of the insulating sublayer 1511 away from the substrate 121 (a flat portion located on the side of the first anode 141 away from the substrate 121); a third portion located on the bottom wall of the groove 142; and a second portion connecting the first and third portions (a sloped portion located on the circumferential sidewalls of the insulating sublayer 1511, the first anode 141, and the groove 142). The second and third portions of the second insulating layer 152 are recessed toward the side closer to the substrate 121 relative to the first portion, forming a recessed portion. The filling layer 23 may be disposed on the surface of the second insulating layer 152 away from the substrate 121 and located within the recessed portion of the second insulating layer 152. The third insulating layer 153 is disposed on the surfaces of the second insulating layer 152 and the filling layer 23 away from the substrate 121. A first protrusion 31 is formed on the third insulating layer 153 at a location corresponding to the junction of the first and second portions of the second insulating layer 152. The third insulating layer 153 may include: a fourth portion (flat portion) located on the first portion of the second insulating layer 152 and in contact with the first protrusion 31; a sixth portion located on the filling layer 23 and in contact with the first protrusion 31; and a first protrusion (fifth portion) 31 connecting the fourth and sixth portions.The fourth insulating layer 154 is disposed on the surface of the third insulating layer 153 away from the substrate 121. Second protrusions 41 are formed on the fourth insulating layer 154 at positions corresponding to the first protrusions 31 of the third insulating layer 153. These second protrusions 41 can serve as the protrusions 143 of the partition structure. In other exemplary embodiments, the insulating layer 15 may include a second insulating layer 152 and a third insulating layer 153 stacked sequentially in a direction away from the substrate 121. That is, the first insulating layer 151 and the fourth insulating layer 154 may not be provided. The second anode 161 may be disposed on the surface of the third insulating layer 153 away from the substrate 121. In this case, the first protrusions 31 on the third insulating layer 153 serve as the protrusions of the partition structure.

[0065] In some exemplary embodiments, as shown in FIG3 , the total thickness of the second insulating layer 152 and the third insulating layer 153 of different color sub-pixels may be different. For example, the first sub-pixel may emit green light, the second sub-pixel may emit blue light, and the third sub-pixel may emit red light; the ratio of the total thickness of the second insulating layer 152 and the third insulating layer 153 of the first sub-pixel to the total thickness of the second insulating layer 152 and the third insulating layer 153 of the third sub-pixel may be 1:1.1. In this way, the microcavity length of the different color sub-pixels can be adjusted by adjusting the total thickness of the second insulating layer 152 and the third insulating layer 153 of the different color sub-pixels. For example, among different color sub-pixels, the longer the light emission wavelength of the sub-pixel, the greater the total thickness of the second insulating layer 152 and the third insulating layer 153 of the sub-pixel can be.

[0066] In some exemplary embodiments, as shown in FIG3 , the thickness of the fourth insulating layer 154 of different color sub-pixels may be different, or the thickness of the insulating sub-layer 1511 of different color sub-pixels may be different, or the thickness of both the fourth insulating layer 154 and the insulating sub-layer 1511 of different color sub-pixels may be different. In this way, the microcavity length of the different color sub-pixels can be adjusted by adjusting the thickness of the fourth insulating layer 154 and / or the insulating sub-layer 1511 of the different color sub-pixels. For example, for different color sub-pixels, the longer the light emission wavelength of the sub-pixel, the thicker at least one of the fourth insulating layer 154 and the insulating sub-layer 1511 of the sub-pixel may be.

[0067] In some exemplary embodiments, as shown in FIG. 3 , the second anode 161 is disposed on a surface of the insulating layer 15 away from the substrate 121 , and a portion of the second anode 161 close to the edge is located on the protrusion 143 .

[0068] In some exemplary embodiments, as shown in FIG3 , the orthographic projection of the pixel defining layer 171 on the substrate 121 may include the orthographic projection of the protrusion 143 on the substrate 121 . This ensures that the surface of the portion of the second anode 161 exposed by the pixel opening 172 is flat, thereby improving the optical display effect.

[0069] In some exemplary embodiments, as shown in FIG. 3 , the material of the pixel defining layer 171 may be an inorganic material, such as silicon nitride, silicon oxide, etc.

[0070] In some exemplary embodiments, as shown in FIG3 , the insulating layer 15 may be made of an inorganic material, such as at least one of silicon nitride, silicon oxide, and silicon oxynitride. For example, the first insulating layer 151 and the fourth insulating layer 154 may be made of silicon oxide, and the refractive index of the first insulating layer 151 and the fourth insulating layer 154 may be approximately 1.46. The second insulating layer 152 and the third insulating layer 153 may be made of silicon nitride, and the refractive index of the second insulating layer 152 and the third insulating layer 153 may be approximately 1.8.

[0071] In some exemplary embodiments, as shown in FIG3 , the first anode 141 may have good reflectivity and may be a metal layer. The first anode 141 may be made of a single metal material, or may be an alloy material, such as titanium aluminum alloy (Ti / Al), aluminum copper alloy (Al / Cu), or titanium aluminum silver alloy (Ti / Al / Ag). The first anode 141 may be a single-layer structure, or may be a stacked structure of multiple metal layers. The material of the cathode layer 191 may be a magnesium silver alloy (Mg / Ag). A microcavity structure may be formed between the first anode 141 and the cathode layer 191 to enhance the emitted light of the light-emitting element.

[0072] In some exemplary embodiments, the partition structure partitions at least one film layer in the light-emitting functional layer 181 and may or may not partition the cathode layer 191. That is, the cathode layer 191 may be disconnected or continuous at the position corresponding to the partition structure.

[0073] In some exemplary embodiments, FIG4 is a schematic diagram of a partial structure of FIG3 . As shown in FIG4 , the plurality of sub-pixels in the display area may include adjacent first and second reference sub-pixels (for example, the sub-pixel on the left in FIG4 is the first reference sub-pixel, and the sub-pixel on the right is the second reference sub-pixel). The groove between the first anode of the first reference sub-pixel and the first anode of the second reference sub-pixel serves as the first reference groove, the first protrusion provided on the third insulating layer 153 and located outside the pixel opening of the first reference sub-pixel serves as the first reference protrusion, and the first protrusion provided on the third insulating layer 153 and located outside the pixel opening of the second reference sub-pixel serves as the second reference protrusion. A cross section parallel to the arrangement direction of the first and second reference sub-pixels and perpendicular to the substrate serves as a first reference plane (the cross section in the example of FIG4 ). The arrangement direction of the first and second reference sub-pixels is the extending direction of a line connecting the center of the effective light-emitting area of ​​the first reference sub-pixel and the center of the effective light-emitting area of ​​the second reference sub-pixel (the first direction X in the example of FIG4 ). Herein, the extending direction of the line connecting the centers of the effective light emitting areas of adjacent sub-pixels (areas defined by the pixel openings of the sub-pixels) is taken as the arrangement direction of the adjacent sub-pixels.

[0074] In some exemplary embodiments, as shown in FIG4 , within the first reference plane, the third portion of the second insulating layer 152 located on the bottom wall of the first reference recess has a midpoint X0 in the arrangement direction of the first and second reference sub-pixels (the first direction X in the example of FIG4 ). A perpendicular line passing through point X0 and perpendicular to the substrate is L5. The first reference protrusion near the first reference recess has a highest point U1 away from the substrate. The first reference protrusion near the first reference recess intersects with the fourth portion of the third insulating layer at point D1. An extension of the line passing through point D1 along the arrangement direction of the first and second reference sub-pixels intersects with L5 at point X1. An extension of the line passing through point D1 along the arrangement direction of the first and second reference sub-pixels intersects with the side of the first reference protrusion near the first reference recess at point D2. The perpendicular line from U1 to L5 intersects at point X2. Within the first reference plane, the pixel opening of the first reference sub-pixel near the substrate and near the first reference recess has a point O1. The perpendicular line from point O1 to L5 intersects at point X3. Points X0 and D2, X0 and U1, X0 and D1, and X0 and O1 define four virtual lines: L1, L2, L3, and L4. The angles between L1, L2, L3, and L4 and L5 are θ1, θ2, θ3, and θ9, respectively. Furthermore, the distance between X0 and D2 is l1, the distance between X0 and U1 is l2, the distance between X0 and D1 is l3, and the distance between X0 and O1 is l4. Within the first reference plane, the pixel opening of the second reference subpixel has a point O2 on the side closest to the substrate and the first reference groove. Points X0 and O2 define a virtual line L6, and the distance between X0 and O2 is l6.

[0075] For example, it can be set as follows: l2*cosθ2>l1*cosθ1=l3*cosθ3, where the distance between point X0 and point U1 is l2, the angle between L2 and L5 is θ2, the distance between point X0 and point D2 is l1, the angle between L1 and L5 is θ1, the distance between point X0 and point D1 is l3, and the angle between L3 and L5 is θ3. This helps to implement a partition structure to isolate the charge generation layer and improve the cross-color problem.

[0076] Exemplarily, it can be set to: l4*cosθ9>l2*cosθ2, wherein the distance between point X0 and point O1 is l4, the angle between L4 and L5 is θ9, the distance between point X0 and point U1 is l2, the angle between L2 and L5 is θ2, and the orthographic projection of the pixel defining layer 171 on the substrate 121 may include the protrusion of the partition structure (the first reference protrusion corresponds to the protrusion position of the partition structure) and the orthographic projection of the groove on the substrate, which helps to ensure the flatness of the portion of the second anode 161 exposed by the pixel opening 172 and enhance the optical display effect.

[0077] Illustratively, within the first reference plane, the intersection of the first reference protrusion near the first reference groove and the sixth portion of the third insulating layer is closer to the substrate than point D2, that is, the sixth portion of the third insulating layer 153 is closer to the substrate than the fourth portion of the third insulating layer 153. This helps to implement a partition structure to isolate the charge generating layer and reduce the possibility of cross-color.

[0078] For example, the bottom wall of the groove 142 is closer to the substrate than the surface of the first anode 141 close to the substrate, which helps to implement a partition structure to separate the charge generation layer and reduce the possibility of cross-color.

[0079] For example, it can be set as:

[0080] 0.8≤(l4*cosθ9-l2*cosθ2) / (l2*cosθ2-l3*cosθ3)≤1.2, wherein the distance between point X0 and point O1 is l4, the angle between L4 and L5 is θ9, the distance between point X0 and point U1 is l2, the angle between L2 and L5 is θ2, the distance between point X0 and point D1 is l3, and the angle between L3 and L5 is θ3. In this way, the flatness of the portion of the second anode 161 exposed by the pixel opening 172 and the aperture ratio of the entire display substrate can be guaranteed while ensuring that the partition structure isolates the charge generating layer, thereby improving the optical display effect.

[0081] Exemplarily, the luminous wavelength of the first reference sub-pixel can be smaller than the luminous wavelength of the second reference sub-pixel. For example, the first reference sub-pixel can be a green sub-pixel, and the second reference sub-pixel can be a red sub-pixel. The wavelength can be set to: 1.1≤l6 / l4≤1.4, where the distance between point X0 and point O1 is l4, and the distance between point X0 and point O2 is l6. In this example, the thickness of the fourth insulating layer 154 of the second reference sub-pixel can be greater than the thickness of the fourth insulating layer 154 of the first reference sub-pixel. The thickness of the fourth insulating layer 154 of different color sub-pixels can be different, and the microcavity length of different color sub-pixels can be adjusted by adjusting the thickness of the fourth insulating layer 154 of different color sub-pixels. Among different color sub-pixels, the longer the luminous wavelength of the sub-pixel, the greater the thickness of the fourth insulating layer 154 of the sub-pixel can be.

[0082] Exemplarily, it can be set to: (l3*cosθ3) / (l4*cosθ9)≤0.72;

[0083] And (l2*cosθ2) / (l4*cosθ9)≤0.81, where the distance between point X0 and point D1 is l3, the angle between L3 and L5 is θ3, the distance between point X0 and point O1 is l4, the angle between L4 and L5 is θ9, the distance between point X0 and point U1 is l2, and the angle between L2 and L5 is θ2.

[0084] In some exemplary embodiments, FIG5 is a schematic diagram of a partial top view of a display substrate in some exemplary embodiments. As shown in FIG4 and FIG5 , the first reference sub-pixel and the second reference sub-pixel are arranged in a first direction X, i.e., the first reference sub-pixel and the second reference sub-pixel are adjacent in the first direction X. The straight line defined by the closest points of the orthographic projection of the first reference protrusion 311 and the orthographic projection of the second reference protrusion 312 on the substrate is within the first reference plane. The multiple sub-pixels in the display area further include a third reference sub-pixel adjacent to the first reference sub-pixel in the second direction Y. The first protrusion provided on the third insulating layer and located outside the pixel opening of the third reference sub-pixel serves as the third reference protrusion 313.

[0085] In some exemplary embodiments, as shown in Figures 4 and 5, within the first reference plane, the first reference protrusion 311 near the first reference groove has a highest point U1 away from the substrate, the second reference protrusion 312 near the first reference groove has a highest point U2 away from the substrate, and the third portion of the second insulating layer 152 located on the bottom wall of the first reference groove has a midpoint X0 in the first direction X.

[0086] In some exemplary embodiments, as shown in Figures 4 and 5, the plane where the substrate is located is taken as the projection plane, the orthographic projection point of point U1 on the projection plane is U1", and the orthographic projection point of point U2 on the projection plane is U2". In the projection plane, a straight line passing through point U1" and along the second direction Y has at least one intersection with the orthographic projection of the third reference protrusion on the projection plane, and the intersection point closest to point U1" among the at least one intersection is U3", and point U3" is the orthographic projection point of the highest point U3 on the third reference protrusion away from the substrate on the projection plane. A cross section determined by a straight line passing through points U2" and U3" and perpendicular to the substrate is taken as the second reference plane, a cross section determined by a straight line passing through points U1" and U3" and perpendicular to the substrate is taken as the third reference plane, the groove between the first anode of the second reference sub-pixel and the first anode of the third reference sub-pixel is taken as the second reference groove, and the groove between the first anode of the first reference sub-pixel and the first anode of the third reference sub-pixel is taken as the third reference groove. In the second reference plane, the third portion of the second insulating layer located on the bottom wall of the second reference groove has a midpoint Y0 in a direction parallel to the straight line defined by points U2″ and U3″. In the third reference plane, the third portion of the second insulating layer located on the bottom wall of the third reference groove has a midpoint Z in the second direction.

[0087] In some exemplary embodiments, as shown in Figures 4 and 5, the direction perpendicular to the substrate is taken as the third direction (consistent with the direction of the vertical line L5 mentioned above), the angle between the straight line determined by points Y0 and U2 and the third direction is θ5, the angle between the straight line determined by points Z and U3 and the third direction is θ7, and the angle between L2 and L5 is θ2, which can be set to: θ5>θ2, θ5>θ7.

[0088] In some exemplary embodiments, as shown in Figures 4 and 5, the angle between the line defined by points X0 and U2 and the third direction is θ4, the angle between the line defined by points Y0 and U3 and the third direction is θ6, the angle between the line defined by points Z and U1 and the third direction is θ8, the angle between the line defined by points Y0 and U2 and the third direction is θ5, the angle between the line defined by points Z and U3 and the third direction is θ7, and the angle between L2 and L5 is θ2, which can be set to: θ2 ≈ θ4, θ5 ≈ θ6, and θ7 ≈ θ8. It can be understood that θ2 and θ4 are within 10° of each other, θ5 and θ6 are within 10° of each other, and θ7 and θ8 are within 10° of each other. For example, they can all be within 5° of each other.

[0089] Exemplarily, the emission wavelength of the first reference sub-pixel may be smaller than the emission wavelength of the second reference sub-pixel, and the third reference sub-pixel and the first reference sub-pixel may emit light of the same color. For example, the third reference sub-pixel and the first reference sub-pixel may both emit green light, and the second reference sub-pixel may emit red light.

[0090] In some exemplary embodiments, the display area includes a first structural unit and a second structural unit, and the first structural unit and the second structural unit both have the aforementioned θ1 to θ9, l1, l2, l3, l4, as well as point U1, point U2, point U3, point O1, point D1, point D2, midpoint X0, midpoint Y0, and midpoint Z.

[0091] In some exemplary embodiments, the ratio of θ5 of the first structural unit to θ5 of the second structural unit is greater than the ratio of θ2 of the first structural unit to θ2 of the second structural unit. The ratio of θ5 of the first structural unit to θ5 of the second structural unit is greater than the ratio of θ7 of the first structural unit to θ7 of the second structural unit.

[0092] In some exemplary embodiments, the ratio of the distance between the U2 point and the U3 point of the second structural unit to the distance between the U2 point and the U3 point of the first structural unit is A1, the ratio of the distance between the U1 point and the U2 point of the second structural unit to the distance between the U1 point and the U2 point of the first structural unit is A2, and the ratio of the distance between the U1 point and the U3 point of the second structural unit to the distance between the U1 point and the U3 point of the first structural unit is A3, which can be set as A1 < A2 and A1 < A3. In this way, it helps to achieve an increase in the aperture ratio while reducing color bleeding, achieving a higher pixel density (PPI).

[0093] In some exemplary embodiments, define d1 = l4 * sinθ9. The d1 of the second structural unit can be less than that of the first structural unit, where the distance between the X0 point and the O1 point is l4, and the angle between L4 and L5 is θ9.

[0094] In some exemplary embodiments, FIG. 6 is another partial structural schematic diagram of FIG. 3. As shown in FIGS. 4 and 6, in the first reference plane, the surface of the pixel defining layer 171 located between the first reference sub-pixel and the second reference sub-pixel, away from the substrate, has a lowest point P close to the substrate in the direction perpendicular to the substrate, and the P point is not located on the perpendicular line L5. The P point can be located on one side of the perpendicular line L5 of the sub-pixel with a shorter emission wavelength among the first reference sub-pixel and the second reference sub-pixel. For example, when one of the first reference sub-pixel and the second reference sub-pixel is a green sub-pixel and the other is a red sub-pixel, the P point is located on one side of the perpendicular line L5 of the green sub-pixel (for example, in the example of FIG. 6, the left side is the green first reference sub-pixel and the right side is the red second reference sub-pixel, and the P point is located on one side of the perpendicular line L5 of the left green sub-pixel); when one of the first reference sub-pixel and the second reference sub-pixel is a green sub-pixel and the other is a blue sub-pixel, the P point is located on one side of the perpendicular line L5 of the blue sub-pixel; when one of the first reference sub-pixel and the second reference sub-pixel is a red sub-pixel and the other is a blue sub-pixel, the P point is located on one side of the perpendicular line L5 of the blue sub-pixel.

[0095] Exemplarily, in the first reference plane, the angle between the straight line determined by the X0 point and the P point and the perpendicular line L5 is θp, and the angle between L1 and L5 is θ1, which can be set as θp < θ1. That is, the P point is closer to the perpendicular line L5 relative to the D2 point.

[0096] Exemplarily, the distance between the X0 point and the P point is lp, the distance between the X0 point and the O1 point is l4, the angle between L4 and L5 is θ9, the distance between the X0 point and the U1 point is l2, the angle between L2 and L5 is θ2, and the distance between the X0 point and the D1 point is l3, and the angle between L3 and L5 is θ3. Then it can be set as:

[0097] 0.9<(lp*cosθp-l2*cosθ2) / (l2*cosθ2-l3*cosθ3)<1.1;

[0098] and (l2*cosθ2) / (l4*cosθ9)≤0.81;

[0099] At this time, point P can be closer to the substrate than point O1, which helps the partition structure to isolate the charge generation layer.

[0100] In some exemplary embodiments, FIG. 7 is another schematic diagram of a partial structure of FIG. 3 . As shown in FIG. 4 and FIG. 7 , the second anode 161 includes a first portion 1601 that is substantially parallel to the substrate, and a second portion 1602 that is angled relative to the substrate. The second portion 1602 of the second anode 161 is closer to the edge of the second anode 161 than the first portion 1601. The orthographic projection of the first portion 1601 of the second anode 161 on the substrate does not overlap with the orthographic projection of the protrusion on the substrate. The orthographic projection of the second portion 1602 of the second anode 161 on the substrate overlaps with the orthographic projection of the protrusion on the substrate, and the second portion 1602 of the second anode 161 is located on the protrusion. This helps improve the aperture ratio of the display substrate and ensures the flatness of the portion of the second anode 161 exposed by the pixel opening.

[0101] For example, the angle θp between the straight line defined by points X0 and P and the vertical line L5 is defined as θa, and the angle θa between the second portion 1602 of the second anode 161 and the substrate (the plane on which the substrate lies) can be defined as follows: θp < θa < θ2. The angle θa between the second portion 1602 of the second anode 161 and the substrate (the plane on which the substrate lies) can be substantially the same for sub-pixels of different colors.

[0102] Exemplarily, the emission wavelength of the first reference sub-pixel may be shorter than the emission wavelength of the second reference sub-pixel, and within the first reference plane, along the arrangement direction of the first reference sub-pixel and the second reference sub-pixel, the distance from the second anode of the first reference sub-pixel to point P is shorter than the distance from the second anode of the second reference sub-pixel to point P. For example, in the examples of Figures 4 and 7 , the first reference sub-pixel (the sub-pixel on the left in Figure 7 ) is a green sub-pixel, the second reference sub-pixel (the sub-pixel on the right in Figure 7 ) is a red sub-pixel, and the arrangement direction of the first reference sub-pixel and the second reference sub-pixel is a first direction X. Within the first reference plane, along the first direction X, the distance from the second anode 161 of the green sub-pixel to point P is shorter than the distance from the second anode 161 of the red sub-pixel to point P.

[0103] Exemplarily, the emission wavelength of the first reference sub-pixel may be smaller than the emission wavelength of the second reference sub-pixel, the pixel defining layer 171 includes a first portion overlapping with the second anode 161 of the first reference sub-pixel, and a second portion overlapping with the second anode 161 of the second reference sub-pixel, and the surface of the first portion of the pixel defining layer 171 away from the substrate is closer to the substrate than the surface of the second portion of the pixel defining layer 171 away from the substrate.

[0104] In some exemplary embodiments, FIG8 is a schematic diagram of a partial cross-sectional structure of a display substrate in some exemplary embodiments. As shown in FIG8 , the second anode 161 is disposed on a surface of the insulating layer 15 away from the substrate. The second anode 161 may include a first sub-electrode 1611 and a second sub-electrode 1612 stacked in a direction away from the substrate. A fifth insulating layer 162 may be disposed between the first sub-electrode 1611 and the second sub-electrode 1612. The first sub-electrode 1611 and the second sub-electrode 1612 are overlapped via a second via 32 provided in the fifth insulating layer 162. The first sub-electrode 1611 overlaps the first anode 141 via a first via 1501 provided in the insulating layer 15. The first anode 141 and the second anode 161 have the same potential. The dashed box 22 illustrates the overlapping structure of the first sub-electrode 1611 and the second sub-electrode 1612, as well as the overlapping structure of the first sub-electrode 1611 and the first anode 141.

[0105] Exemplarily, the first sub-electrode 1611 and the second sub-electrode 1612 may both be made of a transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO), or the like.

[0106] In some exemplary embodiments, the first via hole 1501 and the second via hole 32 of at least one sub-pixel may be surrounded by one or more protrusions 143 at the periphery of the pixel opening of the sub-pixel. For example, the shape of the protrusion 143 may be substantially the same as that of the anode (or first anode).

[0107] In some exemplary embodiments, FIG9 is another schematic diagram of a partial top view of a display substrate according to some exemplary embodiments. As shown in FIG9 , the display area of ​​the display substrate may include a plurality of pixel units arranged in an array. Each pixel unit may include four sub-pixels. For example, a pixel unit may include two first sub-pixels P1, one second sub-pixel P2, and one third sub-pixel P3. The four sub-pixels in the pixel unit may be arranged in two rows and two columns in a generally rectangular shape, with the two first sub-pixels P1 located in the same column, and the second sub-pixel P2 and the third sub-pixel P3 located in the same column. The row direction is the first direction X in FIG9 , and the column direction is the second direction Y in FIG9 . That is, in the pixel unit, one first sub-pixel P1 and the third sub-pixel P3 are located in the same row and arranged along the first direction X, another first sub-pixel P1 and the second sub-pixel P2 are located in the same row and arranged along the first direction X, the two first sub-pixels P1 are located in the same column and arranged along the second direction Y, and the second sub-pixel P2 and the third sub-pixel P3 are located in the same column and arranged along the second direction Y. The first direction X and the second direction Y intersect, for example, the first direction X and the second direction Y may be perpendicular to each other.

[0108] In some exemplary embodiments, as shown in FIG. 9 , FIG. 9 illustrates a first anode 141a-1 of one first subpixel P1, a first anode 141a-2 of another first subpixel P1, a first anode 141b of a second subpixel P2, and a first anode 141c of a third subpixel P3. The first anodes 141a-1 and 141a-2 of the two first subpixels P1 may be connected as an integral structure. For example, the first subpixel P1 may emit green light, the second subpixel P2 may emit blue light, and the third subpixel P3 may emit red light.

[0109] In some exemplary embodiments, as shown in FIG9 , the orthographic projection of the first anode 141 of the subpixel on the substrate may include the orthographic projection of the second via hole 32 on the substrate. For example, the first anode 141 of the subpixel may include a main body portion 1411 and a connecting portion 1412 connected to the main body portion 1411, wherein the orthographic projection of the connecting portion 1412 on the substrate overlaps with the orthographic projection of the second via hole 32 on the substrate.

[0110] In some exemplary embodiments, as shown in FIG. 9 , the number of the second via holes 32 in each sub-pixel in a pixel unit may be one or more, and different sub-pixels may have different numbers of second via holes 32 .

[0111] For example, sub-pixels of different colors located in the same row and arranged along the first direction X can have different numbers of second vias 32. In directions that form approximately a 45-degree angle with both the first direction X and the second direction Y, all sub-pixels can have the same number of second vias 32. For example, in a pixel unit, the first sub-pixel P1 located in the same row as the third sub-pixel P3 can have one second via 32, the first sub-pixel P1 located in the same row as the second sub-pixel P2 can have two second vias 32, the second sub-pixel P2 can have one second via 32, and the third sub-pixel P3 can have two second vias 32. That is, in the pixel unit, the number of second vias 32 in the first sub-pixel P1 located in the same row as the third sub-pixel P3 is the same as the number of second vias 32 in the second sub-pixel P2, and the number of second vias 32 in the first sub-pixel P1 located in the same row as the second sub-pixel P2 is the same as the number of second vias 32 in the third sub-pixel P3. This improves process stability and ensures electrode overlap yield, while also increasing the aperture ratio of the display substrate.

[0112] In other embodiments, all sub-pixels on the display substrate have the same number of second via holes 32 , for example, all sub-pixels have one or two second via holes 32 .

[0113] In some exemplary embodiments, as shown in FIG9 , one or more protrusions 143 are provided around the pixel opening 172 of at least one sub-pixel, and the first via hole and the second via hole 32 of at least one sub-pixel may be located outside the area surrounded by the one or more protrusions 143 around the pixel opening 172 of the sub-pixel. For example, one protrusion 143 is provided around the pixel opening 172 of at least one sub-pixel, and the protrusion 143 may be in the shape of a closed or open ring. The shape of the protrusion 143 may be substantially the same as that of the pixel opening 172 of the sub-pixel, and the first via hole and the second via hole 32 of the sub-pixel are located outside the area surrounded by the protrusion 143.

[0114] In some exemplary embodiments, Figure 10 is another schematic diagram of a partial cross-sectional structure of a display substrate of some exemplary embodiments. As shown in Figure 10, in a direction perpendicular to the substrate, the display substrate includes a driving structure layer, a light-emitting structure layer and a packaging structure layer 110 stacked in sequence on the substrate, and a color filter layer 1111 and a black matrix 1112 arranged on the side of the packaging structure layer 110 away from the substrate.

[0115] For example, the encapsulation structure layer 110 can be disposed on the surface of the cathode layer of the light-emitting structure layer away from the substrate. The encapsulation structure layer 110 can include a first encapsulation layer 1101, a second encapsulation layer 1102, and a third encapsulation layer 1103 stacked sequentially in a direction away from the substrate. The primary material (the material with the largest component in the film layer) of the first encapsulation layer 1101 and the third encapsulation layer 1103 can be an inorganic material, while the primary material of the second encapsulation layer 1102 can be an organic material. This helps achieve encapsulation and prevents water vapor erosion.

[0116] For example, the primary material of the first encapsulation layer 1101 and the third encapsulation layer 1103 may be silicon oxynitride having a refractive index of 1.75 to 1.8. The thickness of the first encapsulation layer 1101 may be 200 nm to 500 nm, and the thickness of the third encapsulation layer 1103 may be 850 nm to 1000 nm. Both the first encapsulation layer 1101 and the third encapsulation layer 1103 may be a single film layer or a stack of multiple inorganic material film layers. The primary material of the second encapsulation layer 1102 may be epoxy resin having a refractive index of 1.54.

[0117] For example, the thickness of the second encapsulation layer 1102 in the first sub-pixel region and the thickness of the second encapsulation layer 1102 in the third sub-pixel region can be substantially equal, and can be approximately 2 microns to 2.6 microns. The thickness of the second encapsulation layer 1102 in the second sub-pixel region can be greater than the thickness of the second encapsulation layer 1102 in the first and third sub-pixel regions.

[0118] For example, Figure 11 is a schematic diagram of a partial planar structure of a display substrate according to some exemplary embodiments. As shown in Figures 10 and 11, the color filter layer 1111 includes multiple filter units, including multiple first filter units 1111a located in the first sub-pixel region and capable of filtering out light of the first color, multiple second filter units 1111b located in the second sub-pixel region and capable of filtering out light of the second color, and multiple third filter units 1111c located in the third sub-pixel region and capable of filtering out light of the third color. The black matrix 1112 is provided with multiple light-transmitting openings, and each filter unit of the color filter layer 1111 is disposed within a corresponding light-transmitting opening to filter the light emitted by the corresponding sub-pixel, thereby achieving full-color display. The black matrix 1112 can prevent color crosstalk between sub-pixels.

[0119] Illustratively, the first filter unit 1111a is configured to transmit green light with a central wavelength of 540 nm, the second filter unit 1111b is configured to transmit blue light with a central wavelength of 470 nm, and the third filter unit 1111c is configured to transmit red light with a central wavelength of 610 nm.

[0120] For example, as shown in FIG10 , the orthographic projection of the black matrix 1112 on the substrate overlaps the orthographic projection of the partition structure's groove 142 on the substrate. At least two adjacent filter units may overlap, and the overlapping portion of the adjacent filter units may be located on the black matrix 1112 to prevent cross-color between sub-pixels.

[0121] For example, if the filter units of adjacent sub-pixels of different colors overlap, the overlapping portion of the filter units of adjacent sub-pixels of different colors can be used as a black matrix, eliminating the need for a separate black matrix film layer, which helps simplify the process. For example, the overlapping portion of the third filter unit and the first filter unit can be used as a black matrix between the adjacent third sub-pixel and the first sub-pixel.

[0122] For example, the second encapsulation layer 1102 has a certain leveling property during the preparation process. Therefore, the surface of the second encapsulation layer 1102 away from the substrate and the surface of the third encapsulation layer 1103 disposed on the second encapsulation layer 1102 away from the substrate can both be flat surfaces. The color filter layer 1111 and the black matrix 1112 can serve as anti-reflection layers and are disposed on the surface of the third encapsulation layer 1103 away from the substrate.

[0123] In some exemplary embodiments, as shown in FIG. 11 , FIG. 11 shows two pixel units. The sub-pixel arrangement of the pixel unit illustrated in FIG. 11 may be the same as the sub-pixel arrangement of the pixel unit illustrated in FIG. 2 .

[0124] For example, the black matrix 1112 may have a grid-like structure, with each grid hole being a light-transmitting opening. The orthographic projection of the light-transmitting opening of the black matrix 1112 on the substrate includes the orthographic projection of the pixel opening of the pixel-defining layer on the substrate. Each light-transmitting opening corresponds to the pixel opening of a corresponding sub-pixel. The black matrix 1112 may be located between two adjacent first sub-pixels.

[0125] For example, the thickness of the first filter unit 1111 a may be smaller than the thickness of the second filter unit 1111 b , and may be smaller than the thickness of the third filter unit 1111 c .

[0126] For example, the portion of the third filter unit 1111c overlapping the first filter unit 1111a may be located on a side of the first filter unit 1111a away from the substrate, and a portion of the first filter unit 1111a is located on a side of the black matrix 1112 away from the substrate.

[0127] Illustratively, the portion of the third filter unit 1111c overlapping with the second filter unit 1111b can be located on the side of the second filter unit 1111b away from the substrate, and the portion of the second filter unit 1111b overlapping with the first filter unit 1111a can be located on the side of the first filter unit 1111a away from the substrate.

[0128] Illustratively, in the orthographic projection of the third filter unit 1111c on the substrate, the area of ​​the portion that does not overlap with the orthographic projection of the first anode 141c of the third sub-pixel on the substrate is S1, in the orthographic projection of the first filter unit 1111a on the substrate, the area of ​​the portion that does not overlap with the orthographic projection of the first anode 141a of the first sub-pixel on the substrate is S2, and in the orthographic projection of the second filter unit 1111b on the substrate, the area of ​​the portion that does not overlap with the orthographic projection of the first anode 141b of the second sub-pixel on the substrate is S3. It can be set to S1>S2, or it can be set to S1>S3, or it can be set to S1>S2 and S1>S3, which helps to adjust the hue.

[0129] For example, the light-emitting element of the display substrate can be configured to emit white light. The second filter unit 1111b can be provided with a light-transmitting hole, and the white light emitted by the light-emitting element of the second sub-pixel can be emitted through the light-transmitting hole on the second filter unit 1111b, thereby improving the brightness of the light emitted by the display substrate.

[0130] The present disclosure also provides a display device comprising the display substrate described in any of the preceding embodiments. The display device may be a near-eye display device, such as a head-mounted display (HMD), augmented reality (AR) glasses, or an all-in-one virtual reality (VR) device. Alternatively, the display device may be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigation system.

[0131] In the drawings, the sizes of components, layer thicknesses, or regions are sometimes exaggerated for clarity. Therefore, the embodiments of the present disclosure are not necessarily limited to these dimensions, and the shapes and sizes of each component in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate some examples, and the embodiments of the present disclosure are not limited to the shapes or values ​​shown in the drawings.

[0132] In this description, "parallel" refers to a state where the angle formed by two straight lines is greater than -10° and less than 10°, and thus includes a state where the angle is greater than -5° and less than 5°. Furthermore, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80° and less than 100°, and thus includes a state where the angle is greater than 85° and less than 95°.

[0133] The ordinal numbers such as "first", "second", and "third" in this article are set to avoid confusion of constituent elements, rather than to limit the quantity.

[0134] In the description of this article, triangles, rectangles, trapezoids, pentagons or hexagons are not in the strict sense, but can be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc., and there can be some small deformations caused by tolerances, and there can be chamfers, arc edges and deformations.

[0135] The terms "about," "approximately," "roughly," and "approximately" used in this disclosure do not strictly define the limits and allow for process and measurement errors. For example, in this disclosure, "approximately the same" may refer to a situation where the numerical values ​​differ by less than 10%.

[0136] In the description herein, the terms "upper", "lower", "left", "right", "top", "inner", "outer", "axial", "four corners", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are merely simplified descriptions for the convenience of describing the embodiments of the present disclosure, and do not indicate or imply that the structure referred to has a specific orientation, is constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on the present disclosure.

[0137] In the description herein, unless otherwise expressly specified or limited, the terms "connect," "fixed connection," "installation," and "assembly" should be understood in a broad sense, for example, to mean a fixed connection, a detachable connection, or an integral connection; the terms "installation," "connection," and "fixed connection" can mean a direct connection, an indirect connection through an intermediate medium, or internal communication between two components. A person of ordinary skill in the art can understand the meaning of the above terms in the embodiments of the present disclosure according to the circumstances.

Claims

1. A display substrate, comprising: A plurality of sub-pixels are disposed on the substrate, the plurality of sub-pixels comprising a first sub-pixel emitting a first color light, a second sub-pixel emitting a second color light, and a third sub-pixel emitting a third color light; The sub-pixel includes a light-emitting element; The display substrate comprises a driving structure layer and a light emitting structure layer which are sequentially stacked on the base; the light emitting structure layer comprises an anode layer, a pixel defining layer, a light emitting function layer and a cathode layer which are sequentially arranged in a direction away from the base; the anode layer comprises a plurality of anodes, the pixel defining layer is arranged on a side of the plurality of anodes away from the base and is provided with a plurality of pixel openings, the pixel openings expose the anodes, the light emitting function layer and the cathode layer are sequentially stacked on a side of the anode away from the base; the pixel openings define the sub-pixels, and the light emitting element comprises the anode, the light emitting function layer and the cathode layer; The display substrate further includes a partition structure, wherein the partition structure includes a groove located between adjacent anodes and a protrusion located between adjacent pixel openings.

2. The display substrate according to claim 1, wherein: The anode layer includes a first anode layer and a second anode layer sequentially arranged in a direction away from the substrate, and the light emitting structure layer also includes an insulating layer arranged between the first anode layer and the second anode layer; The first anode layer includes a plurality of first anodes, the second anode layer includes a plurality of second anodes, the second anodes are connected to the first anodes through a first via hole provided in the insulating layer; the anode includes the first anode and the second anode connected through the first via hole, the pixel defining layer is provided on a side of the plurality of second anodes and the insulating layer away from the substrate, and the pixel opening exposes the second anode; the light emitting function layer and the cathode layer are sequentially stacked on a side of the second anode away from the substrate; The groove is arranged on a surface of the driving structure layer away from the substrate, and the protrusion is arranged on a surface of the insulating layer away from the substrate.

3. The display substrate according to claim 1, wherein: In a direction parallel to the base, the groove is also located between adjacent protrusions.

4. The display substrate according to claim 2, wherein: An orthographic projection of the protrusion on the substrate overlaps with an orthographic projection of the first anode on the substrate.

5. The display substrate according to claim 2, wherein: The second anode is disposed on a surface of the insulating layer away from the substrate, and a portion of the second anode close to an edge is located on the protrusion.

6. The display substrate according to claim 1, wherein: An orthographic projection of the pixel definition layer on the substrate includes an orthographic projection of the protrusion on the substrate.

7. The display substrate according to claim 1, wherein: At least one film layer in the light-emitting functional layer is disconnected at a position corresponding to the partition structure.

8. The display substrate according to claim 2, wherein: The thickness of the insulating layer of sub-pixels of different colors is different.

9. The display substrate according to claim 2, wherein: The insulating layer includes a plurality of stacked film layers, and at least one film layer in the insulating layer is discontinuous between the pixel openings of sub-pixels of different colors.

10. The display substrate according to claim 9, wherein: At least one film layer in the insulating layer close to the substrate is discontinuous between the pixel openings of sub-pixels of different colors and is not arranged in the groove, and at least one film layer in the insulating layer far from the substrate is continuous between the pixel openings of sub-pixels of different colors.

11. The display substrate according to claim 9, wherein: The film layer in the insulating layer close to the substrate includes multiple insulating sublayers, each of which is arranged on the side of a corresponding first anode away from the substrate, and the orthographic projection of the first anode on the substrate includes the orthographic projection of the insulating sublayer on the substrate.

12. The display substrate according to claim 11, wherein: The thickness of the insulating sublayer of sub-pixels of different colors is different.

13. The display substrate according to claim 2, wherein: The insulating layer includes a plurality of stacked film layers, the light emitting structure layer also includes a filling layer arranged in the groove, and the film layer of the insulating layer located on a side of the filling layer away from the substrate is provided with the protrusion.

14. The display substrate according to claim 13, wherein: The insulating layer comprises a second insulating layer and a third insulating layer which are sequentially stacked in a direction away from the substrate; The second insulating layer is arranged on a side of the plurality of first anodes away from the substrate and in the groove, the second insulating layer comprising a first portion located on a side of the first anode away from the substrate, a third portion located on a bottom wall of the groove, and a second portion connecting the first portion and the third portion; the second portion and the third portion of the second insulating layer are recessed toward a side close to the substrate compared to the first portion to form a recessed portion; The filling layer is disposed on a surface of the second insulating layer away from the substrate and is located in the recessed portion of the second insulating layer; The third insulating layer is arranged on the surfaces of the second insulating layer and the filling layer away from the substrate, and the third insulating layer comprises a fourth portion located on the first portion of the second insulating layer, a sixth portion located on the filling layer, and a first protrusion connecting the fourth portion and the sixth portion; The first protrusion is the protrusion of the partition structure; or, the insulating layer also includes a fourth insulating layer arranged on the surface of the third insulating layer away from the substrate, and a second protrusion is formed at a position of the fourth insulating layer corresponding to the first protrusion, and the second protrusion is the protrusion of the partition structure.

15. The display substrate according to claim 14, wherein: The insulating layer further includes a first insulating layer disposed between the plurality of first anodes and the second insulating layer, the first insulating layer including a plurality of insulating sublayers, each of the insulating sublayers being disposed between a corresponding one of the first anodes and the second insulating layer.

16. The display substrate according to claim 15, wherein: The thickness of the insulating sublayer of sub-pixels of different colors is different.

17. The display substrate according to claim 14, wherein: The thickness of the fourth insulating layer of sub-pixels of different colors is different; or / and, the total thickness of the second insulating layer and the third insulating layer of sub-pixels of different colors is different.

18. The display substrate according to claim 14, wherein: The plurality of sub-pixels include a first reference sub-pixel and a second reference sub-pixel adjacent to each other, the groove between the first anode of the first reference sub-pixel and the first anode of the second reference sub-pixel is used as a first reference groove, the first protrusion disposed on the third insulating layer and located at the periphery of the pixel opening of the first reference sub-pixel is used as a first reference protrusion, and the first protrusion disposed on the third insulating layer and located at the periphery of the pixel opening of the second reference sub-pixel is used as a second reference protrusion; Taking a cross section parallel to the arrangement direction of the first reference sub-pixel and the second reference sub-pixel and perpendicular to the substrate as a first reference plane; In the first reference plane, the third portion of the second insulating layer located on the bottom wall of the first reference groove has a midpoint X0 in the arrangement direction of the first reference sub-pixel and the second reference sub-pixel, a vertical line passing through X0 and perpendicular to the substrate is L5, the first reference protrusion close to the first reference groove has a highest point U1 away from the substrate, the first reference protrusion close to the first reference groove and the fourth portion of the third insulating layer have an intersection point D1, an extension line passing through D1 and along the arrangement direction of the first reference sub-pixel and the second reference sub-pixel has an intersection point X1 with L5, and an extension line passing through D1 and along the arrangement direction of the first reference sub-pixel and the second reference sub-pixel has an intersection point X2 with the first reference protrusion close to the first reference groove. The intersection point of the reference protrusion close to the first reference groove is D2, and the intersection point of the vertical line from U1 to L5 is X2; in the first reference plane, the pixel opening of the first reference sub-pixel close to one end of the substrate and close to one side of the first reference groove has a point O1, the intersection point of the vertical line from O1 to L5 is X3, and four virtual straight lines are respectively determined by point X0 and point D2, point X0 and point U1, point X0 and point D1, and point X0 and point O1: L1, L2, L3 and L4, and the angles between L1, L2, L3 and L4 and L5 are θ1, θ2, θ3, θ9, respectively; the distance between point X0 and point D2 is l1, the distance between point X0 and point U1 is l2, the distance between point X0 and point D1 is l3, and the distance between point X0 and point O1 is l4; Among them, l2*cosθ2>l1*cosθ1=l3*cosθ3.

19. The display substrate according to claim 18, wherein: l4*cosθ9>l2*cosθ2.

20. The display substrate according to claim 18, wherein: 0.8≤(l4*cosθ9-l2*cosθ2) / (l2*cosθ2-l3*cosθ3)≤1.

2.

21. The display substrate according to claim 18, wherein: (l3*cosθ3) / (l4*cosθ9)≤0.

72.

22. The display substrate according to claim 18, wherein: (l2*cosθ2) / (l4*cosθ9)≤0.

81.

23. The display substrate according to claim 18, wherein: In the first reference plane, the pixel opening of the second reference sub-pixel has a point O2 close to one end of the substrate and close to one side of the first reference groove, and the imaginary line L6 is determined by the point X0 and the point O2, and the distance between the point X0 and the point O2 is l6; the light emission wavelength of the first reference sub-pixel is smaller than the light emission wavelength of the second reference sub-pixel, 1.1≤l6 / l4≤1.

4.

24. The display substrate according to claim 18, wherein: In the first reference plane, an intersection point between the first reference protrusion close to the first reference groove and the sixth portion of the third insulating layer is closer to the substrate than point D2.

25. The display substrate according to claim 18, wherein: The first reference sub-pixel and the second reference sub-pixel are adjacent to each other in a first direction, and a straight line defined by points where the orthographic projection of the first reference protrusion on the substrate and the orthographic projection of the second reference protrusion on the substrate are closest to each other is within the first reference plane; The plurality of sub-pixels further include a third reference sub-pixel adjacent to the first reference sub-pixel in the second direction, and the first protrusion disposed on the third insulating layer and located at the periphery of the pixel opening of the third reference sub-pixel is used as a third reference protrusion; In the first reference plane, the second reference protrusion close to the first reference groove has a highest point U2 away from the substrate; The plane where the base is located is taken as the projection plane, the orthographic projection point of point U1 in the projection plane is U1", and the orthographic projection point of point U2 in the projection plane is U2"; in the projection plane, the straight line passing through point U1" and along the second direction has at least one intersection with the orthographic projection of the third reference protrusion in the projection plane, and the intersection point closest to point U1" in the at least one intersection is U3", and point U3" is the orthographic projection point of the highest point U3 on the third reference protrusion away from the base on the projection plane; the straight line determined by points U2" and U3" and perpendicular to the cross section of the base is taken as the second reference plane, and the straight line determined by points U1" and U3" and perpendicular to the cross section of the base is taken as the second reference plane. A cross section perpendicular to the substrate is used as a third reference plane, the groove between the first anode of the second reference sub-pixel and the first anode of the third reference sub-pixel is used as a second reference groove, and the groove between the first anode of the first reference sub-pixel and the first anode of the third reference sub-pixel is used as a third reference groove; within the second reference plane, the third portion of the second insulating layer located on the bottom wall of the second reference groove has a midpoint Y0 in a direction parallel to a straight line defined by points U2" and U3"; within the third reference plane, the third portion of the second insulating layer located on the bottom wall of the third reference groove has a midpoint Z in the second direction; The direction perpendicular to the substrate is taken as the third direction, the angle between the straight line determined by point Y0 and point U2 and the third direction is θ5, the angle between the straight line determined by point Z and point U3 and the third direction is θ7, wherein: θ5>θ2, and θ5>θ7.

26. The display substrate according to claim 25, wherein: The angle between the straight line determined by point X0 and point U2 and the third direction is θ4, the angle between the straight line determined by point Y0 and point U3 and the third direction is θ6, and the angle between the straight line determined by point Z and point U1 and the third direction is θ8, wherein: θ2 and θ4 differ within 10°, θ5 and θ6 differ within 10°, and θ7 and θ8 differ within 10°.

27. The display substrate according to claim 25, wherein: The light emission wavelength of the first reference sub-pixel is smaller than the light emission wavelength of the second reference sub-pixel, and the third reference sub-pixel and the first reference sub-pixel emit light of the same color.

28. The display substrate according to claim 26, wherein: The display substrate comprises a first structural unit and a second structural unit, and the first structural unit and the second structural unit both have the aforementioned θ1 to θ9, l1, l2, l3, l4, and point U1, point U2, point U3, point O1, point D1, and point D2; The ratio of θ5 of the first structural unit to θ5 of the second structural unit is greater than the ratio of θ2 of the first structural unit to θ2 of the second structural unit, and the ratio of θ5 of the first structural unit to θ5 of the second structural unit is greater than the ratio of θ7 of the first structural unit to θ7 of the second structural unit.

29. The display substrate according to claim 28, wherein: The ratio of the distance between U2 point and U3 point of the second structural unit to the distance between U2 point and U3 point of the first structural unit is A1; The ratio of the distance between U1 point and U2 point of the second structural unit to the distance between U1 point and U2 point of the first structural unit is A2; The ratio of the distance between U1 point and U3 point of the second structural unit to the distance between U1 point and U3 point of the first structural unit is A3; Wherein, A1 < A2 and A1 < A3.

30. The display substrate according to claim 28, wherein: Define d1 = l4 * sinθ9, and d1 of the second structural unit is less than d1 of the first structural unit.

31. The display substrate according to claim 18, wherein: In the first reference plane, the surface of the pixel defining layer away from the substrate between the first reference sub-pixel and the second reference sub-pixel has a lowest point P close to the substrate in the direction perpendicular to the substrate, and the P point is located on one side of the perpendicular line L5 where the sub-pixel with a shorter emission wavelength among the first reference sub-pixel and the second reference sub-pixel is located.

32. The display substrate according to claim 31, wherein: In the first reference plane, the angle between the straight line determined by the X0 point and the P point and the perpendicular line L5 is θp, and θp < θ1.

33. The display substrate according to claim 32, wherein: The distance between the X0 point and the P point is lp, wherein, 0.9 < (lp * cosθp - l2 * cosθ2) / (l2 * cosθ2 - l3 * cosθ3) < 1.1; (l2 * cosθ2) / (l4 * cosθ9) ≤ 0.

81.

34. The display substrate according to claim 32, wherein: The second anode includes a first part parallel to the substrate and a second part located on the protrusion, and the angle between the second part of the second anode and the substrate is θa, wherein, θp < θa < θ2.

35. The display substrate according to claim 34, wherein: The emission wavelength of the first reference sub-pixel is less than the emission wavelength of the second reference sub-pixel. In the first reference plane, along the arrangement direction of the first reference sub-pixel and the second reference sub-pixel, the distance from the second anode of the first reference sub-pixel to the P point is less than the distance from the second anode of the second reference sub-pixel to the P point.

36. The display substrate according to claim 18, wherein: The emission wavelength of the first reference sub-pixel is less than the emission wavelength of the second reference sub-pixel. The pixel defining layer includes a first part overlapping with the second anode of the first reference sub-pixel and a second part overlapping with the second anode of the second reference sub-pixel. The surface of the first part of the pixel defining layer away from the substrate is closer to the substrate than the surface of the second part of the pixel defining layer away from the substrate.

37. The display substrate according to claim 2, wherein: The second anode is arranged on the surface of the insulating layer away from the substrate, and the second anode includes a first sub-electrode and a second sub-electrode stacked in sequence in a direction away from the substrate, a fifth insulating layer is arranged between the first sub-electrode and the second sub-electrode, the first sub-electrode and the second sub-electrode are overlapped through a second via hole arranged in the fifth insulating layer; the first sub-electrode is overlapped with the first anode through the first via hole.

38. The display substrate according to claim 37, wherein: An orthographic projection of the first anode on the substrate includes an orthographic projection of the second via on the substrate.

39. The display substrate according to claim 37, wherein: The number of the second via holes in the sub-pixel is one or more.

40. The display substrate according to claim 37, wherein: The display substrate comprises a plurality of pixel units arranged in an array, wherein the pixel unit comprises two first sub-pixels, a second sub-pixel and a third sub-pixel; In the pixel unit, one first sub-pixel and the third sub-pixel are located in the same row and arranged along a first direction, another first sub-pixel and the second sub-pixel are located in the same row and arranged along the first direction, two first sub-pixels are located in the same column and arranged along a second direction, the second sub-pixel and the third sub-pixel are located in the same column and arranged along the second direction, and the first direction and the second direction intersect; In the pixel unit, the number of the second via holes of the first sub-pixel located in the same row as the third sub-pixel is the same as the number of the second via holes of the second sub-pixel, and the number of the second via holes of the first sub-pixel located in the same row as the second sub-pixel is the same as the number of the second via holes of the third sub-pixel.

41. The display substrate according to claim 1, further comprising: an encapsulation structure layer disposed on a side of the light-emitting structure layer away from the substrate, the encapsulation structure layer comprising a first encapsulation layer, a second encapsulation layer and a third encapsulation layer stacked in sequence in a direction away from the substrate; the first encapsulation layer and the third encapsulation layer are mainly made of inorganic materials, and the second encapsulation layer is mainly made of organic materials; The emission wavelength of the second sub-pixel is smaller than that of the first sub-pixel, the emission wavelength of the first sub-pixel is smaller than that of the third sub-pixel, and the thickness of the second encapsulation layer in the second sub-pixel region is greater than the thickness of the second encapsulation layer in the first sub-pixel region and the third sub-pixel region.

42. The display substrate according to claim 1, further comprising: an encapsulation structure layer disposed on a side of the light emitting structure layer away from the substrate, and a color filter layer and a black matrix disposed on a side of the encapsulation structure layer away from the substrate; The color filter layer includes a plurality of filter units, wherein the plurality of filter units include a plurality of first filter units located in the first sub-pixel region and capable of filtering out a first color light, a plurality of second filter units located in the second sub-pixel region and capable of filtering out a second color light, and a plurality of third filter units located in the third sub-pixel region and capable of filtering out a third color light; The black matrix is ​​provided with a plurality of light-transmitting openings, and the filter unit is arranged in the light-transmitting openings; the orthographic projection of the black matrix on the substrate overlaps with the orthographic projection of the groove of the partition structure on the substrate.

43. The display substrate according to claim 42, wherein: At least two adjacent filter units overlap, and the overlapping parts of the adjacent filter units are located on the black matrix.

44. The display substrate according to claim 1, further comprising: an encapsulation structure layer disposed on a side of the light emitting structure layer away from the substrate, and a color filter layer and a black matrix disposed on a side of the encapsulation structure layer away from the substrate; The color filter layer includes a plurality of filter units, wherein the plurality of filter units include a plurality of first filter units located in the first sub-pixel region and capable of filtering out a first color light, a plurality of second filter units located in the second sub-pixel region and capable of filtering out a second color light, and a plurality of third filter units located in the third sub-pixel region and capable of filtering out a third color light; The filter units of adjacent sub-pixels of different colors overlap, and the overlapping parts of the filter units of adjacent sub-pixels of different colors form the black matrix.

45. The display substrate according to claim 42 or 44, wherein: The thickness of the first filter unit is smaller than the thickness of the second filter unit, and smaller than the thickness of the third filter unit.

46. ​​The display substrate according to claim 42, wherein: The portion of the third filter unit overlapping with the first filter unit is located on a side of the first filter unit away from the substrate, and a portion of the first filter unit is located on a side of the black matrix away from the substrate; Alternatively, a portion of the third filter unit overlapping with the second filter unit is located on a side of the second filter unit away from the substrate, and a portion of the second filter unit overlapping with the first filter unit is located on a side of the first filter unit away from the substrate.

47. The display substrate according to claim 42 or 44, wherein: In the orthographic projection of the third filter unit on the substrate, the area of ​​the portion that does not overlap with the orthographic projection of the first anode of the third sub-pixel on the substrate is S1, in the orthographic projection of the first filter unit on the substrate, the area of ​​the portion that does not overlap with the orthographic projection of the first anode of the first sub-pixel on the substrate is S2, and in the orthographic projection of the second filter unit on the substrate, the area of ​​the portion that does not overlap with the orthographic projection of the first anode of the second sub-pixel on the substrate is S3, wherein S1 satisfies at least one of the following conditions: S1>S2, and S1>S3.

48. The display substrate according to claim 42 or 44, wherein: The light-emitting wavelength of the second sub-pixel is smaller than the light-emitting wavelength of the first sub-pixel, and the light-emitting wavelength of the first sub-pixel is smaller than the light-emitting wavelength of the third sub-pixel; The light emitting element is configured to emit white light, and the second filter unit is provided with a light-transmitting hole, and the white light emitted by the light emitting element of the second sub-pixel can be emitted through the light-transmitting hole.

49. The display substrate according to claim 2, comprising: A plurality of pixel units arranged in an array, wherein the pixel unit includes two of the first sub-pixels, one of the second sub-pixel and one of the third sub-pixels; In the pixel unit, one first sub-pixel and the third sub-pixel are located in the same row and arranged along a first direction, another first sub-pixel and the second sub-pixel are located in the same row and arranged along the first direction, two first sub-pixels are located in the same column and arranged along a second direction, the second sub-pixel and the third sub-pixel are located in the same column and arranged along the second direction, and the first direction and the second direction intersect.

50. The display substrate according to claim 49, wherein: The light-emitting wavelength of the second sub-pixel is smaller than the light-emitting wavelength of the first sub-pixel, and the light-emitting wavelength of the first sub-pixel is smaller than the light-emitting wavelength of the third sub-pixel; The area of ​​the pixel opening of the second sub-pixel is larger than the area of ​​the pixel opening of the third sub-pixel, the area of ​​the pixel opening of the third sub-pixel is larger than the area of ​​the pixel opening of any one of the first sub-pixels, and is smaller than the sum of the areas of the pixel openings of the two first sub-pixels in the pixel unit.

51. The display substrate according to claim 49, wherein: The first anodes of the two first sub-pixels in the pixel unit are connected as an integrated structure, or / and the second anodes of the two first sub-pixels in the pixel unit are connected as an integrated structure.

52. A display device comprising the display substrate according to any one of claims 1 to 51.