Silicon carbide substrate having high crystal quality

Abstract

A silicon carbide substrate having high crystal quality, belonging to the technical field of silicon carbide production and processing. The silicon carbide substrate comprises a first main surface and a second main surface; the first main surface has a central area and an annular area surrounding the central area, the width of the annular area extending inward from an edge of the substrate being 5-30 mm; the central area is divided into square areas, each having a side length of 5 mm, the internal stress of each square area being less than the internal stress of the annular area, and the internal stress being the stress value detected at least 30 μm vertically extending from the first main surface or the second main surface into the silicon carbide substrate. The internal stress in the central area of ​​the silicon carbide substrate is relatively low, and the stress on the substrate can be evenly distributed, proving that the quality of the silicon carbide substrate is high and subsequent crystal quality can be improved, thereby expanding the scope of use of the silicon carbide substrate.

Description

A silicon carbide substrate with high crystal quality Technical Field The present application relates to a silicon carbide substrate with high crystal quality, belonging to the technical field of silicon carbide production and processing. Background Art Silicon carbide single crystal substrates have become the preferred semiconductor material for the preparation of GaN-based high-frequency microwave devices due to their excellent physical properties such as large bandgap, high resistivity and thermal conductivity, and strong breakdown field. With the continuous development of 5G technology, the market demand for silicon carbide single crystal substrates continues to expand. More importantly, mass commercial applications have also put forward higher requirements on the quality of silicon carbide single crystal substrates. During the growth process of silicon carbide crystals, various defects such as polycrystalline, polymorphic, micropipes, dislocations, etc. are easily introduced into the crystals due to the imbalance of Si / C ratio, the introduction of impurities and temperature gradient changes. The defects will cause lattice distortion, and more seriously, the crystal form will change, such as the generation of 4H, 6H, 3C, 15R and other polymorphic coexistence. The lattice distortion releases stress by generating defects, that is, internal stress is introduced into silicon carbide, thereby reducing the crystal quality of silicon carbide, limiting the scope of use of the crystal, and reducing the yield rate of the product; and the internal stress of the silicon carbide substrate is easy to have good body quality due to the existence of temperature field or defects, but there is stress concentration in a certain area, so that the stress distribution of the obtained silicon carbide substrate is uneven, which affects the production and processing of downstream products. When it is used for crystal or epitaxial layer growth, it will be inherited to the crystal or epitaxial layer, causing stress concentration in the crystal or epitaxial layer. Summary of the invention In order to solve the above problems, a silicon carbide substrate with high crystallization quality is provided, wherein the silicon carbide substrate is divided into a central area and an annular area, wherein the central area can be divided into a plurality of square areas with a side length of 5 mm, which can not only meet the detection accuracy, but also divide the substrate into areas, and quantitatively analyze whether there is stress concentration in the substrate. The internal stress of each square area is smaller than that of the annular area, which proves that the internal stress of the central area of ​​the silicon carbide substrate is low, and the stress on the substrate can be evenly distributed, which proves that the quality of the silicon carbide substrate is high, and the use scope of the silicon carbide substrate is expanded. The silicon carbide substrate can be used for processing to obtain epitaxial wafers or as seed crystals for growing crystals, thereby improving the subsequent crystallization quality, thereby reducing the stress of epitaxial wafers or crystals to obtain high-quality epitaxial wafers or crystals. According to one aspect of the present application, there is provided a silicon carbide substrate with high crystal quality, wherein the diameter of the silicon carbide substrate is greater than 150 mm, and the silicon carbide substrate comprises a first main surface and a second main surface; The first main surface has a central area and an annular area surrounding the central area, and the width of the annular area extending inward from the edge of the substrate is 5 to 30 mm; The central area is divided into square areas each with a side length of 5 mm, and the internal stress of each square area is smaller than the internal stress of the annular area. The internal stress is the stress value detected at a point extending vertically at least 30 μm from the first main surface or the second main surface into the silicon carbide substrate. The internal stress of the annular region is greater than the internal stress of each square region in the central region. The smaller the width of the annular region extending inward from the edge of the substrate, the larger the area of ​​the central region, and the smaller the internal stress of the silicon carbide substrate. If the internal stress of the annular region is too large, part of the crystal in the annular region can be removed in actual use, and only the silicon carbide crystal in the central region can be retained, thereby obtaining a higher quality silicon carbide substrate. Optionally, at any plane parallel to the first main surface and / or the second main surface, the radial internal stress of the square area is -10 to 10 MPa, and the radial internal stress of the annular area is 5 to 15 MPa. Preferably, the radial internal stress of the square area is -9.4~9.2MPa, and the radial internal stress of the annular area is 5~14.7MPa. Since the internal tensile and compressive stresses of the silicon carbide substrate cause the crystal plane spacing d to expand and contract accordingly, when using Raman to test stress, the Raman peak intensity will move to low frequency or high frequency. When the substrate is subjected to tensile stress, the Raman peak shifts to low frequency, and the obtained stress value is positive. When the substrate is subjected to compressive stress, the Raman peak shifts to high frequency, and the obtained stress value is negative. Therefore, the positive and negative before the stress value in this application represent the force direction inside the substrate, and the absolute value of the value represents the magnitude of the stress. For example, when the radial stress in the square area of ​​the silicon carbide substrate is -5MPa and the radial internal stress in the annular area is 6MPa, it means that the radial internal stress in the square area is compressive stress, the radial internal stress in the annular area is tensile stress, and the radial internal pressure in the square area is less than the radial internal pressure in the first annular area. According to the radial internal stress values ​​in the square area and the annular area, it can be known that there are compressive stress and tensile stress in the square area, while the annular area is a tensile stress area. The closer the value of the square area is to that of the annular area, the more uniform the radial internal stress distribution of the silicon carbide substrate is. Optionally, at any plane parallel to the first major surface and / or the second major surface, S max1 represents the maximum absolute value of radial internal stress in all the square regions, S max2 Represents the maximum absolute value of radial internal stress in the annular area, 1.8MPa≤S max2 -S max1 ≤5.2MPa. Optionally, at any plane parallel to the first main surface and / or the second main surface, S1 represents the average absolute value of the radial internal stress in all the square areas, S2 represents the average absolute value of the radial internal stress in any of the square areas, and -5MPa≤S1-S2≤5MPa. The silicon carbide substrate is subjected to multi-point stress detection. The above-mentioned average absolute value refers to the value obtained by dividing the sum of the absolute values ​​of stress at all detection points in the area by the number of detection points. The multi-point detection can be performed by selecting multiple points at different positions in the area for detection, or by performing a mapping test on the substrate. Preferably, -4.8MPa≤S1-S2≤4.9MPa, more preferably, -2.4MPa≤S1-S2≤3.3MPa. The difference between S1 and S2 represents the difference between the stress of the entire central area and the stress of each square area. The smaller the difference, the more uniform the stress distribution in the central area. Optionally, at any plane parallel to the first main surface and / or the second main surface, S1 represents the average absolute value of the radial internal stress in all the square areas, S3 represents the average absolute value of the radial internal stress in the annular area, and 0.3≤S1 / S3≤0.94. Preferably, 0.31≤S1 / S3≤0.94. The ratio of S1 / S3 represents the difference in radial internal stress between the central region and the annular region. The closer the ratio is to 1, the smaller the difference between the annular region and the central region, and the more uniform the radial internal stress distribution of the silicon carbide substrate. Optionally, at any plane parallel to the first major surface and / or the second major surface, S max3 represents the maximum radial internal stress in any square area, S min3 represents the minimum radial stress in any square area, △S1= S max3 -S min3 , 0MPa≤△S1≤10MPa; At any plane parallel to the first major surface and / or the second major surface, S max4 represents the maximum radial internal stress in the annular region, S min4 represents the minimum radial stress in the annular region, △S2= S max4 -S min4 , 0MPa≤△S2≤5MPa. Preferably, 0MPa≤△S1≤9.5MPa, 0.1MPa≤△S2≤4.9MPa. The above-mentioned maximum radial internal stress and minimum radial internal stress refer to the true value of the radial internal stress, which distinguishes between compressive stress and tensile stress. For example, at any horizontal plane parallel to the first main surface and / or the second main surface, the radial internal stress in the square area is -5~2MPa, then the maximum value of the radial comprehensive stress is 2MPa, and the minimum value of the radial comprehensive stress is -5MPa, and △S1 is 7MPa. The △S1 and △S2 represent the degree of change between the radial crystal plane spacing of the substrate at the microscopic level. The smaller the above-mentioned △S1 and △S2, the smaller the change in the radial crystal plane spacing. Optionally, an axial test is performed by extending vertically from any point of the first main surface into the silicon carbide substrate, and the axial internal stress of the square area is -10 to 10 MPa, and the axial internal stress of the annular area is -15 to 15 MPa. Preferably, the axial internal stress of the square area is -5~5MPa, and the axial internal stress of the annular area is -10~10MPa. Optionally, an axial test is performed by extending vertically from any point of the first main surface into the silicon carbide substrate, S max5 S is the maximum axial stress of the square area on the axis. min5 It is recorded as the minimum axial stress of the square area on the axis, △S3= S max5 -S min5 , 0MPa≤△S3≤10MPa; An axial test is performed by extending vertically from any point of the first main surface into the silicon carbide substrate, S max6 It is recorded as the maximum axial stress in the annular region, S min6 It is recorded as the minimum axial stress in the annular region, △S4= S max6 -S min6 , 0MPa≤△S4≤15MPa. Preferably, 0.1MPa≤△S3≤9.7MPa, 0.3MPa≤△S4≤14.3MPa. The above-mentioned maximum axial internal stress and minimum axial internal stress have the same meanings as the maximum radial internal stress and minimum radial internal stress. Compressive stress and tensile stress are distinguished in the axial direction. For example, on any axis, the axial internal stress in the square area is -5~1MPa, then the maximum axial internal stress is 1MPa, and the minimum axial internal stress is -5MPa. △S3 is 6MPa. △S3 and △S4 represent the degree of change in the axial crystal plane spacing of the substrate at the microscopic level. The smaller the above-mentioned △S3 and △S4 are, the smaller the change in the axial crystal plane spacing of the substrate is. Optionally, S4 represents the average absolute value of the axial internal stress in all the square areas, S5 represents the average absolute value of the radial internal stress in any of the square areas, -5MPa≤S4-S5≤5MPa, preferably, -4.2MPa≤S4-S5≤4.8MPa. Optionally, S4 represents the average absolute value of the axial internal stress in all the square areas, S6 represents the average absolute value of the axial internal stress in the annular area, 0.1≤S4 / S6≤0.8, preferably 0.1≤S4 / S6≤0.79. The above stress values ​​described in this application refer to absolute stress and relative stress. Absolute stress can reflect the difference between the substrate and the perfect SiC crystal without defects, and is used to determine the stress level of the SiC substrate. However, since it is difficult to achieve a perfect SiC substrate with current technology, the relative stress distribution within the substrate surface can be determined by relative stress. For example, when the absolute stress of the substrate is large and the relative stress is small, it means that there are more in-plane defects, but the stress distribution is uniform, the crystal quality is poor, and the uniformity quality in each area of ​​the substrate is poor; if the absolute stress is small and the relative stress is large, the overall substrate quality is good, but there are abnormal quality deviations in some areas. The reference value of absolute stress in this application is the reference stress calculated based on the standard Raman peak position obtained based on the perfect lattice parameters of SiC, which is marked as 0; the relative stress is to take a reference value on the entire test plane, and the value of each test point is related to the reference value for numerical calculation to obtain the relative stress value of the test point. The selection of the reference value includes but is not limited to any one of the median, mean, mode or other statistical function calculation results of all stress values ​​on the entire test plane. Optionally, the diameter of the silicon carbide substrate is greater than 200 mm, and the width of the annular region extending inward from the edge of the substrate is 5-15 mm. Optionally, the silicon carbide substrate has a thickness of not less than 100 μm. Optionally, the first main surface and / or the second main surface has an off-angle of 4° or less relative to the {0001} plane; Preferably, the curvature of the silicon carbide substrate is -50 to 50 μm, preferably -20 μm to 20 μm, and more preferably -10 μm to 10 μm. Optionally, the crystal form of the silicon carbide substrate is one of 2H-SiC, 4H-SiC, 6H-SiC, 3C-SiC, and 15R-SiC, preferably 4H-SiC. Optionally, the silicon carbide substrate is a semi-insulating silicon carbide substrate or a conductive silicon carbide substrate. Optionally, the local thickness deviation of the central area is 0.1-2 μm, and the local thickness deviation of the annular area is 0.1-2 μm. The silicon carbide substrate with high crystallization quality described in any of the above items is made by processing a silicon carbide single crystal. According to another aspect of the present application, a method for preparing a silicon carbide single crystal is provided, comprising the following steps: (1) Add silicon carbide powder into a graphite crucible; (2) Evacuate the furnace to 10 -6 mbar, and then introduce high-purity inert gas to 300-500mbar, repeat this process 2-3 times, and finally evacuate the furnace to 10 -6 Below mbar; (3) High-purity inert gas is introduced into the furnace body, and the pressure is increased to 10-100 mbar within 1-3 hours. High-purity inert gas is continuously introduced and the pressure is maintained constant; (4) Crystal growth stage: While keeping the pressure constant, the temperature inside the furnace is raised to the single crystal growth temperature of 2200K-2800K within 3-5 hours, and the growth time is 30-150 hours; (5) After the single crystal growth is completed, open the furnace body and take out the graphite crucible to obtain the silicon carbide single crystal. Optionally, the graphite crucible is coated with a TaC coating, the TaC coating is deposited on the surface of the graphite substrate, and the TaC coating is uniformly distributed with through-holes, and the density of the through-holes is 160-310 / mm 2 . The TaC coating contains through-holes, which can improve the transmission rate of the silicon carbide raw material atmosphere while improving the uniformity of the temperature field during crystal growth, thereby increasing the growth rate of the crystal and reducing the internal stress of the crystal, thereby obtaining a high-quality and low-stress silicon carbide crystal. Optionally, the aperture of the through-type through hole is 2-7 μm, preferably 2.3-6.1 μm. This aperture can improve the transmission rate of the silicon carbide raw material atmosphere without reducing the protection performance of the graphite substrate, and avoid the crystal from being squeezed by the thermal expansion of the graphite substrate in the thermal field to generate edge stress, thereby further reducing the stress in the crystal. Optionally, the thickness of the TaC coating is 30-400 μm, the TaC grains in the TaC coating are arranged in a stacking staggered manner, and the size of the TaC grains is 15-50 μm.

[0200] The growth direction of the TaC grains can improve the temperature resistance and thermal chemical corrosion resistance of the TaC coating, thereby reducing the interference of the graphite substrate on the crystal growth environment and improving the stability of the crystal environment. The beneficial effects of this application include but are not limited to: 1. There are thermal stress caused by crystal growth and residual stress caused by defects in the silicon carbide crystal. The residual stress is the internal stress of the silicon carbide substrate. The internal stress in the central area of ​​the silicon carbide substrate of the present application is less than that in the annular area, which proves that the quality of the silicon carbide substrate is good and is conducive to the production and processing of downstream products. 2. The radial internal stress in the annular area of ​​the silicon carbide substrate of the present application is relatively small. According to the stress values ​​of each square area in the annular area and the central area, it can be known that tensile stress and compressive stress can exist simultaneously in the annular area, and only tensile stress exists in the annular area. Therefore, according to the different downstream products for which the silicon carbide substrate is used to prepare, the stress distribution of the silicon carbide substrate can be controlled within a reasonable range to expand the scope of use of the silicon carbide substrate. 3. According to the silicon carbide substrate of the present application, the radial stress and axial stress of each square area in the central area are evenly distributed, which proves that the silicon carbide substrate has good uniformity and the difference in radial stress between the central area and the annular area is also small. 4. The present application utilizes a TaC coating with through-type through holes formed on the crucible surface, which can ensure the transmission of the raw material atmosphere during crystal growth while improving the uniformity of the temperature field, thereby reducing the internal stress of the silicon carbide substrate and reducing the difference between the central area and the annular area of ​​the silicon carbide substrate. 5. According to the stress distribution information of the silicon carbide substrate in the central area and the annular area, as well as the stress distribution information of each square area in the central area of ​​the present application, the microscopic unit cell parameters of the substrate can be analyzed from the stress value, thereby playing a certain feedback role, so as to adjust the parameters of each process of crystal growth, thereby preparing a high-quality silicon carbide substrate. 6. Through the quantitative testing method of the present application, the detected stress also includes the stress in the substrate caused by lattice distortion that has not yet been released through defects, thereby improving the detection accuracy of stress in the silicon carbide substrate and reflecting all stress information of the entire silicon carbide substrate in the central area and the annular area. BRIEF DESCRIPTION OF THE DRAWINGS The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: FIG. 1 is a schematic diagram of the Raman equi-spacing focusing test and the equi-focusing plane test of the internal stress of the substrate involved in Example 4 of the present application. FIG. 2 is a morphology characterization diagram of the TaC coating in crucible 1# involved in Example 5 of the present application. Implementation The present application is described in detail below with reference to embodiments, but the present application is not limited to these embodiments. Unless otherwise specified, the raw materials in the examples of this application were purchased through commercial channels. The principle of using Raman to test the stress of the substrate in the following embodiments is as follows: the Raman spectrometer passes a monochromatic laser of a certain wavelength through a series of optical paths and then converges the laser through an objective lens to irradiate the substrate surface, and the laser photons interact with the substrate lattice to cause photon scattering. The occurrence of Raman scattering is related to the lattice vibration of the substrate itself. When there is residual stress in the sample, the tensile and compressive stress will cause the atomic bond length to be elongated or shortened accordingly, thereby causing the atomic vibration frequency to decrease or increase, which is reflected in the Raman spectrum as the characteristic peak of the substrate moves to a low frequency or a high frequency, that is, the peak position offset occurs. Example 1 Quantitative Testing Method for Substrate Stress First, a single crystal XRD diffractometer is used to test the silicon carbide substrate and the substrate is analyzed according to the reciprocal lattice space. The parameters of the standard 4H-silicon carbide substrate are calculated and compared with the standard parameters. Then, according to the Bragg diffraction equation: 2dsinθ=nλ, where d is the crystal plane spacing, θ is the diffraction half angle, n is the diffraction order, and λ is the wavelength, the θ and d of different substrates are tested. It can be seen that the tensile and compressive stress inside the crystal causes the crystal plane spacing d to expand and contract accordingly. According to the different crystal plane spacings d0 and d x , d x It is divided into d1 and d2, where d0 is the theoretical crystal plane spacing, d1 is the crystal plane spacing after tensile stress, and d1 is greater than d0, and d2 is the crystal plane spacing after compressive stress, and d2 is less than d0. The difference in crystal plane spacing △d at different positions is calculated, △d= d1- d0 or △d= d0- d2. The actual peak position of the substrate is obtained according to the Raman test, and the peak position offset △v at different test points is calculated compared with the standard peak position; the stress value σ of the silicon carbide substrate at different test points is calculated in combination with Hooke's law or stress-strain formula, and the ratio of the peak position offset to the stress value at different test points is the peak position offset and stress conversion coefficient μ, which ranges from -125 to -2500. The calculation formula of Hooke's law is σ / S=E×(△d / d0), where S is the area affected by σ, which is a fixed value. When Hooke's law is applicable to microscopic calculations, S is the microscopic area, which can be calculated as unit 1. E is the Young's modulus of the substrate, which is a fixed parameter of the substrate. △d is the difference in crystal plane spacing at different positions, d0 is the theoretical crystal plane spacing, and σ is the stress value that needs to be calculated. The calculation formula for stress and strain is σ= E×△d, where E is the Young's modulus of the substrate, which is a fixed parameter of the substrate, △d is the difference in crystal plane spacing at different positions, and σ is the stress value to be calculated. First, set the Raman test points. You can perform single-point testing or Mapping scanning of the entire substrate. Therefore, single-point testing is a sporadic coordinate point setting, and Mapping scanning is 10x10~50x50 and more points. You can choose the appropriate test method according to the properties of the substrate to determine the Raman test coordinate diagram of the silicon carbide substrate. The test results are then output, including but not limited to editable peak position, peak intensity data and Mapping. The output data is then subjected to peak position fitting, where fitting functions include but are not limited to Gaussian, Lorentz, GaussLor, AGauss, Aloren and AGaussLor, to obtain precise peak position values ​​and peak position offsets, with the peak position accurate to more than one decimal place. Finally, according to the peak shift and stress conversion coefficient μ calculated in (1) and the peak shift △v obtained in the Raman test, the stress value of silicon carbide is calculated as follows: σ (MPa) = μ × △v (cm -1 ), and finally the stress test image of the substrate is obtained. Since SiC is subjected to a lot of external mechanical stress during the process of preparing wafers from crystals through a series of processes, it is difficult to ensure that the surface is completely level, that is, there is a certain degree of curvature. In order to eliminate the influence of substrate surface curvature on substrate surface stress and internal stress test, it is necessary to first perform a curvature test on the substrate. According to the curvature, the substrate surface stress is tested with equal spacing focus, and the substrate internal stress is tested with equal spacing focus or equal focus plane. After the curvature test, the tester needs to be calibrated using single crystal silicon. First, a Z-axis mapping test is performed on the single crystal Si to confirm that it is a Gaussian distribution. The surface of the single crystal Si substrate is taken as the zero point, and an axial mapping test is performed from -100μm inside the single crystal Si substrate to +20μm above the single crystal Si substrate to analyze the change in Raman signal intensity. The single crystal Si substrate is a non-transparent material, so its peak intensity presents a Gaussian distribution, with the surface zero point position as the symmetry axis; then a surface focusing single point test is performed on the single crystal Si, and the single crystal Si Raman peak position is made to be 520.70cm by the correction instrument. -1 , at this time, it means that the instrument optical path has been calibrated. The 4H-SiC substrate was tested in the Z direction using a calibrated tester. The Raman laser was emitted from -100μm inside the 4H-SiC substrate to +20μm above the 4H-SiC substrate. 4H-SiC and other silicon carbides are transparent materials, so the Raman laser can penetrate into the silicon carbide substrate, and the feedback signal gradually weakens as the Raman laser incident depth increases. Other silicon carbides include semi-insulating, conductive, and 3C, 4H, 15R, 6H and other silicon carbide substrates with different crystal forms. Therefore, the Raman peak intensity of the silicon carbide substrate gradually decreases as the Raman laser penetrates deeper into the silicon carbide substrate. The Raman device’s autofocus function can be used to automatically find the strongest peak of the test signal on the substrate surface, so that the curvature of the substrate surface can be measured with the help of this function. The specific method is as follows: S1: First, ensure that the test platform is level, select a fixed origin (0,0) on the test platform, and mark the point as the three-dimensional coordinate (0,0,0); S2: Raise the objective lens to a height that does not touch the substrate according to the thickness of the substrate, and automatically focus on any point on the substrate surface where the test signal is the strongest. Mark this position as (a, b, c), then adjust the Raman laser downward by a distance of H and focus on the position to (a, b, cH); S3: Adjust the Raman laser test position to (0,0,cH) to perform an iso-focal plane test to obtain a two-dimensional peak intensity scan of the substrate surface. According to the peak intensity distribution relationship of the silicon carbide substrate and the two-dimensional peak intensity scan of the substrate surface, the distance between the focal plane of the Raman laser and the surface of the silicon carbide substrate can be obtained, thereby obtaining the in-plane curvature of the substrate and obtaining the in-plane curvature distribution map of the substrate. Since the substrate is affected by the temperature field and the introduction of inclusions during the crystal growth process, thermal stress and residual stress exist inside the crystal, and the crystal is obtained after a series of cutting, grinding and polishing. The processing process of the crystal to form the substrate will cause surface lattice distortion, thereby generating surface stress. In order to further distinguish the surface stress from the body stress of the substrate, according to the light transmittance characteristics of silicon carbide, the substrate is subjected to axial testing, namely, Z-direction Mapping, with the substrate surface as the zero point. The test range of the axial test is from -150μm to -30μm inside the substrate to above the substrate surface. During the test, the laser spot gradually focuses upward from the substrate body to the damaged stress extension layer, further to the surface damaged layer, and then continues to focus upward into the air to determine the thickness of the substrate surface damaged layer and the damaged stress extension layer. With the substrate surface as the zero point, the test range of the axial test is that the Raman laser spot gradually moves upward from -100μm inside the substrate to 30μm above the substrate surface. Five points of the substrate are tested up and down, left and right. The five points on the substrate show the same trend, and there is only a difference in the maximum negative stress at the surface damage. The laser spot gradually moves upward from -100μm inside the substrate to -30μm. At this time, the stress fluctuates up and down along the horizontal line, indicating that the internal stress is uniform. When the laser spot is focused on the damaged stress extension layer, the stress curve begins to show a downward trend at -30μm, and the downward trend of stress gradually increases. When it approaches the zero point on the substrate surface, it reaches the maximum negative stress value, which is the stress value of the surface damaged layer. Finally, the laser spot continues to move upward and gradually leaves the substrate surface into the air, and the stress shows a rapid rise to chaotic fluctuations. Therefore, the thickness of the surface damaged layer and the damaged stress extension layer of the substrate can be determined according to the axial test results of the substrate, so that the stress in the substrate can be divided into surface stress and internal stress, which provides a theoretical basis for the subsequent quantitative test of surface stress and internal stress in the substrate. During the PVT crystal growth process, silicon carbide is affected by temperature gradient changes and the intrusion of inclusions, resulting in residual stress in the crystal. Different from the surface processing stress, the internal stress is located at a certain depth from the surface, reflecting the thermal stress and residual stress of crystal growth. In addition, silicon carbide undergoes a large amount of external mechanical stress in the process of preparing the substrate from the crystal through a series of processing, and it is difficult to ensure that the surface is completely horizontal, that is, there is a certain degree of curvature on the surface of the substrate. According to the measurement method of the curvature of the substrate surface obtained by Raman testing in Example 2, this embodiment, combined with the physical properties of silicon carbide, involves a method for quantitatively characterizing its internal stress that is not affected by surface curvature. According to the physical property of silicon carbide being light-transmissive, the method of using Raman to quantitatively characterize the internal stress of the substrate is divided into equal-spacing focusing test and equal-focusing plane test, as follows: 1. Equal spacing focus test The principle of the equidistant focusing test is shown in Figure 1 (a). In this test mode, the focal depth (d) of the Raman laser focused inside the substrate at different positions remains unchanged. First, the penetration depth (Dp) of the Raman laser is calculated according to the following formula: . In the above formula, D p is the penetration depth of Raman excitation in the sample, α is the absorption coefficient, λ is the laser wavelength, and k is the extinction coefficient. The penetration depth (D p ) specific value, select the appropriate focus depth (d), the requirement that needs to be met is the penetration depth (D p ) is greater than the focus depth (d), and since the test is for internal stress, the focus depth d needs to be greater than the thickness of the surface damage layer and the damage stress extension layer obtained by the test in Example 3. Then the Raman laser spot diameter (D) is calculated according to the following formula: , where λ is the laser wavelength, Na is the numerical aperture of the device. The spot diameter (D) is the short axis diameter of the laser spot. The larger this value is, the stronger the peak intensity of Raman at each test position is, and the more impurity peaks there are, which affects the detection accuracy of Raman. When λ is determined, if N a If the value is large, the peak intensity will be very weak, which will also affect the Raman detection accuracy. Therefore, it is necessary to select appropriate λ and N a , in order to improve the accuracy of the test method. According to the characteristics of silicon carbide materials, the peak intensity reaches the highest when the laser is focused on the substrate surface. Therefore, the automatic focusing function of the Raman tester can be used to focus the laser on the substrate surface. Then, according to the focusing depth (d) determined above, the equidistant focusing test is performed on different positions of the substrate, that is, the distance between the focusing plane and the substrate surface is always equal. This method is not affected by the bending and warping of the substrate surface, so that the obtained Raman peak intensity is always maintained at the axial maximum value of the test point. According to the stress quantitative testing method of Example 1, the in vivo stress test result diagram of the substrate is obtained. 2. Equifocal plane test The principle of the equal-focus plane test is shown in Figure 1 (b). In this test mode, the focal depth (d) of the Raman laser spot focused on the inside of the substrate changes at different positions. The laser spot at different positions is focused on the same plane inside the substrate. The penetration depth (D) of the Raman laser is calculated according to the same formula as the equal-spaced focusing test. p ) and select the appropriate focal depth (d) using the same selection method. Since the focus planes in this test method are equal, combined with the characteristics of silicon carbide, when the laser is focused on the substrate surface, the peak intensity reaches the highest and the signal gradually decays with the increase of the focus depth. And according to the effective signal-to-noise ratio tested by the Raman tester, it is found that the effective signal-to-noise ratio is inversely correlated with the Raman laser focus depth (d). Therefore, in this test method, the focus depth (d) at different positions needs to be combined with the curvature of the substrate to obtain the effective peak position offset through the stress quantitative test method of Example 1, thereby reducing the error of the in vivo stress test and obtaining the in vivo stress test result diagram of the substrate. Through the above two testing methods of equal spacing focusing and equal focusing plane, the peak position offset inside the substrate is obtained, and the internal stress distribution of the substrate is calculated. The error of the internal stress value of the substrate calculated by the two methods of equal spacing focusing test and equal focusing plane test is ≤0.2MPa, and the peak position difference obtained by the two methods of equal spacing focusing test and equal focusing plane test is <0.0005cm -1 The above two methods can verify the accuracy of the quantitative detection method of the present application, and the accuracy of the test method can be further improved according to the setting of the focus depth and the spot diameter. Example This embodiment relates to a method for preparing a TaC coating having a through-type through hole, comprising the following steps: (1) Preparing slurry: 25-40 parts of TaC powder, 5-8 parts of Ta2O5, 20-35 parts of solvent, 15-25 parts of co-solvent, 1-3 parts of air entraining agent, 2-5 parts of thickener, 5-15 parts of straight-chain saturated aliphatic hydrocarbon and 1-3 parts of carbon powder are mixed and stirred at 700-800 r / min for 2-3 hours to obtain a slurry containing TaC; (2) Spraying the slurry onto a surface of a graphite substrate, heating the temperature to 60-80°C, maintaining the temperature for 2-4 hours to cause bubble bursting, and then drying the slurry at 180-220°C for 8-12 hours; sintering the slurry at 700-900 mbar and 500-700°C for 3-5 hours; then increasing the pressure to 1000-1100 mbar, increasing the temperature to 1600-1800°C, and sintering the slurry for 8-10 hours; then adjusting the pressure to 145-155 kPa, increasing the temperature to 2200-2400°C, and sintering the slurry for 14-16 hours, and finally cooling the temperature to room temperature and atmospheric pressure within 15-25 hours to obtain a TaC coating with through-holes. Crucibles 1#-8# and comparative crucibles D1#-D3# were prepared according to the above preparation method, as follows: (1) Preparation of slurry: 32.7 parts of TaC powder, 6 parts of Ta2O5, 25 parts of ethanol, 20 parts of tetrahydrofuran, 1.5 parts of saponin-type air entraining agent, 3.5 parts of cellulose ether, 10 parts of straight-chain saturated aliphatic hydrocarbon and 1.3 parts of carbon powder were mixed, and stirred at 700 r / min for 2.5 h to obtain a slurry containing TaC; (2) The slurry of step (1) was electrostatically sprayed onto the surface of the graphite substrate, the temperature was raised to 70°C, maintained for 3 hours to burst the bubbles, dried at 200°C for 10 hours, and then sintered: sintered at 800 mbar and 600°C for 4 hours; then the pressure was raised to 1000 mbar, the temperature was raised to 1700°C, and sintered for 9 hours; then the pressure was adjusted to 150 kPa, the temperature was raised to 2300°C, and sintered for 15 hours, and finally cooled to room temperature and atmospheric pressure within 20 hours to obtain crucible 1#. (1) Preparation of slurry: 25 parts of TaC powder, 5 parts of Ta2O5, 20 parts of ethanol, 15 parts of tetrahydrofuran, 1 part of saponin-type air entraining agent, 2 parts of cellulose ether, 5 parts of straight-chain saturated aliphatic hydrocarbon and 1 part of carbon powder were mixed, and stirred at 800 r / min for 2 h to obtain a slurry containing TaC; (2) The slurry of step (1) was electrostatically sprayed onto the surface of the graphite substrate, the temperature was raised to 60°C, maintained for 4 hours to burst the bubbles, dried at 180°C for 12 hours, and then sintered: sintered at 700 mbar and 500°C for 5 hours; then the pressure was raised to 1000 mbar, the temperature was raised to 1600°C, and sintered for 10 hours; then the pressure was adjusted to 145 kPa, the temperature was raised to 2200°C, and sintered for 16 hours, and finally cooled to room temperature and atmospheric pressure within 15 hours to obtain crucible 2#. (1) Preparation of slurry: 40 parts of TaC powder, 8 parts of Ta2O5, 35 parts of ethanol, 25 parts of tetrahydrofuran, 3 parts of saponin-type air entraining agent, 5 parts of cellulose ether, 15 parts of straight-chain saturated aliphatic hydrocarbon and 3 parts of carbon powder were mixed, and stirred at 700 r / min for 3 h to obtain a slurry containing TaC; (2) The slurry of step (1) was electrostatically sprayed onto the surface of the graphite substrate, the temperature was raised to 80°C, maintained for 2 hours to burst the bubbles, dried at 220°C for 8 hours, and then sintered: sintered at 900 mbar and 700°C for 3 hours; then the pressure was raised to 1100 mbar, the temperature was raised to 1800°C, and sintered for 8 hours; then the pressure was adjusted to 155 kPa, the temperature was raised to 2400°C, and sintered for 14 hours, and finally cooled to room temperature and atmospheric pressure within 25 hours to obtain crucible 3#. The difference between this embodiment and crucible 1# is that in step (1), the raw materials are mixed and stirred at 700 r / min for 5 min, and the other conditions are the same as those of crucible 1#, so as to obtain crucible 4#. The difference between this embodiment and crucible 1# is that in step (2), the slurry of step (1) is electrostatically sprayed onto the surface of the graphite substrate, the temperature is raised to 200° C., maintained for 13 h to burst the bubbles and dried, and then sintered. The remaining conditions are the same as those of crucible 1#, and crucible 5# is obtained. The difference between this embodiment and crucible 1# is that in step (2), the sintering is as follows: sintering at 400 mbar and 400°C for 4 hours; then the pressure is increased to 1000 mbar, the temperature is increased to 1700°C, and sintering is performed for 9 hours; then the pressure is adjusted to 150 kPa, the temperature is increased to 2300°C, and sintering is performed for 15 hours, and finally the temperature is lowered to room temperature and normal pressure within 20 hours. The remaining conditions are the same as those of crucible 1#, so that crucible 6# is obtained. The difference between this embodiment and crucible 1# is that in step (2), the sintering is as follows: sintering at 800 mbar and 600°C for 4 h; then the pressure is increased to 1000 mbar, the temperature is increased to 1200°C, and sintering is performed for 9 h; then the pressure is adjusted to 150 kPa, the temperature is increased to 2300°C, and sintering is performed for 15 h, and finally the temperature is lowered to room temperature and normal pressure within 20 h. The remaining conditions are the same as those of crucible 1#, so that crucible 7# is obtained. The difference between this embodiment and crucible 1# is that in step (2), the sintering is as follows: sintering at 800 mbar and 600°C for 4 h; then the pressure is increased to 1000 mbar, the temperature is increased to 1700°C, and sintering is performed for 9 h; then the pressure is adjusted to 120 kPa, the temperature is increased to 2500°C, and sintering is performed for 15 h, and finally the temperature is lowered to room temperature and normal pressure within 20 h. The remaining conditions are the same as those of crucible 1#, so that crucible 8# is obtained. Compared with crucible 1#, this comparative example adopts CVD method to prepare TaC coating, specifically: The graphite substrate was placed in a chemical vapor deposition furnace and evacuated to below 50 Pa. The temperature was then raised to 1200°C, and a mixed gas consisting of ethane, TaCl5, H2 and carrier gas argon was introduced. The mixed gas maintained a stable flow rate into the deposition furnace, and the furnace pressure was maintained at 5000 Pa. The molar ratio of TaCl5 and ethane gas was first controlled at 1.2:1 to form a transition layer with a thickness of 50 μm; then the molar ratio of TaCl5 and ethane gas was controlled to 3:1 to form a TaC coating with a thickness of 60 μm, and a comparative crucible D1# was obtained. Compared with crucible 1#, the raw materials in the slurry of step (1) are different: BYK defoamer is used to replace the saponin air-entraining agent, and the other conditions are the same as those of crucible 1#, that is, comparative crucible D2# is prepared. Compared with crucible 1#, the raw materials in the slurry of step (1) are different: TaCl5 is used instead of Ta2O5, and the other conditions are the same as those of crucible 1#, that is, comparative crucible D3# is prepared. The cross-sectional SEM test and EDS energy spectrum analysis were performed on the crucibles 1#-8# and the comparative crucibles D1#-D3# prepared as described above. As can be seen from Figure 2, Figure 2 (a) shows the morphology of a TaC coating with through-type through holes under a microscope, and holes with similar morphology and size are evenly distributed on its surface. Figure 2 (b) shows that the coating is polished until the base graphite is exposed, and holes are still visible at this time, which proves that the holes formed are through-type through holes. The TaC coating was subjected to XRD testing. According to the test results, the TaC grains of the TaC coating grow in an oriented manner along the

[0200] and

[0220] directions. The thickness of the formed TaC coating, the average pore size of the through-type through holes in the TaC coating, the density and the size of the TaC grains were tested. The test results are shown in Table 1; Table 1 Sample thickness (μm) Average pore size of through-holes (μm) Density of through-holes (pcs / mm 2) TaC grain size (μm) Crucible 1#424.731034 Crucible 2#316.122431 Crucible 3#464.429333 Crucible 4#422.316032 Crucible 5#413.621341 Crucible 6#433.818143 Crucible 7#424.726745 Crucible 8#415.927438 Comparison Crucible D1#600034 Comparison Crucible D2#430031 Comparison Crucible D3#425.624733 The crucibles 1#-8# and the comparative crucibles D1#-D3# prepared above were subjected to high temperature erosion and thermochemical erosion experiments to simulate the growth environment of the third generation semiconductor silicon carbide crystal using the PVT method. The crucibles 1#-8# and the comparative crucibles D1#-D3# were kept at 2300°C and eroded in a silicon carbide atmosphere for 100 hours. The test results are shown in Table 2: Table 2 Sample weight before experiment (g) Weight after experiment (g) Erosion weight loss rate (%) Crucible 1#7537026.8 Crucible 2#71463910.5 Crucible 3#7427015.5 Crucible 4#7477144.4 Crucible 5#7607215.1 Crucible 6#7417084.5 Crucible 7#7557165.2 Crucible 8#7496986.8 Comparison Crucible D1#7977693.5 Comparison Crucible D2#7617074.1 Comparison Crucible D3#7597046.5 In Table 2, erosion weight loss rate = [(weight before experiment - weight after experiment) / weight before experiment] × 100%. The above high temperature erosion and thermochemical erosion experiments prove that the TaC coating of this embodiment can improve the protection performance of the graphite substrate, extend the tolerance and corrosion resistance of the TaC coating, and thus extend the service life of the crucible. This embodiment relates to a method for preparing a silicon carbide single crystal with a diameter of 150 mm, comprising the following steps: (1) Add silicon carbide powder into the crucible; (2) Evacuate the furnace to 10 -6 mbar, and then introduce high-purity inert gas to 300-500mbar, repeat this process 2-3 times, and finally evacuate the furnace to 10 -6 Below mbar; (3) High-purity inert gas is introduced into the furnace body, and the pressure is increased to 10-100 mbar within 1-3 hours. High-purity inert gas is continuously introduced and the pressure is maintained constant; (4) Crystal growth stage: While keeping the pressure constant, the temperature inside the furnace is raised to the single crystal growth temperature of 2200K-2800K within 3-5 hours, and the growth time is 30-150 hours; (5) After the single crystal growth is completed, open the furnace body and take out the graphite crucible to obtain the silicon carbide single crystal. Add equal amounts of silicon carbide powder to crucibles 1#-3# and comparative crucibles D1#-D3# prepared in Example 6, respectively; evacuate the furnace to 10 -6 mbar, and then introduce high-purity inert gas to 300 mbar. Repeat this process 3 times and finally evacuate the furnace to 10 -6 mbar or less; introduce high-purity inert gas into the furnace body, raise the pressure to 30 mbar within 1 hour, and continue to introduce high-purity inert gas to keep the pressure constant; crystal growth stage: while keeping the pressure constant, raise the temperature in the furnace body to the single crystal growth temperature of 2500K within 3 hours, and the growth time is 70 hours; after the single crystal growth is completed, open the furnace body, take out the graphite crucible, and obtain silicon carbide single crystals 1#-3# and comparison silicon carbide single crystals D1#-D3# respectively. The above-mentioned silicon carbide single crystals 1#-3# and comparative silicon carbide single crystals D1#-D3# were subjected to the same cutting, grinding, mechanical polishing and chemical polishing to obtain silicon carbide substrates 1#-3# and comparative silicon carbide substrates D1#-D3#. In vivo stress tests were performed using the methods of Examples 1-4. The results are shown in Tables 3 and 4. Table 3 Table 4 The silicon carbide substrates 1#-3# were subjected to surface inspection. The curvatures of the silicon carbide substrates 1#-3# were all within the range of -50~50μm, the local thickness deviations in the central area were within the range of 0.1-2μm, and the local thickness deviations in the annular area were within the range of 0.1-2μm. The stress values ​​in Tables 3-4 all refer to relative stress values. In the present application, the positive and negative values ​​in the stress values ​​represent whether the substrate is subjected to tensile stress or compressive stress. Currently, when evaluating and describing the final stress of a substrate, the stress is often obtained by subtracting the minimum value from the maximum value of the above stress values. For example, the axial stress of the square area #1 of the silicon carbide substrate is -0.5-0.7 MPa. When the axial stress of the square area #1 of the silicon carbide substrate is generally expressed in this field, it can also be described as a stress value of 1.2 MPa. The data in Tables 3 and 4 are only the substrates prepared by crucibles 1#-3# and comparative crucibles D1#-D3# prepared in Example 5. When the same crystal growth and processing methods as in Example 6 are used and crucibles 4#-8# are used to prepare silicon carbide substrate sheets, and the parameters in Tables 3-4 are characterized by absolute stress, the width of the annular region extending inward from the edge of the substrate is 5~30mm; the radial internal stress in the square region is -10~10MPa, and the radial internal stress in the annular region is 5~15MPa; 1.8MPa≤S max2 -Smax1 ≤5.2MPa; -5MPa≤S1-S2≤5MPa; 0.3≤S1 / S3≤0.94; 0MPa≤△S1≤10MPa; 0MPa≤△S2≤5MPa; the axial internal stress in the square area is -10~10MPa, and the axial internal stress in the annular area is -15~15MPa; 0MPa≤△S3≤10MPa; 0MPa≤△S4≤15MPa; -5MPa≤S4-S5≤5MPa; 0.1≤S4 / S6≤0.8 requirements. The above is only the embodiment of the present application, and the protection scope of the present application is not limited by these specific embodiments, but is determined by the claims of the present application. For those skilled in the art, the present application can have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the technical ideas and principles of the present application should be included in the protection scope of the present application.

Claims

1. A silicon carbide substrate with high crystal quality, characterized in that: The silicon carbide substrate has a diameter of 150 mm or more, and includes a first main surface and a second main surface; The first main surface has a central area and an annular area surrounding the central area, and the width of the annular area extending inward from the edge of the substrate is 5 to 30 mm; The central area is divided into square areas each with a side length of 5 mm, and the internal stress of each square area is smaller than the internal stress of the annular area. The internal stress is the stress value detected at a point extending vertically at least 30 μm from the first main surface or the second main surface into the silicon carbide substrate.

2. The silicon carbide substrate according to claim 1, characterized in that At any plane parallel to the first main surface and / or the second main surface, the radial internal stress of the square area is -10 to 10 MPa, and the radial internal stress of the annular area is 5 to 15 MPa.

3. The silicon carbide substrate according to claim 1, characterized in that At any plane parallel to the first major surface and / or the second major surface, S max1 represents the maximum absolute value of radial internal stress in all the square areas, S max2 Represents the maximum absolute value of radial internal stress in the annular area, 1.8MPa≤S max2 -S max1 ≤5.2MPa.

4. The silicon carbide substrate according to claim 1, characterized in that At any plane parallel to the first main surface and / or the second main surface, S1 represents the average absolute value of radial internal stress in all the square areas, S2 represents the average absolute value of radial internal stress in any of the square areas, and -5MPa≤S1-S2≤5MPa.

5. The silicon carbide substrate according to claim 1, characterized in that At any plane parallel to the first main surface and / or the second main surface, S1 represents the average absolute value of radial internal stress in all the square areas, S3 represents the average absolute value of radial internal stress in the annular area, and 0.3≤S1 / S3≤0.

94.

6. The silicon carbide substrate according to claim 1, characterized in that At any plane parallel to the first major surface and / or the second major surface, S max3 represents the maximum radial internal stress in any square area, S min3 represents the minimum radial stress in any square area, △S1= S max3 -S min3 , 0MPa≤△S1≤10MPa; At any plane parallel to the first major surface and / or the second major surface, S max4 represents the maximum radial internal stress in the annular region, S min4 represents the minimum radial stress in the annular region, △S2= S max4 -S min4 , 0MPa≤△S2≤5MPa.

7. The silicon carbide substrate according to claim 1, characterized in that An axial test is performed by extending vertically into the silicon carbide substrate from any point on the first main surface. The axial internal stress in the square area is -10 to 10 MPa, and the axial internal stress in the annular area is -15 to 15 MPa.

8. The silicon carbide substrate according to claim 7, characterized in that An axial test is performed by extending vertically from any point of the first main surface into the silicon carbide substrate, S max5 S is the maximum axial stress of the square area on the axis. min5 It is recorded as the minimum axial stress of the square area on the axis, △S3= S max5 -S min5 , 0MPa≤△S3≤10MPa; An axial test is performed by extending vertically from any point of the first main surface into the silicon carbide substrate, S max6 It is recorded as the maximum axial stress in the annular region, S min6 It is recorded as the minimum axial stress in the annular region, △S4= S max6 -S min6 , 0MPa≤△S4≤15MPa.

9. The silicon carbide substrate according to claim 7, characterized in that S4 represents the average absolute value of the axial internal stress in all the square areas, and S5 represents the average absolute value of the radial internal stress in any of the square areas, -5MPa≤S4-S5≤5MPa.

10. The silicon carbide substrate according to claim 1, characterized in that S4 represents the average absolute value of the axial internal stress in all the square areas, S6 represents the average absolute value of the axial internal stress in the annular area, and 0.1≤S4 / S6≤0.8.

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