Flexible printed circuit board, display module and display apparatus

Abstract

Disclosed in the embodiments of the present disclosure are a flexible printed circuit board, a display module and a display apparatus. In a specific embodiment, the flexible printed circuit board comprises: an electro-static discharge (ESD) protection circuit, an ESD detection circuit and a switch circuit, wherein an input end of the ESD detection circuit is coupled to an output end of the ESD protection circuit, and an output end of the ESD detection circuit is coupled to a control end of the switch circuit; a first end of the switch circuit, a reset signal output end of an application processor and a reset signal input end of a display driver integrated circuit are coupled to a first node; and a second end of the switch circuit is coupled to a grounding end. By means of the embodiment, a display panel can be effectively reset in a timely manner when ESD occurs, such that an anti-ESD capability is effectively improved, and the risk of electro-static damage to the display panel is effectively reduced, thereby improving the reliability of products.

Description

Flexible circuit board, display module and display device

[0001] Cross-references to related publications

[0002] This disclosure claims priority to Chinese Patent Publication No. 202310700882.1 filed in China on June 13, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to the technical field of circuit board design, and more specifically, to a flexible circuit board, a display module, and a display device. Background Art

[0004] Display devices are increasingly used in our daily lives to meet various needs in entertainment, social interaction, and business. Consequently, the update and development of display devices are accelerating. Organic Light-Emitting Diode (OLED) display panels have attracted considerable attention due to their advantages in narrow bezels and high screen-to-body ratios. However, the inventors have discovered that OLED display panels in related art lack ESD resistance.

[0005] Summary of the Invention

[0006] The present disclosure aims to provide a flexible circuit board, a display module and a display device to solve at least one of the problems existing in the prior art.

[0007] To achieve the above objectives, the present disclosure adopts the following technical solutions:

[0008] A first aspect of the present disclosure provides a flexible circuit board, comprising an electrostatic discharge protection circuit, an electrostatic discharge detection circuit, and a switch circuit;

[0009] The input end of the electrostatic release detection circuit is coupled to the output end of the electrostatic release protection circuit, and the output end of the electrostatic release detection circuit is coupled to the control end of the switch circuit;

[0010] The first terminal of the switch circuit, the reset signal output terminal of the application processor, and the reset signal input terminal of the display driver chip are coupled to a first node, and the second terminal of the switch circuit is coupled to the ground terminal.

[0011] Optionally, the switching circuit includes a first switching transistor, a control electrode of the first switching transistor is coupled to the output end of the electrostatic release detection circuit, a first electrode is coupled to the first node, and a second electrode is coupled to the ground end.

[0012] Optionally, the first switching transistor is an N-type transistor.

[0013] Optionally, the flexible circuit board also includes a first resistor and a first capacitor, the first resistor is coupled between the reset signal output end of the application processor and the first node, the first end of the first capacitor is coupled to the first node, and the second end of the first capacitor is coupled to the ground end.

[0014] Optionally, the flexible circuit board includes a first binding area located at an end position on one side of the flexible circuit board for binding to the display panel, and at least a portion of the flexible circuit board close to the first binding area includes a first ground layer, a routing layer and a second ground layer stacked in sequence.

[0015] Optionally, the first ground layer and the second ground layer are electrically connected through a via hole opened in the routing layer.

[0016] Optionally, the first binding area is located at an end portion of the flexible circuit board.

[0017] Optionally, a partial area of ​​the flexible circuit board close to the first binding area includes a first ground layer, a routing layer, and a second ground layer stacked in sequence.

[0018] A second aspect of the present disclosure provides a display module, comprising a display panel and the flexible circuit board provided by the first aspect of the present disclosure.

[0019] A third aspect of the present disclosure provides a display device, comprising the display module provided by the second aspect of the present disclosure.

[0020] The beneficial effects of the present disclosure are as follows:

[0021] The technical solution disclosed herein can promptly and effectively reset the display panel when ESD occurs, thereby effectively improving the anti-ESD capability, effectively reducing the risk of electrostatic damage to the display panel, and further improving product reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The specific embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0023] FIG1 is a schematic diagram showing a switch circuit in a flexible printed circuit board according to an embodiment of the present disclosure.

[0024] FIG2 is a schematic diagram showing the wiring of a switch circuit in a flexible printed circuit board provided in an embodiment of the present disclosure.

[0025] FIG3 is a schematic diagram showing an ESD protection circuit and an ESD detection circuit in a flexible circuit board provided by an embodiment of the present disclosure.

[0026] FIG. 4 is a schematic diagram showing signal waveforms during the reset process of the display driver chip.

[0027] FIG5 is a schematic diagram showing the area division of the flexible circuit board provided by an embodiment of the present disclosure.

[0028] FIG6 is a schematic cross-sectional view of a three-layer structure region in a flexible circuit board provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0029] The terms “on,” “formed on,” and “disposed on” used in the present disclosure may mean that one layer is directly formed or disposed on another layer, or may mean that one layer is indirectly formed or disposed on another layer, i.e., there are other layers between the two layers.

[0030] It should be noted that although the terms "first," "second," etc. may be used herein to describe various parts, components, elements, regions, layers, and / or portions, these parts, components, elements, regions, layers, and / or portions should not be limited by these terms. Rather, these terms are used to distinguish one part, component, element, region, layer, and / or portion from another. Thus, for example, the first part, first member, first element, first region, first layer, and / or first portion discussed below may be referred to as a second part, second member, second element, second region, second layer, and / or second portion without departing from the teachings of the present disclosure.

[0031] In this disclosure, unless otherwise specified, the term "co-layer arrangement" refers to two layers, components, members, elements, or parts that can be formed by the same manufacturing process (e.g., patterning process, etc.), and the two layers, components, members, elements, or parts are generally formed from the same material. For example, co-layer arrangement of two or more functional layers means that these co-layered functional layers can be formed using the same material layer and the same manufacturing process, thereby simplifying the manufacturing process of the display substrate.

[0032] In this disclosure, unless otherwise specified, the expression "patterning process" generally includes steps such as photoresist coating, exposure, development, etching, and photoresist stripping. The expression "one-time patterning process" means a process of forming patterned layers, components, members, etc. using one mask.

[0033] For example, the OLED display panel can be electrically connected to the display driver chip through an FPC, thereby placing the driver chip on the backlight side to achieve a narrow frame and a higher screen-to-body ratio. However, the inventors found that the OLED display panel in the related art has insufficient ESD resistance. Although the OLED display panel in the related art has some designs to improve its ESD resistance, for example, the first binding area (Bonding) of the FPC used to bind to the OLED display panel is located in the bending area (Bending), and MCL glue (Metal Cover Layer, bending area protective glue) is applied to the outside of the bending area, thereby playing a certain role in resisting ESD (Electro-Static discharge). However, the ESD (Electro-Static discharge) protection effect is still lacking, and the product may fail the ESD test.

[0034] In view of this, an embodiment of the present disclosure provides a flexible circuit board, including an electrostatic discharge protection circuit, an electrostatic discharge detection circuit, and a switch circuit;

[0035] The input end of the electrostatic release detection circuit is coupled to the output end of the electrostatic release protection circuit, and the output end of the electrostatic release detection circuit is coupled to the control end of the switch circuit;

[0036] The first terminal of the switch circuit, the reset signal output terminal of the application processor, and the reset signal input terminal of the display driver chip are coupled to a first node, and the second terminal of the switch circuit is coupled to the ground terminal.

[0037] The flexible circuit board provided in the embodiment of the present disclosure can promptly and effectively reset the display panel when ESD occurs, thereby effectively improving the anti-ESD capability, effectively reducing the risk of electrostatic damage to the display panel, and further improving the reliability of the display device.

[0038] In a specific example, the flexible circuit board provided in the embodiment of the present disclosure is a flexible circuit board for connecting an OLED display panel and a display driver chip (Display Driver Integrated Circuit, DDIC) in a mobile phone. The display device of the mobile phone includes a display driver chip and an OLED display panel. The DDIC is connected to the application processor (AP) of the mobile phone through a mobile industry processor interface (MIPI) to receive display data. It should be noted that the flexible circuit board provided in the embodiment of the present disclosure can be applied to various types of display panels, and can be set according to actual needs. For example, in addition to the OLED display panel, the flexible circuit board provided in the embodiment of the present disclosure can also be applied to other types of display panels such as quantum dot light emitting diodes (QLED) display panels and micro light emitting diodes (Micro LED) display panels to improve their ESD resistance.

[0039] In one possible implementation, the switching circuit includes a first switching transistor, wherein a control electrode of the first switching transistor is coupled to the output terminal of the electrostatic discharge detection circuit, a first electrode is coupled to the first node, and a second electrode is coupled to ground. This helps improve the response speed of the switching circuit and ensures timely reset of the display panel when an ESD event occurs.

[0040] In a possible implementation, the first switch transistor is an N-type transistor, which is more conducive to improving the response speed of the switch circuit and ensuring the timeliness of resetting the display panel when ESD occurs.

[0041] In one possible implementation, the flexible printed circuit board further includes a first resistor and a first capacitor. The first resistor is coupled between the reset signal output terminal of the application processor and the first node. The first end of the first capacitor is coupled to the first node, and the second end of the first capacitor is coupled to the ground terminal. Thus, the first resistor and the first capacitor can protect a switching circuit, such as a switching transistor, from breakdown of components such as the switching transistor in the switching circuit.

[0042] In the following, in combination with the above implementation, taking an OLED display panel as an example, the electrostatic discharge protection circuit structure and working principle of the flexible circuit board provided by the embodiment of the present disclosure are exemplarily described.

[0043] For example, as shown in Figures 1 and 2, the switching circuit includes an N-type transistor N1, such as an NMOS tube, the gate of the N-type transistor N1 is coupled to the output terminal ESD Error flag of the electrostatic discharge detection circuit, such as a GPO (General-Purpose Output) type, the source of the N-type transistor N1 is coupled to the ground terminal GND, the drain of the N-type transistor N1, the second end of the first resistor R1, the reset signal input terminal DDIC_Reset of the display driver chip, and the first end of the first capacitor C1 are coupled to the first node A, the first end of the first resistor R1 is coupled to the reset signal output terminal AP_Reset of the application processor, and the second end of the first capacitor C1 is coupled to the ground terminal GND.

[0044] For example, as shown in Figure 3, the electrostatic discharge protection circuit includes a first transient voltage suppression diode D1 and a second resistor R2. The first end of the first transient voltage suppression diode D1 is coupled to the power supply terminal VCC, the second end of the first transient voltage suppression diode D1 is grounded GND, the first end of the second resistor R2 is coupled to the power supply terminal VCC and the input terminal of the electrostatic discharge detection circuit, and the second end of the second resistor R2 is grounded GND. For example, the first transient voltage suppression diode D1 is a bipolar transient voltage suppression diode. When no ESD occurs, the first transient voltage suppression diode D1 is cut off or turned off, and the electrostatic discharge protection circuit continues to output a high-level signal. When ESD occurs, the first transient voltage suppression diode D1 is turned on, causing the electrostatic discharge protection circuit to output a low-level signal. After the ESD ends, the first transient voltage suppression diode D1 returns to the cutoff state, and the electrostatic discharge protection circuit resumes outputting a high-level signal. That is, the electrostatic discharge protection circuit outputs a high-level signal when no ESD occurs and outputs a low-level signal when ESD occurs.

[0045] 3 , the electrostatic discharge detection circuit includes an inverter INV1 , an output terminal of the inverter INV1 serving as an output terminal ESD Error flag of the electrostatic discharge detection circuit, for example, a GPO type, coupled to the gate of the N-type transistor N1 .

[0046] Combined with Figures 1 to 3, and referring to Figure 4:

[0047] When no ESD occurs, the electrostatic discharge protection circuit continuously outputs a high-level signal, the ERRORFLAG signal output by the output terminal ESD Error flag of the electrostatic discharge detection circuit, such as a GPO type, is a low-level signal, the N-type transistor N1 is turned off, the input signal RESET of the reset signal input terminal DDIC_Reset of the DDIC is a high-level signal output by the reset signal output terminal AP_Reset of the AP, the DDIC is in a normal working state, and the normal output includes driving signals such as the clock signal GCK to drive the OLED display panel to display normally, such as the interval before 4ms in FIG4 ;

[0048] When ESD occurs, the electrostatic discharge protection circuit outputs a low-level signal, and the ERRORFLAG signal output by the electrostatic discharge detection circuit, such as a GPO-type output terminal ESD Error flag, becomes a high-level signal. The N-type transistor N1 is turned on, and the input signal RESET of the reset signal input terminal DDIC_Reset of the DDIC is pulled low to ground. The DDIC enters a reset state, and the OLED display panel enters a sleep (Sleep-In) state, such as the interval between 4ms and 4.5ms in Figure 4. For example, when the input signal RESET of the reset signal input terminal DDIC_Reset of the DDIC is pulled low to ground, the DDIC sets the flag bit F to F=1.

[0049] After the ESD event ends, the electrostatic discharge protection circuit resumes outputting a high-level signal, and the ERRORFLAG signal output by the electrostatic discharge detection circuit, such as the GPO-type output terminal ESD Error flag, returns to a low-level signal. The N-type transistor N1 is turned off, and the input signal RESET of the DDIC's reset signal input terminal DDIC_Reset returns to a high-level signal output by the AP's reset signal output terminal AP_Reset. The DDIC resumes normal operation, normally outputting drive signals including the clock signal GCK to drive the OLED display panel to display normally, such as the interval after 5ms in FIG4 , where, for example, the interval of 4.5ms-5ms in FIG4 is a reset process or reset preparation interval. For example, when the input signal RESET of the DDIC's reset signal input terminal DDIC_Reset returns to a high-level signal output by the AP's reset signal output terminal AP_Reset, the DDIC sets the flag bit F to F=0. After the AP reads back that F=0, it executes a software reset action. After the DDIC completes the power-on procedure, it resumes normal operation.

[0050] In one possible implementation, the flexible circuit board includes a first binding area located at an end position on one side of the flexible circuit board for binding to the display panel, and at least a portion of the flexible circuit board close to the first binding area includes a first ground layer, a routing layer, and a second ground layer stacked in sequence.

[0051] Therefore, from the perspective of circuit design, the flexible circuit board provided by the present disclosure realizes timely and effective reset of the display panel when ESD occurs through the design of the switching circuit, thereby effectively improving the anti-ESD capability. The flexible circuit board provided by the present disclosure also further improves the anti-ESD capability from the perspective of hardware stacking design by designing at least a portion of the area close to the first binding area as a three-layer structure including a first ground layer, a routing layer and a second ground layer.

[0052] In a possible implementation, the first ground layer and the second ground layer are electrically connected via vias provided in the routing layer, thereby further improving the ESD resistance of the three-layer structure.

[0053] In a possible implementation manner, the first binding area is located at an end position of the flexible circuit board.

[0054] In a possible implementation, a portion of the flexible circuit board near the first binding area includes a first ground layer, a routing layer, and a second ground layer stacked in sequence.

[0055] Taking the display panel as an OLED display panel as an example, the FPC includes a first binding area for binding to the OLED display panel and a second binding area for binding to the display driver chip. The first binding area and the second binding area respectively include multiple binding pins, wherein the first binding area is located in the bending area (Bending). The FPC in the related art is a two-layer structure, the bottom layer is the routing layer, and the top layer is the grounding layer. Although MCL glue is applied to the outside of the bending area, it can play a certain anti-ESD role, but there is still a risk that ESD generated in the bending area enters the routing layer and damages the signal routing. The above implementation method designs a certain width of the FPC close to the first binding area into a three-layer structure including a first grounding layer, a routing layer and a second grounding layer, that is, the bottom layer and the top layer are grounding layers respectively, and the middle layer is a routing layer wrapped by the ground layers on both sides. Therefore, when ESD occurs, static electricity can be conducted away through the upper and lower grounding layers, which can further enhance the anti-ESD capability, especially the anti-ESD capability of the bending area. For example, as shown in Figure 5, the FPC's region 502 near the first binding region 501 is designed as a three-layer structure, while the remaining region 503 is still a two-layer structure consisting of a routing layer and a ground layer. As shown in Figure 6, in region 502, the first ground layer 601 and the second ground layer 603 are electrically connected via vias 6021 provided in the routing layer 602. It should be understood that Figure 6 is only a schematic representation of the locations of the film layers and vias, and the signal traces in the routing layer 602 are insulated from the first ground layer 601, the second ground layer 603, and the connectors, such as metal connectors, in the vias 6021.

[0056] Another embodiment of the present disclosure provides a display module, comprising a display panel and the flexible circuit board provided in the above embodiment. The display panel is, for example, an OLED display panel. Exemplarily, the OLED display panel includes a display area and a frame area surrounding the display area. A panel binding area is provided on one side of the frame area. For example, the side where the panel binding area is provided is called a DP side (Data Pad), corresponding to, for example, the lower frame side of the OLED display panel of a mobile phone. The panel binding area includes a plurality of binding pins. The binding pins of the panel binding area are bound to the binding pins of the first binding area of ​​the flexible circuit board via a chip on film (COF). The flexible circuit board electrically connects the OLED display panel to the display driver chip.

[0057] For example, regarding OLED display panels:

[0058] The OLED display panel includes a substrate and film layers such as a driving circuit layer, a pixel definition layer, an anode, a light-emitting device layer, a cathode and an encapsulation layer formed on the substrate.

[0059] The substrate can be a flexible substrate made of materials such as polyimide (PI), polyethylene naphthalate (PEN), thermoplastic polyester (PET), or a rigid substrate made of materials such as glass and quartz. The OLED display panel may also include a barrier layer (Barrier) and a buffer layer (Buffer) located between the substrate and the driving circuit layer. For example, the barrier layer and the buffer layer can be formed on the entire surface of the substrate. For example, the barrier layer can be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, and the buffer layer can also be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride. The barrier layer is beneficial for blocking water and oxygen from entering the subsequently formed OLED from the bottom. The buffer layer is beneficial for the subsequent material deposition quality.

[0060] The driving circuit layer may also be referred to as a thin film transistor (TFT) layer, and includes an active layer (Active) formed on the buffer layer using a patterning process, a gate insulating layer (GI) formed on the active layer by deposition or the like, a gate (Gate) of the thin film transistor formed on the gate insulating layer using a patterning process, a dielectric layer (ILD) formed on the gate by deposition or the like, a source / drain metal layer formed on the dielectric layer, and a planar layer (PLN) covering the source / drain metal layer and the exposed dielectric layer. The source / drain metal layer forms the source / drain of the thin film transistor, and for example, the source is electrically connected to the active layer through a dielectric layer via. The active layer may be made of materials such as polysilicon and metal oxide, the gate insulating layer may be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, and the dielectric layer may be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride. The gate material includes metals or alloys such as aluminum, titanium, and cobalt. The planar layer may be, for example, an organic material.

[0061] The anode is, for example, a metal oxide such as ITO, IZO, or a metal such as Ag, Al, Mo, or an alloy thereof. The anode is electrically connected to the drain through a via hole opened in the planar layer.

[0062] The pixel defining layer may be formed by a patterning process and surrounds the anode. Exemplarily, the material of the pixel defining layer may include organic insulating materials such as negative photoresist, polyimide, and epoxy resin.

[0063] The light-emitting device layer is formed on the anode exposed by the opening defined in the pixel-defining layer. For example, the light-emitting device can be formed on the anode in the opening defined in the pixel-defining layer by inkjet printing or vapor deposition. The light-emitting device includes, for example, a light-emitting layer and may also include an auxiliary light-emitting layer that assists the light-emitting layer in emitting light. The auxiliary light-emitting layer may include, for example, one or more of an electron transport layer, an electron injection layer, a hole transport layer, and a hole injection layer. The light-emitting layer and the auxiliary light-emitting layer may be, for example, layers of organic materials.

[0064] For example, the cathode is formed on the entire surface of the OLED display panel, covering the light-emitting device layer and the pixel definition layer. The material of the cathode may include metals such as Mg, Ca, Li or Al or their alloys, or metal oxides such as IZO and ZTO, or organic materials with conductive properties such as PEDOT / PSS (poly 3,4-ethylenedioxythiophene / polystyrene sulfonate).

[0065] The encapsulation layer (TFE) is located on the cathode. For example, the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer. For example, the first inorganic encapsulation layer and the second inorganic encapsulation layer are formed by deposition or the like. The organic encapsulation layer is formed by inkjet printing. For example, the first inorganic encapsulation layer and the second inorganic encapsulation layer can be formed of inorganic materials such as silicon nitride, silicon oxide, and silicon oxynitride, and the organic encapsulation layer can be formed of organic materials such as polyimide (PI) and epoxy resin. Thus, the first inorganic encapsulation layer, the organic encapsulation layer, and the second inorganic encapsulation layer are formed into a composite encapsulation layer, which can form multiple protections for the functional structure of the display panel and has a better encapsulation effect.

[0066] For example, the OLED display panel further includes a cover glass (CG) located on the encapsulation layer.

[0067] Another embodiment of the present disclosure provides a display device including the display panel provided in the above embodiment. The display device can be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigation system, and this embodiment does not limit this.

[0068] Obviously, the above embodiments of the present disclosure are merely examples for clearly illustrating the present disclosure, and are not intended to limit the implementation methods of the present disclosure. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is impossible to enumerate all the implementation methods here. Any obvious changes or modifications derived from the technical solution of the present disclosure are still within the scope of protection of the present disclosure.

Claims

1. A flexible circuit board, characterized in that: It includes an electrostatic discharge protection circuit, an electrostatic discharge detection circuit and a switch circuit; The input end of the electrostatic discharge detection circuit is coupled to the output end of the electrostatic discharge protection circuit, and the output end of the electrostatic discharge detection circuit is coupled to the control end of the switch circuit; The first end of the switch circuit, the reset signal output end of the application processor, and the reset signal input end of the display driver chip are coupled to a first node, and the second end of the switch circuit is coupled to a ground end.

2. The flexible circuit board according to claim 1, characterized in that: The switch circuit includes a first switch transistor, a control electrode of the first switch transistor is coupled to the output end of the electrostatic discharge detection circuit, a first electrode is coupled to the first node, and a second electrode is coupled to the ground end.

3. The flexible circuit board according to claim 2, characterized in that: The first switch transistor is an N-type transistor.

4. The flexible circuit board according to claim 1, characterized in that: The flexible circuit board also includes a first resistor and a first capacitor, the first resistor is coupled between the reset signal output terminal of the application processor and the first node, the first end of the first capacitor is coupled to the first node, and the second end of the first capacitor is coupled to the ground terminal.

5. The flexible circuit board according to claim 1, characterized in that: The flexible circuit board includes a first binding area located at an end position of one side of the flexible circuit board for binding to the display panel, and at least a portion of the flexible circuit board near the first binding area includes a first ground layer, a routing layer and a second ground layer stacked in sequence.

6. The flexible circuit board according to claim 5, characterized in that: The first ground layer and the second ground layer are electrically connected through vias opened in the routing layer.

7. The flexible circuit board according to claim 5, characterized in that: The first binding area is located at an end portion of the flexible circuit board.

8. The flexible circuit board according to claim 7, characterized in that: A partial area of ​​the flexible circuit board close to the first binding area includes a first ground layer, a routing layer, and a second ground layer which are stacked in sequence.

9. A display module, characterized in that: The invention comprises a display panel and a flexible circuit board as claimed in any one of claims 1 to 8.

10. A display device, characterized in that: Comprising the display module as claimed in claim 9.

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