Oxide film etching method and substrate processing device

Abstract

The present invention suppresses removal, caused by etching of a silicon-containing oxide film, of a silicon-containing film to be protected that is exposed at a surface of a substrate. This oxide film etching method comprises: a step for forming a protective film of metal nitride or metal not containing silicon, such that, among a silicon-containing oxide film and a silicon-containing film to be protected exposed at a surface of a substrate, the protective film covers the film to be protected; a step for supplying, to the substrate, a mixed gas containing hydrogen fluoride gas and ammonia gas and causing the mixed gas to react with the silicon-containing oxide film, thereby altering the oxide film and producing a reaction product; and a step for sublimating and removing the reaction product.

Description

Oxide film etching method and substrate processing apparatus

[0001] The present disclosure relates to an oxide film etching method and a substrate processing apparatus.

[0002] In the manufacturing process of a semiconductor device, a method of dry etching a silicon oxide film, which is a native oxide film present on the surface of a semiconductor wafer (hereinafter referred to as a "wafer"), without using plasma is known. This dry etching method is performed, for example, by a COR (Chemical Oxide Removal) process that alters the silicon oxide film to generate reaction products, and a PHT (Post Heat Treatment) process that sublimes and removes the reaction products.

[0003] For example, Patent Document 1 describes a wafer structure on which these processes are performed. Specifically, an interlayer insulating film is formed on a Si layer by a bias high density plasma CVD (HDP-CVD) method. ２ The HDP-SiO ２ The film has a contact hole that reaches the Si layer. An insulating SiN film is provided on the sidewall of the contact hole, and the document describes that a sacrificial oxide film, which is a natural oxide film provided on the bottom of the contact hole, is removed by the above-mentioned process.

[0004] Patent No. 6161972

[0005] The present disclosure provides a technique for suppressing removal of a silicon-containing protective film exposed on the surface of a substrate due to etching of a silicon-containing oxide film.

[0006] The oxide film etching method of the present disclosure includes the steps of: forming a protective film of a silicon-free metal or metal nitride so as to cover a silicon-containing protective film and a silicon-containing oxide film exposed on a surface of a substrate; supplying a mixed gas containing hydrogen fluoride gas and ammonia gas to the substrate to react with the silicon-containing oxide film, thereby transforming the oxide film and generating a reaction product; and sublimating and removing the reaction product.

[0007] According to the present disclosure, it is possible to prevent the silicon-containing protective film exposed on the surface of the substrate from being removed by etching the silicon-containing oxide film.

[0008] FIG. 1 is a longitudinal side view of a recess formed in a wafer according to an embodiment of the present disclosure; FIG. 2 is a longitudinal side view of the recess in a comparative embodiment; FIG. 3 is a first longitudinal side view of the recess according to an embodiment; FIG. 4 is a second longitudinal side view of the recess according to an embodiment; FIG. 5 is a fifth longitudinal side view of the recess according to an embodiment; FIG. 6 is a plan view of a substrate processing apparatus according to an embodiment; FIG. 7 is a longitudinal side view showing a first processing module of the substrate processing apparatus; FIG. 8 is a longitudinal side view showing a second processing module of the substrate processing apparatus; FIG. 9 is a longitudinal side view showing a third processing module of the substrate processing apparatus; FIG. 10 is a graph showing experimental results of a preliminary test; and FIG. 11 is an SEM image showing experimental results of an example.

[0009] Before describing an embodiment of an oxide film etching method according to the present disclosure, the configuration of a wafer W, which is a substrate to be processed by the method, will be described. Fig. 1A is a longitudinal side view showing a portion of the surface layer of the wafer W before processing. The base layer of the wafer W is a Si layer 10 made of, for example, silicon (Si). A SiOx (silicon oxide) layer 11 is formed on the Si layer 10. The SiOx layer 11 is used as an interlayer insulating layer.

[0010] The SiOx layer 11 is provided with a plurality of vertically elongated recesses 12 formed by etching so as to open to the surface of the wafer W. Note that FIGS. 1A to 1B and 2A to 2E illustrate only one recess 12. Each recess 12 is provided so as to reach the Si layer 10, and is formed to provide a contact metal film (hereinafter also simply referred to as a "contact film") and a wiring layer connected to the Si layer 10. The width of the recesses 12 is set to, for example, about 10 nm to 20 nm in order to meet the recent demand for miniaturization of semiconductor circuits, and these recesses 12 are formed at narrow intervals.

[0011] The bottom surface of the recess 12 is composed of a Si layer 10. A silicon oxide film 10a is formed on the surface of the Si layer 10 facing the recess 12, which is naturally oxidized, for example, when the wafer W is transported in an atmospheric environment. The silicon oxide film 10a corresponds to the "silicon-containing oxide film" in this disclosure. The side surface of the recess 12 is composed of a SiN (silicon nitride) layer 13 used as a stopper during the etching process. A thin damaged film 13a is formed on the side surface of the SiN layer 13 facing the recess 12, which is damaged by the etching process and the ashing process for resist removal. The damaged film 13a has a thickness of, for example, about 1 nm to 2 nm and contains silicon nitride oxidized during the transport process. In this way, the silicon oxide film 10a and the damaged film 13a are exposed to the surface of the wafer W through the recess 12.

[0012] For a wafer W having the above structure, the silicon oxide film 10a, which has a high electrical resistance, is removed by the COR process and PHT process described in the Background Art section, and then a contact film and a cap film that constitute part of the wiring layer are formed. As shown in FIG. 2E (described later), the cap film 16 may constitute part of the wiring layer, for example, as a barrier metal, or may be removed without forming part of the wiring layer. Hereinafter, the COR process and PHT process are collectively referred to as the "oxide film removal process." Before describing the etching method of the present disclosure, a comparative etching method that is to be compared with the etching method of the present disclosure will be described.

[0013] A comparative etching method will be described with reference to FIGS. 1A and 1B. In the comparative etching method, a wafer W having the structure shown in FIG. 1A is first subjected to an oxide film removal process. As a result, the silicon oxide film 10a is converted into a reaction product, such as ammonia fluorosilicate (AFS), by a mixed gas (described later) supplied in the COR process. The reaction product is then sublimated and removed in the PHT process. However, as described above, the damaged film 13a contains oxidized silicon nitride, and the COR and PHT processes also affect the silicon oxide portion of the damaged film 13a. Therefore, as shown in FIG. 1B, there is a risk that the damaged film 13a, which contains silicon and oxygen, will also be removed in the oxide film removal process.

[0014] If the damaged film 13a is removed, the width of the recess 12 may increase by approximately 2 to 4 nm, which is an unacceptable increase in width for semiconductor wiring that is extremely thin on the nanometer order. On the other hand, removing the damaged film 13a is equivalent to removing a portion of the SiOx layer 11 between adjacent recesses 12. As a result, the spacing between the wiring layers formed in the recesses 12 becomes narrower, which may cause inconveniences such as an increase in leakage current.

[0015] As a method for solving the problem of removing a portion of the SiN layer 13 (damaged film 13a) described in the comparative example, the oxide etching method of the present disclosure and the resulting change in film shape are described below with reference to FIGS. 2A to 2E . In the oxide etching method of the present disclosure, a step of forming a protective film ("protective film formation step") for forming a protective film 14 on the damaged film 13a, which corresponds to the film to be protected, is performed before the oxide film removal step. By performing the oxide film removal step after covering the damaged film 13a with the protective film 14, it is possible to remove the silicon oxide film 10a while preventing removal of the damaged film 13a. After this oxide film removal step, a step of removing the protective film 14 ("cleaning step"), a contact film formation step for forming a contact film 15, and a cap film formation step for forming a cap film 16 are performed in this order.

[0016] The above series of processes of the present disclosure will be described in detail below with reference to Figures 2A to 2E, which show changes in the surface of the wafer W. During the series of processes, the environment surrounding the wafer W is a vacuum atmosphere. That is, the wafer W is not exposed to the atmosphere during this series of processes. Therefore, each process step is performed with the wafer W housed in a process vessel. Furthermore, when different process vessels are used for the above-described multiple process steps, the wafer W is vacuum-transferred via a vacuum transfer chamber to which these process vessels are connected (vacuum transfer step).

[0017] In the protective film formation process, a film formation gas for forming a protective film (hereinafter also referred to as a "protective film formation gas") is supplied to the wafer W shown in FIG. 1A. A material having etching resistance to the dry etching gas (a mixed gas containing hydrogen fluoride gas and ammonia gas) supplied in the COR process is used as the protective film. Examples of such materials include metals and metal nitrides. In the following example, a case where TiN, a metal nitride, is used as the protective film will be described.

[0018] The protective film forming gas is composed of a source gas containing a source material of the protective film and a reactive gas that reacts with the source gas. The source gas is, for example, a metal-containing gas, specifically a titanium (Ti)-containing gas, more specifically, TiCl ４ The reactive gas is a gas that precipitates the metal contained in the metal-containing gas, and is, for example, a gas that reacts with the titanium-containing gas, and more specifically, TiCl ４ NH gas reacts with the nitriding gas to nitride Ti. ３ (ammonia) gas. In addition, an inert gas, such as N, is used as a purge gas together with the mixed gas. ２ (Nitrogen) gas may be fed in parallel.

[0019] 2A , the protective film 14 is preferably formed mainly on the damaged film 13a of the silicon oxide film 10a and the damaged film 13a exposed on the surface of the wafer W, with almost no protective film formed on the silicon oxide film 10a. Therefore, in a processing module (described later) that performs the protective film formation process, the protective film 14 is formed without using high-energy plasma directed toward the substrate mounting table 55 on which the wafer W is placed. The protective film 14 is isotropically formed by, for example, thermal atomic layer deposition (ALD). This suppresses the formation of TiN on the silicon oxide film 10a, which is a surface parallel to the substrate mounting table 55, and allows the protective film 14 to be preferentially formed on the damaged film 13a, which is formed on a surface perpendicular to the substrate mounting table 55.

[0020] In thermal ALD, cyclic film formation is performed by alternately supplying the source gas and the reactive gas via a purge gas. This causes titanium metal contained in the metal-containing gas adhering to the surface of the wafer W to be precipitated and nitrided, forming a TiN (titanium nitride) molecular layer on the surface of the wafer W one by one per film formation cycle. The incubation time required for the precipitation of TiN constituting the protective film 14 is longer for the silicon oxide film 10a than for the SiN layer 13. As shown in the preliminary test described below, this incubation time correlates with the number of film formation cycles. Hereinafter, the number of cycles required for film deposition to begin is sometimes referred to as the incubation cycle. In this embodiment, the number of film formation cycles is set to be greater than the incubation cycles for the SiN layer 13 and approximately the same as or shorter than the incubation cycles for the silicon oxide film 10a. As a result, the protective film 14 is selectively formed on the damaged film 13a, relative to the silicon oxide film 10a and the damaged film 13a.

[0021] In this embodiment, the TiN film thus formed is used as the protective film 14. The protective film 14 made of TiN is resistant to the diffusion of silicon and oxygen from the damaged film 13a, and contains very little silicon and oxygen. Furthermore, since the protective film 14 contains nitrogen, it has good adhesion to the damaged film 13a, and even if it is formed relatively thin, it can effectively protect the damaged film 13a from the mixed gas during the COR process.

[0022] As shown in FIG. 2A , the formation of the protective film 14 narrows the width of the recess 12. The lower end of the protective film 14 covers the upper portions of the two widthwise ends of the silicon oxide film 10a. The protective film 14 is preferably as thin as possible while still protecting the damaged film 13a in the oxide film removal process. By suppressing an increase in the thickness of the protective film 14 and not narrowing the width of the recess 12, an increase in contact resistance due to a decrease in the buried volume of the wiring material can be suppressed. In the present disclosure, the thickness of the protective film 14 is, for example, approximately 0.5 nm to 5 nm, and is preferably approximately 1 nm to 2 nm in order to protect the damaged film 13a and selectively form the film on the damaged film 13a.

[0023] Next, an oxide film removal process is performed on the wafer W on which the protective film 14 is formed. The oxide film removal process includes a COR process (a process of converting the oxide film to generate reaction products) in which the silicon oxide film 10a is converted into reaction products, and a PHT process (a process of sublimating and removing the reaction products). In the etching method disclosed herein, the protective film 14 is not converted by the COR process and is not removed by the oxide film removal process. The supply of the mixed gas supplied in the COR process is suppressed, so the damaged film 13a covered with the protective film 14 is less likely to be converted into reaction products and is less likely to be removed by the oxide film removal process. Through the protective film formation process and the oxide film removal process described above, the damaged film 13a covered with the protective film 14 remains, while the silicon oxide film 10a is removed, as shown in FIG. 2B . The unoxidized Si layer 10 is exposed at the bottom of the recess 12.

[0024] Next, a cleaning process is performed in which a cleaning gas is supplied to the wafer W from which the silicon oxide film 10a has been removed, and the protective film 14 is removed. As a result, the protective film 14 is removed and the damaged film 13a is exposed, as shown in FIG. 2C . The damaged film 13a defines the side surfaces of the recess 12, and the width of the recess 12 becomes approximately the same as the width of the recess 12 before the protective film forming process. Through the process described above, the width change of the recess 12 is suppressed, and the unoxidized Si layer 10 is exposed at the bottom.

[0025] Then, a contact film formation process is performed on the wafer W from which the protective film 14 has been removed, in which a contact film 15, e.g., a Ti (titanium) film, is formed. The contact film formation process is performed by plasma CVD, which performs anisotropic film formation by supplying a contact film formation gas (hereinafter also referred to as a "contact film formation gas") described below. As shown in FIG. 2D , the formed contact film 15 is provided to cover the damaged film 13a constituting the sidewalls of the recess 12 and the Si layer 10 constituting the bottom. Although not explicitly shown in the drawing, the contact film 15 tends to be thicker on the bottom side of the recess 12 than on the sidewalls. Furthermore, since the contact film 15 comes into contact with the damaged film 13a and the Si layer 10, Si diffuses and silicides, forming a TiSi film 15a. The TiSi film 15a contacts the Si layer 10 over a wide area at the bottom of the recess 12 and is formed with high dimensional accuracy on the sidewalls of the recess 12.

[0026] A cap film formation process is performed in which a cap film formation gas (hereinafter also referred to as "cap film formation gas") is supplied to the wafer W on which the TiSi film 15a has been formed, to form a cap film 16, e.g., a TiN film. When a TiN film is used as the cap film 16, the cap film formation gas may be the same as the protective film formation gas described above. The cap film formation process is performed, for example, by isotropic thermal ALD, similar to the protective film formation process. As shown in FIG. 2E , the formed cap film 16 is formed so as to cover the TiSi film 15a that constitutes the sidewalls and bottom of the recess 12. The cap film 16 has approximately the same thickness on the sidewalls and bottom of the recess 12. Since such a cap film 16 is formed on the TiSi film 15a formed with high dimensional accuracy, it is formed approximately according to the design values.

[0027] A substrate processing apparatus 1 capable of carrying out the above series of processes will be described with reference to the plan view of Figure 3. The substrate processing apparatus 1 includes a loader module 21, a load lock module 25, first and second vacuum transfer modules 31 and 32, a connection module 33, and first to fourth process modules 41 to 44. In the following description, the first vacuum transfer module 31 and the second vacuum transfer module 32 may be collectively referred to as vacuum transfer modules 31 and 32. Furthermore, the first to fourth process modules 41 to 44 may be simply referred to as process modules 41 to 44.

[0028] The loader module 21, the load lock module 25, the first vacuum transfer module 31, the connection module 33, and the second vacuum transfer module 32 are arranged in a straight line in the front-to-rear direction in this order. In the following description of the substrate processing apparatus 1, the side where the loader module 21 is located will be referred to as the front side, and the side where the second vacuum transfer module 32 is located will be referred to as the rear side.

[0029] The loader module 21 includes a housing whose interior is at atmospheric pressure, a transfer mechanism 22 for wafers W provided within the housing, and load ports 23. In this example, four load ports 23 are provided side by side on the front side of the housing. A transfer container 24 called a FOUP (Front Opening Unified Pod) for storing wafers W is placed on each load port 23. The transfer mechanism 22 is formed, for example, by an articulated arm that can move left and right, and is capable of transferring wafers W between the transfer container 24 on each load port 23 and each load lock module 25.

[0030] In this example, three load lock modules 25 are provided side by side as viewed from the front. Each load lock module 25 has a housing, and the housing is connected to the loader module 21 and the vacuum transfer module 31 via gate valves G provided on the front and rear sides, respectively. Each load lock module 25 is configured so that the pressure inside the housing can be freely changed between atmospheric pressure and vacuum pressure when the gate valves G on the front and rear sides of the housing are closed. A stage (not shown) on which the wafer W is placed is also provided inside the housing, and the stage is configured to be able to transfer the wafer W to and from the transfer mechanism 22 and the vacuum transfer mechanism 34 (described later), which access the load lock module 25, respectively.

[0031] The first and second vacuum transfer modules 31, 32 have the same configuration and each include a housing 31 a, 32 a and a vacuum transfer mechanism 34 provided inside the housing 31 a, 32 a. An exhaust port 35 is opened in each of the housings 31 a, 32 a, and one end of an exhaust pipe is connected to the exhaust port 35. The other end of the exhaust pipe is connected to an exhaust mechanism 36 formed, for example, by a turbomolecular pump. A vacuum atmosphere is maintained inside the housings 31 a, 32 a by exhausting air from the exhaust port 35 by the exhaust mechanism 36.

[0032] In this example, two connection modules 33 are provided side by side. Each connection module 33 includes a housing 33a, which is connected to the housings 31a and 32a of the vacuum transfer modules 31 and 32. The housing 33a of the connection module 33 is also created with a vacuum atmosphere at the same pressure as the housings 31a and 32a by exhausting air using the exhaust mechanism 36. A wafer W is placed inside the housing 33a, and a stage (not shown) is provided therein so that the wafer W can be transferred between the housing 33a and the vacuum transfer mechanism 34 (described later). The housings 31a and 32a of the first and second vacuum transfer modules 31 and 32 and the housing 33a of the connection module 33, which are created with a vacuum atmosphere by the exhaust mechanism 36, correspond to vacuum transfer chambers for the wafer W.

[0033] A second processing module 42 and a third processing module 43 are arranged side by side in the front and rear direction and are connected to the left and right sides of the housing 31a of the first vacuum transfer module 31 as viewed from the front side via gate valves G1. The second processing module 42 is arranged on the front side, and the third processing module 43 is arranged on the rear side. Wafers W are transferred between the second processing module 42, the third processing module 43, and the load lock module 25 by a vacuum transfer mechanism 34 formed of, for example, an articulated arm that can move back and forth.

[0034] A fourth process module 44 and a first process module 41 are arranged side by side in the front and rear direction and are connected to the left and right sides of the housing 32a of the second vacuum transfer module 32 as viewed from the front side via gate valves G1, respectively. The fourth process module 44 is arranged on the front side, and the first process module 41 is arranged on the back side. Wafers W are transferred between the fourth process module 44, the first process module 41, and the connection module 33 by, for example, a vacuum transfer mechanism 34.

[0035] The correspondence between the processes performed in each of the first to fourth process modules 41-44 and the series of processes described above is shown. The first process module 41 performs a protective film formation process and a cap film formation process. By performing the protective film formation process and the cap film formation process, which form the same TiN film, in the first process module 41, the number of process modules is reduced and these processes are made more efficient. In the claims, the process module that performs the protective film formation process (the process step of forming a protective film) is referred to as the "first process module," and the process module that performs the cap film formation process (the process step of forming a cap film) is referred to as the "fifth process module." From this perspective, the process module 41 shown in FIGS. 3 and 4 has a common configuration that combines the first process module and the fifth process module.

[0036] The second processing module 42 performs a COR process (a process of generating reaction products by altering an oxide film), the third processing module 43 performs a PHT process (a process of sublimating and removing reaction products), and the fourth processing module 44 performs a contact film formation process. Each of the processing modules 41 to 44 includes a processing chamber 51 that is evacuated to create a vacuum atmosphere inside, and a substrate mounting table 55 that is provided in the processing chamber 51 and on which a wafer W is placed.

[0037] The substrate processing apparatus 1 includes a control unit 20, which is a computer, and the control unit 20 includes a program. The program includes instructions (steps) for carrying out the above-described wafer W processing process and wafer W transfer process. The program is stored in a storage medium, such as a compact disc, a hard disk, a DVD, or a nonvolatile memory, and is read from the storage medium and installed in the control unit 20.

[0038] The control unit 20 outputs control signals to each component of the substrate processing apparatus 1 based on the program, thereby controlling the operation of each component. Specifically, the control unit 20 controls the operation of the processing modules 41-44, the opening and closing of the gate valves G and G1, the operation of the transfer mechanism 22, the operation of the vacuum transfer mechanism 34, the operation of the exhaust mechanism 36, and the switching of the pressure within the load lock module 25. The control of the operation of the processing modules 41-44 includes, for example, temperature control of the wafer W by supplying power to heaters 56A-56C (described later), control of the supply and cutoff of each gas into the processing vessel 51, and control of plasma formation by turning on and off the high-frequency power source, if one is provided. The control operations performed by the control unit 20 in the COR process, PHT process, protective film formation process, cleaning process, contact film formation process, and cap film formation process correspond to processing steps. Furthermore, the control operations for transporting the wafer W to each processing vessel 51 to perform these processes correspond to transport steps.

[0039] Regarding the transfer path of the wafer W in the substrate processing apparatus 1, the wafer W is first transferred in the following order: transfer container 24 → loader module 21 → load lock module 25 → vacuum transfer module 31 → second vacuum transfer module 32 → first processing module 41. Then, the wafer W that has undergone the protective film forming process in the first processing module 41 is transferred in the following order: first processing module 41 → second vacuum transfer module 32 → connection module 33 → first vacuum transfer module 31 → second processing module 42. The wafer W that has undergone the COR process in the second processing module 42 is transferred in the following order: second processing module 42 → first vacuum transfer module 31 → third processing module 43.

[0040] Then, the wafer W that has undergone the PHT process in the third process module 43 is transferred in the order of the third process module 43, the first vacuum transfer module 31, the connection module 33, the second vacuum transfer module 32, and the fourth process module 44. The wafer W that has undergone the contact film formation process in the fourth process module 44 is transferred in the order of the fourth process module 44, the second vacuum transfer module 32, and the first process module 41, and is subjected to the cap film formation process. The wafer W that has undergone the cap film formation process is transferred in the order of the first process module 41, the second vacuum transfer module 32, the connection module 33, the first vacuum transfer module 31, the load lock module 25, and the loader module 21, and is returned to the transfer container 24.

[0041] Next, the first process module 41, which performs the protective film formation process and the cap film formation process, will be described using the vertical side view of FIG. 4 . The process vessel 51 of the first process module 41 is made of, for example, aluminum. A transfer port for the wafer W is formed in the sidewall of the process vessel 51, and a gate valve G1 for opening and closing the transfer port is provided. An exhaust duct 52, which is shaped like a ring and has a rectangular cross section, is disposed in the upper part of the sidewall of the process vessel 51. A slit 52a is formed in the exhaust duct 52 along its inner periphery, and an exhaust port 52b is formed in the outer wall of the exhaust duct 52. A ceiling wall 54 is provided on the upper surface of the exhaust duct 52 to close the upper opening of the process vessel 51 via an insulating member 53, and the space between the exhaust duct 52 and the insulating member 53 is airtightly sealed with a seal ring.

[0042] A substrate mounting table 55 for horizontally supporting a wafer W is provided inside the processing vessel 51. The substrate mounting table 55 is formed in a disk shape from a ceramic material such as aluminum nitride (AlN) or a metal material such as an aluminum or nickel alloy. In this example, a heater 56A for heating the wafer W is embedded in the substrate mounting table 55. The heater 56A heats the wafer W to, for example, 700°C to 1000°C in the protective film forming process and the contact film forming process. The outer peripheral region and side surfaces of the upper surface of the substrate mounting table 55 are covered with a cover member made of ceramic such as alumina.

[0043] The substrate mounting table 55 is connected via a support member to an elevating mechanism 57 provided below the processing vessel 51 and is configured to be freely raised and lowered between a processing position indicated by a solid line in FIG. 4 and a wafer W transfer position indicated by a dashed line below the processing position indicated by a solid line in FIG. 4 . In FIG. 4 , reference numeral 52c denotes a partition member that, together with the substrate mounting table 55 raised to the processing position, divides the interior of the processing vessel 51 into upper and lower sections. Three support pins 58 (only two are shown) are provided below the substrate mounting table 55 in the processing vessel 51 so as to be freely raised and lowered by an elevating mechanism provided below the processing vessel 51. The support pins 58 are inserted into through holes in the substrate mounting table 55 at the transfer position and are configured to be able to protrude and retract relative to the upper surface of the substrate mounting table 55. These support pins 58 are used to transfer the wafer W between the vacuum transfer mechanism 34 of the first vacuum transfer module 31 shown in FIG. 3 and the substrate mounting table 55. Reference numeral 59 in the figure denotes a bellows that separates the atmosphere inside the processing vessel 51 from the outside air and expands and contracts in accordance with the vertical movements of the substrate mounting table 55 and the support pins 58, respectively.

[0044] A shower head 61 for supplying various gases into the processing vessel 51 in a shower-like manner is provided in the processing vessel 51, facing the substrate mounting table 55. The shower head 61 includes a main body fixed to the ceiling wall 54 of the processing vessel 51 and a shower plate 62 connected below the main body, with a gas diffusion space 63 formed inside. A downwardly protruding annular protrusion is formed on the periphery of the shower plate 62, and gas discharge holes 64 are formed on the flat surface inside the annular protrusion. Gas inlet holes communicating with the gas diffusion space 63 are formed in the ceiling wall 54 and the main body of the shower head 61, and a gas supply mechanism 6A for forming a protective film is connected to the gas inlet holes.

[0045] The gas supply mechanism 6A includes a source gas supply unit 71A configured to supply a source gas containing a source material of the protective film 14 to the processing vessel 51, and a reactive gas supply unit 72A configured to supply a reactive gas that reacts with the source gas. The gas supply mechanism 6A further includes two purge gas supply units 73A configured to supply a purge gas. The source gas supply unit 71A includes a source gas supply source 74A and a supply path 75A, and the supply path 75A is provided with, from upstream, a flow rate adjustment unit M1A, a storage tank T1A, and a valve V1A.

[0046] The reactive gas supply unit 72A includes a reactive gas supply source 76A and a supply path 77A. The supply path 77A is provided with, from upstream to downstream, a flow rate adjuster M2A, a storage tank T2A, and a valve V2A. Each purge gas supply unit 73A includes a purge gas supply source 78A and a supply path 79A. Each supply path 79A is provided with a flow path adjuster M3A and a valve V3A. The supply path 79A of one purge gas supply unit 73A is connected to the raw material gas supply path 75A to purge the raw material gas, and the supply path 79A of the other purge gas supply unit 73A is connected to the reactive gas supply path 77A to purge the reactive gas. As described above, the raw material gas supply unit 71A, the reactive gas supply unit 72A, and the purge gas supply unit 73A are configured to individually supply the raw material gas, the reactive gas, and the purge gas into the processing vessel 51, respectively.

[0047] The processing vessel 51 is connected to a vacuum exhaust line 66 via the exhaust port 52b, and a vacuum exhaust unit 67, such as a vacuum pump, is provided downstream of the vacuum exhaust line 66 and configured to evacuate the gas inside the processing vessel 51. A pressure control valve, such as an APC valve (not shown), is provided in the vacuum exhaust line 66 between the processing vessel 51 and the vacuum exhaust unit 67.

[0048] Next, the second processing module 42 for performing the COR process will be described with reference to the vertical side view of FIG. 5 , focusing on the differences from the first processing module 41. The processing vessel 51 is connected to, for example, a vacuum exhaust unit 67 via a vacuum exhaust path 66 equipped with an open / close valve. The processing vessel 51 is equipped with a heater 56B disposed inside the substrate mounting table 55. The heater 56B is configured to adjust the temperature of the upper surface of the substrate mounting table 55 by, for example, circulating and supplying a temperature-controlling fluid through a conduit, and further to heat the wafer W mounted on the substrate mounting table 55 to a heating temperature of 60° C. or higher.

[0049] The gases supplied by the mixed gas supply mechanism 6B for the COR process connected to the shower head 61 are HF (hydrogen fluoride) gas, NH ３ The mixed gas supply mechanism 6B is a HF gas supply unit 71B, an NH ３The HF gas supply unit 71B includes an HF gas supply source 74B and a supply path 75B, and the supply path 75B is provided with a flow rate adjustment unit M1B. ３ The gas supply unit 72B includes a reactive gas supply source 76B and a supply path 77B, and the supply path 77B is provided with a flow rate adjustment unit M2B. The inert gas supply unit 73B supplies argon (Ar) gas and N ２ The supply path 79B includes a supply source 78B for supplying gas and a flow path adjustment unit M3B. The downstream ends of the supply paths 75B, 77B, and 79B are connected to the shower head 61.

[0050] 6, the third process module 43 for performing the PHT process will be described, focusing on the differences from the first process module 41. The heater 56C of the third process module 43 is formed of, for example, a heater that uses resistance heat, and is configured to heat the wafer W placed in the third process module 43 to a temperature higher than the temperature of the wafer W placed in the second process module 42.

[0051] The third processing module 43 is, for example, ２ The inert gas supply unit 73C is provided to supply an inert gas such as N ２ The third process module 43 includes a gas supply source 78C and a supply path 79C having a flow rate adjuster M3C interposed therebetween. The inert gas supply unit 73C allows the reaction products sublimated in the process vessel 51 to be quickly purged, and the pressure inside the process vessel 51 to be adjusted. The reaction products are sublimated by adjusting at least one of the temperature of the wafer W and the pressure inside the process vessel 51. From this perspective, the heater 56C and the vacuum exhaust unit 67 provided in the third process module 43 correspond to the sublimation processing unit of this embodiment.

[0052] A fourth process module 44 that performs the contact film formation process and the cleaning process will now be described. The fourth process module 44 of this embodiment is configured to form a Ti film as the contact film 15. The fourth process module 44 has a similar configuration to the first process module 41 described with reference to FIG. 4, for example. However, the fourth process module 44 differs from the first process module 41 in the type of gas supplied from the gas supply mechanism and in that it includes a configuration related to plasma generation. In the following description, components common to the first process module 41 described with reference to FIG. 4 are designated by the same reference numerals as in that figure.

[0053] The gas supply mechanism (not shown) of the fourth process module 44 is configured to supply a source gas and a reactive gas for forming the contact film, a cleaning gas, and a purge gas into the process chamber 51. The source gas for forming the contact film is a gas containing a source material for the contact film, such as a Ti-containing gas, specifically TiCl ４ The reactive gas for forming the contact film is a gas that reacts with the source gas, for example, a gas that reacts with a Ti-containing gas, specifically TiCl ４ H reacts with gas ２ (hydrogen) gas.

[0054] The cleaning gas is a gas for removing the protective film 14, and is, for example, a gas containing a halogen compound gas, specifically ClF ３ The purge gas is an inert gas, specifically Ar gas, that can purge various gases supplied in the fourth processing module 44 and dilute the cleaning gas. The dilution gas is ClF ３ It is supplied as needed to adjust the concentration of the gas.

[0055] The gas supply mechanism is TiCl ４ Gas supply unit, H ２The first processing module 41 includes a gas supply unit, a purge gas supply unit, and a cleaning gas supply unit. Similar to the first processing module 41, these supply units each include a supply source and a supply path for each of the gases, and each supply path is provided with a flow rate adjuster. The downstream sides of the supply paths are connected individually to showerheads, for example, without merging.

[0056] The fourth processing module 44 forms a contact film by plasma CVD, and thus constitutes a capacitively coupled plasma processing apparatus with a shower head 61 serving as an upper electrode and a substrate mounting table 55 serving as a lower electrode. A high frequency power supply that supplies high frequency power for plasma generation is connected to the shower head 61 serving as the upper electrode via a matching box, and the substrate mounting table 55 serving as the lower electrode is grounded (neither is shown).

[0057] In the contact film forming process, when high frequency power is applied to the shower head 61, TiCl 4 supplied to the processing vessel 51 is ４ Gas, H ２ The gas and Ar gas are ionized to form plasma, thereby forming the contact film 15 on the wafer W placed in the space between the shower head 61 and the substrate stage 55 by plasma CVD.

[0058] In the contact film forming process, the pressure inside the processing vessel 51 is adjusted to a set value, for example, 666 Pa (5 Torr), and the temperature of the substrate mounting table 55 is adjusted to, for example, 400° C. In the cleaning process, the pressure inside the processing vessel 51 is adjusted to a set value, for example, 266 Pa (2 Torr), and the temperature of the substrate mounting table 55 is adjusted to, for example, 300° C.

[0059] Using the substrate processing apparatus 1 having the above-described configuration, the operation of performing a series of processes on a wafer W will be described with reference to Figures 3 to 6 showing the apparatus 1 and Figures 2A to 2E showing film changes. First, the vacuum transfer mechanism 34 in the vacuum transfer module 31 receives the wafer W to be processed from the load lock module 25 shown in Figure 3 and transfers the wafer W toward the first processing module 41, which is located at the innermost position. Thereafter, the gate valve G1 of the first processing module 41 shown in Figure 4 is opened, and the vacuum transfer mechanism 34 moves the wafer W into the processing vessel 51 through the loading port. The wafer W is then transferred from the vacuum transfer mechanism 34 to the substrate mounting table 55 using the support pins 58, and the vacuum transfer mechanism 34 is then withdrawn from the processing vessel 51, and the gate valve G1 is closed.

[0060] As described above, the first processing module 41 is capable of performing both the protective film formation process and the cap film formation process, but first performs the protective film formation process. The pressure inside the processing vessel 51 and the temperature of the wafer W are adjusted according to the recipe for the protective film formation process. Next, as described above, various protective film formation gases are repeatedly supplied to the processing vessel 51 in a predetermined order. Taking into account the incubation cycle described above, this film formation cycle may be performed, for example, 30 to 60 times, specifically 30 times. As a result, the protective film 14, which is a TiN film, is formed on the damaged film 13a while being prevented from being formed on the silicon oxide film 10a ( FIG. 2A ).

[0061] After the protective film formation process is completed, the wafer W on which the protective film 14 has been formed is unloaded from the first process module 41 in the reverse order of the loading process. The wafer W is then transported toward the second process module 42, which is the frontmost one. Thereafter, the wafer W is loaded into the second process module 42 in the same order as the loading process into the first process module 41, and the COR process is performed. The pressure and temperature inside the process vessel 51 are adjusted in accordance with the recipe settings for the COR process. Next, a mixed gas for the COR process is supplied, for example, simultaneously to the process vessel 51. This allows the silicon oxide film 10a to be modified to form a reaction product while avoiding the modification of the damaged film 13a covered with the protective film 14.

[0062] After the COR process is completed, the wafer W on which the reaction products have been formed is transferred from the second process module 42 in the same manner as in the first process module 41 and transferred into the third process module 43, which is the second from the front, for the PHT process. The pressure and temperature inside the process vessel 51 are adjusted in accordance with the recipe for the PHT process, and an inert gas is supplied to heat-treat the wafer W. The reaction products from the heat-treated wafer W are sublimated, and the silicon oxide film 10a is removed ( FIG. 2B ).

[0063] After the PHT process is completed, the wafer W, from which the silicon oxide film 10a has been removed, is transferred from the third process module 43 and into the fourth process module 44, the third from the front. When the wafer W is transferred from the third process module 43 to the fourth process module 44, it is transferred via a vacuum transfer path, namely, the first vacuum transfer module 31, the second vacuum transfer module 32, and the connection module 33. Therefore, the wafer W is not exposed to the atmosphere. This prevents the surface of the Si layer 10 exposed in the recess 12 from being re-oxidized by the atmosphere. The wafer W, from which the silicon oxide film 10a has been removed and transferred into the fourth process module 44, is subjected to a cleaning process. In the cleaning process, the pressure and temperature within the process chamber 51 are adjusted according to the recipe settings for the process, and a cleaning gas with an adjusted flow rate is simultaneously supplied. This removes the protective film 14 from the wafer W ( FIG. 2C ).

[0064] After the cleaning process is completed, the contact film formation process is performed immediately without removing the wafer from the third process module 43. Because the contact film formation process is performed in the vacuum-atmosphere processing chamber 51 where the cleaning process was performed, the overall process is efficient and the number of processing modules can be reduced. In the fourth process module 44, the pressure and temperature within the processing chamber 51 are adjusted according to the recipe settings for the contact film formation process, and contact film formation gas is simultaneously supplied, for example, and high-frequency power is supplied to the shower head 61 by the power supply unit. By this plasma CVD process, a contact film 15 is formed on the surface of the wafer W from which the silicon oxide film 10a and protective film 14 have been removed ( FIG. 2D ). The contact film 15 in the recess 12 becomes a TiSi film 15a due to diffusion of Si from the damaged film 13a and the Si layer 10.

[0065] After the contact film formation process is completed, the wafer W with the TiSi film 15a (contact film 15) formed on its surface is transferred out of the fourth process module 44 in the same manner and then transferred back into the first process module 41, the innermost one. As described above, the first process module 41 can perform both the protective film formation process and the cap film formation process, but the cap film formation process is performed at this timing. The pressure, temperature, and film formation gas recipe for the cap film formation process are generally the same as those for the protective film formation process, so the fourth process module 44 can be used for both the protective film formation process and the contact film formation process. The film formation cycle in this process is performed for example, 30 to 90 cycles. As a result, the cap film 16 is formed on the TiSi film 15a (contact film 15) ( FIG. 2E ).

[0066] The wafer W on which the cap film 16 has been formed is loaded into the load lock module 25, and then returned to the transfer container 24 via the loader module 21. As described above, according to the substrate processing apparatus 1 and the oxide film etching method of the present disclosure, the silicon oxide film 10a can be effectively removed in the oxide film removal step for removing the silicon oxide film 10a, and the recess 12 can be prevented from widening in the oxide film removal step.

[0067] (Modification) The protective film formation process in the embodiment of the present disclosure is not limited to thermal ALD, and may be performed using other film formation methods, such as chemical vapor deposition (CVD) other than ALD that does not use plasma. In the case of CVD, in which the film thickness is adjusted by the film formation time, for example, it is possible to selectively form a film on the damaged film 13a by utilizing differences in incubation time by adjusting the film formation gas supply time. Furthermore, the various gas compositions and temperature adjustments in the above series of processes are merely examples, and other gas compositions and temperature adjustments may also be used.

[0068] As described above, it is not essential that each process in the embodiment of the present disclosure be performed in the corresponding process module 41 to 44. For example, although the protective film formation process and the cap film formation process are both performed in the first process module 41, they may be performed in different process modules, in which case two first process modules 41 may be provided in the substrate processing apparatus 1 to improve throughput. Furthermore, although the COR process and the PHT process are performed in the second process module 42 and the third process module 43, respectively, they may both be performed in the second process module 42.

[0069] 3, an example of the arrangement of the processing modules 41 to 44 and the vacuum transfer modules 31, 32, etc., may of course be different in number and arrangement. For example, as long as the vacuum transfer modules 31, 32, which are part of the transfer mechanism for the wafer W, can be such that only one can be vacuum transferred and the other can be in the air atmosphere, after the silicon oxide film 10a is removed, the vacuum transfer modules 31, 32 can be in the air atmosphere.

[0070] The present disclosure aims to suppress removal of the SiN layer 13, which is one silicon-containing layer, during the process of removing the oxide film of the Si layer 10, which is another silicon-containing layer. Therefore, the upper part of the Si layer 10 and the SiN layer 13, which form the inner wall surface of the recess 12, are not limited to a Si layer and a SiN layer, respectively, and may be another layer containing silicon. For example, a SiGe layer may be provided on the upper part of the Si layer 10 to form the bottom of the recess 12. In this case, the oxide film of the SiGe layer exposed at the bottom of the recess 12 contains silicon oxide and is therefore removed in the same COR and PHT processes.

[0071] Furthermore, the shape of the recess 12 is not limited to the shape described herein. For example, the bottom of the recess 12, which is illustrated as a flat surface, may have a fin shape that protrudes toward the opening or a recess shape that is concave. The series of processes described herein can be applied to the damaged film 13a and silicon oxide film 10a disposed on the surface of the wafer W, and are therefore not limited to the damaged film 13a that constitutes the sidewall of the recess 12 and the silicon oxide film 10a that constitutes the bottom. For example, the damaged film 13a and silicon oxide film 10a may be disposed on a horizontal surface of the wafer W. Furthermore, although the damaged film 13a of the SiN layer 13 is shown as an example of a protected film, the protected film is not limited to the damaged film 13a formed on the SiN layer and may be formed on a layer of another composition.

[0072] Furthermore, for example, a cleaning gas supply unit may be provided in the third process module 43, and a cleaning process may be performed after the PHT process. The protective film 14 may then be removed, and the wafer W may then be transferred to the fourth process module 44 for the contact film formation process. Furthermore, if the protective film 14 is sufficiently thin and has little effect on the subsequent formation of the contact film 15 and cap film 16, the protective film 14 may not be removed. In this case, the contact film 15 and cap film 16 may be formed on the remaining protective film 14. Furthermore, in this case, forming the protective film 14 as thin as possible can prevent the width of the recess 12 from narrowing, while forming a thicker contact film 15 and suppressing an increase in contact resistance. Although the embodiments of the present disclosure illustrate the formation of the contact film 15 and cap film 16 within the recess 12, these are not essential configurations. After the silicon oxide film 10a is removed, a metal layer serving as an interconnect material may be formed directly within the recess 12.

[0073] The protective film 14 is preferably a TiN film, but may be another metal film that does not contain silicon or silicon oxide. In this case, the other metal film is preferably made of a material that is resistant to silicon diffusion from the damaged film 13a and oxidation, so that the damaged film 13a is not damaged when removed by the COR and PHT processes. The other metal film is preferably made of a material that does not melt, sublimate, or peel at the temperatures used in the COR and PHT processes. Furthermore, the other metal film is preferably a metal film whose incubation time with the damaged film 13a, which is the film to be protected, is shorter than that with the silicon oxide film 10a. Examples of such other metal films include materials containing W (tungsten) and Ru (ruthenium).

[0074] It should be noted that the embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive, and various omissions, substitutions, modifications, and combinations may be made to the above-described embodiments without departing from the scope and spirit of the appended claims.

[0075] (Preliminary Test) Differences in the incubation cycles correlated with the incubation time used in the formation of the protective film 14 by thermal ALD in the protective film formation process were confirmed. Specifically, the incubation cycles of (i) a silicon oxide film and (ii) a TiN film were confirmed for a silicon nitride film.

[0076] A. Preliminary Test Conditions The first processing module 41 of the embodiment and blanket wafers, which were three identically shaped bare silicon wafers, were used to confirm the difference in growth rate of the TiN film. For this purpose, the film formation recipe, wafer W temperature, pressure settings, etc. were used under the same conditions, and the change in film thickness due to the number of cycles was confirmed.

[0077] B. Preliminary Test Results Figure 7 is a graph showing the results of the preliminary test. It was found that the thickness of the TiN film and the number of cycles for each of the (i) and (ii) films were linearly related. Furthermore, based on the plots of film thickness for each of the (i) and (ii) films in Figure 7, it was estimated that TiN film deposition began at approximately 30 cycles for the (i) silicon oxide film and approximately 0 cycles for the (ii) silicon nitride film. From this, it was estimated that when forming a TiN film for each of the (i) and (ii) films, there are different incubation cycles for the film deposition cycle. It was found that selective film deposition can be achieved by setting the film deposition cycle based on the difference in the number of incubation cycles. For example, the results of this preliminary test suggest that if the number of cycles is set to 30 or less, or approximately 30, it is possible to form a TiN film selectively over the silicon nitride film when forming a silicon oxide film and a silicon nitride film.

[0078] (Experiment) The protective film formation process of the embodiment was performed using a number of cycles determined based on the results of the preliminary test to confirm whether a TiN film was selectively formed. Specifically, it was confirmed that the film was selectively formed on the silicon nitride layer on the side of the recess, but not on the silicon oxide film at the bottom of the recess. A. Experimental Conditions: The prepared wafer had a silicon nitride layer uniformly formed on a silicon layer, with a recess formed in the silicon nitride layer that slightly penetrated the upper part of the silicon layer. Sixty film formation cycles were performed on this wafer under the same film formation conditions as the preliminary test. After the TiN film was formed, the recess on the wafer was confirmed using SEM images. B. Experimental Results: In the SEM image shown in Figure 8, the silicon nitride layer constituting the sidewall of the recess cannot be distinguished, but the damaged film 13a described with reference to Figure 2C and other figures is formed on its surface. According to Figure 8, a TiN film was formed on the silicon nitride layer on which the damaged film 13a was formed. The thickness of the TiN film was approximately 2 nm. On the other hand, no clear TiN film was observed on the surface of the Si layer that constituted the bottom of the recess. The film formation cycles required to form a TiN film with a thickness of 1 to 2 nm under the above-mentioned experimental conditions were approximately 40 to 60 times. This experiment confirmed that a TiN film could be selectively formed on the side surfaces of the recesses of the wafer, even with a cycle count of, for example, 40 to 60 times.

[0079] W wafer 13a damaged film 10a silicon oxide film 14 protective film

Claims

1. A method for etching an oxide film, comprising: a step of forming a protective film of a metal or metal nitride not containing silicon so as to cover a protected film containing silicon and an oxide film containing silicon exposed on a surface of a substrate; a step of supplying a mixed gas containing hydrogen fluoride gas and ammonia gas to the substrate to react with the oxide film containing silicon, thereby altering the oxide film and generating a reaction product; and a step of sublimating and removing the reaction product.

2. The method for etching an oxide film according to claim 1, wherein the protective film constitutes the side surface of a recess formed in the surface of the substrate, and the oxide film constitutes the bottom surface of the recess.

3. The method for etching an oxide film according to claim 2, wherein the protective film is formed by chemical vapor deposition without using plasma.

4. The method for etching an oxide film according to claim 3, wherein in the step of forming the protective film by chemical vapor deposition, the steps of: supplying a source gas containing a source of the metal to the substrate; and then supplying a reaction gas that causes the metal to precipitate from the source gas or a reaction gas that nitrides the metal to the substrate are repeatedly performed.

5. The method for etching an oxide film according to claim 3, wherein the protective film is formed selectively over the film to be protected by providing a longer incubation time for the oxide film than for the film to be protected during formation by the chemical vapor deposition method.

6. The method for etching an oxide film according to claim 1, wherein the film to be protected is a silicon nitride film containing oxidized silicon.

7. The method for etching an oxide film according to claim 1, wherein the protective film comprises a metal selected from titanium, tungsten, or ruthenium.

8. The method for etching an oxide film according to claim 1, comprising the steps of: forming a contact metal film on the surface of the substrate after the step of sublimating and removing the reaction product; and forming a cap film so as to cover the contact metal film.

9. The method for etching an oxide film according to claim 8, further comprising the step of removing said protective film after the step of sublimating and removing said reaction product and before the step of forming a contact metal film.

10. A substrate processing apparatus for processing a substrate, comprising: a first processing module having a processing vessel with a mounting table on which the substrate is placed and a film formation gas supply unit for supplying a film formation gas to the processing vessel; a second processing module having a processing vessel with a mounting table on which the substrate is placed and a mixed gas supply unit configured to supply a mixed gas containing hydrogen fluoride gas and ammonia gas to the processing vessel; a third processing module having a processing vessel with a mounting table on which the substrate is placed and a sublimation processing unit for performing at least one of heating the substrate or decompressing and evacuating the processing vessel; and a control unit, the control unit is configured to output a control signal for executing a processing step of: supplying the film forming gas into the processing vessel of the first processing module while the substrate, having a silicon-containing protected film and a silicon-containing oxide film exposed on its surface, is placed on the placement stage of the first processing module, to form a protective film of a metal or metal nitride not containing silicon so as to cover the protected film; then, while the substrate is placed on the placement stage of the second processing module, supplying the mixed gas into the processing vessel of the second processing module to react with the silicon-containing oxide film and transform the oxide film to generate a reaction product; and, while the substrate is placed on the placement stage of the third processing module, sublimating the reaction product onto the substrate on which the reaction product has been generated by the sublimation processing unit, thereby removing the reaction product.

11. The substrate processing apparatus according to claim 10, wherein the protective film forms a side surface of a recess formed in the surface of the substrate, and the oxide film forms a bottom surface of the recess.

12. The substrate processing apparatus according to claim 11, wherein the film forming gas forms the protective film by a chemical vapor deposition method that does not use plasma.

13. The substrate processing apparatus of claim 12, wherein the film formation gas supply unit has a source gas supply unit for supplying a source gas containing a source of the metal, and a reactive gas supply unit for supplying a reactive gas for extruding the metal from the source to the substrate or for nitriding the metal, and the control unit is configured to output a control signal for repeatedly supplying the source gas and supplying the reactive gas to the substrate in the supply of the film formation gas.

14. The substrate processing apparatus of claim 12, wherein the film forming gas has a characteristic that the incubation time for the oxide film is longer than that for the protected film when formed by the chemical vapor deposition method, and the control unit is configured to output a control signal to stop the supply of the film forming gas after the protective film is formed on the protected film and before the protective film is formed on the oxide film, in order to selectively form the protective film on the protected film.

15. The substrate processing apparatus according to claim 10, wherein the film to be protected is a silicon nitride film containing oxidized silicon.

16. The substrate processing apparatus according to claim 10, wherein the protective film includes a metal selected from titanium, tungsten, or ruthenium.

17. A substrate processing apparatus as described in claim 10, comprising: a fourth processing module having a processing vessel equipped with a mounting table on which the substrate is placed, and a contact deposition gas supply unit that supplies a contact deposition gas to the processing vessel for forming a contact metal film in the processing vessel; and a fifth processing module having a processing vessel equipped with a mounting table on which the substrate is placed, and a cap film deposition gas supply unit that supplies a cap film deposition gas to the processing vessel for forming a cap film in the processing vessel, wherein the control unit is configured to output a control signal for executing, after a processing step of sublimating and removing the reaction product, a processing step of placing the substrate on the mounting table of the fourth processing module and supplying the contact deposition gas to the processing vessel to form a contact metal film on a surface of the substrate, and then a processing step of placing the substrate on the mounting table of the fifth processing module and supplying the cap film deposition gas to the processing vessel to form a cap film so as to cover the contact metal film.

18. The substrate processing apparatus according to claim 17, wherein the third processing module or the fourth processing module has a cleaning gas supply unit that supplies a cleaning gas for removing the protective film to the processing vessel, and the control unit is configured to output a control signal for executing a processing step of supplying the cleaning gas to the processing vessel and removing the protective film after the processing step of sublimating and removing the reaction product and before performing the processing step of forming the contact metal film.

19. The substrate processing apparatus according to claim 17, wherein the film forming gas and the cap film forming gas are a common gas, and the first processing module and the fifth processing module are provided as a common processing module.

20. A substrate processing apparatus as described in claim 17, comprising: a vacuum transfer chamber to which the processing containers of the first to fifth processing modules are connected; and a substrate transfer mechanism disposed within the vacuum transfer chamber, wherein the control unit is configured to output a control signal for executing a transfer step of transferring the substrate by the substrate transfer mechanism via the vacuum transfer chamber to any one of the processing containers of the first to fifth processing modules in which the processing step is performed.

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