Focusing ring and semiconductor process chamber

Abstract

A focusing ring (200) and a semiconductor process chamber. The focusing ring (200) comprises: a ring body (10), comprising a first inner annular surface (11) and a first outer annular surface (12) arranged opposite to each other, and a first top surface (13) and a bottom surface (14) respectively connected to the first inner annular surface (11) and the first outer annular surface (12) from the upper side and the lower side; an annular boss (20), provided on the first top surface (13) and coaxially arranged with the ring body (10), wherein the annular boss (20) comprises a second inner annular surface (21) and a second outer annular surface (22), and a second top surface (23) connected to the second inner annular surface (21) and the second outer annular surface (22) from the upper side, and the radius of the second inner annular surface (21) is greater than the radius of the first inner annular surface (11); and at least three positioning blocks (30), provided on the first top surface (13) and used for forming a positioning circle concentric with the ring body (10) on the inner sides of the at least three positioning blocks (30) to position a wafer (101), wherein the radius of the positioning circle is greater than the radius of the first inner annular surface (11) and less than the radius of the second inner annular surface (21). The influence of the edge of the focusing ring (200) on the etching rate of the edge of the wafer (101) can be reduced, thereby improving the uniformity of the overall etching rate of the wafer (101).

Description

Focusing ring and semiconductor process chamber Technical Field

[0001] The present application relates to the technical field of semiconductor manufacturing equipment, and in particular to a focusing ring and a semiconductor process chamber. Background Art

[0002] Plasma etching uses high-frequency glow discharge to ionize a reactive gas into a plasma. This plasma then chemically reacts with the material in the wafer area to be etched, forming volatile reactants, thereby achieving etching. During the etching process, a focusing ring is typically placed around the wafer to ensure a more uniform distribution of plasma across the entire wafer area. As semiconductor devices evolve toward smaller sizes, the number of transistors at the wafer edge increases, making it crucial to ensure uniform etching rates from the center to the edge of the wafer.

[0003] As shown in Figure 1, this is a schematic diagram of the assembly structure of an existing focusing ring when applied to a semiconductor process chamber. A suction cup 10a is provided in the semiconductor process chamber, and a focusing ring 20a is provided on the outside of the suction cup 10a. During the process, the wafer 101a is fixed on the suction cup 10a, and the inclined inner wall structure of the focusing ring 20a is used to guide the plasma to the wafer 101a to achieve the purpose of improving the uniformity of the edge etching rate of the wafer 101a. However, in actual processes, the semiconductor process chamber with this structure is still prone to poor uniformity of the edge etching rate of the wafer 101a during etching, that is, the effect of improving the uniformity of the edge etching rate is not good, which leads to the problem of uneven surface etching rate of the entire wafer 101a.

[0004] Summary of the Invention

[0005] In response to the above technical problems, the present application provides a focusing ring and a semiconductor process chamber, which can improve the problem of poor uniformity of the edge etching rate of the wafer during etching using the existing focusing ring, thereby leading to uneven surface etching rate of the entire wafer.

[0006] To solve the above technical problems, in a first aspect, an embodiment of the present application provides a focusing ring, comprising:

[0007] a ring body comprising a first inner annular surface and a first outer annular surface opposite to each other, and a first top surface and a bottom surface respectively connecting the first inner annular surface and the first outer annular surface from upper and lower sides;

[0008] an annular boss, disposed on the first top surface and coaxially disposed with the ring body; the annular boss includes a second inner annular surface and a second outer annular surface, and a second top surface connecting the second inner annular surface and the second outer annular surface from above; the radius of the second inner annular surface is greater than the radius of the first inner annular surface;

[0009] At least three positioning blocks are arranged on the first top surface, and are used to form a positioning circle concentric with the ring body on the inner side of at least three positioning blocks to position the wafer, and the radius of the positioning circle is larger than the radius of the first inner annular surface and smaller than the radius of the second inner annular surface.

[0010] In some embodiments, the difference between the radius of the second inner annular surface and the radius of the first inner annular surface is greater than or equal to 10 mm.

[0011] In some embodiments, the positioning blocks are evenly distributed along the circumference of the positioning circle.

[0012] In some embodiments, the second top surface comprises:

[0013] a horizontal surface connected to the second outer annular surface;

[0014] A first inclined surface is connected between the horizontal surface and the second inner annular surface.

[0015] In some embodiments, the focusing ring is made of ceramic material.

[0016] In some embodiments, the positioning block includes:

[0017] third top surface;

[0018] A positioning surface facing the center of the positioning circle;

[0019] A transition surface connects the third top surface and the positioning surface.

[0020] In some embodiments, the transition surface comprises:

[0021] second slope;

[0022] a first chamfer connecting the second inclined surface and the third top surface;

[0023] A second chamfer connects the second inclined surface and the positioning surface.

[0024] In some embodiments, an included angle between the second inclined surface and the first top surface is less than or equal to 65° and greater than or equal to 25°.

[0025] In a second aspect, embodiments of the present application provide a semiconductor process chamber, comprising a chuck and a focus ring as described in the above embodiments;

[0026] The suction cup includes a disc body and a cylindrical boss provided on the top surface of the disc body, wherein the cylindrical boss is used to support the wafer;

[0027] The ring body is sleeved on the outer side of the cylindrical boss and supported on the top surface of the disc body, and the first top surface is lower than the top surface of the cylindrical boss.

[0028] In some embodiments, a distance between the first top surface and a top surface of the cylindrical boss is less than or equal to 0.5 mm.

[0029] In some embodiments, the difference between the radius of the first inner annular surface and the radius of the cylindrical boss is greater than 0 and less than or equal to 0.5 mm.

[0030] As described above, the focus ring provided in the embodiment of the present application includes a ring body, an annular boss, and at least three positioning blocks. The positioning blocks are located on a positioning circle concentric with the ring body. The positioning circle is used to position the wafer. At the same time, the positioning blocks can also keep the second inner annular surface of the annular boss away from the edge of the wafer, thereby reducing the impact of the edge of the focus ring on the etching rate of the wafer edge. In addition, the positioning blocks and the wafer in the embodiment of the present application are in point contact, which can also effectively reduce the impact of the focus ring on the etching rate of the wafer edge, thereby improving the uniformity of the overall etching rate of the wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for describing the embodiments. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without inventive work.

[0032] FIG1 is a schematic diagram of the assembly structure of a conventional focus ring when applied to a semiconductor process chamber;

[0033] FIG2 is a schematic diagram of a partial structure of another focusing ring in the related art;

[0034] FIG3 is a schematic diagram of a three-dimensional structure of a focusing ring provided in an embodiment of the present application;

[0035] FIG4 is a schematic diagram of the main structure of the focus ring of FIG3;

[0036] FIG5 is a schematic cross-sectional view of the structure along line AA in FIG3 ;

[0037] FIG6 is a schematic diagram of a partially enlarged structure of a focusing ring provided in an embodiment of the present application;

[0038] FIG7 is a schematic structural diagram of a semiconductor process chamber provided in an embodiment of the present application.

[0039] The purpose of this application, its features, and advantages will be further described in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and the accompanying text are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of this application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION

[0040] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0041] It should be noted that, in this document, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0042] It should be further understood that the terms "comprising" and "including" indicate the presence of the described features, steps, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms "or", "and / or", "including at least one of the following", etc. used in this application may be interpreted as inclusive, or mean any one or any combination. For example, "including at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C", and for another example, "A, B or C" or "A, B and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C". Exceptions to this definition will only occur when the combination of elements, functions, steps or operations is inherently mutually exclusive in some way.

[0043] It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are merely used to distinguish information of the same type from one another. For example, first information could also be referred to as second information, and similarly, second information could also be referred to as first information without departing from the scope of this document. Depending on the context, as used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context indicates otherwise.

[0044] It should be understood that the terms "top", "bottom", "up", "down", "vertical", "horizontal", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0045] For ease of description, the following embodiments are all described using the orthogonal space formed by the horizontal plane and the vertical direction as an example. This premise should not be understood as a limitation to the present application.

[0046] The calculation method of wafer etching rate uniformity is: wafer etching rate uniformity = (maximum rate - minimum rate) / (2×average rate). The inventors have found that in the semiconductor process chamber with existing structure, the edge etching rate uniformity of wafer 101a is prone to poor during etching, resulting in uneven surface etching rate of the entire wafer 101a. This problem is mainly caused by the entire inner ring edge of the focusing ring 20a being too close to the edge of the wafer 101a, which reduces the etching rate of the edge of the wafer 101a.

[0047] To improve the above-mentioned issues, please refer to Figure 2, which is a partial schematic diagram of another focus ring from the related art. This focus ring 20b includes: a first portion 21b surrounding the wafer, made of a silicon-containing material; a second portion 22b surrounding the first portion 21b, made of an yttrium-containing material; and a third portion 23b connecting the first and second portions 21b, 22b. The top surfaces 21b1 of the first and second portions 22b are both parallel to the horizontal plane, and the top surface 21b1 of the first and second portions 22b is lower than the top surface 22b1 of the second portion 22b. Furthermore, the top surfaces 21b1 and 22b1 of the first and second portions 21b are connected by a transition bevel 23b at the top of the third portion 23b, which is provided with a SiC coating 24b. This improved solution improves the uniformity of the wafer edge etch rate by making the top of the focus ring 20b of the focus ring 20b different in radial direction. However, this structure is made of a composite of multiple materials, which makes processing difficult and costly, and it does not have the function of positioning the wafer. If there is a deviation in the position of the wafer, it will affect the uniformity of the overall etching rate to a certain extent.

[0048] Based on this, the present application provides a focusing ring and a semiconductor process chamber.

[0049] Please refer to Figures 3 to 5. Figure 3 is a schematic diagram of the three-dimensional structure of a focusing ring provided in an embodiment of the present application, Figure 4 is a schematic diagram of the main view structure of the focusing ring in Figure 3, and Figure 5 is a schematic diagram of the cross-sectional structure along line AA in Figure 3. The focusing ring 200 includes a ring body 10, an annular boss 20 and at least three positioning blocks 30.

[0050] Referring to Figure 5 , the ring body 10 includes a first inner annular surface 11 and a first outer annular surface 12 disposed opposite each other, as well as a first top surface 13 and a bottom surface 14 connecting the first inner annular surface 11 and the first outer annular surface 12 from above and below, respectively. An annular boss 20 is disposed on the first top surface 13 and is coaxial with the ring body 10. The annular boss 20 includes a second inner annular surface 21 and a second outer annular surface 22, and a second top surface 23 connecting the second inner annular surface 21 and the second outer annular surface 22 from above. The radius of the second inner annular surface 21 is greater than that of the first inner annular surface 11. It should be noted that the ring body 10 and the annular boss 20 can be integrally formed. For example, the entire focus ring 200 can be made of ceramic material and sintered integrally, but the material used for the focus ring 200 is not limited to this. Examples of the ceramic material include Al2O3 ceramic, quartz, and the like. The second inner annular surface 21 of the annular boss 20 is flared outward relative to the first inner annular surface 11 of the ring body 10, forming a stepped surface on the inner side of the focus ring 200. The second outer annular surface 22 of the annular boss 20 may be flush with the first outer annular surface 12 of the ring body 10, or may not be flush. In addition, the second outer annular surface 22, the second top surface 23, the bottom surface 14 and the first outer annular surface 12 of the annular boss 20 may be irregular planes such as planes, inclined surfaces or step surfaces, which are not particularly limited in the embodiments of the present application.

[0051] Referring to Fig. 4 and Fig. 5, at least three positioning blocks 30 (12 are provided in the figure) are all arranged on the first top surface 13 of the ring body 10, for forming a positioning circle C concentric with the ring body 10 in the inner side of at least three positioning blocks 30, and this inner side refers to the center side of the three positioning blocks 30 near the ring body 10. The radius of positioning circle C is greater than the radius of the first inner annular surface 11, and less than the radius of the second inner annular surface 21. It should be noted that positioning circle C is used to locate the wafer, and therefore, the radius of positioning circle C is slightly larger than the radius of the wafer. In certain embodiments, at least three positioning blocks 30 are connected in sequence near one end of the center of the ring body 10 to form a polygon, and the center of the circle of positioning circle C is located at the inside of the polygon, and positioning circle C is, for example, the circumscribed circle of the polygon. For example, when positioning blocks 30 are only provided with three, then the three vertex angles of the triangle formed by the one end of the center of the three positioning blocks 30 being connected in sequence near the ring body 10 are all acute angles, so that the center of the circle of positioning circle C can be located inside the triangle, thereby avoiding that the three positioning blocks 30 are too densely arranged and wafer can not be positioned from three directions. Similarly, when four positioning blocks 30 are provided, the center of the positioning circle C can be located inside the quadrilateral formed by sequentially connecting the ends of the four positioning blocks 30 close to the center of the ring body 10. Preferably, all positioning blocks 30 are evenly distributed along the circumference of the positioning circle C.

[0052] The conventional focus ring shown in FIG1 is in surface contact with the wafer. The wafer edge etch rate is not only significantly affected by the focus ring, but also because the focus ring is close to the wafer and relatively high, it can easily cause eddy currents above the wafer edge. This also makes it difficult for plasma to enter the gap between the focus ring and the wafer. These two factors significantly reduce the wafer edge etch rate. The focus ring 200 of this embodiment employs positioning blocks 30 to form a positioning circle C to position the wafer. Positioning blocks 30 also position the wafer inside the positioning blocks, further positioning the second inner annular surface 21 of the annular boss 20 away from the wafer edge. This reduces the impact of the focus ring 200 edge on the wafer edge etch rate. Furthermore, the positioning blocks 30 of this embodiment are in point contact with the wafer, which effectively reduces the impact of the focus ring 200 on the wafer edge etch rate, thereby improving the uniformity of the overall wafer etch rate. In addition, this embodiment improves the structure of the focusing ring 200. The focusing ring 200 can be made of the same material, such as Al2O3 or quartz and other ceramic materials. Compared with the improved solution of Figure 2, the focusing ring 200 of this embodiment has a mature manufacturing process and lower cost.

[0053] In one embodiment, the difference between the radius of the second inner annular surface 21 of the annular boss 20 and the radius of the first inner annular surface 11 of the ring body 10 is greater than or equal to 10 mm. That is, the second inner annular surface 21 is more than 10 mm larger than the first inner annular surface 11 on one side. Comparing electric field simulation results and process results for different sizes shows that under these conditions, the impact of the edge of the focus ring 200 on the wafer edge etch rate can be effectively reduced, thereby effectively improving the uniformity of the wafer edge etch rate.

[0054] In one embodiment, please continue to refer to Figure 5. The second top surface 23 of the annular boss 20 may include a horizontal surface 231 and a first inclined surface 232. The horizontal surface 231 is connected to the second outer annular surface 22, and the first inclined surface 232 is connected between the horizontal surface 231 and the second inner annular surface 21. The first inclined surface 232 can also be transitionally connected to the horizontal surface 231 and the second inner annular surface 21 through a rounded corner. In this embodiment, the first inclined surface 232 serves as a transition surface between the horizontal surface 231 and the second inner annular surface 21, and can achieve a smooth transition between the horizontal surface 231 and the second inner annular surface 21, thereby effectively adjusting the electric field, controlling the distribution of plasma, and improving the uniformity of the plasma distributed at the edge of the wafer, thereby improving the uniformity of the edge etching rate.

[0055] In one embodiment, please refer to Figure 6, which is a schematic diagram of a partially enlarged structure of a focusing ring provided in an embodiment of the present application. The positioning block 30 may include a third top surface 31, a positioning surface 32 and a transition surface 33. The positioning surface 32 faces the center of the positioning circle C, and the positioning surface 32 may be a vertical surface. The transition surface 33 connects the third top surface 31 and the positioning surface 32, and the transition surface 33 may be an inclined surface. The transition surface 33 can fine-tune the position of the wafer. For example, when the wafer deviates from the center of the positioning circle C when falling, it can slide along the transition surface 33 to the area where the positioning circle C is located.

[0056] In one embodiment, the transition surface 33 may include a second bevel 331, a first chamfer 332, and a second chamfer 333. The first chamfer 332 connects the second bevel 331 and the third top surface 31, and the second chamfer 333 connects the second bevel 331 and the positioning surface 32. That is, the second bevel 331 can be transitionally connected to the third top surface 31 through the first chamfer 332, and transitionally connected to the positioning surface 32 through the second chamfer 333, which can prevent the wafer from being scratched by sharp corners during the falling process. For example, the angle between the second bevel 331 and the first top surface 13 can be less than or equal to 65° and greater than or equal to 25° to ensure that the wafer can smoothly slide into the positioning circle C when it deviates from the center of the positioning circle C.

[0057] An embodiment of the present application also provides a semiconductor process chamber. Please refer to Figure 7. Figure 7 is a structural schematic diagram of a semiconductor process chamber provided by an embodiment of the present application. The semiconductor process chamber includes a suction cup 100 and a focusing ring 200 as described in the above embodiments, wherein the chamber body of the semiconductor process chamber is not drawn.

[0058] The suction cup 100 includes a disk body 110 and a cylindrical boss 120 disposed on the top surface of the disk body 110. The cylindrical boss 120 is used to support the wafer 101. The ring body 10 of the focus ring 200 is sleeved on the outside of the cylindrical boss 120 and supported on the top surface of the disk body 110. The first top surface 13 of the ring body 10 is lower than the top surface of the cylindrical boss 120. Specifically, the diameter of the wafer 101 is larger than the diameter of the cylindrical boss 120. The edge of the wafer 101 extends beyond the cylindrical boss 120 and is suspended above the first top surface 13 of the ring body 10. The at least three positioning blocks 30 of the focus ring 200 form a positioning circle C on their inner sides to position the wafer 101.

[0059] As an example, the distance between the first top surface 13 of the ring body 10 of the focusing ring 200 and the top surface of the cylindrical boss 120 is less than or equal to 0.5 mm, that is, the height of the top surface of the cylindrical boss 120 higher than the first top surface 13 of the ring body 10 is no more than 0.5 mm, so as to ensure that the edge portion of the wafer 101 is suspended above the ring body 10, and the gap between the two is not too large, so as not to affect the plasma density at the edge of the wafer 101 and reduce the etching rate of the edge area of ​​the wafer 101.

[0060] In order to facilitate the installation and matching accuracy of the ring body 10 and the cylindrical boss 120, as an example, the difference between the radius of the first inner annular surface 11 of the ring body 10 and the radius of the cylindrical boss 120 is greater than 0 and less than or equal to 0.5 mm, and there is a clearance fit between the two, and the clearance is less than or equal to 0.5 mm.

[0061] For other working principles of the semiconductor process chamber of this embodiment, please refer to the description of the focusing ring in the aforementioned embodiment of this application, which will not be repeated here.

[0062] The above describes in detail a focus ring and semiconductor process chamber provided by this application. This article uses specific examples to illustrate the principles and implementation methods of this application. It should be noted that the descriptions of each embodiment in this application have their own emphases. For portions not detailed or documented in one embodiment, reference can be made to the relevant descriptions of other embodiments.

[0063] The various technical features of the technical solution of this application can be combined arbitrarily. In order to make the description concise, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

Claims

1. A focusing ring, characterized in that: include: A ring body, comprising a first inner ring surface and a first outer ring surface arranged opposite to each other, and a first top surface and a bottom surface respectively connecting the first inner ring surface and the first outer ring surface from upper and lower sides; an annular boss, arranged on the first top surface and coaxially arranged with the ring body; the annular boss comprises a second inner annular surface and a second outer annular surface, and a second top surface connecting the second inner annular surface and the second outer annular surface from above; the radius of the second inner annular surface is greater than the radius of the first inner annular surface; At least three positioning blocks are arranged on the first top surface, and are used to form a positioning circle concentric with the ring body inside the at least three positioning blocks to position the wafer, and the radius of the positioning circle is larger than the radius of the first inner annular surface and smaller than the radius of the second inner annular surface.

2. The focusing ring according to claim 1, characterized in that: The difference between the radius of the second inner annular surface and the radius of the first inner annular surface is greater than or equal to 10 mm.

3. The focusing ring according to claim 1, characterized in that: The positioning blocks are evenly distributed along the circumference of the positioning circle.

4. The focusing ring according to claim 1, characterized in that: The second top surface comprises: a horizontal plane connected to the second outer annular surface; A first inclined surface is connected between the horizontal surface and the second inner annular surface.

5. The focusing ring according to claim 1, characterized in that: The focusing ring is made of ceramic material.

6. The focusing ring according to any one of claims 1 to 5, characterized in that: The positioning block comprises: The third top surface; A positioning surface facing the center of the positioning circle; A transition surface connects the third top surface and the positioning surface.

7. The focusing ring according to claim 6, characterized in that: The transition surface comprises: second slope; a first chamfer connecting the second inclined surface and the third top surface; A second chamfer connects the second inclined surface and the positioning surface.

8. The focusing ring according to claim 7, characterized in that: An included angle between the second inclined surface and the first top surface is less than or equal to 65° and greater than or equal to 25°.

9. A semiconductor process chamber, characterized in that: comprising a suction cup, and a focusing ring as claimed in any one of claims 1 to 8; The suction cup includes a disc body and a cylindrical boss arranged on the top surface of the disc body, and the cylindrical boss is used to carry the wafer; The ring body is sleeved on the outer side of the cylindrical boss and supported on the top surface of the disc body, and the first top surface is lower than the top surface of the cylindrical boss.

10. The semiconductor process chamber according to claim 9, characterized in that: The distance between the first top surface and the top surface of the cylindrical boss is less than or equal to 0.5 mm.

11. The semiconductor process chamber according to claim 9, characterized in that: The difference between the radius of the first inner annular surface and the radius of the cylindrical boss is greater than 0 and less than or equal to 0.5 mm.

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