Method for manufacturing silicon carbide semiconductor device

Abstract

According to the present invention, an n-type SiC (10, 20) which is used for the formation of an n-type silicon carbide substrate that is doped with an n-type impurity is prepared. Next, the emission spectrum intensity due to the level that is formed in the vicinity of the mid-gap of the SiC by the p-type impurities mixed in the n-type SiC is measured by the emission spectrum measurement on the basis of excitation. Subsequently, the light emission spectrum intensity is compared with a reference value that is set on the basis of the emission spectrum intensity corresponding to the mid-gap, and quality determination is performed so as to determine whether or not the n-type SiC is an acceptable article.

Description

Method for manufacturing silicon carbide semiconductor device CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on Japanese Patent Application No. 2023-120241, filed on July 24, 2023, the contents of which are incorporated herein by reference.

[0002] The present disclosure relates to a method for manufacturing a silicon carbide (hereinafter referred to as SiC) semiconductor device, which manages SiC ingots, SiC substrates, etc. used in the manufacture of SiC semiconductor devices, and extracts those suitable for manufacturing SiC semiconductor devices with desired characteristics.

[0003] Conventionally, Patent Document 1 discloses a method for evaluating the dislocation density of a SiC substrate using a photoluminescence (PL) method, which is a non-destructive inspection method.

[0004] Japanese Patent Application Laid-Open No. 2021-88469

[0005] In an n-type SiC substrate in which SiC is doped with a high concentration of n-type impurities such as N (nitrogen), if the amount of p-type impurity elements other than the n-type impurities increases, the amount of warpage of the SiC substrate after ion implantation increases. On the other hand, the p-type impurities in the SiC substrate improve the diode current degradation characteristics of devices formed on the SiC substrate. For this reason, it is important to establish a method for controlling the p-type impurity concentration in n-type SiC. By accurately controlling the p-type impurity concentration, it is possible to control the amount of warpage of the SiC substrate while improving the diode current degradation characteristics, making it possible to manufacture highly reliable SiC semiconductor devices.

[0006] However, although a technique for evaluating dislocation density by non-destructive testing, such as in Patent Document 1, has been proposed, there is no technology for evaluating and managing p-type impurity concentration by non-destructive testing. Until now, p-type impurity concentration has been measured by destructive testing such as SIMS (Secondary Ion Mass Spectrometry) analysis, which has been time-consuming and costly in the manufacture of SiC wafers for use as SiC substrates. Furthermore, destructive testing reduces the number of tests, making it difficult to perform, for example, 100% inspection, making it difficult to manufacture highly reliable SiC semiconductor devices. The present disclosure aims to manage the p-type impurity concentration of SiC ingots or SiC wafers, etc., made of n-type SiC by non-destructive testing, thereby enabling the manufacture of highly reliable SiC semiconductor devices.

[0007] One aspect of the present disclosure is a method for manufacturing a SiC semiconductor device, comprising: preparing n-type SiC to be used for forming an n-type SiC substrate doped with n-type impurities; measuring an emission spectrum intensity due to a level formed near the midgap of SiC by p-type impurities mixed in the n-type SiC through excitation-based emission spectrum measurement; and comparing the emission spectrum intensity with a reference value set based on the emission spectrum intensity corresponding to the midgap, and performing a quality judgment to determine whether the n-type SiC is a standard product.

[0008] In this way, the emission spectrum intensity due to excitation in n-type SiC, such as a SiC ingot or SiC wafer, used to form the n-type SiC substrate is compared with a reference value. This makes it possible to control the p-type impurity concentration in SiC by non-destructive testing. Furthermore, since the p-type impurity concentration can be controlled by non-destructive testing, the number of tests can be increased compared to destructive testing, and for example, 100% testing can be performed, making it possible to manufacture highly reliable SiC semiconductor devices.

[0009] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below.

[0010] FIG. 1 is a diagram showing a manufacturing process of an n-type SiC substrate made of SiC described in the first embodiment. FIG. 2 is a diagram showing a change in the PL spectrum intensity ratio with respect to the wavelength of PL light. FIG. 3 is a diagram showing the relationship between the p-type impurity concentration and the PL spectrum intensity at a wavelength of around 520 nm. FIG. 4 is a flowchart of an inspection process for determining whether wafers can be made. FIG. 5 is a diagram showing a schematic configuration of an inspection device. FIG. 6 is a flowchart of a shipping inspection process. FIG. 7 is a flowchart of a wafer acceptance inspection process.

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following, including other embodiments described below, identical or equivalent parts will be denoted by the same reference numerals.

[0012] First Embodiment A method for manufacturing a SiC semiconductor device according to a first embodiment will be described. The SiC semiconductor device is manufactured, for example, in the following order.

[0013] First, a SiC ingot 10 composed of a SiC single crystal, as shown in State 1 in FIG. 1 , is grown in a growth crucible by sublimation or gas growth. At this time, an n-type impurity, such as N, is introduced into the SiC raw material to produce a SiC ingot 10 for forming an n-type SiC substrate, in which the SiC is highly doped with the n-type impurity. Next, the grown SiC ingot 10 is removed from the growth crucible, and the unnecessary portion outside the dashed line in the figure is removed. This results in a cylindrical SiC ingot 10, as shown in State 2. The SiC ingot 10 is then sliced ​​with a slicer and ground to produce SiC wafers 20 for forming n-type SiC substrates, as shown in State 3. Subsequently, a surface-polished SiC wafer 20, as shown in State 4, is produced by lapping, and then further CMP (chemical mechanical polishing) is performed to produce a SiC wafer 20 with a higher surface flatness than that achieved by lapping, as shown in State 5. When using this SiC wafer 20 to form elements such as MOSFETs, an epitaxial film 30 is formed on the surface of the SiC wafer 20 as shown in State 6, and various semiconductor processes such as ion implantation are performed to form the elements. For example, an n-type channel vertical MOSFET is formed as the element. After that, the SiC wafer 20 is divided into chips by dicing, and an SiC semiconductor device is completed in which elements are formed on n-type SiC substrates obtained by dividing the SiC wafer 20 into chip units.

[0014] At some stage in the manufacturing method of this SiC semiconductor device, the p-type impurity concentration is measured by non-destructive testing, and if the desired standard is not met, the material is excluded from the manufacturing of the SiC semiconductor device, and only those materials that meet the standard are used in the manufacturing of the SiC semiconductor device.

[0015] Here, in an n-type SiC substrate in which SiC is heavily doped with n-type impurities such as N, increasing the amount of p-type impurity elements other than the n-type impurities increases the amount of warping of the SiC substrate after ion implantation. Examples of p-type impurities include aluminum (Al), boron (B), titanium (Ti), and vanadium (V). On the other hand, it has been confirmed that the p-type impurity concentration of an n-type SiC substrate improves the diode current degradation characteristics of devices formed on the SiC substrate. In other words, an increase in on-resistance can be suppressed even when forward current is applied to the built-in diode. For this reason, it is important to establish a method for controlling the p-type impurity concentration of an n-type SiC substrate. Accurate control of the p-type impurity concentration enables the manufacture of highly reliable SiC semiconductor devices.

[0016] However, if the p-type impurity concentration is evaluated and controlled by destructive testing, the number of tests will be reduced, and for example, 100% testing cannot be performed, making it impossible to manufacture highly reliable SiC semiconductor devices.

[0017] Therefore, the present inventors have investigated the evaluation and management of the p-type impurity concentration by non-destructive testing using the PL method.

[0018] Conventionally, there is a technique for evaluating the dislocation density of a SiC substrate by non-destructive testing using the PL method, but the PL method has not been used to evaluate or control the p-type impurity concentration.

[0019] This is because the PL spectrum intensity due to excitation when the SiC substrate is irradiated with PL light is composed of a superposition of the levels due to the dopants in the SiC substrate and the emission intensity that depends on the amount of the dopant. In other words, evaluation using the PL method, in other words, PL spectrum evaluation, cannot accurately separate and evaluate the amount of dopant for each element.

[0020] However, hole absorption, which affects the degradation of built-in diodes in SiC semiconductor devices, is strongly dependent on the level near the midgap in the SiC transition band. Therefore, the amount of levels formed by p-type impurities near the midgap of SiC can be evaluated using PL spectra. Using this principle, it is possible to evaluate and manage the concentration of p-type impurities in n-type SiC substrates.

[0021] The built-in diode here refers to a diode formed by a PN junction in an element formed in a SiC semiconductor device. For example, when an n-type MOSFET is formed as an element, the built-in diode is formed at the PN junction between the n-type drift layer and the p-type base layer. Furthermore, the midgap refers to the energy between the minimum energy of the conduction band and the maximum energy of the valence band, which constitute the energy gap. Furthermore, the composition ratio of p-type impurity elements in the SiC ingot 10 or the SiC wafer 20 is proportional to the composition ratio of the SiC raw material used for crystal growth. In the case of the sublimation method, p-type impurities are contained depending on the degree of refinement of the Si raw material and C raw material powder used as the SiC raw material, and the composition ratio of the SiC raw material is determined by the content of the p-type impurities. Regarding the composition ratio of the SiC raw material, since the SiC raw material used is determined to some extent by each substrate manufacturer, the composition ratio of p-type impurity elements in the SiC ingot 10 or the SiC wafer 20 tends to be similar for each substrate manufacturer. Of course, even if the manufacturer is the same, if the composition ratio of the SiC raw material used in crystal growth changes, the composition ratio of the p-type impurity elements in the SiC ingot 10 or the SiC wafer 20 will also change.

[0022] Specifically, SiC wafers 20 manufactured by multiple substrate manufacturers were prepared, and the SiC wafers 20 were irradiated with PL light having an energy of 350 nm wavelength to evaluate the change in the PL spectrum intensity ratio with respect to the PL light wavelength. Figure 2 shows the results.

[0023] The PL spectrum intensity may be expressed as different values ​​even for the same p-type impurity concentration due to influences such as changes in the intensity of the PL light source. Meanwhile, a peak occurs in the PL spectrum intensity in the wavelength range of 380±5 nm, which corresponds to the bandgap energy of SiC. It has been confirmed that this peak intensity would be the same regardless of the p-type impurity concentration if there were no changes in the intensity of the PL light source. Therefore, the PL spectrum intensity at each wavelength is normalized using the PL spectrum peak intensity in the 380±5 nm wavelength range as a reference to obtain the PL spectrum intensity ratio. In other words, the PL spectrum peak intensity generated in the 380±5 nm frequency band of each SiC wafer 20 is adjusted to the same height, and the height of the PL spectrum intensity at other frequencies is adjusted by multiplying the height adjustment rate. This adjusted value is the PL spectrum intensity ratio based on the PL spectrum peak intensity generated in the 380±5 nm frequency band.

[0024] By using such a PL spectrum intensity ratio, any changes in the intensity of the PL light source can be canceled out. The PL spectrum intensity ratio peak occurs at approximately 380 nm, but the wavelength may vary slightly. For this reason, the PL spectrum intensity ratio peak in the 380±5 nm frequency band is used as the reference.

[0025] As shown in this figure, six SiC wafers 20 (samples 1 to 6) were prepared, and the change in PL spectrum intensity versus PL light wavelength was examined for each SiC wafer 20. The results showed different characteristics. When PL light with an energy of 350 nm was irradiated, the wavelength that is thought to have a particular impact on the current degradation characteristics of the built-in diode was approximately 520 nm. When PL light with an energy of 350 nm was incident, if no p-type impurities or other impurities were present, reflected light with the same wavelength of 350 nm would be returned. However, if a level based on p-type impurities were present, the PL light would be absorbed, its energy would be converted, and the wavelength would shift. As a result, reflected light with a low energy wavelength of approximately 520 nm would be returned, and the PL spectrum intensity ratio would peak in the wavelength band of approximately 520 nm, as indicated by region R1 in the figure.

[0026] The total p-type impurity concentration of Al, B, Ti, and V was measured by SIMS analysis using destructive testing for Samples 1 to 5, and the relationship between the measurement results and the PL spectrum intensity at a wavelength of around 520 nm was investigated. The results shown in Figure 3 were obtained.

[0027] As shown in Figure 3, it can be seen that there is a correlation between the p-type impurity concentration and the PL spectrum intensity near a wavelength of 520 nm. Therefore, by comparing the PL spectrum intensity ratio when irradiated with PL light with a reference value of the PL spectrum corresponding to the midgap, it is possible to determine whether the SiC substrate has the desired p-type impurity concentration. For example, the higher the p-type impurity concentration, the greater the normalized PL spectrum intensity ratio near a wavelength of 520 nm. Therefore, if the PL spectrum intensity ratio falls within the reference value range, it can be determined that the substrate is suitable for manufacturing a highly reliable SiC semiconductor device. Conversely, if the PL spectrum intensity ratio does not fall within the reference value range, it can be determined that the substrate is not suitable for manufacturing a highly reliable SiC semiconductor device.

[0028] The reference value here is set based on the required specifications of the SiC semiconductor device. As described above, an increase in the p-type impurity concentration increases the amount of warpage of the SiC substrate, but the presence of p-type impurities improves the diode conduction degradation characteristics. Therefore, for example, a lower threshold value that satisfies the diode conduction degradation characteristics and an upper threshold value that satisfies the amount of warpage of the SiC substrate being below an allowable value are set, and the reference value is set within the range from the lower threshold value to the upper threshold value. Then, if the PL spectrum intensity ratio is the reference value, the object on which the PL spectrum intensity ratio was measured can be determined as a reference product. Furthermore, if the diode conduction degradation characteristics are not considered important, the above-mentioned upper threshold value can be set as the reference value, and if the PL spectrum intensity ratio is below the reference value, the object can be determined as a reference product that can keep the amount of warpage of the SiC substrate below an allowable value.

[0029] In this way, the PL spectrum intensity ratio obtained when PL light is irradiated onto n-type SiC used to form an n-type SiC substrate, specifically, an SiC ingot 10 or an SiC wafer 20, is compared with a reference value. This makes it possible to control the p-type impurity concentration in SiC by non-destructive testing. Furthermore, since the p-type impurity concentration can be controlled by non-destructive testing, the number of tests can be increased compared to destructive testing, and for example, 100% testing can be performed, making it possible to manufacture highly reliable SiC semiconductor devices.

[0030] PL spectrum measurements can be performed at room temperature (21–27°C) in a clean room used in semiconductor manufacturing. It has been confirmed that low-temperature PL spectrum evaluation allows for the isolation and evaluation of dopant-related levels. However, the inspection device 40, including the measurement target, must be kept at a low temperature, which increases the measurement time and requires additional low-temperature equipment. On the other hand, room-temperature evaluation does not allow for the isolation and evaluation of dopant-related levels, but it does facilitate the evaluation of levels near the midgap caused by p-type impurities, which have a significant impact on diode degradation characteristics. Furthermore, at temperatures higher than room temperature, the PL spectrum broadens, making evaluation difficult. For this reason, room-temperature evaluation is preferred, as it allows for the control of p-type impurity concentration in a shorter time and with simpler equipment than low-temperature evaluation.

[0031] Next, an example of controlling the p-type impurity concentration in the SiC ingot 10 and the SiC wafer 20 will be described.

[0032] Example 1 A wafer-making feasibility inspection step for controlling the p-type impurity concentration of SiC ingot 10 before wafering will be described with reference to the flowchart of the wafer-making feasibility inspection step shown in FIG.

[0033] First, as shown in step S100, an n-type SiC ingot 10 is prepared by growing an n-type SiC single crystal. For example, a sublimation crystal growth apparatus (not shown) is prepared, and a SiC raw material powder is placed in a growth crucible provided in the crystal growth apparatus. Next, the SiC raw material is heated and sublimated by induction heating or the like, and N, which serves as an n-type impurity, is introduced, thereby growing an n-type SiC single crystal on the surface of a seed crystal (not shown) placed in the crucible, thereby obtaining a SiC ingot 10 as shown in State 1 of FIG. 1 . The grown SiC ingot 10 is then removed from the graphite crucible, and unnecessary portions are removed to obtain a cylindrical SiC ingot 10 as shown in State 2 of FIG. 1 .

[0034] Then, the processes from step S110 onwards are carried out. The processes from step S110 onwards are carried out by the inspection device 40 shown in Fig. 5. The inspection device 40 has a PL inspection unit 41 that irradiates the inspection object with PL light 40b from a PL light source 40a and receives reflected light 40c with a light receiving unit 40d to measure the PL spectrum intensity, and a control unit 42 that inputs the inspection results from the PL inspection unit 41 and performs various calculations.

[0035] In step S110, the PL spectrum of SiC ingot 10 is measured by PL inspection unit 41, and the measurement results are stored in control unit 42. For example, PL spectrum intensity can be measured by irradiating both end faces and side faces of cylindrical SiC ingot 10 relative to the central axis with PL light having energy of 350 nm wavelength.

[0036] Then, the process proceeds to step S120, where the control unit 42 normalizes the PL spectrum intensity ratio measured in step S110, and determines whether the p-type impurity concentration is good or bad based on the normalized PL spectrum intensity ratio in the vicinity of a wavelength of 520 nm.

[0037] For example, the peak of the PL spectrum intensity ratio occurring in the frequency band of 380±5 nm is normalized in advance through experiments, etc. Furthermore, reference values ​​for pass / fail judgment, such as the above-mentioned lower and upper thresholds, are set in advance through experiments, etc. Furthermore, the height of the peak in the frequency band of 380±5 nm in the PL spectrum intensity measured in step S110 is adjusted to the normalized peak intensity, thereby adjusting the PL spectrum intensity ratio at other frequencies. The adjusted PL spectrum intensity ratio near a wavelength of 520 nm is then compared with the reference value. If the PL spectrum intensity ratio falls within the range between the lower and upper thresholds set as reference values, the product is determined to be a reference product and the process proceeds to step S130; if it is outside the range, the process proceeds to step S140.

[0038] If the determination in step S120 is affirmative, the SiC ingot 10 being measured is a standard product, so the process proceeds to step S130, where it is advanced to the wafering process, and the wafering feasibility inspection process is terminated. If the determination in step S110 is negative, the SiC ingot 10 being measured is a non-standard product, so it is discarded as a non-standard product in step S140. That is, the SiC ingot 10 being measured is discarded, and the non-standard SiC ingot 10 is prevented from proceeding to the subsequent wafering process.

[0039] Therefore, only the reference SiC ingot 10 is transferred to the wafering process for producing the SiC wafers 20, and the SiC wafers 20 are produced only from the reference SiC ingot 10. This makes it possible to obtain the reference SiC wafers 20, and since SiC semiconductor devices can be manufactured using the reference SiC wafers 20, highly reliable SiC semiconductor devices can be obtained. Furthermore, since non-reference products can be eliminated at the SiC ingot 10 stage in this way, it is possible to reduce manufacturing costs.

[0040] Example 2 A shipping inspection process for controlling the p-type impurity concentration of the SiC wafer 20 during the wafering process for producing the n-type SiC wafer 20 will be described with reference to the flowchart of the shipping inspection process shown in FIG.

[0041] First, as shown in step S200, a SiC single crystal is grown, and then an unnecessary portion is removed to obtain a cylindrical n-type SiC ingot 10. This process is performed in the same manner as step S100 in Fig. 4. In the subsequent step S210, the SiC ingot 10 is sliced ​​to a desired thickness and the surface is ground to prepare an n-type SiC wafer 20 shown in State 3 in Fig. 1.

[0042] Then, the process proceeds to step S220, where PL spectrum measurement is performed on the sliced ​​SiC wafer 20. The PL spectrum measurement may be performed on either the front or back surface of the SiC wafer 20. The PL spectrum measurement at this time is similar to step S110 in FIG. 4 , where the PL spectrum measurement of the SiC wafer 20 is performed by the PL inspection unit 41, and the result is stored in the control unit 42.

[0043] Next, the process proceeds to step S230, where the SiC wafer 20 is subjected to lapping. This results in a SiC wafer 20 with its surface polished as shown in state 4 in FIG. 1 . The process then proceeds to step S240, where the PL spectrum of the lapped SiC wafer 20 is measured. Here, too, the PL spectrum may be measured on either the front or back surface of the SiC wafer 20. The PL spectrum measurement at this time is similar to that of step S220.

[0044] Next, the process proceeds to step S250, where CMP is performed on the SiC wafer 20. This allows the SiC wafer 20 to be polished to a higher degree of flatness than the lapping process shown in state 5 in FIG. 1 . Then, the process proceeds to step S260, where PL spectrum measurement is performed on the SiC wafer 20 after CMP. Here, too, the PL spectrum measurement may be performed on either the front or back surface of the SiC wafer 20. The PL spectrum measurement at this time is similar to that of step S220.

[0045] The process then proceeds to step S270. The control unit 42 then normalizes the PL spectrum intensity ratios measured in steps S220, S240, and S260, and determines whether the p-type impurity concentration is acceptable or not based on the normalized PL spectrum intensity ratios at a wavelength near 520 nm. The normalization and pass / fail determination methods are the same as those in step S120 of FIG. 4 . However, because three PL spectrum intensity ratios are obtained in steps S220, S240, and S260, the determination may be based on only one of these values, or on multiple values. When determining whether the p-type impurity concentration is acceptable or not, a negative determination may be made if any one of the values ​​does not meet the non-standard product criteria, or a negative determination may be made if multiple determinations that the p-type impurity concentration does not meet the non-standard product criteria are made.

[0046] If a positive determination is made in step S270, the process proceeds to step S280; if a negative determination is made, the process proceeds to step S290. If a positive determination is made in step S270, the SiC wafer 20 to be measured is a reference product, and therefore, in step S280, the wafer is advanced to the epitaxial film formation process that is performed before the device fabrication process, thereby completing the shipping inspection process for wafers. If a negative determination is made in step S270, the SiC wafer 20 to be measured is a non-reference product, and therefore, in step S290, it is discarded as a non-reference product. In other words, the SiC wafer 20 to be measured is discarded, and non-reference SiC wafers 20 are prevented from proceeding to the subsequent epitaxial film formation process.

[0047] Therefore, only the reference SiC wafers 20 are transferred to the epitaxial film formation process, and the epitaxial film 30 is formed only on the reference SiC wafers 20. This makes it possible to obtain reference epitaxial wafers, and SiC semiconductor devices can be manufactured using the reference epitaxial wafers, resulting in highly reliable SiC semiconductor devices. Furthermore, since non-reference SiC wafers 20 can be excluded at the SiC wafer 20 stage, it is possible to suppress the outflow of locally degraded wafers by evaluating the p-type impurity concentration of each SiC wafer 20.

[0048] (Example 3) A wafer acceptance inspection process for controlling the p-type impurity concentration of an epitaxial wafer in which an epitaxial film 30 is formed on an n-type SiC wafer 20 before the device fabrication process will be described with reference to the flowchart of the wafer acceptance inspection process shown in Figure 7.

[0049] First, a cylindrical SiC ingot 10 is sliced ​​and ground to obtain a SiC wafer 20, and then the surface is polished by lapping or CMP. Then, as shown in step S300 of FIG. 7 , an epitaxial wafer is prepared. Specifically, an SiC epitaxial film 30 is grown on one side of the polished SiC wafer 20 by chemical vapor deposition (CVD) or the like to produce an epitaxial wafer. Then, proceeding to step S310, PL spectrum measurement is performed on the SiC wafer 20 of the epitaxial wafer. That is, since the epitaxial film 30 is formed on one side of the SiC wafer 20, PL spectrum measurement is performed on the other side of the SiC wafer 20 on which the epitaxial film 30 is not formed, i.e., the backside of the SiC wafer 20. The PL spectrum measurement at this time is similar to step S110 of FIG. 4 , where the PL spectrum measurement of the SiC wafer 20 is performed by the PL inspection unit 41, and the results are stored in the control unit 42.

[0050] Next, the process proceeds to step S320. The control unit 42 then normalizes each of the PL spectrum intensity ratios measured in step S310, and determines whether the p-type impurity concentration is good or bad based on the normalized PL spectrum intensity ratios near a wavelength of 520 nm. The normalization and determination methods are the same as those used in step S120 of FIG. 4.

[0051] If a positive determination is made in step S320, the process proceeds to step S330; if a negative determination is made, the process proceeds to step S340. If a positive determination is made in step S320, the SiC wafer 20 to be measured is a reference product, and therefore, in step S330, the SiC wafer 20 is allowed to proceed to the subsequent device fabrication process, thereby ending the wafer acceptance inspection process. If a negative determination is made in step S320, the SiC wafer 20 to be measured is a non-reference product, and therefore, in step S340, the SiC wafer 20 is discarded as a non-reference product. In other words, the SiC wafer 20 to be measured is discarded, and the non-reference SiC wafer 20 is prevented from proceeding to the subsequent device fabrication process.

[0052] Therefore, only the reference SiC wafers 20 are transferred to the device fabrication process, and devices are formed only on the epitaxial wafers that are the reference SiC wafers 20. This allows for highly reliable SiC semiconductor devices. Furthermore, since non-reference products can be excluded even at the epitaxial wafer stage, the p-type impurity concentration of each SiC wafer 20 can be evaluated, thereby making it possible to prevent locally degraded wafers from being released.

[0053] While the present disclosure has been described based on the above-described embodiment, it is not limited to the embodiment and encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

[0054] For example, in the above Examples 1 to 3, PL spectrum measurements were performed in the wafer fabrication feasibility inspection process, the shipping inspection process, and the wafer acceptance inspection process to determine whether the product was a standard or non-standard product. By performing at least one of these processes, it is possible to determine whether the product was a standard or non-standard product by non-destructive testing, making it possible to manufacture highly reliable SiC semiconductor devices. Of course, the more PL spectrum measurements are performed, the more accurately it becomes possible to exclude non-standard products. Therefore, by performing two or all of these processes, it becomes possible to manufacture more reliable SiC semiconductor devices.

[0055] In Example 2, PL spectrum measurements were performed after slicing, lapping, and CMP, but it is sufficient to perform PL spectrum measurements after at least one of these. In this case, too, the more PL spectrum measurements are performed, the more accurately non-standard products can be excluded. Therefore, performing PL spectrum measurements after two or all of these measurements makes it possible to manufacture SiC semiconductor devices with higher reliability.

[0056] Furthermore, in the above embodiment, the p-type impurity concentration is controlled by non-destructive testing using PL spectrum measurement with PL light. However, the p-type impurity concentration can also be controlled by excitation-based emission spectrum measurement. For example, instead of PL light, the p-type impurity concentration can also be controlled by non-destructive testing using CL (cathodoluminescence) spectrum measurement when electrons are irradiated. When an accelerated electron beam of a predetermined wavelength is irradiated onto a sample, the electrons lose energy due to inelastically scattered electrons, but a portion of the energy is used to excite electrons in the valence band to the conduction band, generating electron-hole pairs. The electrons and holes then recombine within the sample, emitting CL light. Because this CL spectrum intensity ratio also correlates with the p-type impurity concentration, the p-type impurity concentration can be controlled based on the CL spectrum intensity ratio.

[0057] However, when PL spectrum measurement is performed using PL light, the inspection device 40 can be configured more simply because no electron beam is used.

[0058] In addition, the case where the PL spectrum intensity ratio is used to control the p-type impurity concentration based on the PL spectrum intensity has been exemplified. Although the use of the PL spectrum intensity ratio enables more accurate control of the p-type impurity concentration, the p-type impurity concentration may also be controlled based on the PL spectrum intensity itself.

[0059] The control unit and the method described herein may be implemented by a special-purpose computer configured by configuring a processor and memory programmed to perform one or more functions embodied in a computer program. Alternatively, the control unit and the method described herein may be implemented by a special-purpose computer configured by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the control unit and the method described herein may be implemented by one or more special-purpose computers configured by combining a processor and memory programmed to perform one or more functions with a processor configured with one or more hardware logic circuits. Furthermore, the computer program may be stored as instructions executed by a computer on a computer-readable non-transitory tangible storage medium.

[0060] (Viewpoints of the Present Disclosure) The above-described present disclosure can be understood from the following viewpoints, for example.

[0061] [First Aspect] A method for manufacturing a silicon carbide semiconductor device, comprising: preparing n-type silicon carbide (10, 20) to be used for forming an n-type silicon carbide substrate doped with n-type impurities; measuring an emission spectrum intensity due to levels formed near a midgap of the silicon carbide by p-type impurities mixed in the n-type silicon carbide by excitation-based emission spectrum measurement; and comparing the emission spectrum intensity with a reference value set based on an emission spectrum intensity corresponding to the midgap, to determine whether the n-type silicon carbide is a reference product. [Second Aspect] The method for manufacturing a silicon carbide semiconductor device according to the first aspect, wherein the emission spectrum intensity is measured by emission spectrum measurement based on excitation caused by irradiating the n-type silicon carbide with photoluminescence light. [Third Aspect] The method for manufacturing a silicon carbide semiconductor device according to the first or second aspect, wherein the p-type impurities include one or more of B, Al, Ti, and V. [Fourth Aspect] The method for manufacturing a silicon carbide semiconductor device according to any one of the first to third aspects, wherein the determining whether the silicon carbide semiconductor device is good or bad comprises comparing an emission spectrum intensity ratio, obtained by normalizing the emission spectrum intensity using a peak intensity in a frequency band of 380±5 nm in the emission spectrum intensity as a reference value, with the reference value. [Fifth Aspect] The method for manufacturing a silicon carbide semiconductor device according to any one of the first to fourth aspects, wherein the preparing of n-type silicon carbide comprises preparing a silicon carbide ingot (10) obtained by crystal growth of an n-type silicon carbide single crystal, and measuring the emission spectrum intensity of the silicon carbide ingot.[Sixth Aspect] The method for manufacturing a silicon carbide semiconductor device according to any one of the first to fifth aspects, wherein preparing the n-type silicon carbide comprises preparing a silicon carbide wafer (20) formed by slicing a silicon carbide ingot (10) obtained by crystal growth of an n-type silicon carbide single crystal, and measuring the emission spectrum intensity comprises performing at least one of measuring the emission spectrum intensity on a surface of the silicon carbide wafer after slicing, measuring the emission spectrum intensity on a surface of the silicon carbide wafer after slicing that has been surface-polished by lapping, or measuring the emission spectrum intensity on a surface of the silicon carbide wafer after slicing that has been surface-polished by CMP. [Seventh Aspect] The method for manufacturing a silicon carbide semiconductor device according to any one of the first to sixth aspects, wherein preparing the n-type silicon carbide includes preparing an n-type silicon carbide wafer (20) and then forming an epitaxial film (30) on one surface of the silicon carbide wafer, and measuring the emission spectrum intensity on another surface of the silicon carbide wafer opposite to the one surface on which the epitaxial film has been formed. [Eighth Aspect] The method for manufacturing a silicon carbide semiconductor device according to any one of the first to seventh aspects, wherein measuring the emission spectrum intensity is performed at a temperature of 21°C or higher and 27°C or lower.

Claims

1. A method for manufacturing a silicon carbide semiconductor device, comprising: preparing n-type silicon carbide (10, 20) to be used for forming an n-type silicon carbide substrate doped with n-type impurities; measuring an emission spectrum intensity due to a level formed near the midgap of silicon carbide by p-type impurities mixed into the n-type silicon carbide by excitation-based emission spectrum measurement; and comparing the emission spectrum intensity with a reference value set based on an emission spectrum intensity corresponding to the midgap, and performing a quality judgment to determine whether the n-type silicon carbide is a standard product.

2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the emission spectrum intensity is measured by measuring an emission spectrum based on excitation caused by irradiating the n-type silicon carbide with photoluminescence light.

3. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the p-type impurity includes one or more of B, Al, Ti and V.

4. The method for manufacturing a silicon carbide semiconductor device described in claim 1, wherein when making the pass / fail determination, an emission spectrum intensity ratio obtained by normalizing the emission spectrum intensity is compared with the reference value, using a peak intensity in a frequency band of 380±5 nm in the emission spectrum intensity as a reference value.

5. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein preparing the n-type silicon carbide comprises preparing a silicon carbide ingot (10) obtained by crystal growth of an n-type silicon carbide single crystal, and measuring the emission spectrum intensity is performed on the silicon carbide ingot.

6. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein preparing the n-type silicon carbide comprises preparing a silicon carbide wafer (20) by slicing a silicon carbide ingot (10) obtained by crystal growth of an n-type silicon carbide single crystal, and measuring the emission spectrum intensity comprises at least one of: measuring a surface of the silicon carbide wafer after slicing; measuring a surface of the silicon carbide wafer after slicing that has been surface-polished by lapping; and measuring a surface of the silicon carbide wafer after slicing that has been surface-polished by CMP.

7. A method for manufacturing a silicon carbide semiconductor device as described in claim 1, wherein preparing the n-type silicon carbide includes preparing an n-type silicon carbide wafer (20) and then forming an epitaxial film (30) on one surface of the silicon carbide wafer, and measuring the emission spectrum intensity is performed on another surface of the silicon carbide wafer opposite to the one surface on which the epitaxial film is formed.

8. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the emission spectrum intensity is measured at a temperature of 21° C. or higher and 27° C. or lower.

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