Photodetection device

The photodetection device addresses performance challenges by incorporating oblique edges on light shielding portions and line-symmetric openings within intra-pixel and inter-pixel isolation regions, resulting in reduced parasitic light sensitivity and improved charge transfer efficiency.

WO2025023186A1PCT designated stage expired Publication Date: 2025-01-30SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
PCT/JP2024/026011
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-21
Filing Date
2024-07-19
Publication Date
2025-01-30

AI Technical Summary

Technical Problem

Existing photodetection devices face challenges in improving performance, particularly in reducing parasitic light sensitivity (PLS) and sensitivity differences between pixels.

Method used

The photodetection device incorporates a design with intra-pixel and inter-pixel isolation regions, featuring oblique edges on light shielding portions and line-symmetric openings, which reduces light incidence on charge holding portions and enhances charge transfer efficiency.

Benefits of technology

This design effectively reduces parasitic light sensitivity and sensitivity differences between pixels, thereby improving the overall performance of the photodetection device.

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Abstract

A light detecting device includes a plurality of pixel groups including a first pixel and a second pixel, an intra-pixel isolation region and an inter-pixel isolation region. The first pixel includes a first photoelectric conversion region, a first light shielding portion including a first edge and a first opening provided between the first edge of the first light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region. The second pixel includes a second photoelectric conversion region a second light shielding portion including a second edge and a second opening provided between the second edge of the second light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region. Each of the first edge and the second edge is oblique with respect to a vertical portion of the intra-pixel isolation region that passes through a center of each pixel group.
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Description

PHOTODETECTION DEVICECROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of Japanese Priority Patent Application JP 2023-119050 filed on July 21, 2023, the entire contents of which are incorporated herein by reference.

[0002] The present disclosure relates to a photodetection device.

[0003] There has been known an imaging device having a structure in which a photodiode and a memory are stacked in a light incident direction, and a light shielding film is disposed between the photodiode and the memory (see, for example, Patent Literature 1).

[0004] WO 2021 / 117648

[0005] In this type of imaging device or light detecting device, further improvement in performance is required.

[0006] The present disclosure has been made in view of such circumstances, and it is desirable to provide a photodetection device capable of improving performance.

[0007] A light detecting device according to one aspect the present disclosure includes a plurality of pixel groups including a first pixel and a second pixel, an intra-pixel isolation region provided between the first pixel and the second pixel and an inter-pixel isolation region provided between each pixel group of the plurality of pixel groups. The first pixel includes a first photoelectric conversion region, a first light shielding portion including a first edge and a first opening provided between the first edge of the first light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region. The second pixel includes a second photoelectric conversion region, a second light shielding portion including a second edge and a second opening provided between the second edge of the second light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region. Each of the first edge and the second edge is oblique with respect to a vertical portion of the intra-pixel isolation region that passes through a center of each pixel group that divides the first pixel and second pixel.

[0008] According to the above, it is possible to suppress incidence of light on the first charge holding portion and the second charge holding portion by the first light shielding portion and the second light shielding portion, and thus, a parasitic light sensitivity (PLS) can be reduced. In addition, the first opening provided in the first light shielding portion and the second opening provided in the second light shielding portion are line-symmetric with a straight line passing through the center of the sensor pixel as a symmetry axis. This makes it possible to reduce a sensitivity difference of the incident light between the first pixel and the second pixel. Furthermore, the first light shielding portion has an oblique first end, and the second light shielding portion has an oblique second end. This makes it possible to achieve both improvement in charge transfer efficiency and suppression of PLS. From the above, it is possible to improve the performance of the photodetection device.

[0009] Fig. 1 is a block diagram illustrating a configuration example of functions of an imaging device (e.g., a light detecting device) according to a first embodiment of the present disclosure.Fig. 2 is a diagram illustrating a circuit configuration example of two adjacent pixels of sensor pixels according to the first embodiment of the present disclosure.Fig. 3 is a cross-sectional view illustrating a configuration example of the sensor pixel according to the first embodiment of the present disclosure.Fig. 4A is a plan view illustrating a configuration example of the sensor pixel according to the first embodiment of the present disclosure.Fig. 4B is a plan view illustrating a configuration example of the sensor pixels according to the first embodiment of the present disclosure.Fig. 4C is a plan view illustrating a configuration example of the sensor pixels according to the first embodiment of the present disclosure.Fig. 4D is a plan view illustrating a configuration example of the sensor pixels according to the first embodiment of the present disclosure.Fig. 4E is a plan view illustrating a configuration example of the sensor pixels according to the first embodiment of the present disclosure.Fig. 5A is a plan view illustrating a horizontal light shielding portion and an opening provided in the horizontal light shielding portion according to a comparative example of the present disclosure.Fig. 5B is a plan view illustrating a horizontal light shielding portion and an opening provided in the horizontal light shielding portion according to an embodiment of the present disclosure.Fig. 6 is a cross-sectional view illustrating a configuration example of a sensor pixel according to a second embodiment of the present disclosure.Fig. 7A is a plan view illustrating a configuration example of the sensor pixels according to the second embodiment of the present disclosure.Fig. 7B is a plan view illustrating a configuration example of the sensor pixels according to the second embodiment of the present disclosure.Fig. 7C is a plan view illustrating a configuration example of the sensor pixels according to the second embodiment of the present disclosure.Fig. 7D is a plan view illustrating a configuration example of the sensor pixels according to the second embodiment of the present disclosure.Fig. 8 is a cross-sectional view illustrating a configuration of a sensor pixel according to a first modification of the second embodiment of the present disclosure.Fig. 9 is a plan view illustrating a configuration of the sensor pixels according to the first modification of the second embodiment of the present disclosure.Fig. 10 is a cross-sectional view illustrating a configuration of a sensor pixel according to a second modification of the second embodiment of the present disclosure.Fig. 11 is a plan view illustrating a configuration of a sensor pixel according to a second modification of the second embodiment of the present disclosure.Fig. 12 is a cross-sectional view illustrating a configuration of a sensor pixel according to a third modification of the second embodiment of the present disclosure.Fig. 13 is a plan view illustrating a configuration of the sensor pixel according to the third modification of second embodiment of the present disclosure.Fig. 14 is a cross-sectional view illustrating a configuration of a sensor pixel according to a fourth modification of the second embodiment of the present disclosure.Fig. 15A is a cross-sectional view illustrating a configuration of a sensor pixel according to a fifth modification of the second embodiment of the present disclosure.Fig. 15B is a cross-sectional view illustrating a configuration of the sensor pixel according to the fifth modification of the second embodiment of the present disclosure.Fig. 16A is a plan view illustrating a configuration of the sensor pixel according to the fifth modification of the second embodiment of the present disclosure.Fig. 16B is a plan view illustrating a configuration of the sensor pixel according to the fifth modification of the second embodiment of the present disclosure.Fig. 16C is a plan view illustrating a configuration of the sensor pixel according to the fifth modification of the second embodiment of the present disclosure.Fig. 16D is a plan view illustrating a configuration of the sensor pixel according to the fifth modification of the second embodiment of the present disclosure.Fig. 16E is a plan view illustrating a configuration of the sensor pixel according to the fifth modification of the second embodiment of the present disclosure.Fig. 17 is a cross-sectional view illustrating a configuration of a sensor pixel according to a sixth modification of the second embodiment of the present disclosure.Fig. 18A is a plan view illustrating a configuration of the sensor pixel according to the modification of the sixth embodiment of the present disclosure.Fig. 18B is a plan view illustrating a configuration of the sensor pixel according to the sixth modification of the second embodiment of the present disclosure.Fig. 19 is a cross-sectional view illustrating a method of forming a trench suitable for the sixth modification of the second embodiment of the present disclosure in order of processes.Fig. 20 is a diagram illustrating a configuration example of an electronic device to which the present technology can be applied.Fig. 21 is a block diagram illustrating a schematic configuration example of a vehicle control system which is an example of a moving body control system to which the technology according to the present disclosure can be applied.Fig. 22 is a diagram illustrating an example of an installation position of an imaging unit.

[0010] Hereinafter, embodiments of the present disclosure are described with reference to the drawings. In the illustration of the drawings referred to in the following description, the same or similar portions are denoted by the same or similar reference signs. It should be noted that the drawings are schematic, and a relationship between a thickness and a planar dimension, a ratio of the thicknesses between layers, and the like are different from actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Furthermore, it goes without saying that dimensional relationships and ratios are partly different among the drawings.

[0011] Definition of directions such as upward and downward directions in the following description is merely the definition for convenience of description and does not limit the technical idea of the present disclosure. For example, it is a matter of course that when an object is observed by rotating the object by 90°, the up and down are converted into and read as left and right, and when the object is observed by rotating the object by 180°, the up and down are inverted before being read.

[0012] In the following description, a thickness direction of a semiconductor substrate means a direction from one of a front surface and a back surface of the semiconductor substrate toward the other. The thickness direction of the semiconductor substrate is a normal direction of the front surface of the semiconductor substrate and is also a normal direction of the back surface of the semiconductor substrate.

[0013] In the following description, a plan view means viewing from the thickness direction (that is, the normal direction of the front surface or the back surface of the semiconductor substrate) of the semiconductor substrate .

[0014] <First Embodiment> (Overall Configuration Example of Imaging Device) Fig. 1 is a block diagram illustrating a configuration example of functions of an imaging device 101 according to a first embodiment of the present disclosure. The imaging device 101 is an example of a “photodetection device” of the present disclosure, and is, for example, a so-called global shutter type back-illuminated image sensor such as a complementary metal oxide semiconductor (CMOS) image sensor. The imaging device 101 receives light from a subject, photoelectrically converts the light, and generates an image signal to capture an image.

[0015] The global shutter method is basically a method of performing global exposure in which exposure is started simultaneously for all pixels and exposure is terminated simultaneously for all pixels. Here, all the pixels mean all the pixels in a portion appearing in the image, and dummy pixels and the like are excluded. In addition, if a time difference and distortion of the image are sufficiently small so as not to cause a problem, a method of moving an area where global exposure is performed while performing global exposure in units of a plurality of rows (for example, several tens of rows) instead of all pixels at the same time is also included in the global shutter method. In addition, the global shutter method also includes a method of performing global exposure on pixels in a predetermined area instead of all the pixels in the portion appearing in the image.

[0016] The back-illuminated image sensor refers to an image sensor having a configuration in which a photoelectric conversion unit such as a photodiode that receives light from a subject and converts the light into an electric signal is provided between a light receiving surface on which the light from the subject enters and a wiring layer provided with wiring such as a transistor that drives each pixel.

[0017] The imaging device 101 includes, for example, a pixel array portion 111, a vertical drive unit 112, a column signal processing unit 113, a data storage unit 119, a horizontal drive unit 114, a system control unit 115, and a signal processing unit 118.

[0018] In the imaging device 101, the pixel array portion 111 is formed on a semiconductor substrate 10 (described later). Peripheral circuits such as the vertical drive unit 112, the column signal processing unit 113, the data storage unit 119, the horizontal drive unit 114, the system control unit 115, and the signal processing unit 118 are formed on the same semiconductor substrate 10 as the pixel array portion 111, for example.

[0019] The pixel array portion 111 includes a plurality of sensor pixels PX including a photoelectric conversion unit PD (described later) that generates and accumulates charges according to the amount of light incident from the subject. As depicted in Fig. 1, the sensor pixels PX are arranged in a horizontal direction (row direction) and a vertical direction (column direction). In the pixel array portion 111, pixel drive lines 116 are wired along a row direction for each pixel row including the sensor pixels PX arrayed in one column in the row direction, and vertical signal lines VSL are wired along a column direction for each pixel column including the sensor pixels PX arrayed in one column in the column direction.

[0020] The vertical drive unit 112 includes a shift register, an address decoder, and the like. The vertical drive unit 112 supplies a signal and the like to each of the plurality of sensor pixels PX through the plurality of pixel drive lines 116, thereby driving all of the plurality of sensor pixels PX in the pixel array portion 111 at the same time or in units of pixel rows.

[0021] A signal output from each unit pixel of the pixel row selectively scanned by the vertical drive unit 112 is supplied to the column signal processing unit 113 through each of the vertical signal lines VSL. The column signal processing unit 113 performs predetermined signal processing on the signal output from each unit pixel of the selected row through the vertical signal line VSL for each pixel column of the pixel array portion 111, and temporarily holds the pixel signals after the signal processing.

[0022] Specifically, the column signal processing unit 113 includes, for example, a shift register, an address decoder, and the like, performs noise removal processing, correlated double sampling processing, analog / digital (A / D) conversion processing of an analog pixel signal, and the like, and generates a digital pixel signal. The column signal processing unit 113 supplies the generated pixel signal to the signal processing unit 118.

[0023] The horizontal drive unit 114 includes a shift register, an address decoder, and the like, and sequentially selects a unit circuit corresponding to the pixel column of the column signal processing unit 113. The selective scanning is performed by the horizontal drive unit 114 so that the pixel signals subjected to the signal processing for each unit circuit in the column signal processing unit 113 are sequentially output to the signal processing unit 118.

[0024] The system control unit 115 includes a timing generator and the like that generate various timing signals. The system control unit 115 performs drive control of the vertical drive unit 112, the column signal processing unit 113, and the horizontal drive unit 114 based on the timing signal generated by the timing generator.

[0025] The signal processing unit 118 performs signal processing such as arithmetic processing on the pixel signal supplied from the column signal processing unit 113 while temporarily storing data in the data storage unit 119 as necessary, and outputs a pixel signal including each pixel signal.

[0026] The data storage unit 119 temporarily stores data necessary for signal processing in the signal processing unit 118.

[0027] (Circuit Configuration Example of Sensor Pixel PX) Next, a circuit configuration example of the sensor pixel PX provided in the pixel array portion 111 of Fig. 1 will be described with reference to Fig. 2. Fig. 2 illustrates a circuit configuration example of two adjacent pixels PX(R) and PX(L) of the sensor pixels PX according to the first embodiment of the present disclosure.

[0028] In the example illustrated in Fig. 2, the sensor pixels PX in the pixel array portion 111 implements a memory holding type global shutter system. The pixel PX(R) that is a part of the sensor pixels PX is an example of a “first pixel” of the present disclosure, and includes a photoelectric conversion unit PD(R) (an example of a “first photoelectric conversion unit” of the present disclosure), a first transfer transistor TG(R)A, a second transfer transistor TG(R)B, a third transfer transistor TG(R)C, a charge holding portion MEM(R) (an example of a “first charge holding portion” of the present disclosure), and a discharge transistor OFG(R). The first transfer transistor TG(R)A includes a transfer gate TRZ(R). The second transfer transistor TG(R)B includes a transfer gate TRX(R). The third transfer transistor TG(R)C includes a transfer gate TRG(R).

[0029] Similarly, the pixel PX(L) that is another part of the sensor pixel PX is an example of a “second pixel” in the present disclosure, and includes a photoelectric conversion unit PD(L) (an example of a “second photoelectric conversion unit” in the present disclosure), a first transfer transistor TG(L)A, a second transfer transistor TG(L)B, a third transfer transistor TG(L)C, a charge holding portion MEM(L) (an example of a “second charge holding portion” in the present disclosure), and a discharge transistor OFG(L). The first transfer transistor TG(L)A includes a transfer gate TRZ(L). The second transfer transistor TG(L)B includes a transfer gate TRX(L). The third transfer transistor TG(L)C includes a transfer gate TRG(L).

[0030] Furthermore, the pixel PX(R) and the pixel PX(L) share a power supply VDD, a charge-voltage conversion unit FD, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL, and the like. In this example, the first transfer transistors TG(R)A and TG(L)A, the second transfer transistors TG(R)B and TG(L)B, the third transfer transistors TG(R)C and TG(L)C, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL are all N-type MOS transistors.

[0031] Each gate electrode of the first transfer transistors TG(R)A and TG(L)A, the second transfer transistors TG(R)B and TG(L)B, the third transfer transistors TG(R)C and TG(L)C, the reset transistor RST, the amplification transistor AMP, and the selection transistor SEL is supplied with a drive signal by the vertical drive unit 112 and the horizontal drive unit 114 under the drive control of the system control unit 115. These drive signals are pulse signals in which a high-level state is an active state (on state), and a low-level state is an inactive state (off state). Note that, hereinafter, setting the drive signal to the active state is also referred to as turning on the drive signal, and setting the drive signal to the inactive state is also referred to as turning off the drive signal.

[0032] The photoelectric conversion units PD(R) and PD(L) are photoelectric conversion elements including, for example, PN-junction photodiodes, and are configured to receive light from a subject and generate and accumulate charges corresponding to the amount of received light by photoelectric conversion.

[0033] The charge holding portions MEM(R) and MEM(L) are provided between the photoelectric conversion units PD(R) and PD(L) and the charge-voltage conversion unit FD, respectively. The charge holding portions MEM(R) and MEM(L) are areas that temporarily hold charges generated and accumulated in the photoelectric conversion units PD(R) and PD(L) until the charges are transferred to the charge-voltage conversion unit FD in order to realize a global shutter function.

[0034] The first transfer transistor TG(R)A is disposed between the photoelectric conversion unit PD(R) and the second transfer transistor TG(R)B. The second transfer transistor TG(R)B is disposed between the first transfer transistor TG(R)A and the charge holding portion MEM(R). The third transfer transistor TG(R)C is disposed between the charge holding portion MEM(R) and the charge-voltage conversion unit FD. The first transfer transistor TG(R)A and the second transfer transistor TG(R)B are configured to transfer the charge accumulated in the photoelectric conversion unit PD(R) to the charge holding portion MEM(R) according to a drive signal applied to their gate electrodes.

[0035] For example, the first transfer transistor TG(R)A and the second transfer transistor TG(R)B are turned on while the discharge transistor OFG(R) is in an off state, and then the charge accumulated in the photoelectric conversion unit PD(R) is transferred from the photoelectric conversion unit PD(R) to the charge holding portion MEM(R).

[0036] Similarly, the first transfer transistor TG(L)A is disposed between the photoelectric conversion unit PD(L) and the second transfer transistor TG(L)B. The second transfer transistor TG(L)B is disposed between the first transfer transistor TG(L)A and the charge holding portion MEM(L). The third transfer transistor TG(L)C is disposed between the charge holding portion MEM(L) and the charge-voltage conversion unit FD. The first transfer transistor TG(L)A and the second transfer transistor TG(L)B are configured to transfer the charge accumulated in the photoelectric conversion unit PD(L) to the charge holding portion MEM(L) according to a drive signal applied to their gate electrodes.

[0037] For example, the first transfer transistor TG(L)A and the second transfer transistor TG(L)B are turned on while the discharge transistor OFG(L) is in an off state, and then the charge accumulated in the photoelectric conversion unit PD(L) is transferred from the photoelectric conversion unit PD(L) to the charge holding portion MEM(L).

[0038] The third transfer transistors TG(R)C and TG(L)C are configured to transfer the charges temporarily held in the charge holding portion MEM(R) and the charge holding portion MEM(L) to the charge-voltage conversion unit FD according to drive signals applied to the gate electrodes.

[0039] In the pixels PX(R) and PX(L), for example, the third transfer transistors TG(R)C and TG(L)C are turned on, and then the charges held in the charge holding portions MEM(R) and MEM(L) are transferred to the charge-voltage conversion unit FD through the third transfer transistors TG(R)C and TG(L)C.

[0040] The reset transistor RST has a drain connected to the power supply VDD and a source connected to the charge-voltage conversion unit FD. The reset transistor RST initializes, that is, resets the charge-voltage conversion unit FD according to a drive signal applied to a gate electrode of the reset transistor RST. For example, the reset transistor RST is turned on by the drive signal, and then a potential of the charge-voltage conversion unit FD is reset to the voltage level of the power supply VDD. That is, the charge-voltage conversion unit FD is initialized.

[0041] The charge-voltage conversion unit FD is a floating diffusion region that converts the charges respectively transferred from the photoelectric conversion units PD(R) and PD(L) through the first transfer transistors TG(R)A and TG(L)A, the second transfer transistors TG(R)B and TG(L)B, the charge holding portions MEM(R) and MEM(L), and the third transfer transistors TG(R)C and TG(L)C into electric signals (for example, the voltage signal) and outputs the electric signals. The reset transistor RST is connected to the charge-voltage conversion unit FD, and is connected to the vertical signal line VSL through the amplification transistor AMP and the selection transistor SEL.

[0042] The amplification transistor AMP outputs an electric signal corresponding to the potential of the charge-voltage conversion unit FD. The amplification transistor AMP configures, for example, a source follower circuit with a constant current source provided in the column signal processing unit 113. The selection transistor SEL is turned on when the sensor pixel PX is selected, returns an electric signal from the charge-voltage conversion unit FD through the amplification transistor AMP to the vertical signal line VSL, and outputs the electric signal to the column signal processing unit 113.

[0043] The sensor pixels PX(R) and PX(L) each further include a power supply VDD in addition to the charge-voltage conversion unit FD as a transfer destination of charges of the photoelectric conversion units PD(R) and PD(L). The discharge transistor OFG(R) is disposed between the drain of the transfer transistor TG(R)A and the power supply VDD. The discharge transistor OFG(L) is disposed between the drain of the transfer transistor TG(L)A and the power supply VDD.

[0044] The discharge transistor OFG(R) has a drain connected to the power supply VDD and a source connected to the drain of the transfer transistor TG(R)A. Similarly, the discharge transistor OFG(L) has a drain connected to the power supply VDD and a source connected to the drain of the transfer transistor TG(L)A. The discharge transistors OFG(R) and OFG(L) initialize, that is, reset the photoelectric conversion units PD(R) and PD(L) according to drive signals applied to the respective gate electrodes. Resetting the photoelectric conversion units PD(R) and PD(L) means to deplete the photoelectric conversion units PD(R) and PD(L).

[0045] For example, when the first transfer transistors TG(R)A and TG(L)A are turned on and the discharge transistors OFG(R) and OFG(L) are turned on, the photoelectric conversion units PD(R) and PD(L) are reset.

[0046] In addition, the discharge transistors OFG(R) and OFG(L) form overflow paths, respectively, and discharge charges overflowing from the photoelectric conversion units PD(R) and PD(L) to the power supply VDD, respectively. However, when the photoelectric conversion units PD(R) and PD(L) are reset, it is necessary to turn on the discharge transistors OFG(R) and OFG(L) and turn on the transfer gates TRZ(R) and TRZ(L).

[0047] (Example of Cross Section and Planar Configuration of Sensor Pixel PX) Next, a cross-sectional and planar configuration example of the sensor pixel PX will be described with reference to Figs. 3 and 4A to 4E. Fig. 3 is a cross-sectional view illustrating a configuration example of the sensor pixel PX according to the first embodiment of the present disclosure. Figs. 4A to 4E are plan views illustrating configuration examples of the sensor pixel PX according to the first embodiment of the present disclosure. More specifically, Fig. 3 illustrates a cross-sectional configuration example of each plan view of Figs. 4A to 4D taken along line A1-A1' to line A4-A4'. Figs. 4A to 4D illustrate planar configuration examples at respective positions LV1 to LV4 in the cross-sectional view of Fig. 3. Fig. 4E illustrates an enlarged planar configuration example in a case where one sensor pixel PX is viewed from a back surface 10b side, and more specifically, plan views LV1 and LV2 illustrated in Figs. 4A and 4B overlapped and enlarged.

[0048] The semiconductor substrate 10 is, for example, a silicon (Si) substrate, and a front surface 10a and a back surface 10b are (111) planes. In the pixel array portion 111 provided on the semiconductor substrate 10, the sensor pixels PX illustrated in Figs. 4A to 4E are repeatedly arrayed along each of the X-axis direction and the Y-axis direction. Each of the plurality of sensor pixels PX has the same shape as that of the other sensor pixels PX or a horizontally inverted or vertically inverted shape in a plan view and has substantially the same structure.

[0049] As illustrated in Figs. 4A to 4D, the plurality of sensor pixels PX is arranged side by side in a first direction (for example, a horizontal direction of a light receiving surface) parallel to the back surface 10b of the semiconductor substrate 10 (an example of the “first surface” of the present disclosure) and a second direction (for example, a vertical direction of the light receiving surface) orthogonal to the first direction. An inter-pixel isolation portion 30 is provided between one sensor pixel PX and the other sensor pixel PX adjacent to each other in the first direction or the second direction. One sensor pixel PX and the other sensor pixel PX are isolated by the inter-pixel isolation portion 30. The configuration of the inter-pixel isolation portion 30 will be described later.

[0050] Also, as illustrated in Figs. 3 and 4A to 4E, each of the plurality of sensor pixels PX includes pixel PX(R) (an example of a “first pixel” in the present disclosure) and pixel PX(L) (an example of a “second pixel” in the present disclosure). The pixels PX(R) and PX(L) are adjacent to each other in the first direction (for example, the horizontal direction of each light receiving surface of Figs. 3 to 4E).

[0051] As illustrated in Fig. 3, on the back surface 10b side of the semiconductor substrate 10, an on-chip lens OCL is provided through an insulating film 11 such as a silicon oxide film (SiO film) and a color filter CF. For example, on the pixels PX(R) and PX(L) included in one pixel PX, one on-chip lens OCL is provided through the color filter CF of the same color.

[0052] As illustrated in Figs. 3 to 4E, the pixel PX(R) includes a photoelectric conversion unit PD(R) (“first photoelectric conversion unit” of the present disclosure), a charge holding portion MEM(R) (“first charge holding portion” of the present disclosure), and a horizontal light shielding portion LS1(R) (an example of “a first light shielding portion” of the present disclosure). The photoelectric conversion unit PD(R) has a function of photoelectrically converting light (hereinafter, also referred to as incident light) that has passed through the on-chip lens OCL, the color filter CF, and the insulating film 11 entered from the back surface 10b side of the semiconductor substrate 10 to generate a charge. The charge holding portion MEM(R) is provided on an opposite side (that is, a front surface side) of the back surface 10b with the photoelectric conversion unit PD(R) interposed therebetween and has a function of holding the charge transferred from the photoelectric conversion unit PD(R). The horizontal light shielding portion LS1(R) is provided between the back surface of the semiconductor substrate and the MEM(R).

[0053] Similarly, the pixel PX(L) includes a photoelectric conversion unit PD(L) (“second photoelectric conversion unit” of the present disclosure), a charge holding portion MEM(L) (“second charge holding portion” of the present disclosure), and a horizontal light shielding portion LS1(L) (an example of “second light shielding portion” of the present disclosure). The photoelectric conversion unit PD(L) has a function of photoelectrically converting incident light to generate a charge. The charge holding portion MEM(L) is provided on the front surface 10a side of the semiconductor substrate 10 and has a function of holding the charge transferred from the photoelectric conversion unit PD(L). The horizontal light shielding portion LS1(L) is provided between the back surface of the semiconductor substrate and the charge holding portion MEM(L).

[0054] As illustrated in Fig. 3, the horizontal light shielding portions LS1(R) and LS1(L) are provided in parallel to the back surface 10b of the semiconductor substrate 10, which is a light incident surface, and at the same depth from the back surface 10b.

[0055] As illustrated in Figs. 3 to 4E, the inter-pixel isolation portion 30 includes a first inter-pixel isolation portion 31 and a second inter-pixel isolation portion 32. One sensor pixel PX and the other sensor pixel PX are electrically isolated by the first inter-pixel isolation portion 31 and the second inter-pixel isolation portion 32. Furthermore, a space S30 (an example of a “second space” in the present disclosure) that allows one sensor pixel PX and the other sensor pixel PX adjacent in the first direction (for example, the horizontal direction of the light receiving surface) or the second direction (for example, the vertical direction of the light receiving surface) to communicate with each other is provided between the first inter-pixel isolation portion 31 and the second inter-pixel isolation portion 32.

[0056] The space S30 includes, for example, a p-type region 12, and is in a pn junction with the photoelectric conversion unit PD(R) or PD(L) including an n-type region. A depletion layer is formed in the space S30 by the pn junction. As a result, even in an area where the space S30 exists, one sensor pixel PX and the other sensor pixel PX are electrically isolated from each other.

[0057] Each of the plurality of sensor pixels PX is provided with an intra-pixel isolation portion 20 that isolates one pixel PX(R) and the other pixel PX(L) adjacent in the first direction (for example, the horizontal direction of the light receiving surface). The pixel PX(R) and the pixel PX(L) are arranged in line symmetry with a straight line CL passing through the center of the pixel and parallel to the second direction (for example, the vertical direction of the light receiving surface) as a symmetry axis. The intra-pixel isolation portion 20 is arranged so as to overlap the straight line CL (that is, the symmetry axis).

[0058] The intra-pixel isolation portion 20 includes a first intra-pixel isolation portion 21 and a second intra-pixel isolation portion 22. A space S20 (an example of a “first space” in the present disclosure) that allows one pixel PX(R) and the other pixel PX(L) adjacent in the first direction (for example, the horizontal direction of the light receiving surface) to communicate with each other is provided between the first intra-pixel isolation portion 21 and the second intra-pixel isolation portion 22. The space S20 includes, for example, a p-type region 12, and is in pn junction with the photoelectric conversion units PD(R) and PD(L) including n-type regions. A depletion layer is formed in the space S20 by the pn junction. As a result, also, in an area where the space S20 exists, adjacent pixels PX(R) and PX(L) are electrically isolated from each other.

[0059] As illustrated in Fig. 3, the semiconductor substrate 10 may be provided with an n-type region 13 that has a higher n-type impurity concentration than the photoelectric conversion units PD(R) and PD(L) and is in contact with the p-type region 12. For example, the n-type region 13 may be provided in a region facing the intra-pixel isolation portion 20 with the p-type region 12 interposed therebetween and a region facing the inter-pixel isolation portion 30 with the p-type region 12 interposed therebetween. Among these regions, the n-type region 13 may be provided only on a side closer to the front surface 10a of the semiconductor substrate 10 than the horizontal light shielding portions LS1 (R) and LS1 (L). Due to the presence of the n-type region 13, the number of electrons stored in the photoelectric conversion unit PD can be increased, and a dynamic range can be expanded.

[0060] Each of the charge holding portions MEM(R) and MEM(L) includes an n-type region 14 provided on the front surface 10a side of the semiconductor substrate 10 and a p-type region 15 surrounding the n-type region 14. An n-type impurity concentration of the n-type region 14 may or may not be the same as the n-type region configuring the pixels PX(R) and PX(L). The p-type impurity concentration of the p-type region 15 may or may not be the same as that of the p-type region 12. The p-type region 15 may or may not be formed integrally with the p-type region 12.

[0061] As illustrated in Fig. 3, the transfer gates TRZ(R) and TRZ(L) are provided with a vertical gate VG penetrating the p-type region 15 in the thickness direction of the semiconductor substrate 10. The transfer gates TRZ(R) and TRZ(L) are turned on, and then channels are formed along the vertical gate VG, and charges are transferred from the pixels PX(R) and PX(L) to the charge holding portions MEM(R) and MEM(L), respectively.

[0062] In the sensor pixel PX illustrated in Figs. 3 to 4E, the first intra-pixel isolation portion 21, the first inter-pixel isolation portion 31, the horizontal light shielding portion LS1(R), and the horizontal light shielding portion LS1(L) are integrally formed. For example, each of the first intra-pixel isolation portion 21 (an example of “a part of an intra-pixel isolation portion” of the present disclosure) and the first inter-pixel isolation portion 31 (an example of “a part of an inter-pixel isolation portion” of the present disclosure) includes a first trench 51 provided in the thickness direction of the semiconductor substrate 10, and a first metal film 61 provided in the first trench 51 through an insulating film 55. The first trench 51 may penetrate the semiconductor substrate 10 in the thickness direction or may not penetrate. Fig. 3 illustrates a case where the first trench 51 penetrates the semiconductor substrate 10 in the thickness direction.

[0063] Each of the horizontal light shielding portion LS1(R) and the horizontal light shielding portion LS1(L) includes a space portion 52 provided in the horizontal direction orthogonal to the thickness direction of the semiconductor substrate 10, and a first metal film 61 provided in the space portion 52 through an insulating film 55. The first trench 51 of the first intra-pixel isolation portion 21 and the first trench 51 of the inter-pixel isolation portion 31 communicate with (are connected to) each other through the space portion 52. The insulating film 55 in the first trench 51 and the insulating film 55 in the space portion 52 are integrally formed, and the first metal film 61 in the first trench 51 and the first metal film 61 in the space portion 52 are also integrally formed.

[0064] In addition, the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 are integrally formed. For example, each of the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 includes a second trench 53 penetrating the semiconductor substrate 10 in the thickness direction, and a second metal film 62 provided in the second trench 53 through an insulating film 56.

[0065] The first metal film 61 and the second metal film 62 include, for example, a material containing at least one of a single metal having a light shielding property, a metal alloy, a metal nitride, and a metal silicide. Specifically, the first metal film 61 and the second metal film 62 include a material containing at least one of aluminum (Al), copper (Cu), cobalt (Co), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), molybdenum (Mo), chromium (Cr), iridium (Ir), platinum iridium, titanium nitride (TiN), a tungsten silicon compound, or the like. The first metal film 61 and the second metal film 62 may or may not include the same material.

[0066] An opening H1(R)(an example of a “first opening” of the present disclosure) is provided between the horizontal light shielding portion LS1(R) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 in a plan view. An opening H1(L) (an example of a “second opening” of the present disclosure) is provided between the horizontal light shielding portion LS1(L) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 in the plan view. As illustrated in Fig. 4E, in the plan view, the opening H1(R) provided between the horizontal light shielding portion LS1(R) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 and the opening H1(L) provided between the horizontal light shielding portion LS1(L) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 are line-symmetric with a straight line CL, which passes through the center of the sensor pixel PX and is parallel to a second direction (for example, the vertical direction of the light receiving surface) orthogonal to the first direction (for example, the horizontal direction of the light receiving surface), as an axis of symmetry. In the plan view, an end EDG1(R) (an example of a “first end” of the present disclosure) of the horizontal light shielding portion LS1(R) and an end EDG1(L) (an example of a “second end” of the present disclosure) of the horizontal light shielding portion LS1(L) extend in directions obliquely intersecting both the first direction and the second direction.

[0067] That is, the opening H1(R) of the pixel PX(R) and the opening H2(L) of the pixel PX(L) are substantially bilaterally symmetrical in the plan view, and also have ends that are not 90° with respect to the symmetry axis. This improves charge transfer efficiency and parasitic light sensitivity (PLS).

[0068] The shapes of the openings H1(R) and H2(L) and the influence on charge transfer and PLS will be described in more detail. Fig. 5A is a plan view illustrating a horizontal light shielding portion LS' and an opening H' provided in the horizontal light shielding portion LS' according to a comparative example of the present disclosure. Fig. 5B is a plan view illustrating the horizontal light shielding portion LS and the opening H provided in the horizontal light shielding portion LS according to the embodiment of the present disclosure. Note that the horizontal light shielding portion LS and the opening H in Fig. 5B schematically illustrate one of the horizontal light shielding portions LS1(R) and LS1(L) and one of the openings H1(R) and H1(L) illustrated in Fig. 4E and the like, respectively.

[0069] In order to obtain a sufficient light shielding effect on the charge holding portion by the light shielding portion, it is important to separate the opening of the light shielding portion from a condensing center of the pixel. In addition, in general, in an image sensor, in order to suppress a dark signal, an interface of a material different from Si configuring a semiconductor substrate is made p-type and filled with holes.

[0070] In both the comparative example and the present embodiment, the n-type semiconductor region is entirely depleted immediately after the photoelectric conversion unit is reset. Here, as in the comparative example illustrated in Fig. 5A, in a case where a shape of the opening H' of the horizontal light shielding portion LS' is rectangular, the potential of the depletion part of the n-type semiconductor region becomes shallow as the short side of the opening H' becomes short, and it becomes difficult to extend the depletion layer to the back surface. On the other hand, in a case where the opening H of the horizontal light shielding portion LS has an oblique side as in the present embodiment illustrated in Fig. 5B, a width of the opening H can be secured, so that the potential of the n-type semiconductor region can be increased, and the depletion layer can be extended to the back surface. As a result, the efficiency of the confirmation work can be improved. It is possible to achieve both improvement in charge transfer efficiency and PLS suppression.

[0071] (Effect of First Embodiment) As described above, the imaging device 101 according to the first embodiment of the present disclosure includes the semiconductor substrate 10 having the back surface 10b and the front surface 10a located on the opposite side of the back surface 10b, and the plurality of sensor pixels PX provided on the semiconductor substrate 10. Each of the plurality of sensor pixels PX includes a pixel PX(R) and a pixel PX(L) adjacent to the pixel PX(R) in a first direction parallel to the back surface 10b. The pixel PX(R) includes a photoelectric conversion unit (R) capable of photoelectrically converting light incident from the back surface 10b side of the semiconductor substrate 10 to generate a charge, a charge holding portion MEM(R) provided on an opposite side of the back surface 10b across the photoelectric conversion unit (R) and capable of holding a charge transferred from the photoelectric conversion unit (R), and a horizontal light shielding portion LS1(R) provided between the back surface 10b and the charge holding portion MEM(R). The pixel PX(L) includes a photoelectric conversion unit (L) capable of photoelectrically converting light incident from the back surface 10b side of the semiconductor substrate 10 to generate a charge, a charge holding portion MEM(L) provided on the opposite side of the back surface 10b across the photoelectric conversion unit (L) and capable of holding a charge transferred from the photoelectric conversion unit (L), and a horizontal light shielding portion LS1(L) provided between the back surface 10b and the charge holding portion MEM(L).

[0072] In the plan view from the normal direction of the back surface 10b of the semiconductor substrate 10, the opening H1(R) provided in the horizontal light shielding portion LS1(R) and the opening H1(L) provided in the horizontal light shielding portion LS1(L) are line-symmetric with a straight line CL passing through the center of the sensor pixel PX and parallel to the second direction orthogonal to the first direction as an axis of symmetry. In the plan view, an end EDG1(R) of the horizontal light shielding portion LS1(R) and an end EDG1(L) of the horizontal light shielding portion LS1(L) extend in directions obliquely intersecting both the first direction and the second direction.

[0073] According to this, the horizontal light shielding portion LS1(R) and the horizontal light shielding portion LS1(L) can suppress incidence of light on the charge holding portion MEM(R) and the charge holding portion MEM(L), so that PLS can be reduced. Furthermore, the opening H1(R) provided between the horizontal light shielding portion LS1(R) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 and the opening H1(L) provided between the horizontal light shielding portion LS1(L) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 are line-symmetric with a straight line CL passing through the center of the sensor pixel PX as a symmetry axis. As a result, a sensitivity difference of the incident light can be reduced between the pixel PX(R) and the pixel PX(L). For example, the sensitivity difference of obliquely incident light obliquely incident on the back surface 10b of the semiconductor substrate 10 can be reduced, and a phase difference detection capability can be improved. Further, the horizontal light shielding portion LS1(R) has an oblique end EDG1(R), and the horizontal light shielding portion LS1(L) has an oblique end EDG1(L). This makes it possible to achieve both improvement in charge transfer efficiency from the photoelectric conversion units PD(R) and PD(L) to the charge holding portions MEM(R) and MEM(L) and suppression of PLS. From the above, it is possible to improve the performance of the imaging device.

[0074] <Second Embodiment> In the first embodiment described above, it has been described that the horizontal light shielding portions LS1(R) and LS1(L) are arranged one by one in the thickness direction (depth direction) of the semiconductor substrate. However, the embodiment of the present disclosure is not limited thereto. In the embodiment of the present disclosure, two or more stages of horizontal light shielding portions may be alternately arranged in the depth direction in one sensor pixel PX.

[0075] Fig. 6 is a cross-sectional view illustrating a configuration example of the sensor pixel PXA according to the second embodiment of the present disclosure. Figs. 7A to 7D are plan views illustrating configuration examples of the sensor pixel PXA according to the second embodiment of the present disclosure. More specifically, Fig. 6 illustrates a cross-sectional configuration example obtained by cutting each plan view of Figs. 7A to 7C along a line B1-B1' to a line B3-B3'. Figs. 7A to 7C illustrate planar configuration examples at respective positions LV1 to LV3 in the cross-sectional view of Fig. 6. Fig. 7D illustrates in an enlarged manner a planar configuration example in a case where one sensor pixel PXA is viewed from the back surface 10b side. More specifically, each of the plan views LV1 to LV3 illustrated in Figs. 7A to 7C is illustrated in an enlarged manner in an overlapping manner.

[0076] As illustrated in Figs. 6 to 7D, each of the plurality of sensor pixels PXA includes a pixel PX(R) and a pixel PX(L), similarly to the pixel PX according to the first embodiment. The pixels PX(R) and PX(L) are adjacent to each other in the first direction (for example, the horizontal direction illustrated in Figs. 6 to 7D).

[0077] In addition to the horizontal light shielding portion LS1(R), the pixel PX(R) includes a horizontal light shielding portion LS2(R) (an example of a “third light shielding portion” of the present disclosure) arranged alternately with the horizontal light shielding portion LS1(R) in the depth direction. The horizontal light shielding portion LS2(R) is provided between the back surface 10b of the semiconductor substrate 10 and the charge holding portion MEM(R) at a position closer to the front surface 10a of the semiconductor substrate 10 than the horizontal light shielding portion LS1(R). As illustrated in Fig. 7D, in the pixel PX(R), there is an overlapping region OVL(R) in which the horizontal light shielding portion LS1(R) and the horizontal light shielding portion LS2(R) overlap each other in the depth direction.

[0078] Similarly, the pixel PX(L) includes, in addition to the horizontal light shielding portion LS1(L), a horizontal light shielding portion LS2(L) (an example of a “fourth light shielding portion” of the present disclosure) arranged alternately with the horizontal light shielding portion LS1(L) in the depth direction. The horizontal light shielding portion LS2(L) is provided at a position between the back surface 10b of the semiconductor substrate 10 and the charge holding portion MEM(L) and closer to the front surface 10a of the semiconductor substrate 10 than the horizontal light shielding portion LS1(L). As illustrated in Fig. 7D, in the pixel PX(L), there is an overlapping region OVL (L) in which the horizontal light shielding portion LS1(L) and the horizontal light shielding portion LS2(L) overlap each other in the depth direction.

[0079] As illustrated in Fig. 6, the horizontal light shielding portions LS2(R) and LS2(L) are provided in parallel to the back surface 10b of the semiconductor substrate 10, which is the light incident surface, and at the same depth from the back surface 10b.

[0080] As illustrated in Figs. 6 and 7A, an opening H2(R) (an example of a “third opening” of the present disclosure) is provided between the horizontal light shielding portion LS2(R)and the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31. An opening H2(L) (an example of a “fourth opening” of the present disclosure) is provided between the horizontal light shielding portion LS2(L) and the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31.

[0081] In the plan view, the opening H2(R) provided between the horizontal light shielding portion LS2(R) the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 and the opening H2(L) provided between the horizontal light shielding portion LS2(L) and the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 are line-symmetric with a straight line CL passing through the center of the sensor pixel PXA and parallel to the second direction (for example, the vertical direction of each sheet of Figs. 7A to 7D) as an axis of symmetry.

[0082] In the plan view, an end EDG2(R) of the horizontal light shielding portion LS2(R) and an end EDG2(L) of the horizontal light shielding portion LS2(L) extend in directions obliquely intersecting both the first direction and the second direction.

[0083] In the thickness direction (depth direction) of the semiconductor substrate 10, the opening H2(R) provided between the horizontal light shielding portion LS2(R) and the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 and the opening H1(R) provided between the horizontal light shielding portion LS1(R) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32are alternately arranged. Similarly, in the above depth direction, the opening H2(L) provided between the horizontal light shielding portion LS2(L) and the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 and the opening H1(L) provided between the horizontal light shielding portion LS1(L) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32are alternately arranged.

[0084] As illustrated in Figs. 6 and 7A, the horizontal light shielding portion LS2(R) and the horizontal light shielding portion LS2(L) are formed integrally with the second inter-pixel isolation portion 32 which is a part of the inter-pixel isolation portion 30.

[0085] As illustrated in Figs. 6 and 7C, the horizontal light shielding portion LS1(R) and the horizontal light shielding portion LS1(L) are formed integrally with the first intra-pixel isolation portion 21, that is a part of the intra-pixel isolation portion 20. For example, as illustrated in Fig. 7D, when a length of the first intra-pixel isolation portion 21 is L1 and a length of the second intra-pixel isolation portion 22 is L2 in the second direction (the vertical direction of the light receiving surface of Fig. 7D), the length L1 is longer than the length L2 (L1 > L2). The horizontal light shielding portion LS1(R) and the horizontal light shielding portion LS1(L) closer to the charge holding portions MEM(R) and MEM(L) than the horizontal light shielding portion LS2(R) and the horizontal light shielding portion LS2(L) are formed integrally with the first intra-pixel isolation portion 21 longer than the second intra-pixel isolation portion 22 in the second direction.

[0086] (Effects of Second Embodiment) As described above, in the sensor pixel PXA according to the second embodiment, the pixel PX(R) further includes the horizontal light shielding portion LS2(R) provided at a position closer to the back surface 10b than the horizontal light shielding portion LS1(R) between the back surface 10b and the charge holding portion MEM(R). The pixel PX(L) further includes a horizontal light shielding portion LS2(L) provided between the back surface 10b and the charge holding portion MEM(L) at a position closer to the back surface 10b than the horizontal light shielding portion LS1(L).

[0087] According to this, since the incidence of light on the charge holding portions MEM(R) and MEM(L) can be further suppressed by the horizontal light shielding portion LS2(R) and the horizontal light shielding portion LS2(L), the light shielding capability for the charge holding portions MEM(R) and MEM(L) can be further enhanced.

[0088] In addition, in the thickness direction (depth direction) of the semiconductor substrate 10, the opening H1(R) provided between the horizontal light shielding portion LS1(R) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 and the opening H2(R) provided between the horizontal light shielding portion LS2(R) and the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 are alternately arranged, and the opening H1(L) provided between the horizontal light shielding portion LS1(L) and the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 and the opening H2(L) provided between the horizontal light shielding portion LS2(L) and the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 are also alternately arranged. As a result, an optical path from the back surface 10b of the semiconductor substrate 10 to the charge holding portions MEM(R) and MEM(L) detours, and the optical path lengths to the charge holding portions MEM(R) and MEM(L) can be extended. As a result, the light shielding ability for the charge holding portions MEM(R) and MEM(L) can be further enhanced.

[0089] Furthermore, the horizontal light shielding portions LS1(R) and LS1(L) located on a side closest to the front surface 10a of the semiconductor substrate 10 are formed integrally with the longest first intra-pixel isolation portion 20 among the intra-pixel isolation portions 21 located on a straight line CL (that is, the symmetry axis) passing through the center of the sensor pixel PX. As a result, the optical path length from the back surface 10b of the semiconductor substrate 10 to the charge holding portions MEM(R) and MEM(L) can be further extended. As a result, the light shielding ability for the charge holding portions MEM(R) and MEM(L) can be further enhanced.

[0090] (Modification of Second Embodiment) (1) First Modification Fig. 8 is a cross-sectional view illustrating a configuration of a sensor pixel PXB according to a first modification of the second embodiment of the present disclosure. Fig. 9 is a plan view illustrating a configuration of a sensor pixel PXB according to a first modification of the second embodiment of the present disclosure. More specifically, Fig. 8 illustrates a cross-sectional configuration obtained by cutting the plan view of Fig. 9 along line C1-C1'. Fig. 9 illustrates a planar configuration in a case where the four sensor pixels PXB are viewed from the back surface 10b side. More specifically, the horizontal light shielding portions LS1(R) and LS2(R) and the horizontal light shielding portions LS1(L) and LS2(L) arranged alternately in the thickness direction (depth direction) of the semiconductor substrate 10 are illustrated in an overlapping manner.

[0091] The sensor pixel PXB illustrated in Figs. 8 and 9 is different from the sensor pixel PXA illustrated in Figs. 6 to 7D in that the space S20 provided in the intra-pixel isolation portion 20 is wider. As illustrated in Fig. 9, for example, assuming that a width of the space S20 in the second direction (the vertical direction of the light receiving surface of Fig. 7) is WS 20 and a width of the space S30 in the second direction is WS30, the width WS 20 is wider than the width WS30 (WS 20 > WS30). Even in the case where a width of the space S30 in the first direction (the left-right direction of the light receiving surface of Fig. 7) is WS30, WS 20 > WS30 is satisfied.

[0092] In this example, the intra-pixel isolation portion 20 includes only the first intra-pixel isolation portion 21, and the second intra-pixel isolation portion 22 is not arranged, whereby the space S20 of the intra-pixel isolation portion 20 is formed to be wide.

[0093] According to the sensor pixel PXB according to the first modification of the second embodiment of the present disclosure, it is easy to form an overflow path 23 in the space S20 of the intra-pixel isolation portion 20. Even in a case where the charge is saturated in one of the photoelectric conversion units PD(R) and PD(L), the charge can be transferred from one of the photoelectric conversion units PD(R) and PD(L) to the other through the overflow path 23. Since signal charges can be stored using the capacitances of both the photoelectric conversion units PD(R) and PD(L), this contributes to expansion of a dynamic range.

[0094] (2) Second Modification Fig. 10 is a cross-sectional view illustrating a configuration of a sensor pixel PXC according to a second modification of the second embodiment of the present disclosure. Fig. 11 is a plan view illustrating a configuration of a sensor pixel PXC according to the second modification of the second embodiment of the present disclosure. More specifically, Fig. 10 illustrates a cross-sectional configuration obtained by cutting the plan view of Fig. 11 along line D1-D1'. Fig. 11 illustrates a planar configuration in a case where the four sensor pixels PXC are viewed from the back surface 10b side. More specifically, the horizontal light shielding portions LS1(R) and LS2(R) and the horizontal light shielding portions LS1(L) and LS2(L) arranged alternately in the thickness direction (depth direction) of the semiconductor substrate 10 are superimposed on each other.

[0095] The sensor pixel PXC illustrated in Figs. 10 and 11 is different from the sensor pixel PXA illustrated in Figs. 6 to 7D in that the first metal film 61 is not embedded in the side (hereinafter, also referred to as a light incident surface side) closer to the back surface 10b (that is, the light incident surface) than the horizontal light shielding portions LS1(R) and LS1(L) in the intra-pixel isolation portion 20. In the intra-pixel isolation portion 20, a portion on the light incident surface side is configured by the first trench 51 and the insulating film 55 embedded in the first trench 51.

[0096] Furthermore, a portion of the intra-pixel isolation portion 20 closer to the front surface 10a than the horizontal light shielding portions LS1(R) and LS1(L) is configured by the first trench 51, the insulating film 55 provided in the first trench 51, and the first metal film 61 provided in the first trench 51 through the insulating film 55, similarly to the sensor pixel PXA illustrated in Figs. 6 to 7D.

[0097] According to the sensor pixel PXC of the second modification of the second embodiment of the present disclosure, since the first metal film 61 is not embedded in the portion of the intra-pixel isolation portion 20 on the light incident surface side, it is possible to prevent incident light from being reflected by the surface of the first metal film 61 or absorbed by the first metal film 61. In particular, an end on the light incident surface side of the intra-pixel isolation portion 20 tends to strongly reflect the incident light, but since the first metal film 61 is not provided in this portion, reflection and absorption of the incident light can be effectively suppressed. As a result, improvement in sensitivity due to suppression of absorption of incident light and suppression of flare due to reduction in reflectance of incident light can be expected.

[0098] Note that, as illustrated in Fig. 11, in the second modification of the second embodiment of the present disclosure, similarly to the first modification of the second embodiment of the present disclosure, the space S20 provided in the intra-pixel isolation portion 20 may be widened. For example, the intra-pixel isolation portion 20 is configured only with the first intra-pixel isolation portion 21 and the second intra-pixel isolation portion 22 is not arranged, so that the space S20 of the intra-pixel isolation portion 20 may be formed to be wider. As a result, as in the first modification of the second embodiment of the present disclosure, the charge can be moved through the overflow path 23.

[0099] (3) Third Modification Fig. 12 is a cross-sectional view illustrating a configuration of a sensor pixel PXD according to a third modification of the second embodiment of the present disclosure. Fig. 13 is a plan view illustrating a configuration of a sensor pixel PXD according to a third modification of the second embodiment of the present disclosure. More specifically, Fig. 12 illustrates a cross-sectional configuration obtained by cutting the plan view of Fig. 13 along line E1-E1'. Fig. 13 illustrates a planar configuration in a case where four sensor pixels PXD are viewed from the back surface 10b side, and more specifically, illustrates a planar configuration in the thickness direction (depth direction) of the semiconductor substrate 10. The horizontal light shielding portions LS1(R) and LS2(R) and the horizontal light shielding portions LS1(L) and LS2(L) arranged alternately are shown in an overlapping manner.

[0100] In the sensor pixel PXD illustrated in Figs. 12 and 13, a first difference from the sensor pixel PXA illustrated in Figs. 6 to 7D is that the first metal film 61 is not embedded in all portions from the back surface 10b to the front surface 10a of the intra-pixel isolation portion 20. The intra-pixel isolation portion 20 includes a first trench 51 and an insulating film 55 embedded in the first trench 51.

[0101] Furthermore, a second difference is that the intra-pixel isolation portion 20 is formed to be narrower than the inter-pixel isolation portion 30. As illustrated in Fig. 13, the intra-pixel isolation portion 20 has a narrower line width than the inter-pixel isolation portion 30 in plan view. When a line width of the intra-pixel isolation portion 20 is W20 and a line width of the inter-pixel isolation portion 30 is W30, W20 < W30 is satisfied.

[0102] According to the sensor pixel PXD according to the third modification of the second embodiment of the present disclosure, since the first metal film 61 is not embedded in the intra-pixel isolation portion 20, it is possible to prevent incident light from being reflected by the surface of the first metal film 61 or absorbed by the first metal film 61. As a result, improvement in sensitivity due to suppression of absorption of incident light and suppression of flare due to reduction in reflectance of incident light can be expected.

[0103] Furthermore, since the intra-pixel isolation portion 20 is formed to be narrower than the inter-pixel isolation portion 30, it is easy to fill the intra-pixel isolation portion 20 with the insulating film 55. Furthermore, the insulating film 56 of the inter-pixel isolation portion 30 and the insulating film of the intra-pixel isolation portion 20 can be simultaneously formed in the same process. For example, in a case where the insulating film 56 of the inter-pixel isolation portion 30 and the insulating film 55 of the intra-pixel isolation portion 20 are simultaneously formed by atomic layer deposition (ALD), before the second trench 53 of the inter-pixel isolation portion 30 is closed by the insulating film 56, only the first trench 51 of the intra-pixel isolation portion 20 can be closed first by the insulating film 55.

[0104] Note that, as illustrated in Fig. 13, also in the third modification of the second embodiment of the present disclosure, similarly to the first modification of the second embodiment of the present disclosure, the space S20 provided in the intra-pixel isolation portion 20 may be widened. For example, the intra-pixel isolation portion 20 is configured only with the first intra-pixel isolation portion 21 and the second intra-pixel isolation portion 22 is not arranged, so that the space S20 of the intra-pixel isolation portion 20 may be formed to be wider. As a result, as in the first modification of the second embodiment of the present disclosure, the charge can be moved through the overflow path 23.

[0105] (4) Fourth Modification Fig. 14 is a cross-sectional view illustrating a configuration of a sensor pixel PXE according to a fourth modification of the second embodiment of the present disclosure. In the sensor pixel PXE illustrated in Fig. 14, a first difference from the sensor pixel PXA illustrated in Figs. 6 to 7D is that the first trench 51 configuring the intra-pixel isolation portion 20 is not provided on a side (that is, the light incident surface side) closer to the back surface 10b than the horizontal light shielding portions LS1(R) and LS1(L), and the insulating film 55 and the first metal film 61 embedded in the first trench 51 are not provided. In the intra-pixel isolation portion 20, a portion on the light incident surface side includes only the p-type region 12.

[0106] Furthermore, a second difference is that the second trench 53 configuring the inter-pixel isolation portion 30 is not provided on a side (that is, the light incident surface side) closer to the back surface 10b than the horizontal light shielding portions LS2(R) and LS2(L), and the insulating film 56 and the second metal film 62 buried in the second trench 53 are not provided. In the inter-pixel isolation portion 30, a portion on the light incident surface side is also formed only of the p-type region 12.

[0107] According to the sensor pixel PXE according to the fourth modification of the second embodiment of the present disclosure, since the first metal film 61 is not embedded in the portion of the intra-pixel isolation portion 20 on the light incident surface side, it is possible to prevent incident light from being reflected by the surface of the first metal film 61 or absorbed by the first metal film 61. Furthermore, since the second metal film 62 is not embedded in the portion on the light incident surface side not only in the intra-pixel isolation portion 20 but also in the inter-pixel isolation portion 30, it is possible to prevent incident light from being reflected by the surface of the second metal film 62 or absorbed by the second metal film 62. As a result, it is possible to further expect improvement in sensitivity due to suppression of absorption of incident light and suppression of flare due to reduction in reflectance of incident light.

[0108] Furthermore, the first trench 51 is not provided in a portion of the intra-pixel isolation portion 20 on the light incident surface side. As a result, as illustrated in Fig. 14, the overflow path 23 can be provided in the portion on the light incident surface side of the intra-pixel isolation portion 20. The overflow path 23 includes, for example, an n-type region. In a portion on the light incident surface side, the charge can be moved through the overflow path 23.

[0109] (Fifth Modification) Figs. 15A and 15B are cross-sectional views illustrating a configuration of a sensor pixel PXF according to a fifth modification of the second embodiment of the present disclosure. Figs. 16A to 16E are plan views illustrating a configuration of a sensor pixel PXF according to the fifth modification of the second embodiment of the present disclosure. More specifically, Fig. 15A illustrates a cross-sectional configuration obtained by cutting the plan views of Figs. 16A to 16E from line FA1-FA1' to line FA5-FA5'. Figs. 16A to 16E illustrate planar configurations at respective positions LV1 to LV5 in the respective cross-sectional views of Figs. 15A and 15B.

[0110] The sensor pixel PXF illustrated in Figs. 15A to 16E is different from the sensor pixel PXA illustrated in Figs. 6 to 7D in that the trench configuring the inter-pixel isolation portion 30 is provided deep from the front surface 10a to the back surface 10b of the semiconductor substrate 10, whereas the trench configuring the intra-pixel isolation portion 20 is not provided from the front surface 10a to the back surface 10b of the semiconductor substrate 10 and is not deep.

[0111] This will be described in more detail. The inter-pixel isolation portion 30 includes a first inter-pixel isolation portion 31 and a second inter-pixel isolation portion 32. The first inter-pixel isolation portion 31 includes a first trench 51, an insulating film 55 provided in the first trench 51, and a first metal film 61 embedded in the first trench 51 through the insulating film 55. The second inter-pixel isolation portion 32 includes a second trench 53, an insulating film 56 provided in the second trench 53, and a second metal film 62 embedded in the second trench 53 through the insulating film 56. A space S30 including, for example, the p-type region 12 is interposed between the first inter-pixel isolation portion 31 and the second inter-pixel isolation portion 32.

[0112] Furthermore, the intra-pixel isolation portion 20 includes a first intra-pixel isolation portion 21 and a second intra-pixel isolation portion 22. The first intra-pixel isolation portion 21 includes a first trench 51, an insulating film 55 provided in the first trench 51, and a first metal film 61 embedded in the first trench 51 through the insulating film 55. The second intra-pixel isolation portion 22 includes a second trench 53, an insulating film 56 provided in the second trench 53, and a second metal film 62 embedded in the second trench 53 through the insulating film 56. A space S20 including, for example, the p-type region 12 is interposed between the first intra-pixel isolation portion 21 and the second intra-pixel isolation portion 22.

[0113] In the sensor pixel PXF, both the first trench 51 (hereinafter, a first trench 51B; an example of “first trench B” of the present disclosure) configuring the first inter-pixel isolation portion 31 and the second trench 53 (hereinafter, a second trench 53B) configuring the second inter-pixel isolation portion 32 are deep from the front surface 10a to the back surface 10b of the semiconductor substrate 10. As a result, the first metal film 61 in the first trench 51B and the second metal film 62 in the second trench 53B are also provided from the front surface 10a to the back surface 10b of the semiconductor substrate 10.

[0114] On the other hand, the first trench 51 (hereinafter, a first trench 51A; an example of “first trench A” of the present disclosure) configuring the first intra-pixel isolation portion 21 and a second trench 53 (hereinafter, a second trench 53A) configuring the second intra-pixel isolation portion 22 are provided from the front surface 10a of the semiconductor substrate 10 to the positions of the horizontal light shielding portions LS1(R) and LS1(L). The first trench 51A and the second trench 53A are not deep as the first trench 51B and the second trench 53B and are not provided between the horizontal light shielding portions LS1(R) and LS1(L) and the back surface 10b. The first trench 51A, the first metal film 61 in the first trench 51A, and the second metal film 62 in the second trench 53A do not reach the back surface 10b.

[0115] In the first intra-pixel isolation portion 21, a portion between the positions of the horizontal light shielding portions LS1(R) and LS1(L) and the back surface 10b is configured by, for example, the p-type region 12. Similarly, a portion of the second intra-pixel isolation portion 22 between the positions of the horizontal light shielding portions LS1(R) and LS1(L) and the back surface 10b is configured by, for example, the p-type region 12.

[0116] Also, in the sensor pixel PXF, the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 are integrally formed, but the depths of the trenches are different. The trench is formed deeper in the first inter-pixel isolation portion 31 than in the first intra-pixel isolation portion 21. Similarly, the second intra-pixel isolation portion 22 and the second inter-pixel isolation portion 32 are integrally formed, but the depths of the trenches are different. The trench is formed deeper in the second inter-pixel isolation portion 32 than in the second intra-pixel isolation portion 22.

[0117] According to the sensor pixel PXF of the fifth modification of the second embodiment of the present disclosure, it is possible to suppress scattering and reflection of light while reducing electrical and optical crosstalk by having the above structure.

[0118] (Sixth Modification) (1) Configuration Fig. 17 is a cross-sectional view illustrating a configuration of a sensor pixel PXG according to a sixth modification of the second embodiment of the present disclosure. Figs. 18A and 18B are plan views illustrating a configuration of a sensor pixel PXG according to the sixth modification of the second embodiment of the present disclosure. More specifically, Fig. 17 illustrates a cross-sectional configuration obtained by cutting the plan views of Figs. 18A and 18B along lines GB1-GB1' and GB5-GB5'. Figs. 18A and 18B illustrate planar configurations at respective positions LV1 and LV5 in the cross-sectional view of Fig. 17. Note that the planar configuration at each of positions LV2 to LV4 in the cross-sectional view of Fig. 17 is the same as the planar configuration illustrated in Figs. 16B to 16D, and thus repeated illustration is omitted. Further, a cross-sectional configuration obtained by cutting each of the plan views of Figs. 18A and 18B along lines GA1-GA1 'and GA5-GA5' is the same as the cross-sectional configuration illustrated in Fig. 15A, and thus repeated illustration is omitted.

[0119] The sensor pixel PXG illustrated in Figs. 17A to 18B is different from the sensor pixel PXF illustrated in Figs. 15A to 16E in that the first intra-pixel isolation portion 21 and the first inter-pixel isolation portion 31 are not directly connected but are connected through horizontal light shielding portions LS1(R) and LS1(L). In the sensor pixel PXG, the first trench 51A configuring the first intra-pixel isolation portion 21 and the first trench 51B configuring the first inter-pixel isolation portion 31 are not integrated. The first trench 51A and the first trench 51B are connected (communicate) through the space portion 52 configuring the horizontal light shielding portions LS1(R) and LS1(L). The first metal film 61 is embedded through the insulating film 55 in the first trenches 51A and 51B connected to the space portion 52 through the second trench.

[0120] In the first intra-pixel isolation portion 21, the first trench 51A is not provided between the positions of the horizontal light shielding portions LS1(R) and LS1 (L) and the back surface 10b. In the first intra-pixel isolation portion 21, a portion between the positions of the horizontal light shielding portions LS1(R) and LS1(L) and the back surface 10b is configured by, for example, the p-type region 12.

[0121] Similarly to the sensor pixel PXF according to the fifth modification of the second embodiment of the present disclosure, the sensor pixel PXG according to the sixth modification of the second embodiment of the present disclosure can suppress scattering and reflection of light while reducing electrical and optical crosstalk.

[0122] (2) Production Method Fig. 19 is a cross-sectional view showing a method for forming a trench suitable for the sixth modification of the second embodiment of the present disclosure in order of steps. In step ST1 of Fig. 19, a semiconductor substrate 10 on which photoelectric conversion units PD(R) and PD(L) not illustrated (refer to Fig. 18A) and the like are formed is prepared. Next, a hard mask not illustrated is formed on the front surface 10a (In Fig. 19, the lower surface) of the semiconductor substrate 10. The hard mask includes an insulating material such as a silicon nitride film (SiN film) or a silicon oxide film (SiO film).

[0123] Next, a trench T1 is formed by partially delving the front surface 10a of the semiconductor substrate 10 by dry etching using a hard mask. A depth of the trench T1 at this time corresponds to a depth of the first trench illustrated in Fig. 17.

[0124] Next, a sidewall SW is formed so as to cover a side surface and a bottom surface of the trench T1. When the sidewall SW is formed, an insulating film including, for example, a SiN film or a SiO film is formed so as to cover an inner surface of the trench T1, that is, the side surface and the bottom surface of the trench T1, and then only the insulating film covering the bottom surface of the trench T1 is removed by dry etching back.

[0125] Next, as illustrated in step ST2 of Fig. 19, the semiconductor substrate 10 is partially removed by dry etching back so as to further delve the bottom surface of the trench T1. At that time, for example, the bottom surface of the trench T1 is further dug down by a depth corresponding to the thickness of the horizontal light shielding portions LS1(R) and LS2(L) (See Fig. 17 and Fig. 16D).

[0126] Next, a predetermined alkaline aqueous solution is injected into the trench T1, and wet etching is performed to partially remove the Si (111) surface configuring the semiconductor substrate 10. As the alkali aqueous solution, KOH, NaOH, CsOH, or the like can be applied in the case of an inorganic solution, and EDP (ethylenediamine pyrocatechol aqueous solution), N2H4(hydrazine), NH4OH (ammonium hydroxide), TMAH (tetramethylammonium hydroxide), or the like can be applied in the case of an organic solution.

[0127] Here, crystal anisotropic etching using a property in which an etching rate varies depending on a plane orientation of Si (111) is performed. Specifically, in the Si (111) substrate, the etching rate in the <111> direction, that is, the <110> direction with respect to the etching rate in the direction having three Si back bonds, that is, the etching rate in the direction having one or two Si back bonds are sufficiently high.

[0128] Therefore, in the present embodiment, while etching in the X-axis direction progresses, etching hardly progresses in the Y-axis direction and the Z-axis direction. As a result, a space portion T2 communicating with the trench T1 is formed inside the semiconductor substrate 10 which is a Si (111) substrate. The space portion T2 is a space portion 52 (see Fig. 17) in which the horizontal light shielding portions LS1(R) and LS2(L) (see Fig. 17 and Fig. 16D) are arranged. Note that a distance of the progress of etching in the <110> direction can be adjusted by an etching treatment time with the alkaline aqueous solution for the semiconductor substrate 10.

[0129] Next, as illustrated in step ST3 of Fig. 19, a photoresist is embedded in a trench to be the first trench 51A (see Fig. 17) among the plurality of trenches T1. Then, as illustrated in step ST4 of Fig. 19, the surface 10a of the semiconductor substrate 10 is partially further dug down by dry etching using a photoresist to form a trench T3. The trench T3 becomes the first trench 51B and the second trench 53A which are deep as illustrated in Fig. 17. After the formation of the trench T3, the photoresist PR is removed, and the sidewall SW is further removed. Through such a process, a trench suitable for the sixth modification of the second embodiment of the present disclosure is formed.

[0130] <Application Example to Electronic Device> The technology according to the present disclosure (the present technology) can be applied to an electronic device. Fig. 20 is a diagram illustrating a configuration example of an electronic device 600 to which the present technology can be applied. As illustrated in Fig. 20, the electronic device 600 includes a solid-state imaging device 601, an optical lens 602, a shutter device 603, a drive circuit 604, and a signal processing circuit 605. The electronic device 600 is, for example, an electronic device such as a camera.

[0131] The electronic device 600 includes, as the solid-state imaging device 601, the imaging device 101 including one or more of the sensor pixels PX, PXA, PXB, PXC, PXD, PXE, PXF, and PXG illustrated in Figs. 3, 6, 8, 10, 12, 14, 15A, 15B, and 17 described above. As a result, the solid-state imaging device 601 can achieve both improvement in charge transfer efficiency and PLS suppression and can improve performance.

[0132] The optical lens 602 forms an image of image light (incident light 606) from a subject on the imaging surface of the solid-state imaging device 601. As a result, signal charges are accumulated in the solid-state imaging device 601 over a certain period of time. The shutter device 603 controls a light irradiation period and a light shielding period for the solid-state imaging device 601. The drive circuit 604 supplies a drive signal for controlling a transfer operation of the solid-state imaging device 601 and a shutter operation of the shutter device 603. In accordance with a drive signal (a timing signal) supplied from the drive circuit 604, the solid-state imaging device 601 performs signal transfer. The signal processing circuit 605 performs various kinds of signal processing on a signal (pixel signal) that is output from the solid-state imaging device 601. A video signal subjected to the signal processing is stored into a storage medium such as a memory or is output to a monitor.

[0133] Note that the electronic device 600 is not necessarily a camera and may be some other electronic device. For example, the electronic device 600 may be an imaging device such as a camera module for a mobile device such as a mobile phone.

[0134] <Application Example to Moving Body> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be implemented in a form of a device to be mounted to a moving body of any type such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, and a robot, or the like.

[0135] Fig. 21 is a block diagram illustrating an example of a schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to the present disclosure can be applied.

[0136] The vehicle control system 12000 includes a plurality of electronic control units connected to each other through a communication network 12001. In the example depicted in Fig. 21, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output unit 12052, and a vehicle-mounted network interface (I / F) 12053 are illustrated as a functional configuration of the integrated control unit 12050.

[0137] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle in accordance with various kinds of programs. For example, the drive system control unit 12010 functions as a control device for a driving force generating device for generating the driving force of the vehicle, such as an internal combustion engine, a driving motor, or the like, a driving force transmitting mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.

[0138] The body system control unit 12020 controls the operation of various kinds of devices provided to a vehicle body in accordance with various kinds of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various kinds of lamps such as a headlamp, a backup lamp, a brake lamp, a turn signal, a fog lamp, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals of various kinds of switches, can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls a door lock device, the power window device, the lamps, or the like, of the vehicle.

[0139] The outside-vehicle information detection unit 12030 detects information about the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detection unit 12030 is connected with an imaging unit 12031. The outside-vehicle information detection unit 12030 instructs the imaging unit 12031 to provide an image of the outside of the vehicle and then receives the image from the imaging section unit 12031. Base on the received image, the outside-vehicle information detection unit 12030 processes the received image to detect objects such as a human, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or processes the received image to detect distances from the objects.

[0140] The imaging unit 12031 is an optical sensor that receives light outputs an electrical signal corresponding to a received amount of light. The imaging unit 12031 can output the electrical signal as an image or can output the electrical signal as information about a measured distance. In addition, the light received by the imaging unit 12031 may be visible light or may be invisible light such as infrared rays, or the like.

[0141] The in-vehicle information detection unit 12040 detects information about the inside of the vehicle. The in-vehicle information detection unit 12040 is, for example, connected with a driver state detection unit 12041 that detects the state of a driver. The driver state detection unit 12041, for example, includes a camera that images the driver. Based on detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 may calculate a degree of fatigue of the driver or a degree of concentration of the driver or may determine whether the driver is dozing off.

[0142] The microcomputer 12051 can calculate a control target value for the driving force generating device, the steering mechanism, or the braking device based on the information about the inside or outside of the vehicle w obtained by the outside-vehicle information detection unit 12030 or the in-vehicle information detection unit 12040 and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control intended to implement functions of an advanced driver assistance system (ADAS) which functions include collision avoidance or shock mitigation for the vehicle, following driving based on a following distance, vehicle speed maintaining driving, a warning of collision of the vehicle, a warning of deviation of the vehicle from a lane, or the like.

[0143] In addition, the microcomputer 12051 can perform cooperative control intended for automated driving,(e.g., operating the vehicle without input from the driver), or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like, based on the information about the outside or inside of the vehicle is obtained by the outside-vehicle information detection unit 12030 or the in-vehicle information detection unit 12040.

[0144] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020, based on the information about the outside of the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control intended to prevent a glare by controlling the headlamp to change from a high beam to a low beam, for example, in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030.

[0145] The sound / image output unit 12052 transmits an output signal of at least one of a sound and an image to an output device capable of visually or auditorily notifying an occupant of the vehicle or the outside of the vehicle of information. In the example of Fig. 21, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are illustrated as the output device. The display unit 12062 may, for example, include at least one of an on-board display and a head-up display.

[0146] Fig. 22 is a diagram illustrating an example of an installation position of the imaging unit 12031.

[0147] In Fig. 22, the vehicle 12100 includes imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0148] The imaging units 12101, 12102, 12103, 12104, and 12105 are, for example, disposed at positions on a front nose, sideview mirrors, a rear bumper, and a back door of the vehicle 12100 as well as a position on an upper portion of a windshield within the interior of the vehicle. The imaging unit 12101 provided to the front nose and the imaging unit 12105 provided to the upper portion of the windshield within the interior of the vehicle, obtain mainly an image of the front of the vehicle 12100. The imaging units 12102 and 12103 provided to the sideview mirrors obtain mainly an image of the sides of the vehicle 12100. The imaging unit 12104 provided to the rear bumper or the back door, obtains mainly an image of the rear of the vehicle 12100. The forward images obtained by the imaging units 12101 and 12105 are used mainly to detect a preceding vehicle, a pedestrian, an obstacle, a traffic signal, a traffic sign, a lane, or the like.

[0149] Note that Fig. 22 illustrates an example of photographing ranges of the imaging units 12101 to 12104. An imaging range 12111 represents an imaging range of the imaging unit 12101 provided on the front nose. Imaging ranges 12112 and 12113 respectively represent imaging ranges of the imaging units 12102 and 12103 provided on the side-view mirrors. An imaging range 12114 represents an imaging range of the imaging unit 12104 provided on the rear bumper or the back door. A bird's-eye image of the vehicle 12100 as viewed from above is obtained by superimposing image data imaged by the imaging units 12101 to 12104, for example.

[0150] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera constituted of a plurality of imaging elements or may be an imaging element having pixels for phase difference detection.

[0151] For example, the microcomputer 12051 can determine a distance to each three-dimensional object within the imaging ranges 12111 to 12114 and a temporal change in the distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, and thereby extract, as a preceding vehicle, a nearest three-dimensional object in particular that is present on a traveling path of the vehicle 12100 and which travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or more than 0 km / hour). Further, the microcomputer 12051 can set a following distance to be maintained in front of a preceding vehicle in advance and perform automatic brake control (including following stop control), automatic acceleration control (including following start control), or the like. It is thus possible to perform cooperative control intended for automated driving that allows the vehicle to operate in an automated manner of the driver or the like.

[0152] For example, the microcomputer 12051 can classify three-dimensional object data on three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large-sized vehicle, a pedestrian, a utility pole, and other three-dimensional objects based on the distance information obtained from the imaging units 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can recognize visually and obstacles that are difficult for the driver of the vehicle 12100 to recognize visually. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a situation in which the collision risk is equal to or higher than a set value and there is thus a possibility of collision, the microcomputer 12051 outputs a warning to the driver through the audio speaker 12061 or the display unit 12062 and performs forced deceleration or avoidance steering through the drive system control unit 12010. The microcomputer 12051 can thereby assist in driving to avoid collision.

[0153] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can, for example, recognize a pedestrian by determining whether there is a pedestrian in images of the imaging units 12101 to 12104. Such recognition of a pedestrian is, for example, performed by a procedure of extracting characteristic points in the images of the imaging units 12101 to 12104 as infrared cameras and a procedure of determining whether it is the pedestrian by performing pattern matching processing on a series of characteristic points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the images of the imaging units 12101 to 12104, and thus recognizes the pedestrian, the sound / image output unit 12052 controls the display unit 12062 so that a square contour line for emphasis is displayed to be superimposed on the recognized pedestrian. The sound / image output unit 12052 may also control the display unit 12062 so that an icon or the like representing the pedestrian is displayed at a desired position.

[0154] An example of the vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technique according to the present disclosure can be applied to the imaging unit 12031 and the like in the configuration described above. Specifically, the imaging device 101 including any one or more of the sensor pixels PX, PXA, PXB, PXC, PXD, PXE, PXF, and PXG illustrated in Figs. 3, 6, 8, 10, 12, 14, 15A, 15B, 17, and the like can be applied to the imaging unit 12031. By applying the technology of the present disclosure to the imaging unit 12031, a more easily viewable captured image can be obtained, by which fatigue of the driver can be reduced.

[0155] <Other Embodiments> As described above, the present disclosure is described according to the embodiments, modifications, and application examples thereof, but it should not be understood that the description and drawings forming a part of this disclosure limit the present disclosure. Various alternative embodiments, examples, and operation techniques will be apparent to those skilled in the art from this disclosure. It is a matter of course that the present technology includes various embodiments and the like not described herein. At least one of various omissions, substitutions, or changes of the components may be made without departing from the gist of the above-described embodiments and variations. Furthermore, the effect described in the present description is illustrative only; the effect is not limited thereto and there may also be another effect.

[0156] Note that the present disclosure can also have the following configurations. (1) A photodetection device, including: a semiconductor substrate having a first surface and a second surface located on an opposite side of the first surface; and a plurality of sensor pixels provided on the semiconductor substrate, in which each of the plurality of sensor pixels includes a first pixel, and a second pixel adjacent to the first pixel in a first direction parallel to the first surface, the first pixel includes a first photoelectric conversion unit capable of photoelectrically converting light incident from the first surface side to generate a charge, a first charge holding portion that is provided on an opposite side of the first surface with the first photoelectric conversion unit interposed therebetween and is capable of holding the charge transferred from the first photoelectric conversion unit, and a first light shielding portion provided between the first surface and the first charge holding portion, the second pixel includes a second photoelectric conversion unit capable of photoelectrically converting light incident from the first surface side to generate a charge, a second charge holding portion provided on an opposite side of the first surface with the second photoelectric conversion unit interposed therebetween, and is capable of holding the charge transferred from the second photoelectric conversion unit, and a second light shielding portion provided between the first surface and the second charge holding portion, a first opening provided in the first light shielding portion and a second opening provided in the second light shielding portion are axisymmetric with a straight line, which passes through a center of the sensor pixel and is parallel to a second direction orthogonal to the first direction, as a symmetry axis in a plan view from a normal direction of the first surface, and a first end along the first opening of the first light shielding portion and a second end along the second opening of the second light shielding portion extend in directions obliquely intersecting both the first direction and the second direction in the plan view. (2) The photodetection device according to the above (1), in which the first light shielding portion and the second light shielding portion are provided in parallel to the first surface and at the same depth from the first surface. (3) The photodetection device according to the above (1) or (2), in which each of the plurality of sensor pixels further includes an intra-pixel isolation portion arranged at a position overlapping the symmetry axis between the first pixel and the second pixel. (4) The photodetection device according to the above (3), in which the intra-pixel isolation portion includes: a first intra-pixel isolation portion; and a second intra-pixel isolation portion facing the first intra-pixel isolation portion in the second direction, and a first space that allows the first pixel and the second pixel to communicate with each other is provided between the first intra-pixel isolation portion and the second intra-pixel isolation portion. (5) The photodetection device according to the above (4), in which a length of the first intra-pixel isolation portion in the second direction is longer than a length of the second intra-pixel isolation portion in the second direction. (6) The photodetection device according to the above (4) or (5), in which assuming that a direction from one of the first surface and the second surface to another is a thickness direction of the semiconductor substrate, the first intra-pixel isolation portion includes: a first trench provided in the thickness direction of the semiconductor substrate; and a first metal film provided in the first trench via an insulating film. (7) The photodetection device according to the above (6), in which in the thickness direction, the first trench is provided from the second surface to the first light shielding portion and the second light shielding portion, and is not provided from the first light shielding portion and the second light shielding portion to the first surface. (8) The photodetection device according to any one of the above (4) to (7), in which each of the first light shielding portion and the second light shielding portion is formed integrally with the first intra-pixel isolation portion. (9) The photodetection device according to any one of the above (4) to (8), further including an inter-pixel isolation portion provided on the semiconductor substrate and arranged between one sensor pixel and another sensor pixel adjacent to each other among the plurality of sensor pixels, in which the inter-pixel isolation portion is provided with a second space that allows the one sensor pixel and the another sensor pixel to communicate with each other, and the first space is wider than the second space in the plan view. (10) The photodetection device according to any one of the above (1) to (9), in which the first pixel further includes a third light shielding portion provided between the first surface and the first charge holding portion at a position closer to the first surface than the first light shielding portion, and the second pixel further includes a fourth light shielding portion provided between the first surface and the second charge holding portion at a position closer to the first surface than the second light shielding portion. (11) The photodetection device according to the above (10), in which the third light shielding portion and the fourth light shielding portion are provided in parallel to the first surface and at the same depth from the first surface. (12) The photodetection device according to the above (10) or (11), in which a third opening provided in the third light shielding portion and a fourth opening provided in the fourth light shielding portion are line-symmetric with the straight line as a symmetry axis in the plan view, and a third end along the third opening of the third light shielding portion and a fourth end along the fourth opening of the fourth light shielding portion extend in directions obliquely intersecting both the first direction and the second direction in the plan view. (13) The photodetection device according to the above (12), in which assuming that a direction from one of the first surface and the second surface to another is a thickness direction of the semiconductor substrate, the first opening and the third opening are alternately arranged in the thickness direction, and the second opening and the fourth opening are alternately arranged in the thickness direction. (14) The photodetection device according to any one of the above (10) to (13), further including an inter-pixel isolation portion provided on the semiconductor substrate and arranged between one sensor pixel and another sensor pixel adjacent to each other among the plurality of sensor pixels, in which the third light shielding portion and the fourth light shielding portion are integrally formed with a part of the inter-pixel isolation portion. (15) The photodetection device according to any one of the above (1) to (14), further including an inter-pixel isolation portion provided on the semiconductor substrate and arranged between one sensor pixel and another sensor pixel adjacent to each other among the plurality of sensor pixels, in which each of the plurality of sensor pixels further includes an intra-pixel isolation portion arranged at a position overlapping with the symmetry axis between the first pixel and the second pixel, assuming that a direction from one of the first surface and the second surface to another is a thickness direction of the semiconductor substrate, a part of the intra-pixel isolation portion and another part of the inter-pixel isolation portion each include a first trench provided in the thickness direction, each of the first light shielding portion and the second light shielding portion has a space portion provided in a direction intersecting the thickness direction of the semiconductor substrate, the first trench included in the part of the intra-pixel isolation portion and the first trench included in the another part of the inter-pixel isolation portion communicate with each other via the space portion, and a first metal film is provided in the first trench and the space portion via an insulating film. (16) The photodetection device according to the above (15), in which assuming that the first trench included in the part of the intra-pixel isolation portion is defined as a first trench A, and the first trench included in the another part of the inter-pixel isolation portion is defined as a first trench B, in the thickness direction, the first trench A is provided from the first surface to the first light shielding portion and the second light shielding portion, and is not provided from the first light shielding portion and the second light shielding portion to the first surface, and the first trench B is provided from the first surface to the second surface. (17) The photodetection device according to the above (15) or (16), in which the intra-pixel isolation portion has a line width narrower than a line width of the inter-pixel isolation portion in the plan view. (18) The photodetection device according to any one of the above (1) to (17), in which the first surface of the semiconductor substrate is a (111) plane. (19) A light detecting device, comprising: a plurality of pixel groups including a first pixel and a second pixel; an intra-pixel isolation region provided between the first pixel and the second pixel; and an inter-pixel isolation region provided between each pixel group of the plurality of pixel groups, wherein the first pixel includes:    a first photoelectric conversion region; a first light shielding portion including a first edge; and a first opening provided between the first edge of the first light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, wherein the second pixel includes: a second photoelectric conversion region; a second light shielding portion including a second edge; and a second opening provided between the second edge of the second light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, and wherein each of the first edge and the second edge is oblique with respect to a vertical portion of the intra-pixel isolation region that passes through a center of each pixel group that divides the first pixel and second pixel. (20) The light detecting device according to the above (19), wherein each of the first light shielding portion and the second light shielding portion include a material containing at least one of aluminum (Al), copper (Cu), cobalt (Co), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), molybdenum (Mo), chromium (Cr), iridium (Ir), platinum iridium, titanium nitride (TiN) or a tungsten silicon compound. (21) The light detecting device according to the above (19) or (20), further comprising a plurality of on-chip lenses, wherein each on-chip lens of the plurality of on-chip lenses is provided for each pixel group of the plurality of pixel groups. (22) The light detecting device according to the above (21), further comprising a first charge holding portion and a second charge holding portion, wherein the first light shielding portion is provided between the on-chip lens and the first charge holding portion and the second light shielding portion is provided between the on-chip lens and the second charge holding portion. (23) The light detecting device according to the above (19) to (22), wherein the first light shielding portion and the second light shielding portion are each formed integrally with the inter-pixel isolation region. (24) The light detecting device according to the above (19) to (23), wherein the first opening and the second opening are substantially bilaterally symmetrical with each other in a plan view. (25) The light detecting device according to the above (19) to (24), wherein the first edge and the second edge form acute angles with respect to a horizontal line perpendicular to the vertical portion of the intra-pixel isolation region that passes through the center of each pixel group. (26) The light detecting device according to the above (22), wherein the first pixel further comprises: a third light shielding portion including a third edge; and a third opening provided between the third edge of the third light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, wherein the third light shielding portion is provided between the on-chip lens and the first light shielding portion; and wherein the second pixel further comprises: a fourth light shielding portion including a fourth edge; and a fourth opening provided between the fourth edge of the fourth light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, wherein the fourth light shielding portion is provided between the on-chip lens and the second light shielding portion. (27) The light detecting device according to the above (26), wherein each of the third edge and the fourth edge is oblique with respect to the vertical portion of the intra-pixel isolation region and is oblique with respect to a horizontal portion of the intra-pixel isolation region. (28) The light detecting device according to the above (26), wherein parts of the first light shielding portion overlap with parts of the third light shielding portion in a cross-sectional view and wherein parts of the second light shielding portion overlap with parts of the fourth light shielding portion in the cross-sectional view. (29) The light detecting device according to the above (26), wherein the first photoelectric conversion region is provided between parts of the first light shielding portion and parts of the third light shielding portion in a cross-sectional view and wherein the second photoelectric conversion region is provided between parts of the second light shielding portion and parts of the fourth light shielding portion in the cross-sectional view. (30) The light detecting device according to the above (26), wherein parts of the first light shielding portion overlap with parts of the third light shielding portion in a plan view and wherein parts of the second light shielding portion overlap with parts of the fourth light shielding portion in the plan view. (31) The light detecting device according to the above (19) to (21), further comprising a first space provided between a first intra-pixel isolation region and a second intra-pixel isolation region of the intra-pixel isolation region to allow the first pixel and the second pixel of a pixel group to communicate with each other. (32) The light detecting device according to the above (19) to (21), further comprising a second space provided between a first inter-pixel isolation region and a second inter-pixel isolation region of the inter-pixel isolation region to allow a first pixel group and a second pixel group, adjacent to the first pixel group of the plurality of pixel groups to communicate with each other. (33) The light detecting device according to the above (26), wherein a combination of the first light shielding portion and the third light shielding portion completely covers the first charge holding portion in a cross-sectional view and wherein a combination of the second light shielding portion and the fourth light shielding portion completely covers the second charge holding portion in the cross-sectional view. (34) The light detecting device according to the above (26), wherein the first opening and the third opening are provided at opposite ends of the first pixel in a plan view and the second opening and the fourth opening are provided at opposite ends of the second pixel in the plan view. (35) The light detecting device according to the above (26), wherein the first opening is provided diagonally across from the third opening in the first pixel in a plan view and the second opening is provided diagonally across from the fourth opening in the second pixel in the plan view. (36) An electronic device, comprising: an optical system; a light detecting device that receives light from the optical system, the light detecting device including: a plurality of pixel groups including a first pixel and a second pixel; an intra-pixel isolation region provided between the first pixel and the second pixel; and an inter-pixel isolation region provided between each pixel group of the plurality of pixel groups, wherein the first pixel includes: a first photoelectric conversion region; a first light shielding portion including a first edge; and a first opening provided between the first edge of the first light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, wherein the second pixel includes: a second photoelectric conversion region; a second light shielding portion including a second edge; and a second opening provided between the second edge of the second light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, and wherein each of the first edge and the second edge is oblique with respect to a vertical portion of the intra-pixel isolation region that passes through a center of each pixel group that divides the first pixel and second pixel; and a digital signal processor that processes signals received from the light detecting device. (37) The electronic device according to the above (36), wherein each of the first light shielding portion and the second light shielding portion include a material containing at least one of aluminum (Al), copper (Cu), cobalt (Co), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), molybdenum (Mo), chromium (Cr), iridium (Ir), platinum iridium, titanium nitride (TiN) or a tungsten silicon compound. (38) The electronic device according to the above (36) or (37), further comprising a plurality of on-chip lenses, wherein each on-chip lens of the plurality of on-chip lenses is provided for each pixel group of the plurality of pixel groups.

[0157] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

[0158] 10 Semiconductor substrate 10a Front surface 10b Back surface 11, 55, 56 Insulating film 12, 15 P-type region 13, 14 N-type region 20 Intra-pixel isolation portion 21 First intra-pixel isolation portion 22 Second intra-pixel isolation portion 23 Overflow path 30 Inter-pixel isolation portion 31 First inter-pixel isolation portion 32 Second inter-pixel isolation portion 51, 51A, 51B, T1 First trench 52, T2 Space portion 53, 53A, 53B, T3 Second trench 61 First metal film 62 Second metal film 101 Imaging device 111 Pixel array portion 112 Vertical drive unit 113 Column signal processing unit 114 Horizontal drive unit 115 System control unit 116 Pixel drive line 118 Signal processing unit 119 Data storage unit 600 Electronic device 601 Solid-state imaging device 602 Optical lens 603 Shutter device 604 Drive circuit 605 Signal processing circuit 606 Incident light 12000 Vehicle control system 12001 Communication network 12010 Drive system control unit 12020 Body system control unit 12030 Outside-vehicle information detection unit 12030 Body system control unit 12031 Imaging unit 12040 In-vehicle information detection unit 12041 Driver state detection unit 12050 Integrated control unit 12051 Microcomputer 12052 Sound / image output unit 12061 Audio speaker 12062 Display unit 12063 Instrument panel 12100 Vehicle 12101, 12102, 12103, 12104, 12105 Imaging unit 12111, 12112, 12113, 12114 Imaging range AMP Amplification transistor CF Color filter CL Straight line EDG1, EDG2 End FD Charge-voltage conversion unit H, H', H1, H2, H3, H4 Opening I Vehicle-mounted network LS1(R), LS1(L), LS2(R), LS2(L) Horizontal light shielding portion MEM(R), MEM(L) Charge holding portion OCL On-chip lens OFG Discharge transistor OVL Overlapping region PD, PD(R), PD(L) Photoelectric conversion unit PR Photoresist PX(R), PX(L) Pixel PX, PXA, PXB, PXC, PXD, PXE, PXF, PXG Sensor pixel RST Reset transistor S20, S30 Space SEL Selection transistor SW Sidewall T1, T3 Trench T2 Space TG(R)A, TG(L)A, TG(R)B, TG(L)B, TG(R)C, TG(L)C Transfer transistor TRG(R), TRG(L), TRX(R), TRX(L), TRZ(R), TRZ(L) Transfer gate VDD Power supply VG Vertical gate VSL Vertical signal line

Claims

1. A light detecting device, comprising:    a plurality of pixel groups including a first pixel and a second pixel;    an intra-pixel isolation region provided between the first pixel and the second pixel; and an inter-pixel isolation region provided between each pixel group of the plurality of pixel groups,    wherein the first pixel includes:    a first photoelectric conversion region;    a first light shielding portion including a first edge; and    a first opening provided between the first edge of the first light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region,    wherein the second pixel includes:    a second photoelectric conversion region;    a second light shielding portion including a second edge; and    a second opening provided between the second edge of the second light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, and wherein each of the first edge and the second edge is oblique with respect to a vertical portion of the intra-pixel isolation region that passes through a center of each pixel group that divides the first pixel and second pixel.

2. The light detecting device of claim 1, wherein each of the first light shielding portion and the second light shielding portion include a material containing at least one of aluminum (Al), copper (Cu), cobalt (Co), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), molybdenum (Mo), chromium (Cr), iridium (Ir), platinum iridium, titanium nitride (TiN) or a tungsten silicon compound.

3. The light detecting device of claim 1, further comprising a plurality of on-chip lenses, wherein each on-chip lens of the plurality of on-chip lenses is provided for each pixel group of the plurality of pixel groups.

4. The light detecting device of claim 3, further comprising a first charge holding portion and a second charge holding portion, wherein the first light shielding portion is provided between the on-chip lens and the first charge holding portion and the second light shielding portion is provided between the on-chip lens and the second charge holding portion.

5. The light detecting device of claim 1, wherein the first light shielding portion and the second light shielding portion are each formed integrally with the inter-pixel isolation region.

6. The light detecting device of claim 1, wherein the first opening and the second opening are substantially bilaterally symmetrical with each other in a plan view.

7. The light detecting device of claim 1, wherein the first edge and the second edge form acute angles with respect to a horizontal line perpendicular to the vertical portion of the intra-pixel isolation region that passes through the center of each pixel group.

8. The light detecting device of claim 4, wherein  the first pixel further comprises:    a third light shielding portion including a third edge; and    a third opening provided between the third edge of the third light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region,    wherein the third light shielding portion is provided between the on-chip lens and the first light shielding portion; and wherein the second pixel further comprises:    a fourth light shielding portion including a fourth edge; and    a fourth opening provided between the fourth edge of the fourth light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region,    wherein the fourth light shielding portion is provided between the on-chip lens and the second light shielding portion.

9. The light detecting device of claim 8, wherein each of the third edge and the fourth edge is oblique with respect to the vertical portion of the intra-pixel isolation region and is oblique with respect to a horizontal portion of the intra-pixel isolation region.

10. The light detecting device of claim 8, wherein parts of the first light shielding portion overlap with parts of the third light shielding portion in a cross-sectional view and wherein parts of the second light shielding portion overlap with parts of the fourth light shielding portion in the cross-sectional view.

11. The light detecting device of claim 8, wherein the first photoelectric conversion region is provided between parts of the first light shielding portion and parts of the third light shielding portion in a cross-sectional view and wherein the second photoelectric conversion region is provided between parts of the second light shielding portion and parts of the fourth light shielding portion in the cross-sectional view.

12. The light detecting device of claim 8, wherein parts of the first light shielding portion overlap with parts of the third light shielding portion in a plan view and wherein parts of the second light shielding portion overlap with parts of the fourth light shielding portion in the plan view.

13. The light detecting device of claim 1, further comprising a first space provided between a first intra-pixel isolation region and a second intra-pixel isolation region of the intra-pixel isolation region to allow the first pixel and the second pixel of a pixel group to communicate with each other.

14. The light detecting device of claim 1, further comprising a second space provided between a first inter-pixel isolation region and a second inter-pixel isolation region of the inter-pixel isolation region to allow a first pixel group and a second pixel group, adjacent to the first pixel group of the plurality of pixel groups to communicate with each other.

15. The light detecting device of claim 8, wherein a combination of the first light shielding portion and the third light shielding portion completely covers the first charge holding portion in a cross-sectional view and wherein a combination of the second light shielding portion and the fourth light shielding portion completely covers the second charge holding portion in the cross-sectional view.

16. The light detecting device of claim 8, wherein the first opening and the third opening are provided at opposite ends of the first pixel in a plan view and the second opening and the fourth opening are provided at opposite ends of the second pixel in the plan view.

17. The light detecting device of claim 8, wherein the first opening is provided diagonally across from the third opening in the first pixel in a plan view and the second opening is provided diagonally across from the fourth opening in the second pixel in the plan view.

18. An electronic device, comprising:    an optical system;    a light detecting device that receives light from the optical system, the light detecting device including:    a plurality of pixel groups including a first pixel and a second pixel;    an intra-pixel isolation region provided between the first pixel and the second pixel; and    an inter-pixel isolation region provided between each pixel group of the plurality of pixel groups,    wherein the first pixel includes:       a first photoelectric conversion region;       a first light shielding portion including a first edge; and       a first opening provided between the first edge of the first light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region,    wherein the second pixel includes:       a second photoelectric conversion region;       a second light shielding portion including a second edge; and       a second opening provided between the second edge of the second light shielding portion and portions of the intra-pixel isolation region and the inter-pixel isolation region, and    wherein each of the first edge and the second edge is oblique with respect to a vertical portion of the intra-pixel isolation region that passes through a center of each pixel group that divides the first pixel and second pixel; and a digital signal processor that processes signals received from the light detecting device.

19. The electronic device of claim 18, wherein each of the first light shielding portion and the second light shielding portion include a material containing at least one of aluminum (Al), copper (Cu), cobalt (Co), tungsten (W), titanium (Ti), tantalum (Ta), nickel (Ni), molybdenum (Mo), chromium (Cr), iridium (Ir), platinum iridium, titanium nitride (TiN) or a tungsten silicon compound.

20. The electronic device of claim 18, further comprising a plurality of on-chip lenses, wherein each on-chip lens of the plurality of on-chip lenses is provided for each pixel group of the plurality of pixel groups.

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