Plasma processing method

Abstract

In order to provide a plasma processing method capable of achieving both suppression of pattern collapse and vertical processed shape, the present invention provides a plasma processing method for plasma-etching a film to be etched using a mask of a carbon-containing film and a mask of an inorganic film, the plasma processing method comprising a first step for plasma-etching the film to be etched using the mask of the carbon-containing film and the mask of the inorganic film, a second step for trimming the mask of the carbon-containing film after the first step, and a third step for overetching the film to be etched after the second step.

Description

Plasma treatment method

[0001] The present invention relates to a plasma processing method for processing semiconductor devices using plasma.

[0002] As semiconductor device processing speeds increase, pattern miniaturization is progressing year by year, and as pitch sizes become smaller, high-precision miniaturization processing technologies are required. In the field of so-called dry etching, which involves etching a film to be processed using plasma, a method for miniaturizing patterns has generally been used in which a carbon-based mask is trimmed by dry etching before processing the material to be etched, thereby reducing the processing dimensions of the material to be etched (see, for example, Patent Document 1). In addition, pattern collapse has been suppressed by reducing the processing dimensions during processing of the material to be etched (see, for example, Patent Document 2).

[0003] JP 2013-89827 A JP 2007-234870 A

[0004] In recent years, patterns have become higher in aspect ratio due to the progress of pitch size reduction, and when a carbon-based mask is trimmed using the technology described in Patent Document 1, the carbon-based mask pattern is thinned, which significantly reduces plasma resistance and increases the probability of the semiconductor material being etched being etched, causing the semiconductor wiring to tilt sideways, or so-called pattern collapse. This places a limit on the amount of reduction in processing dimensions.

[0005] Furthermore, the technique described in Patent Document 2 is insufficient in suppressing pattern collapse for recent high aspect structures. Furthermore, when the technique is used, etching does not progress easily in the lower part of the film to be etched, and the lower part of the pattern spreads in the width direction, which is called a skirt shape, and there is a concern that perpendicular processing cannot be achieved.

[0006] An object of the present invention is to provide a plasma processing method that can simultaneously suppress pattern collapse and produce a vertical processed shape.

[0007] The present invention has the following configuration to achieve the above object.

[0008] A plasma processing method for plasma etching a film to be etched using a mask of a carbon-containing film and a mask of an inorganic film, the plasma processing method comprising: a first step of plasma etching the film to be etched using the mask of the carbon-containing film and the mask of the inorganic film; a second step of trimming the mask of the carbon-containing film after the first step; and a third step of over-etching the film to be etched after the second step.

[0009] The present invention can provide a plasma processing method that can suppress pattern collapse and simultaneously produce a vertical processed shape.

[0010] The present invention relates to a plasma etching apparatus and a plasma etching method, and a plasma etching method for etching a semiconductor substrate using the plasma etching method of the present invention.

[0011] A plasma processing apparatus used in an embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a schematic longitudinal cross-sectional view of an ECR (Electron Cyclotron Resonance) microwave plasma etching apparatus used in this embodiment. A shower plate 105 (e.g., made of quartz) for introducing a processing gas into the vacuum vessel 101 and a dielectric window 106 (e.g., made of quartz) are installed at the top of the open-topped vacuum vessel 101, and the vessel is sealed to form a processing chamber 107.

[0012] The shower plate 105 has a plurality of holes for allowing a processing gas to flow, and gas supplied from a gas supply unit 108 passes through the plurality of holes and is introduced into the processing chamber 107. A vacuum exhaust unit (not shown) is connected to the vacuum vessel 101 via a vacuum exhaust port 109. A waveguide 110 for transmitting electromagnetic waves is provided above the dielectric window 106 to transmit power for generating plasma to the processing chamber 107.

[0013] The high frequency wave (plasma generating high frequency wave) transmitted to the waveguide 110 is generated from an oscillator 103 under the control of a first high frequency power supply 104. In addition, the first high frequency power supply 104 includes a pulse oscillator, and therefore can generate a time-modulated intermittent high frequency wave or a continuous high frequency wave.

[0014] Although the frequency of the high frequency is not particularly limited, microwaves (high frequency waves for generating plasma) of 2.45 GHz are used in this embodiment. A magnetic field generating coil 111 for forming a magnetic field is provided on the outer periphery of the processing chamber 107. The power oscillated by the oscillator 103 interacts with the formed magnetic field to generate high-density plasma within the processing chamber 107.

[0015] The magnetic field generating coil 111 is covered by a coil case 112. A sample stage 102 is provided below the vacuum chamber 101, facing the shower plate 105. The electrode surface of the sample stage 102 is covered with a sprayed film (not shown), and a DC power supply 117 is connected to the sample stage 102 via a high-frequency filter 116. A second high-frequency power supply 115, which is a bias high-frequency power supply, is connected to the sample stage 102 via a matching circuit (matching box) 114.

[0016] A temperature regulator (not shown) is also connected to the sample stage 102. A transport means (not shown) transports the wafer 113 to the processing chamber 107 of the vacuum vessel 101 and places it on the sample stage 102. The wafer 113, which is the sample transported into the processing chamber 107, is attracted to the sample stage 102 by the electrostatic force of a DC voltage applied from a DC power supply 117, and the temperature is regulated.

[0017] After a desired processing gas is supplied to the processing chamber 107 by the gas supply device 108, the pressure inside the vacuum vessel 101 is controlled to a predetermined level via the vacuum exhaust device, and high frequency power is supplied from the oscillator 103 into the processing chamber 107 to generate plasma inside the processing chamber 107. By applying high frequency power from the second high frequency power supply 115 connected to the sample stage 102, ions are attracted from the plasma to the wafer, and the wafer 113 is subjected to plasma processing (etching).

[0018] Furthermore, the second high frequency power supply 115 is equipped with a pulse oscillator, and therefore can apply time-modulated intermittent high frequency power or continuous high frequency power to the sample stage 102 .

[0019] An example of the present invention using the above-described plasma processing apparatus will now be described. Figure 2 is a schematic diagram showing the structure of a sample used in the example of the present invention. Figure 2(a) is a three-dimensional view of the test sample, which has a line pattern structure. Figure 2(b) is a cross-sectional view of the test sample.

[0020] From the top, an Atomic Carbon Layer (ACL) 201, a SiN (40 nm thick) 202, a PolySi (90 nm thick) 203, and a SiO (300 nm thick) 204 are formed on a silicon substrate having a diameter of 12 inches, and the ACL is a mask having a line pattern with a line width of 25 nm.

[0021] The etching process performed in one embodiment of the present invention is shown in Figure 3(a) and subsequent figures. Figure 3(b) shows a process of etching SiN, an inorganic film mask, using ACL, a carbon-containing film, as a mask (pretreatment for plasma treatment; hereinafter, this may be referred to as "pretreatment"). Figure 3(c) shows the first step of the present invention, in which PolySi, a film to be etched, is etched vertically (in the depth direction) and laterally (in the width direction) using ACL and SiN as masks. Figure 3(d) shows the second step of the present invention, in which ACL, a carbon-containing film mask, is trimmed to the width of PolySi. Figure 3(e) shows the third step of the present invention, in which PolySi, a film to be etched, is overetched.

[0022] Table 1 shows examples of the pretreatment step and the treatment conditions for the first to third steps of the present invention.

[0023] The pretreatment step uses CHF as the etching gas. ３ , Ar, O ２ The SiN inorganic film mask is etched using the ACL as a mask by using a mixed gas of the above. ３The content (volume %) of CHF is preferably 20 to 50% (under the conditions shown in Table 1). ３ The content of is (70 / (170+70+5))*100≒28.6%). A content of more than 50% is not preferable because the etching rate becomes too high. A content of less than 20% causes the etching rate to become too slow, resulting in the problem of the process taking too long. The pressure of the mixed gas is set to 0.8 Pa in Table 1, but this can be achieved within the pressure range of 0.1 to 3.0 Pa for general etching gases.

[0024] From the viewpoint of shape control, the effective power of the RF bias (the product of power and duty; for example, if the power shown in Table 1 is 800 W and the duty is 25%, the effective power is 200 W) is preferably in the range of 100 W to 300 W. If the effective power is less than 100 W, it is difficult to ensure perpendicular etching, and if it is more than 300 W, it is difficult to ensure mask selectivity.

[0025] Specific processing conditions for the steps of the present invention will be described below. The first step of the present invention uses CF4 as the etching gas. ４ N ２ , O ２ The pattern size is reduced by using a mixed gas containing added N, and etching the PolySi material to be etched in the vertical direction using ACL and SiN as a mask, while etching the SiN inorganic film mask and the PolySi material to be etched in the horizontal direction. ２ , O ２ By adjusting the mixing ratio of N, it is possible to adjust the etching ratio in the horizontal direction to the vertical direction. ２ is 10% to 30% (volume %), O ２ It is preferable to use 5% to 15% (volume %) of N ２ : Approximately 27%, O ２: about 8%). From the viewpoint of in-plane uniformity, it is preferable to use a processing pressure of 0.4 to 0.8 Pa. From the viewpoint of shape control, it is preferable to use the lower limit of microwave output, 400 W to 600 W. If the microwave output is 600 W or more, there is a large deviation, making it difficult to control the vertical shape. It is preferable to adjust the power and duty of the RF bias so that the effective power is 80 W to 120 W. If it is less than 80 W, the lateral etching is slower than the vertical etching, and if it is more than 120 W, the lateral etching is faster than the vertical etching, making it impossible to obtain a vertical shape.

[0026] The second step of the present invention uses O as the etching gas. ２ , N ２ , Ar is used and a small RF bias (10 W in Table 1) is applied to trim the ACL mask, which is a mask of a carbon film, to a line width of 15 nm. ２ The mixing ratio is preferably 20 to 40% (volume %) from the viewpoint of etching rate control. From the viewpoint of uniformity of the trimming width, it is preferable to use an RF bias with an effective power of 5 W to 20 W. If it is less than 5 W, deposits will adhere and there will be places where trimming is slow, and if it is more than 20 W, the height of the ACL mask will be excessively reduced.

[0027] The third step of the present invention is to use CF as the etching gas. ４ , S.F. ６ , N ２ The etching gas mixture ratio is CF4, CF5, CF6, CF7, CF8, CF9, CF10, CF11, CF12, CF13, CF14, CF15, CF16, CF17, CF18, CF19, CF20, CF21, CF22, CF23, CF24, CF25, CF26, CF27, CF28, CF29, CF30, CF31, CF32, CF33, CF34, CF35, CF36, CF37, CF38, CF39, CF41, CF42, CF43, CF44, CF45, CF46, CF47, CF48, CF49, CF49, CF41, CF41, CF42, CF43, CF44, ４ The volume percentage of SF is 15 to 30%, and the volume percentage of He is 30 to 60%. ６It is preferable to add 2 to 7% (volume %) of SiO 2 . It is preferable to use an RF bias with a duty of 25% or more to ensure vertical etching and an etching rate while removing the skirt shape. If the duty is less than 25%, it is difficult to remove the skirt shape and ensure verticality. Under the etching conditions used here, lateral etching of the polysilicon does not occur, so the etching process is carried out while maintaining the processing dimensions formed in the upper layer.

[0028] Comparative Example: Figure 4 shows the shape obtained when etching is performed using conventional technology. In the conventional technology, when reducing the line width of PolySi to 15 nm, the ACL mask is thinned by trimming (second step) before etching SiN and PolySi (first step). This increases the aspect ratio of the ACL mask, significantly reducing its plasma resistance and causing the ACL mask to collapse during PolySi etching (first step). Furthermore, during PolySi etching (first step), a step occurs due to the difference in reduction ratio between the carbon-based mask (ACL) and the inorganic film (SiN and PolySi). This step acts as a mask, preventing the lower part of the PolySi from being etched, resulting in a skirt shape.

[0029] The feature of this invention is that by inserting the second step of trimming during the first step of etching the Poly-Si, the pattern size can be reduced after the ACL mask height is reduced, so that pattern collapse does not occur. Furthermore, by inserting the third step of over-etching after the ACL mask size is reduced, the skirt shape is removed and a vertical shape is obtained.

[0030] As a result, in this test, using a mask pattern showing an initial dimension of 25 nm, it was possible to realize polysilicon wiring processing with a line width of 15 nm and a film thickness of 90 nm without any breaks or bends.

[0031] Similarly, when an attempt was made to achieve polysilicon wiring processing with a line width of 15 nm and a film thickness of 90 nm by simply trimming the initial ACL mask under the conditions of FIG. 4, which is a conventional technique, the photoresist pattern of the ACL mask collapsed during etching of the polysilicon, causing problems such as disconnection and bending of the polysilicon wiring.

[0032] Figure 5 shows a comparison of etching results using the conventional technology and the technology of the present invention. In Figure 5(a), the horizontal axis shows inline CD, which indicates the pattern dimension, and the vertical axis shows LER (line edge roughness), which is an index of the magnitude of pattern collapse. It can be seen that with the conventional technology, the LER deteriorates significantly as the inline CD decreases, whereas with the technology of the present invention, the deterioration of LER is suppressed.

[0033] 5B shows a comparison of the LER and skirt shape results for the conventional technology and the technology of the present invention when the inline CD was 15 nm in this test. By using the technology of the present invention, the LER was improved from 3.6 nm to 1.4 nm, and the skirt shape was also improved from 2.6 nm for the conventional technology to 0.6 nm. Therefore, the technology of the present invention suppressed pattern collapse and skirt shape.

[0034] The present example is a process condition optimized for a test sample of a semiconductor device, and the processing method for Poly Si, SiN, and ACL is not limited to the present working conditions.

[0035] Although the present invention has been described with reference to a polysilicon wiring processing process, the present invention is not limited thereto, and the method of the present invention can also be applied to wiring processing of materials other than polysilicon in semiconductor device manufacturing processes, and can be applied to wiring processing of, for example, Si, SiN, SiO, SiON, TiN, WSi, etc. Furthermore, processing of inorganic mask films is not limited to SiN, and can be applied to processing of, for example, Si, SiO, SiON, TiN, WSi, etc. It is preferable to determine the optimum values ​​of the gases to be used and the processing conditions depending on the material to be processed.

[0036] Although the present invention uses a plasma etching apparatus using microwaves and a magnetic field, it is applicable regardless of the plasma generation method. For example, the same effect can be obtained when using a helicon wave etching apparatus, an inductively coupled etching apparatus, a capacitively coupled etching apparatus, etc.

[0037] 101 vacuum vessel, 102 wafer mounting electrode, 103 electromagnetic wave generating power supply, 104 first high frequency power supply, 105 shower plate, 106 dielectric window, 107 processing chamber, 108 gas supply device, 109 vacuum exhaust port, 110 waveguide, 111 magnetic field generating coil, 112 coil case, 113 wafer, 114 matching circuit, 115 second high frequency power supply, 116 high frequency filter, 117 DC power supply, 201 carbon-based film, 202 inorganic film, 203 film to be etched, 204 base film.

Claims

1. A plasma processing method for plasma etching a film to be etched using a mask of a carbon-containing film and a mask of an inorganic film, comprising: a first step of plasma etching the film to be etched using the mask of the carbon-containing film and the mask of the inorganic film; a second step of trimming the mask of the carbon-containing film after the first step; and a third step of over-etching the film to be etched after the second step.

2. A plasma processing method according to claim 1, wherein the second step reduces the dimensions of the inorganic film mask.

3. A plasma processing method as claimed in claim 1, characterized in that in the third step, the high frequency power supplied to the sample stage on which the sample having the etched film is placed is greater than the high frequency power in the first step, or the duty ratio of the pulse modulated high frequency power supplied to the sample stage in the third step is greater than the duty ratio in the first step.

4. The plasma processing method according to claim 1, wherein the inorganic film is a silicon nitride film (SiN), a silicon film (Si) or a silicon oxide film (SiO).

5. The plasma processing method according to claim 1, wherein the film to be etched is a polysilicon film (Poly-Si).

6. A plasma processing method according to claim 1, wherein the inorganic film is a silicon nitride film (SiN), and the film to be etched is a polysilicon film (Poly-Si).

7. The plasma processing method according to claim 1, wherein the plasma in the first step is a mixture of a fluorine-containing gas and N ２ Gas and O ２ 2. A method for treating a plasma generated by a mixture of gases.

8. The plasma processing method according to claim 6, wherein the plasma in the first step is a mixture of a fluorine-containing gas and N ２ Gas and O ２ 2. A method for treating a plasma generated by a mixture of gases.

9. The plasma processing method according to claim 7, wherein the fluorine-containing gas is CF ４ 2. A plasma processing method comprising the steps of:

10. The plasma processing method according to claim 8, wherein the fluorine-containing gas is CF ４ 2. A plasma processing method comprising the steps of:

11. In the plasma processing method according to claim 5, the overetching is performed by using CF ４ Gas, He gas and SF ６ Gas and N ２ A plasma processing method characterized in that it is carried out using a plasma generated by a mixture of gases.

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