Semiconductor device and power conversion device

Abstract

A semiconductor device (21) comprises: a first semiconductor element (30H) that forms an upper arm; and a second semiconductor element (30L) that forms a lower arm. The first semiconductor element (30H) and the second semiconductor element (30L) are provided side by side. These semiconductor devices constitute a semiconductor element group. The semiconductor device (21) comprises a snubber circuit component (40) that forms a snubber circuit (13) connected in parallel with the upper arm and the lower arm. The snubber circuit component (40) is provided adjacent to the semiconductor element group in the element alignment direction in which the first semiconductor element (30H) and the second semiconductor element (30L) are aligned.

Description

Semiconductor device and power conversion device CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on Patent Application No. 2023-129544 filed in Japan on August 8, 2023, and the contents of the original application are incorporated by reference in their entirety.

[0002] The disclosure herein relates to semiconductor devices and power conversion devices.

[0003] 1 to 3, etc., Patent Document 1 discloses a module in which snubber circuits are adjacent to both a semiconductor element constituting an upper arm and a semiconductor element constituting a lower arm. The snubber circuit is arranged alongside both semiconductor elements in a direction perpendicular to the direction in which the semiconductor elements of the upper arm and the semiconductor elements of the lower arm are aligned.

[0004] JP 2015-207739 A

[0005] According to the module of Patent Document 1, the snubber circuit faces both semiconductor elements, and is therefore susceptible to the effects of heat radiation from both semiconductor elements.

[0006] An object of the disclosure in this specification is to provide a semiconductor device and a power conversion device that attempt to suppress the thermal influence of a semiconductor element on a snubber circuit.

[0007] The multiple aspects disclosed in this specification employ different technical means to achieve their respective objectives. Furthermore, the reference symbols in parentheses in the claims and this section are merely examples showing the correspondence between specific means described in the embodiments below as one aspect, and do not limit the technical scope.

[0008] One disclosed semiconductor device includes a first semiconductor element forming an upper arm, a second semiconductor element arranged parallel to the first semiconductor element and forming a lower arm, and a snubber circuit component forming a snubber circuit connected in parallel to the upper arm and the lower arm, the snubber circuit component being arranged adjacent to a semiconductor element group formed by arranging the first semiconductor element and the second semiconductor element in the element arrangement direction. Also disclosed is a power conversion device including the aforementioned semiconductor device and a smoothing capacitor.

[0009] This semiconductor device provides a snubber circuit component that is adjacent to one of the first and second semiconductor elements arranged side by side but not the other. This reduces the thermal effect of the other of the semiconductor elements constituting the upper and lower arms on the snubber circuit. This semiconductor device can reduce the thermal effect of the semiconductor elements on the snubber circuit. Furthermore, a power conversion device that includes this semiconductor device can be provided that can reduce the thermal effect of the semiconductor elements on the snubber circuit.

[0010] 1 is a circuit diagram of a power conversion device according to a first embodiment; FIG. 2 is a plan view for explaining the configuration of a semiconductor device; FIG. 3 is a cross-sectional view showing the configuration of a part of a semiconductor device; FIG. 4 is a plan view showing the positional relationship between semiconductor elements and snubber circuits of upper and lower arms; FIG. 5 is a plan view showing the positional relationship between semiconductor elements and snubber circuits of upper and lower arms; FIG. 6 is a plan view showing the positional relationship between semiconductor elements and snubber circuits of upper and lower arms;

[0011] Hereinafter, several embodiments for carrying out the present disclosure will be described with reference to the drawings. In each embodiment, parts corresponding to matters described in the preceding embodiment will be assigned the same reference numerals, and duplicate descriptions may be omitted. In each embodiment, when only a part of the configuration is described, other previously described embodiments may be applied to the other parts of the configuration. In addition to combinations of parts that are specifically specified as being combinable in each embodiment, it is also possible to partially combine embodiments even if not specified, as long as there is no particular problem with the combination.

[0012] First Embodiment A first embodiment disclosing an example of a power conversion device will be described with reference to FIGS. 1 to 6. Application examples of the power conversion device are as follows. The power conversion device can be applied to an on-board power conversion device mounted on vehicles such as electric vehicles, hybrid vehicles, and plug-in hybrid vehicles. The power conversion device can also be mounted on flying objects such as electric vertical take-off and landing aircraft and drones, ships, construction machinery, agricultural machinery, etc. Below, an example in which the power conversion device is applied to a vehicle will be described.

[0013] As shown in FIG. 1 , a vehicle drive system 1 includes a DC power supply 2, a motor generator 3, and a power conversion device 4. The DC power supply 2 is a DC voltage source configured with a chargeable and dischargeable secondary battery. The secondary battery is, for example, a lithium-ion battery, a nickel-metal hydride battery, or the like. The motor generator 3 is, for example, a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, i.e., an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 converts power between the DC power supply 2 and the motor generator 3.

[0014] The power conversion device 4 includes a power conversion circuit. As shown in Fig. 1, the power conversion device 4 includes a smoothing capacitor 5 and an inverter 6, which is a power conversion circuit. The smoothing capacitor 5 mainly functions to smooth the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7, which is a power supply line on the high potential side, and an N line 8, which is a power supply line on the low potential side.

[0015] The smoothing capacitor 5 is connected in parallel to the DC power supply 2. The P line 7 is connected to the positive terminal of the DC power supply 2. The N line 8 is connected to the negative terminal of the DC power supply 2. The positive terminal of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative terminal of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The P line 7 includes a plurality of P bus bars that connect electrical components to each other. The N line 8 includes a plurality of N bus bars that connect electrical components to each other.

[0016] The inverter 6 is a DC-AC conversion circuit. In accordance with switching control by a control circuit provided on the control circuit board, the inverter 6 converts DC voltage into three-phase AC voltage and outputs it to the motor generator 3. This operation drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 in response to rotational force from the wheels into DC voltage in accordance with switching control of the control circuit. The converted DC power is output to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power source 2 and the motor generator 3.

[0017] The control circuit for the switching element generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on, for example, a torque request input from a host ECU and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit. The various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as the drive command. The control circuit is configured to include, for example, a processor and a memory. PWM is an abbreviation for Pulse Width Modulation.

[0018] The inverter 6 includes upper and lower arm circuits 9 corresponding to each of the three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 have an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side and the lower arm 9L on the N line 8 side.

[0019] The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via an output line 10. Of the upper and lower arm circuits 9, the U-phase upper and lower arm circuit 9U is connected to the U-phase winding 3a via a corresponding output line 10. The V-phase upper and lower arm circuit 9V is connected to the V-phase winding 3a via a corresponding output line 10. The W-phase upper and lower arm circuit 9W is connected to the W-phase winding 3a via a corresponding output line 10. At least a portion of the output lines 10 is formed of a conductive member such as a bus bar.

[0020] The inverter 6 has six arms. Each arm is equipped with a switching element. The number of switching elements constituting each arm is not particularly limited. There may be one or more. When there are more than one switching elements, the multiple switching elements connected in parallel are turned on and off at the same timing by a common gate drive signal.

[0021] In this specification, an n-channel MOSFET 11 is used as the switching element constituting each arm. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the upper arm 9H, the drain of the MOSFET 11 is connected to the P line 7. In the lower arm 9L, the source of the MOSFET 11 is connected to the N line 8. The source of the MOSFET 11 in the upper arm 9H and the drain of the MOSFET 11 in the lower arm 9L are connected to each other.

[0022] A freewheeling diode 12 is connected in antiparallel to each MOSFET 11. The diode 12 may be a parasitic diode of the MOSFET 11 or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11. The cathode of the diode 12 is connected to the drain.

[0023] The switching element is not limited to the MOSFET 11. An IGBT (Insulated Gate Bipolar Transistor) may be used as the switching element. In the case of an IGBT, a freewheeling diode is also connected in anti-parallel.

[0024] The inverter 6 includes snubber circuits 13 in addition to the upper and lower arm circuits 9. The snubber circuits 13 absorb transient high voltages that occur during switching, known as switching surges, thereby enabling high-speed switching. The snubber circuits 13 may be provided individually for the upper and lower arm circuits 9 and connected in parallel to the corresponding upper and lower arm circuits 9.

[0025] The snubber circuit 13 has at least a capacitor 131. The snubber circuit 13 may be, for example, a C snubber circuit having the capacitor 131, or an RC snubber circuit having the capacitor 131 and a resistor 132 as shown in Fig. 1. It may also be an RCD snubber circuit having the capacitor 131, the resistor 132, and a diode.

[0026] Fig. 2 is a plan view showing the configuration of an example semiconductor device. Fig. 3 is a view showing a cross section of a portion of the semiconductor device. Hereinafter, the thickness direction of the substrate is referred to as the Z direction, and a direction perpendicular to the Z direction is referred to as the Y direction. The direction perpendicular to both the Z direction and the Y direction is referred to as the X direction. Unless otherwise specified, a shape viewed in a plane along the Z direction, in other words, a shape along the XY plane defined by the X direction and the Y direction, is referred to as a planar shape. Furthermore, a planar view along the Z direction may be simply referred to as a planar view.

[0027] As shown in Fig. 2, the semiconductor device 21 includes upper and lower arm circuits 9, snubber circuit components 40, and a housing 60. As shown in Fig. 3, the semiconductor device 21 may include a cooler 70. The semiconductor device 21, together with a capacitor device that provides the smoothing capacitor 5, an input terminal block, an output terminal block, and the like, constitutes the power conversion device 4. The semiconductor device 21, together with other elements such as the capacitor device, may be housed in a case that forms the outer casing of the power conversion device 4.

[0028] The semiconductor device 21 includes a first semiconductor element 30H that forms the upper arm 9H and a second semiconductor element 30L that forms the lower arm 9L. The first semiconductor element 30H and the second semiconductor element 30L form a semiconductor element group arranged side by side in the element arrangement direction, which corresponds to the Y direction in each drawing. The semiconductor device 21 includes a snubber circuit component 40 arranged adjacent to the semiconductor element group in the element arrangement direction. The snubber circuit component 40 includes a snubber circuit 13 that is connected in parallel to the upper arm 9H and the lower arm 9L. The snubber circuit component 40 is formed, for example, of a thin-film element.

[0029] The first semiconductor element 30H forms a flat outer casing and includes multiple semiconductor elements 30 contained within the casing. The second semiconductor element 30L forms a flat outer casing and includes multiple semiconductor elements 30 contained within the casing. Here, "multiple" means two or more. The number of semiconductor elements 30 contained in each of the first semiconductor element 30H and the second semiconductor element 30L is not particularly limited. There may be one semiconductor element 30 in each, or multiple semiconductor elements in each. The multiple semiconductor elements 30 are connected in parallel to provide the MOSFET 11 of one phase arm. The multiple semiconductor elements 30 are lined up in the X direction.

[0030] The flat outer shell is, for example, a thin plate or a thin film. Each semiconductor element 30 is arranged such that its thickness, which is the minimum longitudinal direction, is perpendicular to the element arrangement direction. The thickness direction is the thickness direction of the thin plate and corresponds to the Z direction. The multiple semiconductor elements 30 included in the first semiconductor element 30H are arranged such that their flat largest surfaces are perpendicular to both the element arrangement direction and the thickness direction. The multiple semiconductor elements 30 included in the second semiconductor element 30L are arranged such that their flat largest surfaces are perpendicular to both the element arrangement direction and the thickness direction. As shown in FIG. 2 , the multiple semiconductor elements are arranged side by side in the X direction. In contrast, when the first semiconductor element and the second semiconductor element are arranged side by side in the X direction, the current in the shortest path among the multiple current paths formed between the snubber circuit and the semiconductor elements becomes large, resulting in an imbalance. According to the configuration described in this specification, multiple current paths formed between the snubber circuit and the semiconductor elements can be formed in a balanced manner, as shown in FIG. 2 , for example.

[0031] The semiconductor element 30 is a vertical element formed on a semiconductor substrate made of silicon (Si) or a wide bandgap semiconductor with a wider bandgap than silicon. Examples of wide bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 30 is sometimes called a power element, a semiconductor chip, or the like.

[0032] The vertical element is configured to pass a main current in the thickness direction of the semiconductor element 30. The semiconductor element 30 is arranged so that its thickness direction is along the Z direction. The semiconductor element 30 has main electrodes on both sides in the thickness direction. The semiconductor element 30 of this embodiment is formed by forming an n-channel MOSFET 11 as a vertical element on a semiconductor substrate made of SiC. The semiconductor element 30 has a drain electrode on one side of the plate and a source electrode on the other side of the plate as main electrodes.

[0033] When the MOSFET 11 is turned on, a current flows between the main electrodes, i.e., between the drain electrode and the source electrode. If the diode 12 is a parasitic diode, the source electrode also serves as the anode electrode, and the drain electrode also serves as the cathode electrode. The drain electrode is the main electrode on the high potential side, and the source electrode is the main electrode on the low potential side. The semiconductor element 30 has a rectangular shape when viewed in a plane in the Z direction.

[0034] 3, the first semiconductor element 30H and the second semiconductor element 30L are disposed at approximately the same height in the Z direction. The multiple semiconductor elements 30 included in the first semiconductor element 30H are disposed in the same orientation so that their drain electrodes are on the P wiring 511 side. The multiple semiconductor elements 30 included in the first semiconductor element 30H are disposed in the same orientation so that their source electrodes are on the opposite side of the P wiring 511. The multiple semiconductor elements 30 included in the second semiconductor element 30L are disposed in the same orientation so that their drain electrodes are on the O wiring 531 side. The multiple semiconductor elements 30 included in the second semiconductor element 30L are disposed in the same orientation as the multiple semiconductor elements 30 included in the first semiconductor element 30H so that their source electrodes are on the N wiring 521 side.

[0035] The semiconductor device 21 includes a P terminal 51 connected to the drain electrode of the first semiconductor element 30H via a P wiring 511. The semiconductor device 21 includes an N terminal 52 connected to the source electrode of the second semiconductor element 30L via an N wiring 521. The P terminal 51 is an external connection terminal electrically connected to the P line 7. The P terminal 51 is electrically connected to the positive terminal of the smoothing capacitor 5. The N terminal 52 is an external connection terminal electrically connected to the N line 8. The N terminal 52 is electrically connected to the negative terminal of the smoothing capacitor 5.

[0036] The P wiring 511 is formed from a single wiring board. The N wiring 521 is formed from a single wiring board. The P terminal 51 is an end of the P wiring 511, which is formed from a single wiring board. The P terminal 51 is shaped to protrude from the snubber circuit component 40 on the opposite side of the semiconductor device group in the device arrangement direction. The N terminal 52 is an end of the N wiring 521, which is formed from a single wiring board. The N terminal 52 is shaped to protrude from the snubber circuit component 40 on the opposite side of the semiconductor device group in the device arrangement direction. The P wiring board and N wiring board shown in FIG. 3 are disposed at positions offset from each other in the thickness direction of the first semiconductor device, which is perpendicular to the device arrangement direction and is the direction of the minimum length.

[0037] The P wiring 511 is connected to the drain electrode of the first semiconductor element 30H. The P wiring 511 electrically connects the drain electrode of the first semiconductor element 30H to the P terminal 51. The P wiring 511 is connected to the positive electrode portion of the snubber circuit 13 included in the snubber circuit component 40. The P wiring 511 electrically connects the positive electrode portion of the snubber circuit 13 to the P terminal 51. The P wiring 511 may be referred to as a positive wiring, a high-potential power supply wiring, or the like.

[0038] The source electrode of the second semiconductor element 30L is electrically connected to the N wiring 521. The N wiring 521 electrically connects the source electrode of the second semiconductor element 30L to the N terminal 52. The N wiring 521 is connected to the negative electrode of the snubber circuit 13 included in the snubber circuit component 40. The N wiring 521 may also be referred to as a negative wiring, a low-potential power supply wiring, or the like.

[0039] The O terminal 53 is an external connection terminal electrically connected to the output line 10. The O terminal 53 is electrically connected to the winding 3a of the opposing phase of the motor generator 3. The O terminal 53 may also be referred to as an output terminal, an AC terminal, or the like. The O wiring 531 is formed from a single wiring board. The O terminal 53 is an end of the O wiring 531 formed from a single wiring board. The O terminal 53 is shaped to protrude from the second semiconductor element 30L on the opposite side from the snubber circuit component 40 in the element arrangement direction. The O terminal 53 protrudes from the semiconductor device 21 on the opposite side from the P terminal 51 and the N terminal 52. The O wiring 531 is connected to the drain electrode of the second semiconductor element 30L. The O wiring 531 electrically connects the source electrode of the second semiconductor element 30L and the N terminal 52.

[0040] The O wiring 532 is formed from a single wiring plate. The O wiring 532 is connected to the source electrode of the first semiconductor element 30H. As shown in FIG. 3, the P wiring 511 and the O wiring 531 are arranged at approximately the same height in the Z direction. The P wiring 511 and the O wiring 531 are formed to overlap in the element arrangement direction. As shown in FIG. 3, the N wiring 521 and the O wiring 532 are arranged at approximately the same height in the Z direction. The N wiring 521 and the O wiring 532 are formed to overlap in the element arrangement direction. The O wiring 532 electrically connects the source electrode of the first semiconductor element 30H and the O wiring 531. The O wiring 531 is sometimes referred to as an output wiring, etc.

[0041] 3 , the O wiring 531 and the O wiring 532 are electrically connected by a height adjustment member 81. The height adjustment member 81 is a conductive member for offsetting the height positions of the O wiring 531 and the O wiring 532 in the Z direction.

[0042] The signal terminal 54 has a shape that protrudes from the second semiconductor element 30L in the element arrangement direction on the opposite side from the snubber circuit component 40. The signal terminal 54 protrudes on the same side as the O terminal 53 in the semiconductor device 21, on the opposite side from the P terminal 51 and the N terminal 52. The signal terminal 54 is connected to a pad of the first semiconductor element 30H via a signal wiring.

[0043] The signal terminal 55 has a shape that protrudes from the second semiconductor element 30L on the opposite side of the snubber circuit component 40 in the element arrangement direction. The signal terminal 55 protrudes on the same side of the semiconductor device 21 as the O terminal 53, and on the opposite side of the P terminal 51 and the N terminal 52. The signal terminal 55 is connected to a pad of the second semiconductor element 30L via a signal wiring.

[0044] Each signal terminal electrically connects the semiconductor element 30 to the control circuit board. Each signal terminal is electrically connected to a pad of the semiconductor element 30 via a connecting member such as a bonding wire. The signal terminal may include at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 30. The signal terminal may include a terminal for detecting the source potential of the semiconductor element 30. The signal terminal may include a terminal for detecting the drain potential of the semiconductor element 30. The signal terminal may include a terminal for detecting the temperature of the semiconductor element 30.

[0045] The snubber circuit component 40 includes at least a capacitor as an electronic component, and provides the snubber circuit 13 shown in Fig. 1. The snubber circuit 13 is an RC snubber circuit. The snubber circuit 13 includes a capacitor 131 and a resistor 132.

[0046] As shown in FIG. 3 , the semiconductor device 21 is disposed on one surface of the cooler 70 in the Z direction. The semiconductor device 21 is fixed to the cooler 70. The cooler 70 is in close contact with a heat sink 61, which is a member that promotes heat dissipation. An insulating member 62 is interposed between the heat sink 61 and the N wiring 521 and the O wiring 532. The insulating member 62 is a sheet-like member, grease, a gel-like substance, or the like, made of an insulating material. As an example, the components other than the cooler 70 and the heat sink 61 shown in FIG. 2 are covered by a housing 60.

[0047] The housing 60 is formed using an electrically insulating material such as resin. The housing 60 may be, for example, a resin molded body. The housing 60 may hold some of the components of the semiconductor device 21. Some of the components of the semiconductor device 21 may be integrally molded with the housing 60 as an insert part. The housing 60 may be fixed to the case of the power conversion device 4 together with the cooler 70. The housing 60 may be formed, for example, from gel or potting resin.

[0048] The positional relationship between the snubber circuit component 40 in this specification and the semiconductor element group including the first semiconductor element 30H and the second semiconductor element 30L will be described with reference to Figures 4 to 6. Figures 4 to 6 show a plan view of the semiconductor device 21 in the thickness direction of the semiconductor element 30.

[0049] 4, the dashed lines indicate extensions of the sides located at the ends in the X direction of the outline of the semiconductor element group along the arrangement direction of the elements to the snubber circuit component 40. As shown in FIG. 4, the snubber circuit component 40 is provided over an area including the extensions of the sides on both sides in the X direction.

[0050] 5, dashed lines indicate extensions of sides located at the ends in the X direction of the outline of the semiconductor element group along the arrangement direction of the elements to the snubber circuit component 40. As shown in FIG. 4, the snubber circuit component 40 is provided over an area that is within the range of the extensions of both sides in the X direction.

[0051] 6, the dashed lines indicate extensions of the sides located at the ends in the X direction of the outline of the semiconductor device group along the arrangement direction of the devices to the snubber circuit component 40. As shown in FIG. 6, the snubber circuit component 40 is provided over an area that overlaps with one of the extension lines of the sides on both sides in the X direction.

[0052] The following describes the effects of the semiconductor device 21 disclosed in the specification. The semiconductor device 21 includes a first semiconductor element 30H that forms an upper arm 9H and a second semiconductor element 30L that forms a lower arm 9L. The first semiconductor element 30H and the second semiconductor element 30L are arranged side by side to form a semiconductor element group. The semiconductor device 21 includes a snubber circuit component 40 that forms a snubber circuit 13 that is connected in parallel to the upper arm 9H and the lower arm 9L. The snubber circuit component 40 is arranged adjacent to the semiconductor element group in the element arrangement direction in which the first semiconductor element 30H and the second semiconductor element 30L are arranged.

[0053] This semiconductor device 21 includes a snubber circuit component 40 that is adjacent to one of the first and second semiconductor elements 30H and 30L, which are arranged side by side, but not the other. This configuration suppresses heat dissipation from the other of the semiconductor elements constituting the upper and lower arms to the snubber circuit 13. Therefore, the semiconductor device 21 can suppress the thermal influence of the semiconductor elements on the snubber circuit 13. Furthermore, the current flowing from the snubber circuit to the drain electrode of the first semiconductor element and the current returning from the source electrode of the second semiconductor element to the snubber circuit flow in opposite directions. This makes it possible to provide a semiconductor device that can reduce the inductance between the semiconductor elements and the snubber circuit.

[0054] Semiconductor device 21 includes P terminal 51 connected to the drain electrode of the first semiconductor element via P wiring 511, and N terminal 52 connected to the source electrode of the second semiconductor element via N wiring 521. P terminal 51 and N terminal 52 are provided so as to protrude from snubber circuit 13 on the opposite side to the semiconductor element group in the element arrangement direction.

[0055] With this configuration, the P terminal and N terminal protrude beyond the area where the snubber circuit capacitors are mounted, thereby suppressing the thermal effects from the semiconductor elements on both terminals. Furthermore, the current from the P terminal to the drain electrode of the first semiconductor element and the current from the source electrode of the second semiconductor element to the N terminal can be made to flow in opposite directions. This makes it possible to provide a semiconductor device that can reduce the inductance between the semiconductor elements and the smoothing capacitor 5. Furthermore, with this configuration, the device for cooling the P terminal and N terminal can be made smaller, allowing for the formation of a compact power conversion device equipped with three-phase semiconductor devices.

[0056] P wiring 511 extends so as to form a current from P terminal 51 to the drain electrode of the first semiconductor element. N wiring 521 extends so as to form a current from the source electrode of the second semiconductor element to N terminal 52 in the opposite direction to the current flowing through P wiring 511. This configuration makes it possible to provide a semiconductor device that can reduce the inductance between the semiconductor element and smoothing capacitor 5.

[0057] At least one of the P wiring 511 and the N wiring 521 is formed from a single wiring plate. This configuration allows the shapes of the P wiring 511 and the N wiring 521 to be simplified and the semiconductor device to be made thinner. Therefore, a semiconductor device that also contributes to the miniaturization of a power conversion device can be provided. This configuration is useful for miniaturizing a power conversion device that includes semiconductor devices for three phases.

[0058] Each of the P wiring 511 and the N wiring 521 is formed from a single wiring board. The P wiring board and the N wiring board are provided at positions offset from each other in the thickness direction of the first semiconductor element, which is perpendicular to the element arrangement direction and is the direction of the minimum length. This configuration allows for a compact configuration to be adopted in terms of the thickness direction lengths of the P wiring, N wiring, first semiconductor element, and second semiconductor element. Therefore, a configuration that is very useful for miniaturizing a power conversion device equipped with three-phase semiconductor devices can be provided.

[0059] The semiconductor device includes an O wiring 532 connecting a source electrode of a first semiconductor element and a drain electrode of a second semiconductor element. The O wiring 532 and the N wiring 521 are formed to overlap in the arrangement direction of the elements. This configuration allows for a compact configuration in terms of the lengths of the P wiring, N wiring, O wiring, first semiconductor element, and second semiconductor element in the thickness direction.

[0060] The first semiconductor element 30H and the snubber circuit component 40 are arranged so as to overlap in the element arrangement direction. This configuration allows the first semiconductor element 30H and the snubber circuit component 40 to be formed compactly in terms of their thickness direction lengths.

[0061] The power conversion device 4 includes the semiconductor device described in this specification and the smoothing capacitor 5. As described above, this makes it possible to provide a power conversion device that suppresses the thermal influence of the semiconductor elements on the snubber circuit 13.

[0062] Other Embodiments The disclosure of this specification is not limited to the exemplified embodiments. The disclosure encompasses the exemplified embodiments and modifications thereto by those skilled in the art. For example, the disclosure is not limited to the combinations of parts and elements shown in the embodiments, and various modifications can be made. The disclosure can be implemented in various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure encompasses the omission of parts and elements from the embodiments. The disclosure encompasses the substitution or combination of parts and elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. The disclosed technical scope is defined by the claims, and should be interpreted as including all modifications within the meaning and scope of the claims.

[0063] The power conversion device 4 of the above-described embodiment may be configured to further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. This converter is provided between the DC power source 2 and the smoothing capacitor 5. The converter is configured to include, for example, a reactor and the above-mentioned upper and lower arm circuits 9. In this configuration, voltage step-up and step-down are possible. The power conversion device 4 may be configured to include a filter capacitor that removes power supply noise from the DC power source 2. This filter capacitor is provided between the DC power source 2 and the converter.

[0064] A power conversion device that can achieve the object disclosed in the specification may have a configuration in which a part of the snubber circuit overlaps a part of the semiconductor element in the thickness direction.

[0065] (Disclosure of Technical Ideas) This specification discloses multiple technical ideas described in the following multiple clauses. Some clauses may be described in a multiple dependent form, with the subsequent clause alternatively referring to the preceding clause. Furthermore, some clauses may be described in a multiple dependent form, with the subsequent clause referring to another multiple dependent clause. These multiple dependent clauses define multiple technical ideas.

[0066] (Technical Idea 1) A semiconductor device comprising: a first semiconductor element (30H) forming an upper arm (9H); a second semiconductor element (30L) arranged in parallel to the first semiconductor element and forming a lower arm (9L); and a snubber circuit component (40) forming a snubber circuit (13) connected in parallel to the upper arm and the lower arm, wherein the snubber circuit component is arranged adjacent to a semiconductor element group in which the first semiconductor element and the second semiconductor element are arranged in parallel, in an element arrangement direction in which the first semiconductor element and the second semiconductor element are arranged.

[0067] (Technical Idea 2) The first semiconductor element and the second semiconductor element each include a plurality of semiconductor elements contained within a flat outer shell, the plurality of semiconductor elements are arranged in an orientation such that the thickness direction, which is the length direction of the smallest dimension, is perpendicular to the element arrangement direction, and the first semiconductor element and the second semiconductor element each are formed by the plurality of semiconductor elements whose flat largest faces are arranged in a direction perpendicular to both the element arrangement direction and the thickness direction. This is a semiconductor device described in Technical Idea 1.

[0068] (Technical Idea 3) A semiconductor device according to Technical Idea 1, comprising: a P terminal (51) connected to the drain electrode of the first semiconductor element via a P wiring (511); and an N terminal (52) connected to the source electrode of the second semiconductor element via an N wiring (521), wherein the P terminal and the N terminal are arranged to protrude on the opposite side of the semiconductor element group from the snubber circuit component in the arrangement direction of the elements.

[0069] (Technical Idea 4) A semiconductor device according to Technical Idea 3, wherein the P wiring extends so as to form a current from the P terminal to the drain electrode of the first semiconductor element, and the N wiring extends so as to form a current from the source electrode of the second semiconductor element to the N terminal in the opposite direction to the current flowing through the P wiring.

[0070] (Technical Concept 5) The semiconductor device according to Technical Concept 3 or 4, wherein at least one of the P wiring and the N wiring is formed by one wiring board.

[0071] (Technical Idea 6) A semiconductor device according to Technical Idea 5, wherein the P wiring and the N wiring are each formed from a single wiring board, and the P wiring board and the N wiring board are arranged at positions offset from each other in the thickness direction of the first semiconductor element, which is perpendicular to the element arrangement direction and is the direction of the minimum dimension length.

[0072] (Technical Idea 7) A semiconductor device according to Technical Idea 3, further comprising an O wiring (532) connecting the source electrode of the first semiconductor element and the drain electrode of the second semiconductor element, wherein the O wiring and the N wiring are formed to overlap in the arrangement direction of the elements.

[0073] (Technical Concept 8) The semiconductor device according to any one of Technical Concepts 1 to 7, wherein the first semiconductor element and the snubber circuit component are provided so as to overlap in an arrangement direction of the elements.

[0074] (Technical Idea 9) A power conversion device comprising: the semiconductor device according to any one of Technical Ideas 1 to 8; and a smoothing capacitor (5).

Claims

1. A semiconductor device comprising: a first semiconductor element (30H) forming an upper arm (9H); a second semiconductor element (30L) arranged in parallel to the first semiconductor element and forming a lower arm (9L); and a snubber circuit component (40) forming a snubber circuit (13) connected in parallel to the upper arm and the lower arm, wherein the snubber circuit component is arranged adjacent to a semiconductor element group in which the first semiconductor element and the second semiconductor element are arranged in parallel, in an element arrangement direction in which the first semiconductor element and the second semiconductor element are arranged.

2. The semiconductor device according to claim 1, wherein each of the first semiconductor element and the second semiconductor element includes a plurality of semiconductor elements contained within a flat outer shell, the plurality of semiconductor elements are arranged in an orientation in which the thickness direction, which is the length direction of the smallest dimension, is perpendicular to the element arrangement direction, and each of the first semiconductor element and the second semiconductor element is formed by the plurality of semiconductor elements whose maximum flat surface is arranged in a direction perpendicular to both the element arrangement direction and the thickness direction.

3. A semiconductor device as described in claim 1, comprising: a P terminal (51) connected to the drain electrode of the first semiconductor element via a P wiring (511); and an N terminal (52) connected to the source electrode of the second semiconductor element via an N wiring (521), wherein the P terminal and the N terminal are arranged so as to protrude on the opposite side to the semiconductor element group with respect to the snubber circuit component in the arrangement direction of the elements.

4. The semiconductor device according to claim 3, wherein the P wiring extends so as to form a current from the P terminal to the drain electrode of the first semiconductor element, and the N wiring extends so as to form a current from the source electrode of the second semiconductor element to the N terminal in the opposite direction to the current flowing through the P wiring.

5. The semiconductor device according to claim 3 or 4, wherein at least one of said P wiring and said N wiring is formed from a single wiring board.

6. The semiconductor device according to claim 5, wherein each of the P wiring and the N wiring is formed from a single wiring board, and the P wiring board and the N wiring board are provided at positions offset from each other in the thickness direction of the first semiconductor element, which is perpendicular to the arrangement direction of the elements and is also the direction of the minimum length.

7. The semiconductor device according to claim 3, further comprising an O wiring (532) connecting a source electrode of the first semiconductor element and a drain electrode of the second semiconductor element, the O wiring and the N wiring being formed so as to overlap in the arrangement direction of the elements.

8. The semiconductor device according to any one of claims 1 to 4, wherein the first semiconductor element and the snubber circuit component are provided so as to overlap in the direction in which the elements are arranged.

9. A power conversion device comprising: a semiconductor device according to any one of claims 1 to 4; and a smoothing capacitor (5).

Images