FPGA-technology-based neuron circuit implementation method using multi-segment linear fitting

Abstract

Disclosed in the present invention is an FPGA-technology-based neuron circuit implementation method using multi-segment linear fitting. The method comprises: first, on the basis of the parity and value range of a hyperbolic tangent function in combination with a multi-segment linear fitting algorithm, processing the function, then designing a neuron circuit module for solution, performing simulation verification of implementability by means of software, and finally burning a program into an FPGA to observe consistency with the simulation verification by means of an oscilloscope. In the present invention, high-precision periodic signals and chaotic signals are generated on an FPGA by using a high-speed and high-precision multi-segment linear fitting algorithm with low resource consumption, so that abnormal discharge behaviors of an FHN neuron circuit can be more visually observed on hardware devices. The present invention provides a new method for using an FPGA to generate improved FHN abnormal discharge signals including a hyperbolic tangent function, the principle of implementing the hyperbolic tangent function by means of the FPGA can be extended to other complex functions, such as an exponential function, a logarithmic function and a transcendental function, and the present invention can be widely applied to the disciplines and fields of nonlinear neurons, intelligent control, etc.

Description

A neuron circuit implementation method for multi-segment linear fitting based on FPGA technology Technical Field

[0001] The present invention specifically relates to a multi-segment linear fitting neuron circuit implementation method based on FPGA technology, and belongs to the field of nonlinear dynamics. Background Art

[0002] FPGAs (Field Programmable Gate Arrays), first introduced in the 1980s, are programmable logic devices comprised of a large number of basic logic cells and programmable interconnect resources. The advent of FPGAs has made digital circuit design more flexible, efficient, and reliable, while also bringing significant scientific research and development opportunities to fields such as computing, control, embedded systems, artificial intelligence, and biomedicine.

[0003] In the computer field, FPGAs can be used to implement various high-performance computing algorithms, such as sorting, matrix multiplication, and fast Fourier transforms. In the control field, they can be used to implement various robotic control systems, such as PLCs (Programmable Logic Controllers) and DCSs (Distributed Control Systems). In the embedded systems and artificial intelligence fields, they are commonly found in smart homes, the Internet of Things, image processing, and machine learning. In recent years, with the continuous advancement of digital technology, FPGAs, due to their high precision, low latency, and strong parallel processing capabilities, have become increasingly popular in electrocardiographs, electroencephalograms, and medical imaging equipment for image processing, recognition, and storage. One such application is the use of FPGAs to study abnormal neuronal discharge models in the brain. Abnormal neuronal discharge can lead to diseases such as epilepsy, stroke, and Alzheimer's disease. Leveraging the advantages of FPGAs to study neuronal discharge models can effectively detect and prevent neurological diseases, promote the development of a healthy society, and seize opportunities in the development of a future intelligent society. Therefore, using FPGAs to study abnormal neuronal discharge models in the brain has become extremely important. This paper will use FPGA digital technology to improve the FHN (Fitzhugh-Nagumo) neuronal circuit.

[0004] FPGA technology can implement complex functions such as tanh and sinh using lookup tables, fitting functions, and Cordic algorithms. This is the first step in implementing FHN neuron models that incorporate complex functions. While implementing the tanh function using a lookup table is a good option for low-precision computations, high-precision computations require a significant amount of ROM / RAM. While the Cordic algorithm can produce highly accurate function values, it is limited by its narrow scope of application and low efficiency. Finding a fitting function that efficiently and effectively represents complex functions with minimal resource consumption is challenging. Therefore, a resource-efficient and computationally efficient method for implementing complex functions like tanh is currently lacking.

[0005] Technology comparison:

[0006] Compared with the technology of patent CN113705139A "A method and system for implementing taboo learning neuron circuit based on FPGA", the differences are as follows:

[0007] 1. Patent CN113705139A uses a Zynq series FPGA consisting of a PS (Processing System), an ARM-based SOC unrelated to the FPGA, and a PL (Programmable Logic) FPGA. We use the Spartan-6 series XC6SLX16, a traditional FPGA structure with only the PL.

[0008] 2. Patent CN113705139A uses a dual-neuron model with taboo learning, while the single-neuron model that does not contain taboos is selected here, which can be reflected in the differential equation.

[0009] 3. The differential equation in patent CN113705139A does not include a sine function module for processing external excitation.

[0010] 4. Compared with the second-order Runge-Kutta method selected by us under the premise of meeting the calculation accuracy, the fourth-order Runge-Kutta method selected in patent CN113705139A is more complicated and less efficient.

[0011] 5. The development environment selected in patent CN113705139A is Vivado, while our development environment is ISE. The former cannot develop Spartan-6 series FPGAs.

[0012] 6. The tanh function constructed in patent CN113705139A is to call e in the vivado environment x The IP core is implemented by adders, subtractors and dividers, but there is no e in ISE software. xIP core, so we construct the tanh function through multi-segment linear fitting, which does not include the process of using the divider, and the calculation speed and resource consumption are less than the former.

[0013] 7. The implementation of the taboo dual neuron model in patent CN113705139A requires online reset and iteration through the host computer, while in our implementation, the neuron model can be observed by simply burning it into the FPGA.

[0014] 8. Patent CN113705139A does not implement the tanh function through RAM, nor does it call other software to generate the .coe file.

[0015] Given the lack of high-precision implementation of FHN neuron circuits containing complex transcendental functions using existing FPGA digital technology, the present invention aims to provide an FPGA implementation method for FHN neuron circuits containing complex transcendental functions. By employing a multi-segment linear fitting method, combined with the parity and value range of the hyperbolic tangent function, this method, while consuming only a small portion of FPGA resources, overcomes the difficulty of implementing high-precision hyperbolic tangent functions in FPGA devices, thereby enabling the implementation of brain-inspired FHN neuron circuits containing complex transcendental functions in FPGAs.

[0016] Summary of the Invention

[0017] The technical problem to be solved by this invention is to overcome the inability of existing technologies to accurately and efficiently generate discharge signals for FHN models containing complex functions using FPGAs. To this end, this invention proposes a multi-segment linear fitting neuron circuit implementation method based on FPGA technology. This method, which only consumes a small amount of RAM resources, solves the problem of implementing the high-precision hyperbolic tangent function in FPGA devices, reducing system errors, accelerating computational speed, and improving system stability, thereby generating complex neuron discharge signals in FPGAs.

[0018] To achieve the above object, the technical solution adopted by the present invention is:

[0019] A method for implementing a multi-segment linear fitting neuron circuit based on FPGA technology is characterized by: the hyperbolic tangent function and sine function in the neuron system are each made into a function module, then the corresponding parameters are calculated using a second-order Runge-Kutta method to execute the function module to obtain the values ​​of the hyperbolic tangent function and the sine function. After the calculation is completed, the obtained values ​​are output through a floating-point converter and an A / D converter and displayed on an oscilloscope. The specific steps are as follows:

[0020] S1: Processing steps of hyperbolic tangent function:

[0021] S11: Divide the interval into segmented intervals according to the segmentation principle and obtain all the approximation points;

[0022] Using the values ​​of any two adjacent approximation points, write code using Cramer's rule using programming software to calculate the values ​​of k and b in all straight line segments y = kx + b, and convert the values ​​of k and b into IEEE754 single-precision 32-bit data format and save it using the programming software;

[0023] S12: Use programming software to concatenate the two groups of 32-bit data into 64-bit data and save it to generate a .coe file, where the upper 32 bits store the value of k and the lower 32 bits store the value of b. Then, use Xilinx ise software to generate a RAM IP core from the .coe file;

[0024] S13: The adjacent integer segment intervals are multiplied by the corresponding multiples according to the data to be processed by the multiplier. Then, the single-precision IEEE754 floating-point number is converted into a decimal number through the floating-point converter. The integer part is taken and sent to the address line of the RAM for addressing, thereby obtaining the k value of the high 32 bits and the b value of the low 32 bits in the RAM. Then, the corresponding value of the hyperbolic tangent function is obtained through the multiplier and adder.

[0025] S2: Sine function processing method:

[0026] S21: Since the value of the sine function changes periodically between [-1, 1], the value of the sine function within a period interval is divided into 3000 parts while meeting the accuracy requirements. The parts are converted into single-precision IEEE754 floating-point numbers and stored in RAM. The address is automatically increased by 1 after each calculation operation. If the address is equal to 3000, the address is cleared to zero when the next clock signal comes. This cycle is repeated to realize a periodic sine function that changes over time.

[0027] S22: According to the above steps, the improved Fitzhugh-Nagumo neuron model is selected as:

[0028] where x and y are membrane potential and sodium gating variables, respectively, and I m is the stimulus applied externally to the neuron, a and b are two constants corresponding to the equilibrium states of potassium potential and sodium potential, respectively, and c is the time constant that controls the sodium gating rate;

[0029] S23: Solve the system differential equation K according to the second-order Runge-Kutta 11 =2tanh(x i )-x i -y i +I msin(Ft) K 21 =c(x i +a-by i ) K 12 =2tanh(x i +hK 11 )-(x i +hK 11 )-(y i +hK 21 )+I m sin(F(t+h)) K 22 =c((x i +hK 11 )+ab(y i +hK 21 ))

[0030] S24: Based on the above expression, the corresponding Verilog algorithm is completed based on the Xilinx ISE software programming environment. Then, through the joint simulation of XIlinx ISE and Modelsim software, the obtained data is converted into decimal using Matlab software for plotting and analysis. After confirmation, the bit file generated by the XIlinx ISE software is burned into the FPGA development board.

[0031] This invention proposes a multi-segment linear fitting neuron circuit implementation method based on FPGA technology. This method utilizes only a small amount of RAM resources to implement highly accurate hyperbolic tangent functions within an FPGA. It also provides a method for programming FHN signals in Verilog, enabling the generation of complex periodic and chaotic signals. This overcomes the inability of existing technologies to generate FHN discharge models containing complex functions with high precision and efficiency on FPGAs. This method proposes a multi-segment linear fitting neuron circuit implementation method based on FPGA technology that utilizes only a small amount of RAM resources to implement highly accurate complex functions within FPGA devices.

[0032] As a preferred technical solution of the present invention: the hyperbolic tangent function module is implemented using a multi-segment linear fitting method, and the sine function module is implemented using a lookup table method. After the calculation is completed, the obtained numerical value is output through a floating-point converter and an AD converter and displayed on an oscilloscope.

[0033] As a preferred technical solution of the present invention: in step S11, the hyperbolic tangent function is tanh, which is an odd function and has a value close to 1 when x≥8. The judgment statement is used to force the input value greater than 8 to be assigned 1, and then each adjacent integer greater than or equal to the remaining integers is divided into 500 parts, a total of 4000 parts are divided and 4000 approximation points are obtained. The negative part uses the principle of odd functions, and only the positive axis side needs to be obtained, and then the negative axis side is processed through the judgment statement.

[0034] As a preferred technical solution of the present invention: in step S11, the programming software is C++ or Matlab.

[0035] As a preferred technical solution of the present invention: in step S13, when the input variable x of the hyperbolic tangent function is a negative number, it is forcibly converted into a positive number for analysis, and then the highest bit of the output f(x) is assigned a value of 1.

[0036] As a preferred technical solution of the present invention: in step S13, the multiplier is used in a time-division multiplexing manner, consuming a total of 1 RAM, 1 adder, 1 multiplier and 1 floating-point converter.

[0037] As a preferred technical solution of the present invention: in step S21, the sine function is sin(Ft), when F in sin(Ft) is not 1, when the second-order Runge-Kutta calculation is used, the step size h is h=0.002083975226.

[0038] As a preferred technical solution of the present invention: in step S22, the values ​​of different states of the neuron model are as follows:

[0039] Period 1: a=0.7, b=0.8, c=0.1, I m =1.5,F=1.001,initial value x=-2.195242988,y=0.024174486;

[0040] Period 2: a=0.7, b=0.8, c=0.1, I m =1.4,F=1.001,initial value x=-1.821812757,y=0.071503257;

[0041] Cycle 3: a=0.7, b=0.8, c=0.1, I m =1.13,F=1.001,initial value x=-2.202231862,y=0.517387497;

[0042] Period 4: a=0.7, b=0.8, c=0.1, I m=1.13,F=1.001,initial value x=-1.36772072,y=-0.002091415;

[0043] Cycle 6: a=0.7, b=0.8, c=0.1, I m =1.08,F=1.001,initial value x=-2.049488685,y=0.219877547;

[0044] Chaos: a=0.7, b=0.8, c=0.1, I m =1,F=1.001,initial value x=-2.325905706,y=-0.301884812.

[0045] As a preferred technical solution of the present invention: in step S24, the Verilog algorithm includes a program calling module, module _K1_K2, module _XB_Re and a conversion module, the conversion module includes a floating-point conversion module and a DA conversion module, the program calling module controls module _K1_K2 to calculate K11 and K12, wherein module _K1_K2 contains a floating-point to decimal fixed-point converter, an adder, a multiplier, and a memory RAM, the program calling module transmits the obtained K11 and K12 to module _XB_Re, and then passes the data obtained by module _XB_Re to module _K1_K2 for calculation, and then transmits the obtained K12 and K21 to module _XB_Re to obtain new iterative values, and transmits the iterated values ​​to the conversion module for output.

[0046] Compared with the prior art, the present invention has the following beneficial effects:

[0047] This invention uses a resource-efficient and highly efficient multi-segment linear fitting algorithm to generate high-precision periodic and chaotic signals on an FPGA, enabling more intuitive observation of abnormal discharge behavior in neuron circuits on hardware devices. This invention not only provides a novel method for generating FHN abnormal discharge signals with a hyperbolic tangent function using FPGA technology, but also applies the principle of implementing the hyperbolic tangent function to arbitrarily complex functions, such as exponential, logarithmic, and transcendental functions. This method has broad application in disciplines such as nonlinear neurons and intelligent control, and holds significant research significance. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 is a graph of any two adjacent approximation points of the hyperbolic tangent function;

[0049] Figure 2 is a diagram of the hyperbolic tangent function implementation module;

[0050] Figure 3 is the overall module diagram of the Verilog algorithm;

[0051] Figure 4 is the schematic diagram of module_K1_K2;

[0052] Figure 5 is the schematic diagram of module_XB_Re;

[0053] Figure 6 is a flow chart of module_XB_Re;

[0054] Figure 7 is a schematic diagram of the overall connection principle;

[0055] FIG8 is an oscilloscope display of a cycle-xy phase diagram of the improved FHN chaotic signal generator based on FPGA;

[0056] FIG9 is a timing diagram of an oscilloscope display of a cycle x of the improved FHN chaotic signal generator based on FPGA;

[0057] Figure 10 is an oscilloscope display of the periodic two xy phase diagram of the improved FHN chaotic signal generator based on FPGA;

[0058] FIG11 is a timing diagram of the oscilloscope display cycle 2 x of the improved FHN chaotic signal generator based on FPGA;

[0059] Figure 12 is an oscilloscope display of the three-period xy phase diagram of the improved FHN chaotic signal generator based on FPGA;

[0060] FIG13 is a timing diagram of the oscilloscope display of cycle three x of the improved FHN chaotic signal generator based on FPGA;

[0061] Figure 14 is an oscilloscope display of four xy phase diagrams of the improved FHN chaotic signal generator based on FPGA;

[0062] FIG15 is a timing diagram of the oscilloscope display cycle four x of the improved FHN chaotic signal generator based on FPGA;

[0063] Figure 16 is an oscilloscope display of six xy phase diagrams of the improved FHN chaotic signal generator based on FPGA;

[0064] FIG17 is a timing diagram of the oscilloscope display cycle six x of the improved FHN chaotic signal generator based on FPGA;

[0065] Figure 18 is an oscilloscope display of the chaotic xy phase diagram of the improved FHN chaotic signal generator based on FPGA;

[0066] FIG19 is a timing diagram of chaos x displayed by an oscilloscope of the improved FHN chaotic signal generator based on FPGA;

[0067] Figure 20 is a comparison of the errors of fitting function 1 and tanh at the approximation point;

[0068] Figure 21. Error comparison between fitting function 2 and tanh at the approximation point.

[0069] FIG22 is a graph comparing the errors of the algorithm of the present invention and tanh at the approximation point. DETAILED DESCRIPTION

[0070] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments:

[0071] The present invention proposes a method for implementing a neuron circuit with multi-segment linear fitting based on FPGA technology. The hyperbolic tangent function and sine function in the neuron system are each made into a function module. Then, the corresponding parameters are calculated using a second-order Runge-Kutta method to execute the function module to obtain the values ​​of the hyperbolic tangent function and the sine function. After the calculation is completed, the obtained values ​​are output through a floating-point converter and an AD converter and displayed on an oscilloscope. The specific steps are as follows:

[0072] S1: Processing steps of hyperbolic tangent function:

[0073] S11: Divide the interval into segmented intervals according to the segmentation principle and obtain all the approximation points;

[0074] Using the values ​​of any two adjacent approximation points, a code is written using Cramer's rule using programming software such as C++ or Matlab to calculate the values ​​of k and b in all straight line segments y = kx + b. The values ​​of k and b are then converted into IEEE 754 single-precision 32-bit data format and saved using the programming software.

[0075] S12: Use programming software to concatenate the two groups of 32-bit data into 64-bit data and save it to generate a .coe file, where the upper 32 bits store the value of k and the lower 32 bits store the value of b. Then, use Xilinx ise software to generate a RAM IP core from the .coe file;

[0076] S13: The adjacent integer segment intervals are multiplied by the corresponding multiples according to the data to be processed by the multiplier. Then, the single-precision IEEE754 floating-point number is converted into a decimal number through the floating-point converter. The integer part is taken and sent to the address line of the RAM for addressing, thereby obtaining the k value of the high 32 bits and the b value of the low 32 bits in the RAM. Then, the corresponding value of the hyperbolic tangent function is obtained through the multiplier and adder.

[0077] S2: Sine function processing method:

[0078] S21: Since the value of the sine function changes periodically between [-1, 1], the value of the sine function within a period interval is divided into 3000 parts while meeting the accuracy requirements. The parts are converted into single-precision IEEE754 floating-point numbers and stored in RAM. The address is automatically increased by 1 after each calculation operation. If the address is equal to 3000, the address is cleared to zero when the next clock signal comes. This cycle is repeated to realize a periodic sine function that changes over time.

[0079] S22: According to the above steps, the improved Fitzhugh-Nagumo neuron model is selected as:

[0080] where x and y are membrane potential and sodium gating variables, respectively, and I m is the stimulus applied externally to the neuron, a and b are two constants corresponding to the equilibrium states of potassium potential and sodium potential, respectively, and c is the time constant that controls the sodium gating rate;

[0081] S23: Solve the system differential equation K according to the second-order Runge-Kutta 11 =2tanh(x i )-x i -y i +I m sin(Ft) K 21 =c(x i +a-by i ) K 12 =2tanh(x i +hK 11 )-(x i +hK 11 )-(y i +hK 21 )+I m sin(F(t+h)) K 22 =c((x i +hK 11 )+ab(y i +hK 21 ))

[0082] S24: Based on the above expression, the corresponding Verilog algorithm is completed based on the Xilinx ISE software programming environment. Then, through the joint simulation of XIlinx ISE and Modelsim software, the obtained data is converted into decimal using Matlab software for plotting and analysis. After confirmation, the bit file generated by the XIlinx ISE software is burned into the FPGA development board.

[0083] The hyperbolic tangent function module is implemented using a multi-segment linear fitting method, and the sine function module is implemented using a lookup table method. After the calculation is completed, the obtained value is output through a floating-point converter and an AD converter and displayed on an oscilloscope.

[0084] This invention proposes a multi-segment linear fitting neuron circuit implementation method based on FPGA technology. This method, while consuming only a small portion of RAM resources, can implement highly precise hyperbolic tangent functions within an FPGA. It also provides a method for programming FHN signals in the Verilog language, capable of generating complex periodic and chaotic signals. This overcomes the inability of existing technologies to generate FHN discharge models containing complex functions with high precision and efficiency within FPGAs. This method, based on FPGA technology, addresses the problem of implementing complex functions with high precision within FPGA devices while consuming only a small portion of RAM resources.

[0085] The method of the present invention is as follows:

[0086] First, process the hyperbolic tangent function:

[0087] First, since the given tanh function is an odd function and its value is close to 1 when x ≥ 8, we can use a judgment statement to force the input value greater than 8 to be assigned 1. Then, divide each adjacent integer greater than or equal to 8 into 500 parts, a total of 4000 parts, and obtain 4000 approximation points. The negative part can use the principle of odd functions. We only need to find the positive axis side, and then process the negative axis side through the judgment statement.

[0088] The values ​​of any two adjacent approximation points are shown in Figure 1. Software is used to write code using Cramer's rule to calculate the values ​​of k and b in all straight line segments y = kx + b. Finally, the values ​​are converted into IEEE754 single-precision 32-bit data format and saved.

[0089] Then, use software to concatenate the two 32-bit data into 64-bit data and save it to generate a .coe file, where the upper 32 bits store the value of k and the lower 32 bits store the value of b. Then use Xilinx ise software to generate a RAM IP core from the .coe file;

[0090] Finally, if there are 500 adjacent integer segment intervals, the data to be processed is amplified 500 times by a multiplier, and then the single-precision IEEE754 floating-point number is converted into a decimal number through a floating-point converter. The integer part is taken and sent to the address line of the RAM for addressing, thereby obtaining the k value of the high 32 bits and the b value of the low 32 bits in the RAM, and then the value of the hyperbolic function can be obtained through the multiplier and adder.

[0091] When the input variable x is a negative number, it is forced to be converted to a positive number for analysis, and then the highest bit of the output f(x) is assigned a value of 1. The multiplier is used in a time-sharing multiplexing manner, so a total of 1 RAM, 1 adder, 1 multiplier, and 1 floating-point converter are consumed. The specific module is shown in Figure 2.

[0092] Secondly, the processing method of the sine function:

[0093] First, because the value of the sine function changes periodically between [-1, 1], we only need to divide the value of the sine function within a period of [0, 2π] into 3000 parts while meeting the accuracy requirements, and convert them into single-precision IEEE754 floating-point numbers and store them in RAM. The address is increased by 1 after each calculation operation.

[0094] If the address is equal to 3000, the address will be cleared to zero when the next clock signal comes. This cycle will realize a sinusoidal function that changes with time.

[0095] When F in sin(Ft) is not 1, the step size h used in the second-order Runge-Kutta calculation cannot be arbitrarily selected. Here, h = 0.002083975226;

[0096] Then, according to the above steps, the improved Fitzhugh-Nagumo neuron model is selected as:

[0097] where x and y are membrane potential and sodium gating variables, respectively, and I m is the external stimulus applied to the neuron, a and b are two constants corresponding to the equilibrium states of potassium potential and sodium potential, respectively, and c is the time constant that controls the sodium gating rate.

[0098] The improved Fitzhugh-Nagumo neuron model is referred to as FHN.

[0099] The values ​​of different states are as follows:

[0100] Period 1: a=0.7, b=0.8, c=0.1, I m =1.5,F=1.001,initial value x=-2.195242988,y=0.024174486;

[0101] Period 2: a=0.7, b=0.8, c=0.1, I m =1.4,F=1.001,initial value x=-1.821812757,y=0.071503257;

[0102] Cycle 3: a=0.7, b=0.8, c=0.1, I m =1.13,F=1.001,initial value x=-2.202231862,y=0.517387497;

[0103] Period 4: a=0.7, b=0.8, c=0.1, I m =1.13,F=1.001,initial value x=-1.36772072,y=-0.002091415;

[0104] Cycle 6: a=0.7, b=0.8, c=0.1, I m =1.08,F=1.001,initial value x=-2.049488685,y=0.219877547;

[0105] Chaos: a=0.7, b=0.8, c=0.1, I m =1,F=1.001,initial value x=-2.325905706,y=-0.301884812;

[0106] Then, the system differential equation K is solved according to the second-order Runge-Kutta 11 =2tanh(x i )-x i -y i +I m sin(Ft) K 21 =c(x i +a-by i ) K 12 =2tanh(x i +hK 11 )-(x i +hK 11 )-(y i +hK 21 )+I m sin(F(t+h)) K 22 =c((x i +hK 11 )+ab(y i +hK 21 ))

[0107] Finally, the corresponding Verilog algorithm is written according to the above mathematical expression. The Verilog algorithm consists of four parts: program call module, module_K1_K2, module_XB_Re and conversion module. The conversion module includes floating-point conversion module and DA conversion module. Then, it can be jointly simulated by XIlinx ise and Modelsim software, and the obtained data can be converted into decimal using Matlab for plotting and analysis. The overall module diagram of the Verilog algorithm is shown in Figure 3.

[0108] The program calls the control module Module_K1_K2 to calculate K11 and K12. Module_K1_K2 contains a floating-point to decimal fixed-point converter, an adder, a multiplier, and RAM memory. The program calls the module and transmits the resulting K11 and K12 to Module_XB_Re. The data from Module_XB_Re is then passed to Module_K1_K2 for computation. The resulting K12 and K21 are then passed to Module_XB_Re to obtain new iterative values, which are then sent to the conversion module for output. The schematic diagrams of Module_K1_K2 and Module_XB_Re are shown in Figures 4 and 5, and the flow chart for Module_XB_Re is shown in Figure 6.

[0109] In addition, in order to present the fitting effect of the above-mentioned tanh algorithm, it is not possible to express it intuitively from the improved FHN phase trajectory diagram of different periods. The following comparison between other piecewise fitting functions and the tanh function can more intuitively feel the superiority of this algorithm.

[0110] Piecewise fitting function (1):

[0111] Piecewise fitting function (2):

[0112] Since tanh is an odd function, we only need to discuss the side of the above-mentioned piecewise fitting function that is greater than 0. If we select 4000 values ​​within the interval [0,8] for discussion, the average error obtained by tanh in the algorithm of the present invention is 0.00000025715, the average error obtained by fitting function one is 0.00778553327157498, and the average error obtained by fitting function two is 0.0051924437. This is because when x>4, the value of the hyperbolic tangent function is very close to 1, resulting in very low average errors for all three. Calculation shows that the value of x in the improved FHN model does not exceed 4, so we select 2000 values ​​within the interval [0,4] for discussion. The average error obtained by tanh in the algorithm of the present invention is 0.0000002676, the average error obtained by fitting function one is 0.015487411, and the average error obtained by fitting function two is 0.010301231.

[0113] Finally, the errors between the algorithms are shown in Figures 20, 21 and 22. Figure 20 is a comparison diagram of the errors between fitting function 1 and tanh at the approximation point, Figure 21 is a comparison diagram of the errors between fitting function 2 and tanh at the approximation point, and Figure 22 is a comparison diagram of the errors between the algorithm of the present invention and tanh at the approximation point.

[0114] By comparing Figures 20, 21 and 22, it can be seen that the algorithm for implementing tanh in the present invention is much more accurate than the other two, and does not require consuming too many resources such as multipliers, dividers and adders, and can be widely used in high-precision calculations.

[0115] In summary, the present invention overcomes the inability of existing technologies to meet the requirements of FPGA for high-precision and high-efficiency generation of FHN discharge models containing complex functions, and proposes a multi-segment linear fitting neuron circuit implementation method based on FPGA technology. It only consumes a small amount of RAM resources and can solve the problem of implementing complex functions with high precision requirements in FPGA devices.

[0116] The above description is merely a preferred embodiment of the present invention and does not constitute any other form of limitation to the present invention. Any modification or equivalent variation based on the technical essence of the present invention shall still fall within the scope of protection claimed by the present invention.

Claims

1. A method for realizing a multi-segment linear fitting neuron circuit based on FPGA technology, characterized in that: The hyperbolic tangent function and sine function in the neuron system are made into a function module respectively. Then, the corresponding parameters are calculated by the second-order Runge-Kutta to execute the function module to obtain the values ​​of the hyperbolic tangent function and the sine function. After the calculation is completed, the obtained values ​​are output through the floating-point converter and the AD converter and displayed on the oscilloscope. The specific steps are as follows: S1: Processing steps of hyperbolic tangent function: S11: Divide the interval into segmented intervals according to the segmentation principle, and obtain all approach points; Using the values ​​of any two adjacent approximation points, the code is written using the programming software through Cramer's rule to obtain the values ​​of k and b in all straight line segments y=kx+b, and the values ​​of k and b are converted into IEEE754 single-precision 32-bit data format and saved through the programming software; S12: Use programming software to concatenate two groups of 32 bits into 64 bits of data and save and generate a .coe file, wherein the upper 32 bits store the value of k and the lower 32 bits store the value of b. Then, use Xilinx ise software to generate a RAM IP core from the .coe file; S13: amplify the corresponding multiples of the data to be processed in the adjacent integer segment intervals by a multiplier, then convert the single-precision IEEE754 floating-point number into a decimal number through a floating-point converter, take the integer part and send it to the address line of the RAM for addressing, so as to obtain the k value of the high 32 bits and the b value of the low 32 bits in the RAM, and then obtain the corresponding value of the hyperbolic tangent function through a multiplier and an adder; S2: Processing method of sine function: S21: Since the value of the sine function changes periodically between [-1,1], the value of the sine function in a period interval is divided into 3000 parts to meet the accuracy requirements, converted into single-precision IEEE754 floating-point numbers and stored in RAM, and the address is automatically increased by 1 after each calculation operation. If the addressing address is equal to 3000, the address is cleared when the next clock signal comes. This cycle is repeated to realize a periodic sine function that changes over time. S22: According to the above steps, the improved Fitzhugh-Nagumo neuron model is selected as: where x and y are membrane potential and sodium gating variables, respectively, I m is the external stimulus applied to the neuron, a and b are two constants, corresponding to the equilibrium state of potassium potential and sodium potential, respectively, and c is the time constant that controls the sodium gating rate; S23: Solve the system of differential equations according to the second-order Runge-Kutta K 11 =2tanh(x i )-x i -y i +I m sin(Ft) K 21 =c(x i +a-by i ) K 12 =2tanh(x i +hK 11 )-(x i +hK 11 )-(y i +hK 21 )+I m sin(F(t+h)) K 22 =c((x i +hK 11 )+a-b(y i +hK 21 )) S24: According to the above expression, the corresponding Verilog algorithm is completed based on the Xilinx ise software programming environment, and then the XIlinx ise and Modelsim software are jointly simulated, and the obtained data is converted into decimal using Matlab software for drawing analysis. After confirmation, the bit file generated by the XIlinx ise software is burned into the FPGA development board.

2. The method for realizing a multi-segment linear fitting neuron circuit based on FPGA technology according to claim 1, characterized in that: The hyperbolic tangent function module is implemented using a multi-segment linear fitting method, and the sine function module is implemented using a lookup table method. After the calculation is completed, the obtained value is output through a floating point converter and an AD converter and displayed on an oscilloscope.

3. The method for realizing a multi-segment linear fitting neuron circuit based on FPGA technology according to claim 1, characterized in that: In step S11, the hyperbolic tangent function is tanh, which is an odd function and has a value close to 1 when x≥8. The judgment statement is used to force the input value greater than 8 to be assigned 1, and then each adjacent integer greater than or equal to the remaining integers is divided into 500 parts, a total of 4000 parts are divided and 4000 approximation points are obtained. The negative part uses the principle of odd functions, and only the positive axis side needs to be obtained, and then the negative axis side is processed through the judgment statement.

4. The method for realizing a multi-segment linear fitting neuron circuit based on FPGA technology according to claim 1, characterized in that: In step S11, the programming software is C++ or Matlab.

5. The method for realizing a neuron circuit of multi-segment linear fitting based on FPGA technology according to claim 1, characterized in that: In step S13, when the input variable x of the hyperbolic tangent function is a negative number, it is forcibly converted into a positive number for analysis, and then the highest bit of the output f(x) is assigned a value of 1.

6. The method for realizing a neuron circuit of multi-segment linear fitting based on FPGA technology according to claim 1, characterized in that: In step S13, the multiplier is used in a time-division multiplexing manner, consuming a total of 1 RAM, 1 adder, 1 multiplier and 1 floating-point converter.

7. The method for realizing a neuron circuit of multi-segment linear fitting based on FPGA technology according to claim 1, characterized in that: In step S21, the sine function is sin(Ft). When F in sin(Ft) is not 1, the second-order Runge-Kutta calculation is used, and the step length h is h=0.002083975226.

8. The method for realizing a neuron circuit of multi-segment linear fitting based on FPGA technology according to claim 1, characterized in that: In step S22, the values ​​of different states of the neuron model are as follows: Cycle 1: a=0.7, b=0.8, c=0.1, I m =1.5, F = 1.001, initial value x = -2.195242988, y = 0.024174486; Cycle 2: a=0.7, b=0.8, c=0.1, I m =1.4, F = 1.001, initial value x = -1.821812757, y = 0.071503257; Cycle 3: a=0.7, b=0.8, c=0.1, I m =1.13, F = 1.001, initial value x = -2.202231862, y = 0.517387497; Cycle 4: a=0.7, b=0.8, c=0.1, I m =1.13, F = 1.001, initial value x = -1.36772072, y = -0.002091415; Cycle 6: a=0.7, b=0.8, c=0.1, I m =1.08, F = 1.001, initial value x = -2.049488685, y = 0.219877547; Chaos: a = 0.7, b = 0.8, c = 0.1, I m =1,F=1.001,initial value x=-2.325905706,y=-0.301884812.

9. The method for realizing a neuron circuit of multi-segment linear fitting based on FPGA technology according to claim 1, characterized in that: In step S24, the Verilog algorithm includes a program calling module, a module_K1_K2, a module_XB_Re module and a conversion module, wherein the conversion module includes a floating-point conversion module and a DA conversion module, and the program calling module controls module_K1_K2 to calculate K11 and K12, wherein module_K1_K2 includes a floating-point to decimal fixed-point converter, an adder, a multiplier, and a memory RAM, and the program calling module transmits the obtained K11 and K12 to module_XB_Re, and then passes the data obtained by module_XB_Re to module_K1_K2 for calculation, and then transmits the obtained K12 and K21 to module_XB_Re to obtain new iterative values, and transmits the iterated values ​​to the conversion module for output.

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