Film forming method and semiconductor manufacturing apparatus

Abstract

[Problem] To suppress an increase in wiring resistance of a wiring material that is embedded in a pattern. [Solution] In the present invention, when forming a metal wiring on a silicon-based wafer W: a Zr film 27 is formed inside a pattern 26 which is opened in an insulating film 25 of the wafer W; the formed Zr film 27 is etched to adjust the film thickness of the Zr film 27; a Ti film 28 is formed on the Zr film 27 by using TiCl4 gas; and the same TiCl4 gas is used in the etching of the Zr film 27.

Description

Film formation method and semiconductor manufacturing apparatus

[0001] The present disclosure relates to a film forming method and a semiconductor manufacturing apparatus.

[0002] For example, in logic ICs as semiconductor devices, titanium (Ti) is used as a contact material for the source and drain. Titanium is deposited on the inner walls and bottom surfaces of trenches and contact holes, which are patterns formed in an insulating film (see, for example, Patent Document 1). After that, a low-resistance metal, such as ruthenium (Ru), is embedded in the pattern as a wiring material.

[0003] Japanese Patent Application Laid-Open No. 2012-204522

[0004] The technology according to the present disclosure suppresses an increase in the wiring resistance of the wiring material embedded inside the pattern.

[0005] One aspect of the technology disclosed herein is a film formation method for forming a metal film inside a pattern opened in an insulating film of a silicon-based substrate to be processed when forming metal wiring on the substrate, while forming a contact portion made of metal silicide at the bottom of the pattern, the method comprising: a first film formation step for forming a first metal film inside the pattern; a film thickness adjustment step for adjusting the film thickness of the formed first metal film; and a second film formation step for forming a second metal film on the first metal film using a source gas, and in the film thickness adjustment step, the formed first metal film is etched using the source gas.

[0006] According to the technology of the present disclosure, it is possible to suppress an increase in the wiring resistance of the wiring material embedded inside the pattern.

[0007] FIG. 1 is a plan view illustrating an example of a configuration of a semiconductor manufacturing apparatus according to an embodiment of the technology disclosed herein; FIG. 2 is an enlarged partial cross-sectional view of an example of the vicinity of a pattern on a wafer in which a wiring material is embedded after various processes have been performed in the semiconductor manufacturing apparatus of FIG. 1; FIG. 3 is a flowchart (one example) illustrating a film forming method according to the present embodiment; FIG. 4 is a process diagram (one example) illustrating a film forming method according to the present embodiment; FIG. 5 is a flowchart (one example) illustrating a modified example of the film forming method according to the present embodiment; FIG. 6 is a process diagram (one example) illustrating a modified example of the film forming method according to the present embodiment; and FIG. 7 is a plan view illustrating a configuration of a modified example of the semiconductor manufacturing apparatus according to the present embodiment.

[0008] In recent years, zirconium (Zr) has been considered a promising contact material, and when Zr is used, Zr is laminated with Ti on the inner wall and bottom surface of the pattern. However, if the Zr film becomes thick inside the pattern, the volume of the wiring material inside the pattern will decrease, which may lead to an increase in wiring resistance.

[0009] In contrast to this, in the technique according to the present disclosure, after the Zr film is formed inside the pattern, the Zr film is etched to adjust the thickness of the Zr film.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will now be described with reference to the accompanying drawings, in which: Fig. 1 is a plan view illustrating an example of the configuration of a semiconductor manufacturing apparatus according to the present embodiment;

[0011] 1, a semiconductor manufacturing apparatus 10 includes a COR chamber 11 for performing a COR (Chemical Oxide Removal) process and a PHT (Post Heat Treatment) chamber 12 for performing a PHT (Post Heat Treatment) process. The semiconductor manufacturing apparatus 10 also includes a Zr film formation chamber 13 (first film formation unit) for performing a zirconium (Zr) film formation process and a Ti film formation chamber 14 (second film formation unit) for performing a titanium (Ti) film formation process.

[0012] The COR chamber 11 and the PHT chamber 12 are connected to a first transfer module 16, and the Zr deposition chamber 13 and the Ti deposition chamber 14 are connected to a second transfer module 17. The first transfer module 16 is connected to a loader module 19 via a load lock module 18. The arrangement of the modules is not limited to this, and the COR chamber 11 and the PHT chamber 12 may be connected to the second transfer module 17, or the Zr deposition chamber 13 and the Ti deposition chamber 14 may be connected to the first transfer module 16.

[0013] The loader module 19 is provided with a plurality of load ports 20, and a container for accommodating a plurality of wafers, such as a FOUP (not shown), is attached to each load port 20. The first transfer module 16 and the second transfer module 17 are connected via a wafer transfer unit 21.

[0014] In the semiconductor manufacturing apparatus 10, a transfer robot (not shown) is built into each of the loader module 19, the first transfer module 16, and the second transfer module 17. Each transfer robot transfers wafers between the COR chamber 11, the PHT chamber 12, the Zr film formation chamber 13, the Ti film formation chamber 14, and each load port 20.

[0015] The loader module 19 is an atmospheric transfer system or a nitrogen transfer system, and its interior is maintained at atmospheric pressure. The first transfer module 16 and the second transfer module 17 are vacuum transfer systems, and their interiors are depressurized to a near vacuum. The load lock module 18 is configured so that its interior can be switched between atmospheric pressure and a near vacuum. When wafers are transferred between the first transfer module 16 and the loader module 19, the load lock module 18 switches its internal pressure, thereby realizing wafer transfer without changing the internal pressure of the first transfer module 16 or the loader module 19.

[0016] The COR chamber 11, the PHT chamber 12, and the wafer transfer unit 21 are connected to a first transfer module 16 via a gate valve 22. The Zr film formation chamber 13, the Ti film formation chamber 14, and the wafer transfer unit 21 are connected to a second transfer module 17 via a gate valve 23.

[0017] In the semiconductor manufacturing equipment 10, a silicon-based wafer transferred from a load port 20 is first transferred sequentially to a COR chamber 11 and a PHT chamber 12, where the COR and PHT processes remove the native oxide film formed on the surface of the silicon (Si) or silicon germanium (SiGe) that constitutes the wafer. The wafer is then transferred to a Zr film-forming chamber 13, where a Zr film is formed inside a pattern opened in an insulating film, such as a trench or a contact hole (including a via hole). The wafer is then transferred to a Ti film-forming chamber 14, where a Ti film is formed on the Zr film inside the pattern. After the surface of the Ti film is nitrided by a nitriding process, the wafer is transported to a FOUP on each load port 20 via a second transfer module 17, a first transfer module 16, and a loader module 19. The wafer is then subjected to a metal deposition process in a separate deposition apparatus, and a wiring metal, such as ruthenium (Ru), molybdenum (Mo), or tungsten (W), is embedded inside the pattern. The metal deposition process may be performed without nitriding the surface of the Ti film, or a separate chamber for performing the nitriding process may be provided to accelerate the nitriding process. Alternatively, a chamber for performing the metal deposition process may be installed in the semiconductor manufacturing apparatus 10.

[0018] Fig. 2 is an enlarged partial cross-sectional view of an example of the vicinity of a pattern on a wafer in which wiring material is embedded after various processes have been performed in the semiconductor manufacturing apparatus 10 of Fig. 1. In Fig. 2, the wafer W (substrate to be processed) has a base 24 made of Si or SiGe, and an insulating film 25 made of, for example, silicon nitride (SiN) is formed on the base 24. Contact holes or trenches serving as patterns 26 are opened in the insulating film 25, and the base 24 is exposed at the bottom of the pattern 26.

[0019] The bottom and sidewalls of the pattern 26 and the top surface of the insulating film 25 are covered with a Zr film 27 (first metal film), and the surface of the Zr film 27 is covered with a Ti film 28 (second metal film). The interior of the pattern 26 is then filled with a wiring metal 30. At this time, the surface of the Ti film 28 may be transformed into titanium nitride (TiN) by nitriding treatment to form a barrier layer. The barrier layer prevents metal molecules of the wiring metal 30 from penetrating and diffusing into the insulating film 25. Note that a portion of the Zr film 27 may also be transformed into zirconium nitride (ZrN) to form a thin barrier layer (not shown), which also prevents metal molecules from penetrating and diffusing into the insulating film 25.

[0020] The Zr film 27 and the Ti film 28 are in contact with the base 24 at the bottom of the pattern 26 and are silicided to metal silicides, such as zirconium silicide (ZrSi) 27a and titanium silicide (TiSi) 28a. The ZrSi 27a and the TiSi 28a function as contact portions between the base 24 and the wiring metal 30.

[0021] FIG. 3 is a flowchart (one example) for explaining the film forming method according to this embodiment, and FIG. 4 is a process diagram (one example) for explaining the film forming method according to this embodiment.

[0022] In the metal wiring formation process as a film formation method according to this embodiment, in semiconductor manufacturing equipment 10, first, wafer W is transferred from a FOUP attached to load port 20 to COR chamber 11. At this time, an insulating film 25 is formed on base 24 of wafer W, and pattern 26 is opened in insulating film 25 ( FIG. 4A ).

[0023] In the COR chamber 11, the wafer W is subjected to COR processing, and the native oxide film formed on the surface of the base 24 made of Si or SiGe is removed by ammonium silicofluoride (NH ４ ) ２ SiF ６ The wafer W is then transferred to the PHT chamber 12, where the wafer W is subjected to PHT treatment, causing the ammonium silicofluoride to sublimate. This removes the native oxide film (step S31) (oxide film removal process).

[0024] Next, the wafer W is transferred to the Zr film formation chamber 13. The Zr film formation chamber 13 is, for example, a PECVD (Plasma Enhanced Chemical Vapor Deposition) apparatus, and includes a high-frequency power supply 31 and a film formation gas source 32. In the Zr film formation chamber 13, a high-frequency voltage applied from the high-frequency power supply 31 forms an electric field inside the Zr film formation chamber 13, and the film formation gas source 32 supplies a film formation gas containing Zr into the Zr film formation chamber 13. At this time, Zr plasma is generated from the film formation gas, and ions and radicals of the Zr plasma adhere to the surface of the wafer W, thereby forming a Zr film 27 inside the pattern 26 ( FIG. 4(B) ) (step S32) (first film formation process).

[0025] Next, the wafer W is transferred to the Ti film formation chamber 14. The Ti film formation chamber 14 is also, for example, a PECVD apparatus, and includes a high frequency power supply 33 and a source gas source 34 (a source gas inlet). Here, the source gas source 34 supplies titanium tetrachloride (TiCl ４ ) gas is supplied into the Ti film forming chamber 14. ４ The gas reacts with the Zr film 27 to generate zirconium chloride. Specifically, TiCl ４ The gas reacts with Zr to form zirconium chloride (ZrCl ｘ ) and titanium chloride (TiCl ｙ In the following formula (1), x is 3 or 4, and y is any one of 2 to 4.

[0026] Zr + TiCl ４ → ZrCl ｘ ↑ + TiCl ｙ ↑ … (1)

[0027] In the Ti film formation chamber 14, the wafer W is heated by a heater or the like of a mounting table (not shown). ｘ and TiCl ｙAs a result, the Zr film 27 is etched and the thickness of the Zr film 27 is adjusted (FIG. 4C) (step S33) (film thickness adjusting step). When the Zr film 27 is etched, the high frequency power supply 33 does not apply a high frequency voltage to the inside of the Ti film forming chamber 14, so the Zr film 27 is formed of TiCl 2 that is not plasmatized. ４ It is exposed to TiCl gas. ４ The gas is made into plasma and TiCl ４ The Zr film 27 may be etched by generating a plasma of the above formula (1) and promoting the reaction of the above formula (1).

[0028] The time for etching the Zr film 27 is set according to the film thickness (amount) of the Zr film 27 to be left inside the pattern 26. For example, if the Zr film 27 is made of TiCl ４ The time required for etching with the gas to a desired remaining film thickness is measured, and the time for etching the Zr film 27 is set based on this time.

[0029] In step S33, the Zr film 27 at the bottom of the pattern 26 is transformed into ZrSi 27a, and therefore TiCl ４ Therefore, in step S33, the Zr film 27 formed on the sidewall of the pattern 26 is mainly etched.

[0030] The source gas used for etching the Zr film 27 is TiCl ４ The present invention is not limited to gases. For example, tungsten pentachloride (WCl ５ ) gas, tungsten hexachloride (WCl ６ ) gas, molybdenum pentachloride (MoCl ５ ) gas, molybdenum hexachloride (MoCl ６ ) gas, hafnium tetrachloride (HfCl ４ ) gas and zirconium tetrachloride (ZrCl ４ ) gases may be used as the source gas. ４ A mixture of gases may be used as the source gas. These metal chloride gases also react with the Zr film 27 to produce zirconium chloride.

[0031] After etching the Zr film 27, in the Ti film forming chamber 14, a high frequency voltage applied from the high frequency power supply 33 forms an electric field inside the Ti film forming chamber 14, and the source gas source 34 supplies TiCl ４ The gas is supplied into the Ti film forming chamber 14. At this time, TiCl ４ The gas is converted into plasma to generate Ti plasma, and ions and radicals of the Ti plasma adhere to the surface of the remaining Zr film 27, thereby forming a Ti film 28 inside the pattern 26 (FIG. 4(D)) (step S34) (second film forming step). ２ ) gas is introduced into the Ti film forming chamber 14 as a reducing gas. ４ The gas is turned into plasma and Cl atoms are removed from the TiCl-based precursor by reduction, thereby leaving Ti atoms on the surface of the Zr film 27 and promoting the formation of the Ti film 28.

[0032] At this time, TiCl ４ The gas etches a part of the Ti film 28 that is generated, and therefore, it is possible to prevent the thickness of the Ti film 28 from becoming unnecessarily large. ４ The gas reacts with the Ti film 28 to generate new titanium chloride, which is then sublimated.

[0033] The total thickness of the Zr film 27 and the Ti film 28 on the sidewall of the pattern 26 after step S34 is smaller than the thickness of the Zr film 27 after step S32. ４ The gas is not limited to TiCl ４ Other than the above, a gas of a chloride containing Ti or a gas of a halide containing Ti may also be used.

[0034] After the Ti film 28 is formed, the wafer W is subjected to a cleaning process (step S35) (cleaning process) in the Ti film formation chamber 14. In the cleaning process, Zr etching residue is removed from the surface of the wafer W by sputtering using plasma generated from argon gas or hydrogen gas, and the etching residue is exhausted to the outside of the Ti film formation chamber 14 by an exhaust device (not shown).

[0035] Thereafter, a metal film forming process is performed on the wafer W, and wiring metal 30 is embedded inside the pattern 26 (FIG. 4(E)) (step S36) (wiring step).

[0036] FIG. 5 is a flowchart (one example) illustrating a modified example of the film formation method according to the present embodiment, and FIG. 6 is a process diagram (one example) illustrating a modified example of the film formation method according to the present embodiment.

[0037] 5 and 6 differs from the metal wiring formation process shown in Figures 3 and 4 in that etching of the Zr film 27 and formation of the Ti film 28 are repeated, but the other steps are the same as the steps of the metal wiring formation process shown in Figures 3 and 4. Therefore, detailed description of the steps that are the same as the steps of the metal wiring formation process shown in Figures 3 and 4 will be omitted below.

[0038] In the metal wiring forming process as a modification of the film forming method according to the present embodiment, first, a native oxide film is removed from the wafer W (FIG. 6A) (step S31). Next, a Zr film forming process is performed on the wafer W, and a Zr film 27 is formed inside the pattern 26 (FIG. 6B) (step S32).

[0039] Next, the wafer W is transferred to the Ti film forming chamber 14. In the Ti film forming chamber 14, the Zr film 27 is first formed by TiCl ４ The Zr film 27 is etched by exposing it to a gas (step S51). Since the execution time of step S51 is set to be shorter than the execution time of step S33, the remaining amount of the Zr film 27 after the first execution of step S51 is greater than the remaining amount of the Zr film 27 after the execution of step S33 (FIG. 6C).

[0040] After etching the Zr film 27, TiCl ４ A Ti plasma is generated from the gas, and a Ti film 28 is formed on the surface of the Zr film 27 inside the pattern 26 (step S52). Since the execution time of step S52 is set shorter than the execution time of step S34, the thickness of the Ti film 28 after the first execution of step S52 is smaller than the thickness of the Ti film 28 after the execution of step S34 (FIG. 6D).

[0041] Thereafter, it is determined whether the Zr film 27 has reached a specified remaining film thickness (whether it has been thinned to the remaining film thickness) (step S53). For example, the remaining film thickness of the Zr film 27 may be estimated or observed by a remaining film thickness estimation means or observation means for the Zr film 27 provided in the Ti film formation chamber 14. In this case, the determination in step S53 is performed based on the estimated or observed remaining film thickness of the Zr film 27.

[0042] If the Zr film 27 has not reached the specified remaining film thickness (NO in step S53), the process returns to step S51, and the etching of the Zr film 27 and the formation of the Ti film 28 are repeated. As a result, when the Ti film 28 is laminated on the Zr film 27, the film thickness of the Zr film 27 decreases, while the film thickness of the Ti film 28 increases. The repeated etching of the Zr film 27 and the formation of the Ti film 28 is achieved by applying a high frequency voltage in pulses from the high frequency power supply 33 to the inside of the Ti film formation chamber 14. That is, the Zr film 27 is etched when no high frequency voltage is applied, and TiCl is formed when the high frequency voltage is applied. ４ A Ti plasma is generated from the gas to form the Ti film 28. The amount of etching of the Zr film 27 when step S51 is performed once and the amount of formation of the Ti film 28 when step S52 is performed once are controlled by adjusting the duty ratio of the application of the high frequency voltage pulse.

[0043] On the other hand, if the Zr film 27 has reached the specified remaining film thickness (YES in step S53), etching of the Zr film 27 and formation of the Ti film 28 are stopped, and the process proceeds to step S35. Note that after the Zr film 27 has reached the specified remaining film thickness, step S52 may be further executed to further increase the film thickness of the Ti film 28.

[0044] In step S53, it may be determined whether or not the number of times steps S51 and S52 have been repeated reaches a predetermined number. ４The number of repetitions of steps S51 and S52 required for etching to a desired remaining film thickness by gas is measured, and the measured number of repetitions is set as the predetermined number. Note that the total film thickness of the Zr film 27 and the Ti film 28 after step S53 is performed is smaller than the film thickness of the Zr film 27 after step S32 is performed (FIG. 6E).

[0045] Thereafter, the wafer W is subjected to a cleaning process (step S35), and further subjected to a metal film forming process to bury the wiring metal 30 inside the pattern 26 (FIG. 6(F)) (step S36).

[0046] According to this embodiment, the Zr film 27 formed inside the pattern 26 of the wafer W is etched, which prevents a decrease in the volume of the wiring metal 30 embedded inside the pattern 26. This makes it possible to suppress an increase in the wiring resistance of the wiring metal 30.

[0047] In this embodiment, the etching of the Zr film 27 and the formation of the Ti film 28 are performed using the same TiCl ４ This allows for a reduction in the number of gases used in the semiconductor manufacturing equipment 10. ４ By using this gas, etching of the Zr film 27 and formation of the Ti film 28 can be performed in the same Ti film formation chamber 14, thereby reducing the number of chambers and preventing an increase in the footprint of the semiconductor manufacturing apparatus 10. Furthermore, since it is no longer necessary to transfer the wafer W to another chamber between etching of the Zr film 27 and formation of the Ti film 28, throughput can also be improved.

[0048] Furthermore, in this embodiment, the Zr film formation chamber 13, the Ti film formation chamber 14, and the nitriding chamber 15 are connected to the same second transfer module 17. Therefore, the formation of the Zr film 27, the etching of the Zr film 27, the formation of the Ti film 28, and the formation of the barrier layer 29 can be performed in-situ in the same vacuum system. This also improves throughput. Furthermore, since the wafer W is subjected to a cleaning process in the Ti film formation chamber 14, it is possible to prevent Zr etching residue from being carried into the nitriding chamber 15, which is connected to the same vacuum transfer system.

[0049] Furthermore, in this embodiment, a Ti film 28 is formed on the Zr film 27. Since stacking Ti on Zr reduces electrical resistance, it is possible to reduce the resistance of the ohmic contact, particularly in the contact portion where TiSi 28a is stacked on ZrSi 27a.

[0050] Although the preferred embodiments of the present disclosure have been described above, the present disclosure is not limited to the above-described embodiments, and various modifications and changes are possible within the scope of the gist of the present disclosure.

[0051] For example, in the semiconductor manufacturing apparatus 10, the Zr film 27 is formed in the Zr film formation chamber 13, and the etching of the Zr film 27 and the formation of the Ti film 28 are performed in the Ti film formation chamber 14. However, as shown in Fig. 7, by providing a source gas source 34 in the Zr film formation chamber 13, the etching of the Zr film 27 and the formation of the Ti film 28 may also be performed in the Zr film formation chamber 13. In other words, the Zr film formation chamber 13 may also serve as the Ti film formation chamber 14. In this case, the film formation gas source 32 supplies a film formation gas into the Zr film formation chamber 13 during the formation of the Zr film 27, and the source gas source 34 supplies TiCl ４ Supply gas.

[0052] This eliminates the need to provide the Ti film formation chamber 14, thereby further reducing the footprint of the semiconductor manufacturing apparatus 10. Also, since it is no longer necessary to transfer the wafer W to another chamber between the formation of the Zr film 27 and the etching of the Zr film 27, throughput can be further improved. Furthermore, after the formation of the Zr film 27, the TiCl ４ Since the gas is supplied, the Zr adhering to the inner wall of the Zr film forming chamber 13 during the formation of the Zr film 27 is removed by TiCl ４ The gas can remove the metal (see the above formula (1)). This makes it possible to suppress metal contamination inside the Zr film formation chamber 13.

[0053] In addition, in the wafer W, the Zr film 27 is formed inside the pattern 26, and the Ti film 28 is formed thereon. However, instead of the Zr film 27, a molybdenum (Mo) film or a hafnium (Hf) film may be formed, and the Ti film 28 may be formed thereon. In this case, too, in the Ti film forming chamber 14, TiCl ４ The gas etches the Mo film and the Hf film.

[0054] This application claims priority based on Japanese Patent Application No. 2023-171278, filed on October 2, 2023, the entire contents of which are incorporated herein by reference.

[0055] W wafer 10 semiconductor manufacturing equipment 13 Zr film forming chamber 14 Ti film forming chamber 25 insulating film 26 pattern 27 Zr film 28 Ti film 30 metal for wiring

Claims

1. A film formation method for forming a metal film inside a pattern opened in an insulating film of a silicon-based substrate to be processed when forming metal wiring on the substrate, while forming a contact portion made of metal silicide at the bottom of the pattern, the film formation method comprising: a first film formation step for forming a first metal film inside the pattern; a film thickness adjustment step for adjusting the film thickness of the first metal film formed; and a second film formation step for forming a second metal film on the first metal film using a source gas, wherein in the film thickness adjustment step, the first metal film formed is etched using the source gas.

2. The film forming method according to claim 1, wherein the film thickness adjusting step and the second film forming step are repeated to laminate the second metal film on the first metal film.

3. The film forming method according to claim 2, wherein the film thickness adjusting step and the second film forming step are repeated by applying a high frequency voltage pulse.

4. The film forming method according to claim 1, wherein the second metal film is laminated on the first metal film without repeating the film thickness adjustment step and the second film forming step.

5. The film forming method according to claim 1, wherein the source gas is not turned into plasma in the film thickness adjusting step, and the source gas is turned into plasma in the second film forming step.

6. The film forming method according to claim 1, wherein the source gas is turned into plasma in both the film thickness adjusting step and the second film forming step.

7. The method of forming a film according to claim 1, further comprising: an oxide film removing step of removing an oxide film formed on the surface of the substrate to be processed; and a wiring step of embedding a metal wiring material on top of the second metal film inside the pattern.

8. The film forming method according to claim 7, further comprising a cleaning step for removing etching residue of the first metal film between the second film forming step and the wiring step.

9. The method of claim 1, wherein the first metal film contains one of zirconium, molybdenum, and hafnium.

10. The method of claim 1, wherein the second metal film comprises titanium.

11. The film forming method according to claim 1, wherein the source gas is a titanium-containing chloride gas or a titanium-containing halide gas.

12. The film forming method according to claim 11, wherein the source gas further contains at least one of tungsten pentachloride, tungsten hexachloride, molybdenum pentachloride, molybdenum hexachloride, hafnium tetrachloride, and zirconium tetrachloride.

13. The method of claim 1, wherein the pattern is a contact hole or a trench.

14. A semiconductor manufacturing apparatus for forming a metal film inside a pattern opened in an insulating film of a silicon-based substrate to be processed and forming a contact portion made of metal silicide at a bottom of the pattern when forming metal wiring on the substrate, the apparatus comprising: a first film formation unit for forming a first metal film inside the pattern; and a second film formation unit for forming a second metal film on the first metal film formed using a source gas, the second film formation unit adjusting the film thickness of the first metal film formed using the source gas.

15. The semiconductor manufacturing apparatus according to claim 14, wherein the second film forming section has a high frequency power source for generating plasma from the source gas.

16. The semiconductor manufacturing apparatus according to claim 14, wherein the first film forming section and the second film forming section are connected to the same vacuum transfer system.

17. The semiconductor manufacturing apparatus according to claim 14, wherein said first film formation section has an inlet for said source gas and thereby serves as said second film formation section.

18. The semiconductor manufacturing apparatus according to claim 14, wherein the second film forming section performs a cleaning process on the substrate to be processed, for removing etching residue of the first metal film.

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