Electronic device for capturing and displaying images

Abstract

The present description relates to an electronic device (100) for capturing and displaying images, comprising a plurality of pixels (PIX) formed in and on a semiconductor substrate (101), each pixel comprising: – a detection element (103) for detecting first radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); – an emission element (107) for emitting second radiation (109), located on the side of a second face (101R) of the semiconductor substrate, opposite the first face; and – a circuit located in and on the semiconductor substrate and connecting the detection element to the emission element, the device (100) not having a pixel (PIX) control circuit external to the pixels (PIX).

Description

DESCRIPTION Electronic device for capturing and displaying images This application is based on, and claims priority from, French patent application FR2314055 filed on December 13, 2023 and entitled “Electronic device for capturing and displaying images”, which is considered to be an integral part of this description within the limits provided by law. Technical field

[0001] This description relates generally to electronic devices, and in particular to electronic devices for capturing and displaying images. Prior art

[0002] Electronic devices capable of implementing image capture and display functions have been proposed. Such devices typically comprise an image sensor, comprising an array of image capture pixels, and an image display, comprising an array of image display pixels distinct from the image capture pixels.Depending on the application, the image capture and display pixel matrices of the device may be located on the same side of a semiconductor substrate, for example in the case of a mobile phone, a connected watch or an electronic tablet comprising a display screen integrating an image sensor intended to acquire a user's fingerprints, or be located respectively on either side of the semiconductor substrate, for example in the case of a head-mounted display, a head-up display or smart glasses comprising one or more display screens each intended to be placed facing an eye of a user and one or more image sensors facing outwards.

[0003] Existing electronic image capture and display devices, however, suffer from various drawbacks. In particular, in these devices, the pixels of the image sensor are typically connected to a control circuit and a reading circuit, and the pixels of the image display are connected to a control circuit different from the control and reading circuits of the pixels of the image sensor. These circuits, which are for example located at the periphery of the pixel matrices of the sensor and of the image display, implement functions for addressing the pixel matrices to which they are respectively connected, and the images acquired by the sensor are for example stored in a memory circuit before being displayed, possibly after processing. This introduces an undesirable latency time between the acquisition of an image by the sensor and the display of the corresponding image by the display.Furthermore, existing electronic image capture and display devices exhibit high complexity, size, weight, power consumption, and manufacturing cost. Summary of the invention

[0004] It would be desirable to overcome all or part of the disadvantages of existing electronic image capture and display devices. In particular, there is a need to reduce the weight, size, complexity, power consumption, manufacturing costs and / or latency of these devices.

[0005] For this, one embodiment provides an electronic image capture and display device comprising a plurality of pixels formed in and on a semiconductor substrate, each pixel comprising: - an element for detecting a first radiation, located on the side of a first face of the semiconductor substrate; - an element for emitting a second radiation, located on the side of a second face of the semiconductor substrate opposite the first face; and - a circuit located in and on the semiconductor substrate and connecting the detection element to the emission element, the device being devoid of a pixel control circuit external to the pixels.

[0006] According to one embodiment, the circuit comprises: - an acquisition circuit located in and on the semiconductor substrate and adapted to provide an acquisition signal representative of an intensity of the first radiation received by the detection element of the pixel; and - a control circuit located in and on the semiconductor substrate and adapted to apply a control signal to the emitting element of the pixel.

[0007] According to one embodiment, the acquisition circuit and the control circuit are analog circuits.

[0008] According to one embodiment: - each detection element comprises a photodetector; - each acquisition circuit comprises a comparator having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit comprises an inverter having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor, the MOS transistor comprising a conduction electrode connected to the emission element.

[0009] According to one embodiment: - each detection element comprises a single-photon avalanche diode; - each acquisition circuit comprises a Schmitt trigger having an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit comprises an inverter having an input connected to an output of the Schmitt trigger and an output connected to a gate of a MOS transistor, the MOS transistor comprising a conduction electrode connected to the emission element.

[0010] According to one embodiment, the detection elements are located opposite the emission elements.

[0011] According to one embodiment, the detection elements and the emission elements are arranged respectively in first and second matrices, the first and second matrices having substantially identical pitches.

[0012] According to one embodiment, the first and second rays are visible light.

[0013] According to one embodiment, each emission element comprises at least one light-emitting diode.

[0014] According to one embodiment, the light-emitting diode is controlled by a control signal having an average value substantially proportional to an intensity of the first radiation detected by the detection element.

[0015] According to one embodiment, the light-emitting diode is controlled by a control signal having pulses repeating at a frequency substantially proportional to an intensity of the first radiation detected by the detection element.

[0016] According to one embodiment, the device comprises as many detection elements as emission elements.

[0017] One embodiment provides an electronic apparatus comprising: - a power supply circuit; and - at least one device as described above.

[0018] One embodiment provides a method of manufacturing a device as described above, the method comprising a step of transferring, by molecular bonding, a structure comprising the detection elements and the circuits onto another structure comprising the emission elements. Brief description of the drawings

[0019] These and other features and advantages will be set forth in detail in the following description of particular embodiments given without limitation in relation to the attached figures, among which:

[0020] Figure 1 is a schematic and partial isometric view of an image capture and display device according to one embodiment;

[0021] Figure 2 is an equivalent electrical diagram of a pixel of the device of Figure 1 according to one embodiment;

[0022] Figure 3 is an equivalent electrical diagram of a pixel of the device of Figure 1 according to another embodiment;

[0023] Figure 4 is a timing diagram illustrating, schematically and partially, an example of operation of the pixel of Figure 3;

[0024] Figure 5 is an equivalent electrical diagram of a pixel of the device of Figure 1 according to yet another embodiment;

[0025] Figure 6 is a timing diagram illustrating, schematically and partially, an example of operation of the pixel of Figure 5;

[0026] Figure 7A, Figure 7B, Figure 7C, Figure 7D, Figure 7E, Figure 7F, Figure 7G, Figure 7H and Figure 71 illustrates, by means of schematic and partial sectional views, structures obtained at the end of steps of a method of manufacturing the device of Figure 1 according to one embodiment;

[0027] Figure 8A, Figure 8B, Figure 8C, Figure 8D and Figure 8E illustrate, by means of schematic and partial sectional views, structures obtained at the end of successive steps of a method of manufacturing the device of Figure 1 according to another embodiment;

[0028] Figure 9 is a schematic and partial side view of an exemplary implementation of the device of Figure 1 in an electronic device; and

[0029] Figure 10 is a schematic and partial side view of another example of implementation of the device of Figure 1 in an electronic device. Description of the embodiments

[0030] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the various applications of the electronic image capture and display devices of the present description will not be detailed, the described embodiments being compatible with all or most of the applications likely to benefit from an electronic image capture and display device, possibly with adaptations within the reach of the person skilled in the art upon reading this description.

[0032] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0033] In the following description, when referring to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0034] Unless otherwise specified, the expressions “about”, “approximately”, “substantially”, and “in the order of” mean to within 10%, preferably to within 5%.

[0035] In the following description, the terms "insulator" and "conductor" mean, unless otherwise specified, electrically insulating and electrically conductive respectively.

[0036] The expression "transmittance of a layer" designates a ratio between an intensity of radiation leaving the layer and an intensity of radiation entering the layer. In the remainder of the description, a layer is said to be opaque to radiation when its transmittance is, for this radiation, strictly less than 40%, preferably less than or equal to 25%, more preferably less than or equal to 10%. Furthermore, a layer is said to be transparent to radiation when its transmittance is, for this radiation, greater than or equal to 40%, preferably greater than or equal to 75%, more preferably greater than or equal to 90%. The definition of the qualifiers opaque and transparent (e) above is not limited to the case of a layer, but applies more generally to any element likely to be exposed to radiation, for example a substrate, a region, a stack of several layers, etc.

[0037] In the present description, the expression "visible light" designates electromagnetic radiation whose wavelength is between 400 nm and 700 nm. Furthermore, the expression "infrared radiation" designates electromagnetic radiation whose wavelength is between 700 nm and 1 mm. In the infrared range, near infrared radiation has a wavelength between 700 nm and 1.7 pm.

[0038] Figure 1 is a schematic and partial isometric view of an image capture and display device 100 according to one embodiment.

[0039] According to this embodiment, the image capture and display device 100 comprises a plurality of pixels PIX formed in and on a semiconductor substrate 101.

[0040] Each pixel PIX of the device 100 comprises a detection element 103 of a radiation 105 and, associated with the detection element 103, an emission element 107 of a radiation 109. The detection elements 103 and emission elements 107 are respectively located on either side of the semiconductor substrate 101. More precisely, in the illustrated example, the detection elements 103 are located on the side of a face 101F of the substrate 101 and the emission elements 107 are located on the side of a face 101R of the substrate 101, opposite the face 101F. For the purpose of simplifying the drawing, each detection element 103 and each emission element 107 has was symbolized, in Figure 1, by a parallelepiped having, in top view, a substantially square-shaped perimeter. This example is however not limiting, each detection element 103 or emission element 107 being able, as a variant, to have any shape, for example cylindrical.

[0041] In the illustrated example, the pixels DIX of the device 100 are arranged in a matrix according to rows and columns. More precisely, in this example, the detection elements 103 are arranged in a matrix according to rows and columns. Similarly, the emission elements 107 are, in this example, arranged in a matrix according to rows and columns. In each of these matrices, the rows are for example substantially orthogonal to the columns. This example is however not limiting, the rows being able, as a variant, not to be orthogonal to the columns.

[0042] For example, the device 100 comprises as many detection elements 103 as emission elements 107.

[0043] In the example shown, the matrix of emission elements 107 has a pitch, i.e. a center-to-center distance between two adjacent emission elements 107, substantially equal to the pitch of the matrix of detection elements 103, i.e. substantially equal to a center-to-center distance between two adjacent detection elements 103. Furthermore, in this example, the emission elements 107 are located opposite the detection elements 103. In the example illustrated, the center of each emission element 107 is located substantially directly above the center of the detection element 103 located opposite. The emission elements 107 have, for example, in top view, lateral dimensions which are substantially equal, apart from manufacturing variations, to those of the detection elements 103. This example is however not limiting, the emission elements 107 being able, as a variant, to have dimensions different lateral dimensions, for example greater or lesser, than those of the detection elements 103. The respective dimensions, for example the respective surfaces, of the detection elements 103 and emission 107 are for example chosen as a function of a desired sensitivity on the side of the detection elements 103 and / or of an intensity to be achieved on the side of the emission elements 107.

[0044] For example, the radiation 105 captured by the detection elements 103 is visible light. Furthermore, the radiation 109 emitted by the emission elements 107 is, for example, visible light.

[0045] Figure 2 is an equivalent electrical diagram of a pixel PIX of the device 100 of Figure 1 according to one embodiment.

[0046] In the example shown, the detection element 103 of the pixel PIX comprises a photodetector 201 adapted to capture the radiation 105. The photodetector 201 is for example adapted to produce, under the effect of the incident radiation 105, a current Iph, also called photocurrent. The photocurrent Iph is for example substantially proportional to an intensity, or to a flux, of the radiation 105 captured by the photodetector 201. In the example illustrated, the photodetector 201 comprises a first conduction terminal, for example an anode electrode, connected to a node 203 for applying a reference potential, for example ground. The photodetector 201 further comprises, in this example, a second conduction terminal, for example a cathode electrode, connected to a circuit 205. By way of example, the photodetector 201 is a photosensitive diode, or photodiode.

[0047] In the illustrated example, the circuit 205 comprises an acquisition circuit 207, also called a conditioner or conditioning circuit. The acquisition circuit 207 is for example adapted to provide an acquisition signal representative of the intensity of the radiation 105 captured by the photodetector 201. The acquisition signal produced by the acquisition circuit 207 is for example a function of the photocurrent Iph, for example substantially proportional to the photocurrent Iph. As a variant, the acquisition signal is a function of a voltage across the terminals of the photodetector 201, for example substantially proportional to this voltage.

[0048] The acquisition circuit 207 makes it possible, for example, to amplify the photocurrent Iph and to provide a voltage for driving the emission element 107. For these purposes, the acquisition circuit 207 comprises, for example, an amplifier symbolized, in FIG. 2, by a transistor. For example, the amplifier is of the CTIA type (from the English “Capacitive Trans-Impedance Amplifier”).

[0049] In the example shown, the circuit 205 of the pixel PIX further comprises a control circuit 209, or driving circuit. The control circuit 209 is for example adapted to apply a control signal to the emission element 107. The control signal provided by the control circuit 209 is for example a function of the acquisition signal, for example substantially proportional to the acquisition signal.

[0050] In the example shown, the acquisition circuit 207 and the control circuit 209 each receive a calibration signal cal. The calibration signal cal makes it possible, for example, to compensate for manufacturing dispersions between the pixels PIX of the image capture and display device 100, for example manufacturing dispersions affecting the detection element 103 and / or the emission element 107 of the pixels PIX. In practice, the acquisition circuit 207 receives, for example, a calibration signal different from that received by the control circuit 209. The calibration signal cal presents for example a determined value, for each pixel PIX, at the end of a calibration step subsequent to manufacturing steps of the image capture and display device 100. As a variant, the calibration signal cal can be omitted.

[0051] In the example illustrated, the emission element 107 of the pixel PIX comprises a light-emitting diode 211 adapted to emit the radiation 109. The light-emitting diode 211 is for example more precisely adapted to emit the radiation 109 when it is traversed by a lied current, corresponding for example to the control signal applied by the control circuit 209. The lied current has for example an intensity substantially proportional to that of the photocurrent Iph, for example substantially proportional to the intensity of the radiation 105 captured by the photodetector 201. In the example illustrated in FIG. 2, the light-emitting diode 211 comprises a first conduction terminal, for example an anode electrode, connected to the circuit 205, for example to an output of the control circuit 209.The light-emitting diode 211 further comprises, in this example, a second conduction terminal, for example a cathode electrode, connected to a node 213 for applying a potential -Vk, for example a low potential. The light-emitting diode 211 is for example an organic light-emitting diode. Alternatively, the light-emitting diode 211 may be an inorganic light-emitting diode. The diode 211 is for example of the micro-LED type, that is to say that it has micrometric dimensions. In the case where the captured radiation 105 and the emitted radiation 109 are each visible light, the light-emitting diode 211 is for example surmounted by a color converter corresponding to the same wavelength range, or to the same color, as. that transmitted by a filter above the photodetector 201.

[0052] In the case where the lied current has an intensity substantially proportional to that of the photocurrent Iph, the acquisition circuits 207 and control 209 are for example analog circuits. In this case, the circuit 205 is in particular devoid of an analog-digital converter.

[0053] Figure 3 is an equivalent electrical diagram of a pixel PIX of the device 100 of Figure 1 according to another embodiment. The equivalent electrical diagram illustrated in Figure 3 corresponds more precisely to a case in which the circuit 205 of the pixel PIX is adapted to control the emission element 107 by a pulse signal.

[0054] The diagram of Figure 3 includes elements in common with the diagram of Figure 2. These common elements will not be detailed again below. In particular, the detection 103 and emission 107 elements of the diagram of Figure 3 are for example identical to those of the diagram of Figure 2.

[0055] In the example shown, the acquisition circuit 207 of the pixel PIX comprises a comparator 301 comprising an inverting input (-) connected to a node 303 of the acquisition circuit 207, a non-inverting input (+) connected to a node 305 for applying a reference potential Vref, and an output connected to a node 307 of the acquisition circuit 207. In the example shown, the cathode of the photodetector 201 is connected to the node 303. The nodes 303 and 307 of the acquisition circuit 207 constitute, for example, respectively input and output terminals of the acquisition circuit 207. In the example shown, the nodes 303 and 307 respectively have potentials Vsn and Vo.

[0056] In the example shown, the acquisition circuit 207 further comprises a capacitive element 309, for example a capacitor, connecting the node 303 to another node 311 for applying a reference potential, for example ground. The capacitor may be substituted or supplemented by a parasitic capacitance of the node 303. In the example shown, the acquisition circuit 207 further comprises a transistor 313, for example a MOS (Metal-Oxide-Semiconductor) transistor. In this example, the transistor 313 is more precisely an N-type MOS transistor (NMOS transistor). In the example shown, the transistor 313 comprises a conduction terminal, for example a source electrode, connected to the node 303, another conduction terminal, for example a drain electrode, connected to a node 315 for applying a supply potential Vdd, and a control terminal, for example a gate electrode, connected to the node 307.The potential Vdd is for example strictly greater than the potential Vref.

[0057] In the illustrated example, the control circuit 209 comprises an inverter 317 and a transistor 319. The inverter 317 comprises for example an input connected to the node 307 of the acquisition circuit 207 and an output connected to a control terminal, for example a gate electrode, of the transistor 319. The transistor 319 is for example more precisely a P-type MOS transistor (PMOS transistor). In the example shown, the PMOS transistor 319 comprises a conduction terminal, for example a drain electrode, connected to the anode of the light-emitting diode 211 and another conduction terminal, for example a source electrode, connected to a node 321 for applying a supply potential Va.

[0058] For example, the light-emitting diode 211 is controlled by a control signal having a value average substantially proportional to the intensity of the radiation 105.

[0059] Figure 4 is a timing diagram illustrating, schematically and partially, an example of operation of the PIX pixel of Figure 3. The timing diagram of Figure 4 includes curves 401 and 403 illustrating an example of evolution, as a function of time (t), of the potentials Vsn and Vo, respectively.

[0060] Between a time t0 and a time t1, subsequent to the time t0, the photodetector 201 is exposed to the radiation 105 and produces the photocurrent Iph. During this period, the photocurrent Iph is integrated by the capacitive element 309. The charges photogenerated by the photodetector 201 accumulate at the node 303, thus causing a drop in the potential Vsn. In the example illustrated, the potential Vsn of the node 303 has, between the times t0 and t1, a value between that of the potential Vdd and that of the potential Vref. Between the times t0 and t1, the potential Vo of the node 307 connected to the output of the comparator 301 is for example at a low level.

[0061] At time t1, the potential Vsn reaches a value substantially equal to that of the reference potential Vref. This causes a switching of the output of the comparator 301, thus a transition of the potential Vo from the low level to a high level. The transistor 313 is then controlled to the on state, which has the effect of connecting the node 303 to the node 315. The photogenerated charges accumulated at the node 303 between times t0 and t1 are thus evacuated to the node 315. This tends to bring the potential Vsn back to a value substantially equal to that of the supply potential Vdd.

[0062] At a time t2, after time t1, the potential Vsn becomes higher than the potential Vref. This causes the output of comparator 301 to switch, causing a transition of the potential Vo from the level high to low level. Curve 403 thus illustrates a pulse of the potential Vo between times tl and t2.

[0063] Between the instant t2 and an instant t3, subsequent to the instant t2, the curve 403 illustrates several other pulses of the potential Vo similar to that present between the instants t1 and t2. These pulses result, as explained above, from successive charges and discharges of the capacitive element 309 when the photodetector 201 is subjected to the radiation 105 and produces the photocurrent Iph. The pulses that the curve 403 comprises between the instants t0 and t3 are repeated for example periodically, for example at a frequency fh.

[0064] Between an instant t4, subsequent to instant t3, and an instant t5, subsequent to instant t4, curve 403 illustrates still other impulses of the potential Vo, for example analogous to the impulses present between instants t0 and t3.

[0065] The pulses of the potential Vo between the times t4 and t5 differ, for example, from the pulses of the potential Vo between the times t0 and t3 in that they are repeated periodically at a frequency fl strictly lower than the frequency fh. This comes, for example, from the fact that the photodetector 201 produces, during an LF phase between the times t4 and t5, a weaker photocurrent Iph, for example resulting from a drop in the intensity of the radiation 105, than during another HF phase between the times t0 and t3.

[0066] In the example shown, the frequencies fh and fl are representative of the photocurrent Iph, for example substantially proportional to the photocurrent Iph. The frequencies fh and fl are for example substantially proportional to the intensity, or to the flux, of the radiation 105 captured by the photodetector 201. The diode electroluminescent 211 is for example thus controlled by a periodic signal of frequency substantially proportional to the intensity of the radiation 105 captured by the photodetector 201.

[0067] For example, the sensitivity of the pixel PIX is adjusted by modifying the value of the reference potential Vref, which limits the extent of the variation range of the potential Vsn. In the example shown, for the same radiation intensity value 105, the closer the value of the potential Vref is to that of the potential Vdd, the higher the variation frequency of the potential Vo. Conversely, the further the value of the potential Vref is from that of the potential Vdd, the lower the variation frequency of the potential Vo.

[0068] The embodiments of the circuit 205 of the pixel PIX are not limited to the examples of the detection 207 and control 209 circuits shown, and the person skilled in the art is capable, based on the indications of the present description, of providing detection and control circuits different from those set out in relation to FIGS. 3 and 4. For example, a counter or a frequency divider may be provided in the control circuit 209 in order to allow an adjustment of the variation frequency of the potential Vo for each pixel PIX independently of the other pixels PIX. The adjustment is then for example carried out in the factory, for example at the end of manufacturing steps of the device 100, and for example implements a step of storing calibration values ​​in memory circuits of the device 100, for example memory circuits of the ROM (Read-Only Memory) or flash type.This avoids the presence of addressing circuits in the device 100. Other types of circuits, for example. logarithmic response circuits could also be provided.

[0069] Figure 5 is an equivalent electrical diagram of a pixel PIX of the device 100 of Figure 1 according to yet another embodiment. The equivalent electrical diagram illustrated in Figure 5 corresponds more precisely to a case in which the detection element 103 of the pixel PIX comprises a single-photon avalanche diode 501, also called SPAD (from the English “Single-Photon Avalanche Diode”). The diode 501 is adapted to detect photons of the radiation 105. The diagram of Figure 5 corresponds for example to a case where the radiation 105 has a very low intensity.

[0070] In the example shown, the diode 501 comprises a first conduction terminal, for example an anode electrode, connected to a node 503 of the detection element 103, and a second conduction terminal, for example a cathode electrode, connected to a node 505 for applying a potential Vsp.

[0071] In the illustrated example, the detection element 103 further comprises a resistive element 507, for example a resistor, connecting the node 503 to another node 509 for applying a reference potential, for example ground. The resistive element 507 allows quenching of the avalanche phenomenon each time the diode 501 is triggered. In this example, the detection element 103 further comprises a capacitive element 511, for example a capacitor, connecting the node 503 to a node 513 for applying a reference potential, for example ground.

[0072] In the example shown, the detection circuit 207 comprises a Schmitt trigger 515 with an inverted hysteresis curve. In this example, the Schmitt trigger 515 has an input connected to node 503 and an output connected to the input of the control circuit 209. In the example illustrated, the control circuit 209 of the pixel DIX of figure 5 is identical or analogous to the control circuit 209 of the pixel PIX of figure 3, the output of the Schmitt flip-flop 515 being connected to the input of the inverter 317.

[0073] In the example illustrated in figure 5, potentials Vsn' and Vo' are respectively present at node 503 and at the output of the Schmitt trigger 515.

[0074] Alternatively, the Schmitt trigger 515 may be replaced by a comparator having an adjustable threshold and / or counters for adjusting the intensity range of the light-emitting diode 211 of the emitting element 107. This makes it possible, for example, to reduce or avoid the presence of parasitic pulses due to a dark current.

[0075] Furthermore, although this has not been detailed in the drawing, the circuit 205 of the diagram of figure 5 may further comprise sensitivity and / or saturation adjustment elements.

[0076] Figure 6 is a timing diagram illustrating, schematically and partially, an example of operation of the pixel PIX of Figure 5. The timing diagram of Figure 6 includes curves 601 and 603 illustrating an example of evolution, as a function of time (t), of the potential Vsn' present at node 503 and of the lied current flowing through the light-emitting diode 211, respectively.

[0077] Between an instant t0' and an instant tl', subsequent to the instant t0', the potential Vsn' present at the node 503 is equal to a minimum value Vmin. The lied current is for example at a low level, for example substantially zero, between the instants t0' and tl'. This corresponds for example to a period during which no photon is detected by the diode 501.

[0078] In the example shown, at time tl ', at least one photon is detected by the diode 501. The charges produced by the avalanche generated in the diode 501 then accumulate at the terminals of the capacitive element 511, thus causing an increase in the potential Vsn' up to a maximum value Vmax, strictly greater than the value Vmin. This causes a switching of the output potential Vo ' of the Schmitt trigger 515. The lied current passing through the light-emitting diode 211 then switches from the low level to a high level.

[0079] Between the instant tl ' and an instant t2 ', subsequent to the instant tl ', the avalanche phenomenon is extinguished by the action of the resistor 507 and the capacitive element 511 discharges through the resistive element 507. This causes, between the instants tl ' and t2 ', a switching of the output potential Vo ' of the Schmitt trigger 515 to a low level. The current lied passing through the light-emitting diode 211 then switches from the high level to the low level by the action of the inverter 317 and the transistor 319.

[0080] In a similar manner to curve 403 between times t2 and t3, curve 603 illustrates, between time t2' and a time t3', subsequent to time t2', several other pulses of the lied current similar to that present between times t1' and t2'. These pulses result, as explained above, from successive charges and discharges of the capacitive element 511 when the diode 501 captures at least one photon of the radiation 105. The pulses that curve 603 comprises between times t0' and t3' are repeated for example periodically, for example at a frequency fh'.

[0081] Between an instant t4', later than the instant t3', and an instant t5', later than the instant t4', curve 603 illustrates still other impulses of the lied current, by example analogous to the impulses present between the instants t0 ' and t3 '.

[0082] The pulses of the lied current between the instants t4 ' and t5 ' differ for example from the pulses of the lied current between the instants t0 ' and t3 ' in that they are repeated periodically at a frequency fl ' strictly lower than the frequency fh ' . This comes for example from the fact that the diode 501 captures, during a phase LF' between the instants t4 ' and t5', a smaller number of photons, for example resulting from a drop in the intensity of the radiation 105, than during another phase HF' between the instants t1 ' and t3 ' .

[0083] In the example shown, the frequencies fh' and fl' are representative of the number of photons captured by the diode 501, for example substantially proportional to the number of photons captured by the diode 501. The frequencies fh' and fl' are for example substantially proportional to the intensity, or to the flux, of the radiation 105 captured by the diode 501. The light-emitting diode 211 is for example thus controlled by a periodic signal of frequency substantially proportional to the intensity of the radiation 105 captured by the diode 501.

[0084] In the examples set out above, the image capture and display device 100 is devoid of circuits for addressing the matrices of detection elements 103 and emission elements 107. The device 100 is further devoid of circuits and components for storing, or memorizing, images acquired by the detection elements 103 or images to be displayed by the emission elements 107.

[0085] Furthermore, each pixel PIX of the device 100 has an autonomous operation, insofar as each pixel PIX does not receive any external control signal. The device 100 is in particular devoid of a control circuit. external PIX pixel control to the PIX pixels. In the example shown, each PIX pixel of the device 100 receives only one or more power signals, for example signals having a substantially constant voltage value.

[0086] An advantage of the device 100 is that it has lower weight, size, complexity, power consumption, manufacturing costs and / or latency than existing image capture and display devices.

[0087] Figure 7A, Figure 7B, Figure 7C, Figure 7D, Figure 7E, Figure 7F, Figure 7G, Figure 7H and Figure 71 illustrate, by means of schematic and partial sectional views, structures obtained at the end of steps of a method of manufacturing the device 100 of Figure 1 according to one embodiment.

[0088] Figure 7A illustrates more precisely a structure obtained at the end of a step of forming the photodetectors 201 and the circuits 205 of the PIX pixels of the device 100. The technological process leading to obtaining the structure illustrated in Figure 7A is for example of the type of the process known under the English name “CMOS front-side” (from the English “Complementary Metal-Oxide-Semiconductor front-side”).

[0089] In the example shown, the structure comprises a support substrate 701. For example, the support substrate 701 is a wafer or piece of wafer made of a semiconductor material, for example silicon.

[0090] The support substrate 701 is for example coated, on one of its faces, with an insulating layer 703. In the example shown, the insulating layer 703 is located on and in contact with a face 701T of the support substrate 701 (the upper face of the substrate 701, in the orientation of FIG. 7A). For example, the insulating layer 703 is made of an oxide, for example silicon oxide.

[0091] The insulating layer 703 is for example coated with a semiconductor layer 705, for example a silicon layer. In the example shown, the semiconductor layer 705 is located on and in contact with a face of the insulating layer 703 opposite the support substrate 701.

[0092] For example, the support substrate 701, the insulating layer 703 and the semiconductor layer 705 are part of a SOI (Silicon On Insulator) type substrate. In this case, the insulating layer 703 corresponds to the buried oxide (BOX) layer of the SOI substrate.

[0093] In the illustrated example, the photodetectors 201 are located in the semiconductor layer 705. For example, the photodetectors 201 are formed by ion implantation on the side of the face 701T of the semiconductor substrate 701.

[0094] Furthermore, in this example, the circuits 205 are located on the side of the face 701T of the semiconductor substrate 701. For example, the circuits 205 are formed in and on the semiconductor layer 705.

[0095] In the example shown, the structure further comprises an interconnect stack or network 707 located on the semiconductor layer 705. In the example shown, the interconnect stack 707 comprises a stack of alternating conductive layers and insulating layers. The conductive layers of the interconnect stack 707, symbolized by hatched rectangles 709 in FIG. 7A, are for example metal layers, also called metallization levels. Although this has not been detailed in the drawings, the interconnect stack 707 comprises, for example, conductive traces formed in the conductive layers and conductive vias, for example, metal vias, interconnecting conductive traces located in different conductive layers.

[0096] In the example shown, the conductive layer 709 of the interconnect stack 707 furthest from the support substrate 701, called the last metallization level, is not flush with the face of the interconnect stack 707 opposite the support substrate 701 (the upper face of the interconnect stack 707, in the orientation of FIG. 7A). In this example, the last metallization level is coated with an insulating layer of the interconnect stack 707.

[0097] The semiconductor layer 705 of the structure illustrated in FIG. 7A corresponds for example to the semiconductor substrate 101 of the device 100 of FIG. 1.

[0098] Although Figure 7A illustrates an example in which the photodetectors 201 and the circuits 205 are formed in and on an SOI type substrate, this example is not limiting. Alternatively, the photodetectors 201 and the circuits 205 may be formed in and on a bulk semiconductor substrate, for example, the same or similar to the support substrate 701 of Figure 7A.

[0099] Figure 7B illustrates more precisely a structure obtained at the end of a subsequent step of thinning the structure previously exposed in relation to Figure 7A on the side of the face 701T of the support substrate 701.

[0100] In the example illustrated in Figure 7B, the last metallization level is flush with the face of the interconnect stack 707 opposite the support substrate 701 (the upper face of the interconnect stack 707, in the orientation of Figure 7B). This amounts to removing the insulating layer of the interconnect stack 707 covering the last level of metallization.

[0101] Thinning is for example carried out by CMP (from the English “Chemical and Mechanical Polishing”).

[0102] Figure 7C illustrates more precisely a structure obtained at the end of a step of forming an active stack of light-emitting diodes 711, or active stack of LEDs, on the side of a face 713T of a substrate 713 (the upper face of the substrate 713, in the orientation of Figure 7C). The step described in relation to Figure 7C can be carried out indifferently before, during or after the steps previously described in relation to Figures 7A and 7B.

[0103] The substrate 713 is, for example, a wafer or piece of wafer made of a semiconductor material, for example, silicon. For example, the substrate 713 is a monocrystalline silicon wafer having a diameter equal to approximately 200 mm. Alternatively, the substrate 713 may be made of corundum (“sapphire” in English) or gallium nitride (GaN).

[0104] In the example shown, a semiconductor layer 715 doped with a first conductivity type, for example the N type, covers the face 713T of the substrate 713. The semiconductor layer 715 is for example more precisely located on and in contact with the face 713T.

[0105] In the example shown, the semiconductor layer 715 is coated with an active layer 717. The active layer 717 is, in this example, located on and in contact with a face of the semiconductor layer 715 opposite the substrate 713 (the upper face of the layer 715, in the orientation of the Figure 7C). For example, layer 717 comprises quantum boxes or wells.

[0106] In the illustrated example, the active layer 717 is coated with another semiconductor layer 719. The semiconductor layer 719 is, in this example, located on and in contact with a face of the active layer 717 opposite the substrate 713 (the upper face of the layer 717, in the orientation of FIG. 7C). The semiconductor layer 719 is for example doped with a second type of conductivity opposite to the first type of conductivity. In this example, the semiconductor layer 719 is of type P.

[0107] In the illustrated example, the semiconductor layer 715, the active layer 717 and the semiconductor layer 719 form the active light-emitting diode stack 711.

[0108] For example, the semiconductor layer 715, the active layer 717 and the semiconductor layer 719 are successively formed by epitaxial growth from the face 713T of the substrate 713.

[0109] Figure 7D illustrates more precisely a structure obtained at the end of a step of forming the light-emitting diodes 211 from the structure described above in relation to Figure 7C.

[0110] In the illustrated example, conduction electrodes 721 of the light-emitting diodes 211 are formed on the side of the face 713T of the substrate 713. The conduction electrodes 721 are, for example, more precisely anode electrodes of the light-emitting diodes 211. In the example shown, the conduction electrodes 721 cover a face of the active stack of light-emitting diodes 711 opposite the substrate 713 (the upper face of the stack 711, in the orientation of FIG. 7D). The conduction electrodes 721 are, for example, located on and in contact with one face of the semiconductor layer 719 opposite the substrate 713 (the upper face of the layer 719, in the orientation of FIG. 7D). The conduction electrodes 721 have, for example, in top view, any shape, for example rectangular, oval, square, circular, etc. By way of example, the conduction electrodes 721 are made of a conductive material, for example a metal or a metal alloy.

[0111] Furthermore, during this step, peripheral isolation trenches 723 are formed in the thickness of the active stack of light-emitting diodes 711. In the example shown, each peripheral isolation trench 723 extends vertically in the thickness of the active stack of light-emitting diodes 711, from the face of the semiconductor layer 719 opposite the substrate 713 and passes through the semiconductor layer 719 and the active layer 717. In this example, each peripheral isolation trench 723 is interrupted in the thickness of the semiconductor layer 715, that is to say that the peripheral isolation trenches 723 do not open onto the face 713T of the substrate 713.

[0112] In the illustrated example, each peripheral isolation trench 723 has an annular shape surrounding, or bordering, a portion of the active layer 717 corresponding to an active region of the light-emitting diode 211. Each peripheral isolation trench 723 further surrounds the conduction electrode 721 of the light-emitting diode 211.

[0113] The peripheral insulation trenches 723 form, for example, in top view, a grid, each box of which laterally delimits a light-emitting diode 211.

[0114] For example, each peripheral isolation trench 723 includes a conductive region 725 whose side walls, or flanks, are coated with an insulating layer 727, the insulating layer 727 being for example located on and in contact with the flanks of the conductive region 725.

[0115] Furthermore, at least one connection element 729 (a single connection element 729, in the example shown) of a common conduction electrode, for example a cathode electrode, of the light-emitting diodes 211 is formed during this step. For example, each connection element 729 comprises a conductive region 731 whose side walls, or flanks, are coated with an insulating layer 733, the insulating layer 733 being for example located on and in contact with the flanks of the conductive region 731.

[0116] Figure 7E illustrates more precisely a structure obtained at the end of a subsequent step of forming, on the side of the face 713T of the substrate 713, contact recovery elements 735.

[0117] In the example shown, each contact recovery element 735 is located on and in contact with one of the conduction electrodes 721, or on and in contact with the conductive region 731 of the contact recovery element 729. In this example, insulating regions 737 extend laterally between the contact recovery elements 735. In the example shown, the contact recovery elements 735 are flush with the upper face of the insulating regions 737.

[0118] For example, the contact recovery elements 735 and the insulating regions 737 are obtained by implementing a damascene technique.

[0119] Figure 7F illustrates more precisely a structure obtained at the end of a subsequent step of transferring the structure previously described in relation to Figure 7E. on the structure previously described in relation to Figure 7B.

[0120] For example, the structure previously described in relation to FIG. 7E is turned over with respect to the orientation of FIG. 7E and then brought into contact, by the faces of the contact recovery elements 735 and the insulating regions 737 opposite the substrate 713 (the lower faces of the contact recovery elements 735 and the insulating regions 737, in the orientation of FIG. 7F), with the face of the interconnect stack 707 opposite the support substrate 701 (the upper face of the interconnect stack 707, in the orientation of FIG. 7F). During this step, the structure comprising the substrate 713 and the active light-emitting diode stack 711 is fixed to the interconnect stack 707.

[0121] For example, the attachment is achieved by molecular bonding between the two surfaces in contact. Molecular bonding is, for example, more precisely of the hybrid type, each surface comprising conductive elements, for example metallic, and insulating elements, for example oxide.

[0122] Figure 7G illustrates more precisely a structure obtained at the end of a subsequent step of eliminating the substrate 713 and forming color converters 739 directly above the active regions of at least certain light-emitting diodes 211.

[0123] The substrate 713 is for example completely eliminated, for example by grinding the structure previously described in relation to FIG. 7F on the side of the face 701T of the substrate 701.

[0124] In the example shown, insulating regions 741 extend laterally between the color converters 739. In the illustrated example, the color converters 739 are flush with the face of the insulating regions 741 opposite the substrate 701 (the upper face of the regions 741, in the orientation of FIG. 7G).

[0125] In the case where the device 100 is adapted to capture and display color images, the light-emitting diodes 211 emit, for example, mainly blue light. In this case, the active regions of the blue emission elements 103 of the device 100 are not surmounted by any color converter 739, and the active regions of the green and red emission elements 103 are surmounted by different color converters 739. Each color converter 739 comprises, for example, quantum dots, for example semiconductor nanocrystals, the average size of which is chosen so as to allow conversion of the blue light emitted by the light-emitting diodes 211 into green light or red light.

[0126] Figure 7H illustrates more precisely a structure obtained at the end of a subsequent step of transferring the structure previously described in relation to Figure 7G onto a substrate 743 then removing the support substrate 701.

[0127] The substrate 743 is transparent to the radiation 109 emitted by the light-emitting diodes 211, for example transparent to visible light. For example, the substrate 743 is made of glass.

[0128] For example, the structure previously described in relation to Figure 7G is turned over with respect to the orientation of Figure 7G and then brought into contact, by the faces of the color converters 739 and the insulating regions 741 opposite the substrate 701 (the lower faces of the color converters 739 and the insulating regions 741, in the orientation of figure 7H), with a face 743T of the transparent substrate 743 (the upper face of the substrate 743, in the orientation of figure 7H). During this step, the structure comprising the photodetectors 201 and the light-emitting diodes 211 is fixed to the transparent substrate 743. For example, the fixing is obtained by molecular bonding between the two surfaces brought into contact.

[0129] The support substrate 701 is for example completely removed, for example by grinding on the side of the face 743T of the substrate 743. Using an SOI type substrate has the advantage of facilitating the removal of the support substrate 701 during this step, for example by allowing a stop on the insulating layer 703.

[0130] Figure 71 illustrates more precisely a structure obtained at the end of a subsequent step of forming color filters 745 and lenses 747 directly above each photodetector 201.

[0131] In the example shown, the color filters 745 are located on and in contact with the face of the insulating layer 703 opposite the transparent substrate 743 (the upper face of the insulating layer 703, in the orientation of FIG. 71). Each color filter 745 has, for example, in top view, a shape and lateral dimensions substantially identical to those of the underlying photodetector 201.

[0132] In the illustrated example, the lenses 747 are located on and in contact with the face of the underlying color filter opposite the transparent substrate 743 (the upper face of the color filter 745, in the orientation of FIG. 71). The lenses 747 make it possible, for example, to focus the radiation 105 into an active region of the underlying photodetector 201.

[0133] Figure 8A, Figure 8B, Figure 8C, Figure 8D and Figure 8E illustrate, by means of schematic and partial sectional views, structures obtained at the end of successive steps of a method of manufacturing the device 100 of Figure 1 according to another embodiment.

[0134] Figure 8A illustrates more precisely a structure obtained at the end of a step of forming the photodetectors 201 and the circuits 205 of the PIX pixels of the device 100. The technological process leading to obtaining the structure illustrated in Figure 8A is for example of the type of the process known under the English name “CMOS back-side” (from the English “Complementary Metal-Oxide-Semiconductor backside”).

[0135] The structure of Figure 8A is for example obtained by transferring the structure previously described in relation to Figure 7A onto a support substrate 801, or handle. For example, the support substrate 801 is a wafer or a piece of wafer made of a semiconductor material, for example silicon.

[0136] The structure previously described in relation to FIG. 7A is for example first turned over with respect to the orientation of FIG. 7A and then brought into contact, by the face of the interconnection stack 707 opposite the substrate 701 (the lower face of the interconnection stack 707), with a face 801T of the support substrate 801 (the upper face of the substrate 801, in the orientation of FIG. 8A). During this step, the structure comprising the support substrate 701, the photodetectors 201 and the interconnection stack 707 is fixed to the support substrate 801. For example, the fixing is obtained by molecular bonding between the two surfaces brought into contact.

[0137] The support substrate 701 and the insulating layer 703 are then, for example, completely removed, for example by grinding on the side of the face 801T of the support substrate 801.

[0138] In the illustrated example, the color filters 745 are located on and in contact with the face of the photodetectors 201 opposite the support substrate 801 (the upper face of the photodetectors 201, in the orientation of FIG. 8A). Furthermore, in the illustrated example, the lenses 747 are located on and in contact with the face of the underlying color filter opposite the support substrate 801 (the upper face of the color filter 745, in the orientation of FIG. 8A).

[0139] Figure 8B illustrates more precisely a structure obtained at the end of a subsequent step of depositing a layer of glue 803 on the side of the upper face of the structure of Figure 8A and of bonding a substrate 805 on the lenses 747.

[0140] In the example shown, the layer of glue 803 is flush with the face of the lenses 747 opposite the support substrate 801 (the upper face of the lenses 747, in the orientation of FIG. 8B).

[0141] In the illustrated example, the substrate 805 covers the face of the adhesive layer 803 opposite the support substrate 801 (the upper face of the layer 803, in the orientation of FIG. 8B). The substrate 805 is transparent to the radiation 105 captured by the photodetectors 201, for example transparent to visible light. For example, the substrate 805 is made of glass. The substrate 805 is for example similar or identical to the transparent substrate 743 previously described in relation to FIG. 71.

[0142] Figure 8C illustrates more precisely a structure obtained at the end of a subsequent step of elimination of the support substrate 801 then thinning of the structure previously exposed in relation to figure 8B on the side of a face of the interconnection stack 707 opposite the transparent substrate 805. The structure previously described in relation to figure 8B is for example first returned relative to the orientation of figure 8B.

[0143] The support substrate 801 is for example completely removed, for example by grinding on the side of a face of the structure opposite the transparent substrate 805.

[0144] In the example illustrated in FIG. 8C, the last metallization level is flush with the face of the interconnection stack 707 opposite the transparent substrate 805 (the upper face of the interconnection stack 707, in the orientation of FIG. 8C). This amounts to eliminating the insulating layer of the interconnection stack 707 covering the last metallization level. The thinning is for example carried out by CMP, for example in a manner analogous to that which was explained previously in relation to FIG. 7B.

[0145] Figure 8D illustrates more precisely a structure obtained at the end of a subsequent step of transferring the structure previously described in relation to Figure 7E onto the structure previously described in relation to Figure 8C.

[0146] For example, the structure previously described in relation to FIG. 7E is turned over with respect to the orientation of FIG. 7E and then brought into contact, by the faces of the contact recovery elements 735 and the insulating regions 737 opposite the substrate 713 (the lower faces of the contact recovery elements 735 and the insulating regions 737, in the orientation of FIG. 8D), with the face of the interconnection stack 707 opposite the support substrate 701 (the upper face of the interconnection stack 707, in the orientation of FIG. 8D). during this step, the structure comprising the substrate 713 and the active light-emitting diode stack 711 is attached to the interconnect stack 707.

[0147] For example, the attachment is achieved by molecular bonding between the two surfaces in contact. Molecular bonding is, for example, more precisely of the hybrid type, each surface comprising conductive elements, for example metallic, and insulating elements, for example oxide.

[0148] Figure 8E illustrates more precisely a structure obtained at the end of a subsequent step of eliminating the substrate 713 and forming the color converters 739 directly above the active regions of at least certain light-emitting diodes 211, for example in a manner identical or analogous to what has been explained above in relation to Figure 7G. In the example illustrated, the color converters 739 are separated laterally from each other by the insulating regions 741.

[0149] Figure 9 is a schematic and partial side view of an example of implementation of the device 100 of Figure 1 in an electronic device 900. By way of example, the device 900 is a pair of connected glasses or a video headset intended to be placed in front of a user's eyes, for example an augmented reality or mixed reality headset or glasses.

[0150] Although a single device 100 placed opposite a single eye 901 has been symbolized in FIG. 9, the electronic device 900 may of course comprise another device 100 placed opposite the other eye of the user. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the device 100.

[0151] In the example shown, the electronic device 900 comprises, in addition to the image capture and display device 100, a power supply circuit 903 and focusing elements 905, for example two convex lenses, located on either side of the device 100. By way of example, the power supply circuit 903 comprises a battery.

[0152] In the illustrated example, the focusing element 905 interposed between the device 100 and the eye 901 is adapted to focus, on the eye 901, the radiation 109 produced by the emission elements 107. Furthermore, in this example, the focusing element 905 located between the device 100 and the exterior is adapted to focus the incident radiation 105 on the detection elements 103.

[0153] The electronic device 900 is for example devoid of addressing circuits and / or analog-to-digital converters.

[0154] Figure 10 is a schematic and partial side view of another example of implementation of the device 100 of Figure 1 in an electronic device 1000. By way of example, the device 1000 is a pair of glasses for assisting visually impaired people, a pair of glasses for assisting a driver of a motor vehicle or a head-up display device, for example integrated into a motor vehicle such as a car, a truck, etc.

[0155] The electronic device 1000 is for example adapted to superimpose, on an image of a scene seen by the eye 901, an image produced by the device 100, for example an image of a contour or an intensified image of an object of the scene. In the case of an intensified image, the device 100 further comprises for example an image processing circuit adapted to implement this function. For example, the device 1000 is used in image intensification applications, or brightness amplification, or vision applications in low-light environments, for example night vision applications.

[0156] The electronic device 1000 of FIG. 10 comprises elements in common with the electronic device 900 of FIG. 9. These common elements will not be detailed again below.

[0157] The electronic apparatus 1000 of FIG. 10 differs from the electronic apparatus 900 of FIG. 9 in that, in the apparatus 1000, the device 100 is not placed facing the eye 901. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the scene and the majority of the incident radiation 105 reaches the eye 901 without being captured by the device 100.

[0158] In the illustrated example, the electronic device 1000 comprises an optical waveguide 1001 comprising an input face arranged opposite the device 100, for example opposite the emission elements 107, and an output face arranged opposite the eye 901. In this example, the optical waveguide 1001 is adapted to transmit, in the direction of the eye 901, the radiation 109 emitted by the device 100.

[0159] An advantage of integrating one or more devices 100 into the apparatus 900 or 1000 is that this allows these devices to have a lower weight, size, complexity, energy consumption, manufacturing costs and / or latency time than similar devices integrating image capture and display devices comprising reading and control circuits implementing addressing functions of the sensor and the display to which they are connected, and in which the images acquired by the sensor are for example stored in a memory circuit before being displayed, possibly after processing.

[0160] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art. In particular, although the described embodiments take as an example a case in which the arrays of sensing elements 103 and display elements 107 have a substantially identical pitch, those skilled in the art are able to predict, from the indications of the present description, that the array of display elements 107 of the device 100 has a different pitch, for example a larger one, than that of the array of sensing elements 103.

[0161] Furthermore, although the present description details exemplary embodiments where the radiation 105 captured by the detection elements 103 of the device 100 is visible light and where the radiation 109 emitted by the emission elements 107 is visible light, the embodiments are not limited to these examples but apply more generally to any type of radiation 105, for example infrared radiation, X-ray radiation, etc. and to any type of radiation 105. Depending on the type of the captured radiation 105 and / or the emitted radiation 109, the emission element 107 of each pixel PIX of the device 100 may comprise more than one light-emitting diode 211.

[0162] Furthermore, the embodiments are not limited to the display, by the matrix of emission elements 107, of color images in the case where the radiation 109 is visible light, but are further applicable to a case where monochrome or grayscale images are displayed by the emission elements 107.

[0163] Finally, the practical implementation of the described embodiments and variants is within the reach of the person skilled in the art from the functional indications given above. In particular, the described embodiments are not limited to the particular examples of materials and dimensions mentioned in the present description.

Claims

CLAIMS 1. Electronic device (100) for capturing and displaying images comprising a plurality of pixels (DIX) formed in and on a semiconductor substrate (101; 705), each pixel comprising: - a detection element (103) of a first radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); - an emitting element (107) of a second radiation (109), located on the side of a second face (101R) of the semiconductor substrate opposite the first face; and - a circuit (205) located in and on the semiconductor substrate and connecting the detection element to the emission element, the device (100) being devoid of a pixel control circuit (PIX) external to the pixels (PIX).

2. Device (100) according to claim 1, wherein the circuit (205) comprises: - an acquisition circuit (207) located in and on the semiconductor substrate (101; 705) and adapted to provide an acquisition signal representative of an intensity of the first radiation (105) received by the detection element (103) of the pixel (PIX); and - a control circuit (209) located in and on the semiconductor substrate and adapted to apply a control signal to the emission element (107) of the pixel.

3. Device (100) according to claim 2, wherein the acquisition circuit (207) and the control circuit (209) are analog circuits.

4. Device (100) according to claim 2, in which: - each detection element (103) comprises a photodetector (201); - each acquisition circuit (207) comprises a comparator (301) having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit (209) comprises an inverter (317) having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor (319), the MOS transistor comprising a conduction electrode connected to the emission element (107).

5. Device (100) according to claim 2, in which: - each detection element (103) comprises a single-photon avalanche diode (501); - each acquisition circuit (207) comprises a Schmitt trigger (515) having an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit (209) comprises an inverter (317) having an input connected to an output of the Schmitt trigger and an output connected to a gate of a MOS transistor (319), the MOS transistor comprising a conduction electrode connected to the emission element (107).

6. Device (100) according to any one of claims 1 to 5, in which the detection elements (103) are located opposite the emission elements (107).

7. Device (100) according to any one of claims 1 to 6, wherein the detection elements (103) and the emission elements (107) are arranged respectively in first and second matrices, the first and second matrices having substantially identical pitches.

8. Device (100) according to any one of claims 1 to 7, wherein the first and second radiations (105, 109) are visible light.

9. Device (100) according to any one of claims 1 to 8, wherein each emitting element (107) comprises at least one light-emitting diode (211).

10. Device (100) according to claim 9, wherein the light-emitting diode (211) is controlled by a control signal having an average value substantially proportional to an intensity of the first radiation (105) detected by the detection element (103).

11. Device (100) according to claim 9, wherein the light-emitting diode (211) is controlled by a control signal having pulses repeating at a frequency substantially proportional to an intensity of the first radiation (105) detected by the detection element (103). 12 Device (100) according to any one of claims 1 to 11, comprising as many detection elements (103) as emission elements (107).

13. Electronic device (900; 1000) comprising: - a power supply circuit (903); and - at least one device (100) according to any one of claims 1 to 12.

14. Method for manufacturing a device (100) according to any one of claims 1 to 12, comprising a step of transferring, by molecular bonding, a structure comprising the detection elements (103) and the circuits (205) onto another structure comprising the emission elements (107).

Images