Test device and test method

Abstract

This test device may comprise: a power supply unit connected to first and second terminals of a test element; a protection circuit connected between the test element and the power supply unit; and a test circuit connected to a third terminal of the test element. The protection circuit may comprise: a first switch connected between the first terminal of the test element and one side of the power supply unit; a second switch connected between the first and second terminals of the test element; and a capacitor connected in parallel to the second switch.

Description

Test device and test method

[0001] The present invention relates to a test device and a test method.

[0002] A test device is used to determine the operating characteristics of a test element. For example, as illustrated in FIGS. 1 and 2, a voltage of several hundred V is supplied to the test element (20) from a power supply unit (10), and the test element (20) is switched using a test signal (GS) provided from a test circuit (not shown). The operating characteristics of the test element (20) are detected through the switching of the test element (20) using a probe (not shown) for a detection device.

[0003] Meanwhile, during a test on the test element (20), an abnormality may occur in the test element (20).

[0004] When an abnormality occurs in the test element (20), the current (Id) in the test element (20) increases rapidly as shown in Fig. 2. The test element (20) may be damaged by the rapidly increased current (Id) in the test element (20), or the test circuit, power supply unit (10), probe for detection device, etc. connected to the test element (20) may be damaged. Accordingly, the development of a technology that can prevent damage to the power supply unit (10), etc. is very urgent. In addition, there is a problem that a worker may be electrocuted by the high voltage or high current (Id) remaining in the test element (20).

[0005] The present invention aims to solve the above-mentioned and other problems.

[0006] Another purpose of the embodiment is to provide a test device and a test method capable of preventing damage to circuit elements, etc. connected to a test element even if an abnormality occurs during a test on the test element.

[0007] Another object of the present invention is to provide a test device testing method capable of preventing electric shock to workers involved in performing tests on test elements.

[0008] The technical problems of the embodiment are not limited to those described in this article, but include those that can be understood through the description of the invention.

[0009] According to one aspect of the embodiment to achieve the above or other purposes, the test device includes: a power supply connected to a first terminal and a second terminal of a test element; a protection circuit connected between the test element and the power supply; and a test circuit connected to a third terminal of the test element.

[0010] The protection circuit may include a first switch connected between the first terminal of the test element and one side of the power supply, a second switch connected between the first terminal of the test element and the second terminal, and a capacitor connected in parallel with the second switch.

[0011] The above test circuit can output a first switching signal for switching the first switch and a second switching signal for switching the second switch based on a trigger signal.

[0012] The test circuit can charge the capacitor with the voltage of the power supply by switching the first switch and the second switch, and then separate the power supply from the test element.

[0013] The above second switch can be turned off in synchronization with the rising time of the trigger signal and maintained in the off state for the first period.

[0014] The first switch may be turned on after a predetermined time has elapsed from the polling time of the trigger signal and may be maintained in an on state for a second period.

[0015] The above second period may be included within the above first period.

[0016] The above test circuit can test the test element using a double pulse test signal.

[0017] The above test circuit can output the double pulse test signal in synchronization with the falling time of the first switching signal.

[0018] The above test circuit can discharge the test element by switching the first switch and the second switch.

[0019] The test device may further include a current generating device connected between the first terminal of the test element and one side of the power supply.

[0020] The current generating device may include an inductor and a transistor connected in parallel with the inductor.

[0021] The above-described double pulse test signal may include a first pulse test signal and a second pulse test signal. The test circuit may supply the first pulse test signal to the test element to generate a predetermined current in the inductor, and supply the second pulse test signal to the test element to perform a test of the test element.

[0022] The test device may further include a current sensing circuit connected to the second terminal of the test element. The test circuit may short-circuit its output when the current sensed by the current sensing circuit is greater than a set value.

[0023] According to another aspect of the embodiment to achieve the above or other purposes, a test method of a test device including a power supply connected to a test element, a protection circuit connected between the test element and the power supply, and a test circuit connected to the test element, comprises the steps of switching the first switch and the second switch of the protection circuit to charge a capacitor with a voltage of the power supply, and then disconnecting the power supply from the test element; testing the test element using a double pulse test signal; and discharging the test element by switching the first switch and the second switch.

[0024] The test device may further include a current generating device connected between the test element and one side of the power supply. The dual pulse test signal may include a first pulse test signal and a second pulse test signal. The test method may further include a step of supplying the first pulse test signal to the test element to generate a predetermined current in the inductor; and a step of supplying the second pulse test signal to the test element to perform a test of the test element.

[0025] The effects of the test device and test method according to the embodiment are described as follows.

[0026] According to at least one of the embodiments, there is an advantage in that the power supply is separated from the test device before performing a test of the test device, so that damage to the power supply can be prevented even if an abnormality occurs in the test device.

[0027] According to at least one of the embodiments, there is an advantage in that electric shock to an operator can be prevented by discharging the voltage or current remaining in the test element after the test of the test element is completed.

[0028] According to at least one of the embodiments, there is an advantage in that damage to the test circuit caused by high current flowing through the test element can be prevented by short-circuiting or disconnecting the output (or output terminal) of the test circuit when an abnormality occurs in the test element.

[0029] Figure 1 illustrates a conventional test device.

[0030] Figure 2 shows the operating waveform of a conventional test device.

[0031] Figure 3 illustrates a test device according to the first embodiment.

[0032] Figure 4 of the first embodiment shows the operating waveform of the test circuit.

[0033] Figure 5 shows a normal operating waveform of a test device according to the first embodiment.

[0034] Fig. 6 illustrates an abnormal operation waveform of a test device according to the first embodiment.

[0035] Figure 7 illustrates a test device according to the second embodiment.

[0036] Figure 8 shows a normal operating waveform of a test device according to the second embodiment.

[0037] Fig. 9 illustrates an abnormal operation waveform of a test device according to the second embodiment.

[0038] The sizes, shapes, and dimensions of components depicted in the drawings may differ from the actual components. Furthermore, even if the same components are depicted with different sizes, shapes, and dimensions across drawings, this is merely an example within the drawings, and the same components may have the same sizes, shapes, and dimensions across drawings.

[0039] Hereinafter, embodiments disclosed in the present specification will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or similar components will be given the same reference numbers and redundant descriptions thereof will be omitted. The suffixes 'module' and 'part' used for components in the following description are given or used interchangeably in consideration of the ease of writing the specification, and do not have distinct meanings or roles in themselves. In addition, the attached drawings are intended to make it easier to understand the embodiments disclosed in the present specification, and the technical ideas disclosed in the present specification are not limited by the attached drawings. In addition, when an element such as a layer, region, or substrate is referred to as existing 'on' another element, this includes that it may be directly on the other element or that other intermediate elements may exist therebetween.

[0040] Hereinafter, “~module”, “~part”, etc. may be composed of “~circuit” or “integrated circuit”. Accordingly, “~module”, “~part”, etc. may be used interchangeably with “~circuit” or “integrated circuit”.

[0041]

[0042] [Example 1]

[0043] Fig. 3 illustrates a test device according to the first embodiment. Fig. 4 illustrates an operating waveform of a test circuit.

[0044] Referring to FIG. 3, a test device (101) according to the first embodiment may include a capacitor (CAp), a power supply (110), a protection circuit (120), etc. The capacitor (CAp) may be included in the protection circuit (120).

[0045] When a test element (50) is inserted into a test device (101) according to the first embodiment, the test element (50) can be electrically connected to a power supply (110) and a test circuit (not shown). After a test on the test element (50) is performed, the test element (50) can be detached from the test device (101).

[0046] For example, a first terminal (51) of a test element (50) may be connected to a first node (N11), a second terminal (52) of a test element (50) may be connected to a second node (N21), and a third terminal (53) of a test element (50) may be connected to a test circuit.

[0047] The test element (50) may include a power semiconductor element. The power semiconductor element is a switching element for converting voltages of several hundred V or more, and may be employed in, for example, an inverter. The power semiconductor element may be, for example, a MOSFET, but is not limited thereto. The power semiconductor element may be formed of, for example, SiC, GaN, or the like, but is not limited thereto.

[0048] To determine the operating characteristics of a power semiconductor device, the power semiconductor device can be tested as a test device. By performing a test on the test device (50), various operating characteristics of the test device (50), such as the rising time, falling time, low level, and high level, can be determined.

[0049] In the test element (50), the first terminal (51) may be a drain terminal or a drain electrode, the second terminal (52) may be a source terminal or a source electrode, and the third terminal (53) may be a gate terminal or a gate electrode.

[0050] Meanwhile, the reverse diode may be included in the test element (50) or may be provided separately from the test element (50). The cathode electrode of the reverse diode may be connected to the first terminal (51), and the anode electrode of the reverse diode may be connected to the second terminal (52).

[0051] Meanwhile, a capacitor (CAp) may be connected between a first node (N11) and a second node (N21). The capacitor (CAp) may be connected in parallel with the power supply (110). The capacitor (CAp) may be connected between a first terminal (51) and a second terminal (52) of the test element (50). The capacitor (CAp) may be connected in parallel with the power supply (110). One side of the capacitor (CAp) may be connected to the first terminal (51) of the test element (50) and one side of the power supply (110) via the first node (N11). The first terminal (51) of the test element (50), one side of the capacitor (CAp), and one side of the power supply (110) may share the first node (N11). The other side of the capacitor (CAp) can be connected to the second terminal (52) of the test element (50) and the other side of the power supply unit (110) via the second node (N21). The second terminal (52) of the test element (50), the other side of the capacitor (CAp), and the other side of the power supply unit (110) can share the second node (N21).

[0052] The power supply unit (110) may be connected between the first node (N11) and the second node (N21). The power supply unit (110) may be connected to the first terminal (51) of the test element (50) and one side of the capacitor (CAp) through the first node (N11), and may be connected to the second terminal (52) of the test element (50) and the other side of the capacitor (CAp) through the second node (N21).

[0053] The power supply unit (110) may include a power circuit (111), an inductor (113), etc. The power circuit (111) may generate and supply a voltage of several hundred V. The power circuit (111) may be referred to as a voltage generation circuit. For example, the power circuit (111) may generate a direct current (VDC), but is not limited thereto. The inductor (113) may be used to control the flow of a sudden current (Id) caused by a high voltage (VDC) of the power circuit (111).

[0054] A protection circuit (120) may be connected between the test element (50) and the power supply (110). The protection circuit (120) may be connected between the first node (N11) and the second node (N21).

[0055] The protection circuit (120) may include a first switch (121) and a second switch (123). The first switch (121) may be connected in series with the power supply (110), and the second switch (123) may be connected in parallel with the power supply (110).

[0056] The first switch (121) can be connected between the first node (N11) and one side of the power supply unit (110). One side of the first switch (121) can be connected to the first node (N11), and the other side of the first switch (121) can be connected to one side of the power supply unit (110).

[0057] The second switch (123) can be connected between the first node (N11) and the second node (N21). One side of the second switch (123) can be connected to the first node (N11), and the other side of the second switch (123) can be connected to the second node (N21).

[0058] A first terminal (51) of a test element (50), one side of a capacitor (CAp), one side of a first switch (121), and one side of a power supply unit (110) may share a first node (N11). A second terminal (52) of a test element (50), the other side of a capacitor (CAp), the other side of a second switch (123), and the other side of a power supply unit (110) may share a second node (N21).

[0059] The first switch (121) can control the connection or disconnection of the power supply (110). The first switch (121) can be used to connect or disconnect the power supply (110) with the test element (50) and / or the capacitor (CAp).

[0060] For example, when the first switch (121) is turned on, the power supply unit (110) is connected to the capacitor (CAp) and / or the test element (50), so that the voltage of the power supply unit (110) can be charged to the capacitor (CAp) via the first switch (121). At this time, since the test element (50) is in an off state, a current corresponding to the voltage of the power supply unit (110) does not flow to the test element (50).

[0061] For example, when the first switch (121) is turned off, the power supply unit (110) can be separated from the capacitor (CAp) and / or the test element (50). In this case, even if an abnormality occurs in the test element (50) while a test is being performed on the test element (50), the high current flowing in the test element (50) does not flow to the power supply unit (110), so that damage to the power supply unit (110) can be prevented. An abnormality in the test element (50) may mean that the test element (50) malfunctions or breaks down, causing a sudden increase in current.

[0062] The second switch (123) can control the discharge of the test element (50). When the second switch (123) is turned on, the voltage or current (Id) remaining in the test element (50) can be discharged via the second switch (123). In addition, the voltage (VDC) of the capacitor (CAp) can also be discharged via the second switch (123).

[0063] The operation according to the switching of the first switch (121) and the second switch (123) can be represented in Table 1.

[0064] First switch (121) Second switch (123) ONOFF Charging of capacitor (CAp) OFFOFF Testing of test element (50) OFFON Discharging of test element (50)

[0065] Meanwhile, when the test element (50) is turned on, a current (Id) can flow due to the voltage (VDC) supplied from the power supply unit (110). In order to test the test element (50), a predetermined current (Id) strength is required. To this end, the test device (101) according to the first embodiment may include a current generation device (130). The current generation device (130) can obtain a current (Id) required for testing the test element (50) before testing the test element (50).

[0066] The current generating device (130) can be connected between the first terminal (51) of the test element (50) and one side of the capacitor. That is, one side of the current generating device (130) can be connected to the first terminal (51) of the test element (50), and the other side of the current generating device (130) can be connected to one side of the capacitor (CAp) via the first node (N11).

[0067] The current generation device (130) may include an inductor (131). The inductor (131) may generate a predetermined current (Id) using a voltage (VDC) charged in a capacitor (CAp). The predetermined current (Id) may be a minimum current required to test the test element (50), but is not limited thereto. Here, the predetermined current (Id) may be referred to as a target current.

[0068] In an embodiment, when a voltage (VDC) is supplied from a power supply unit (110), the inductor (131) can generate and increase a current using the voltage (VDC) to obtain a target current (Id).

[0069] The current generating device (130) may include a transistor (133). For example, the transistor (133) may be a diode-type transistor, but is not limited thereto. The transistor (133) may allow current to flow in one direction. Here, the one direction may be from the test element (50) to the first node (N11).

[0070] In order to increase the accuracy of the test and improve reliability, the transistor (133) and the test element (50) may have the same specifications, but this is not limited thereto.

[0071] The current generation device (130) may include a reverse diode (135). The reverse diode (135) may prevent current (Id) from flowing in a reverse direction. Here, the reverse direction may be from the first node (N11) to the test element (50). The transistor (133) and the reverse diode (135) allow current to flow only from the test element (50) to the first node (N11). If the current flow performance of the transistor (133) is sufficient, the reverse diode (135) may be omitted.

[0072] According to an embodiment, the first switch (121) and the second switch (123) of the protection circuit (120) are switched so that the power supply (110) can be separated from the capacitor (CAp) and / or the test element (50) before a test on the test element (50) is performed. Thereafter, even if an abnormality occurs in the test element (50) while a test on the test element (50) is performed, the high current flowing in the test element (50) does not flow to the power supply (110), so that damage to the power supply (110) can be prevented.

[0073] According to an embodiment, the first switch (121) and the second switch (123) of the protection circuit (120) are switched so that the voltage or current (Id) remaining in the test element (50) after the test is performed is discharged via the second switch (133), thereby preventing electric shock to the operator.

[0074] The drawing symbol VDS may be the drain-source voltage of the test element (50). The drawing symbol R G may be omitted as a resistor for controlling the current flowing by the test signal. Drawing symbol R1 may be omitted or changed to another impedance element as a resistor for controlling the current (Id) flowing to the second switch (123).

[0075]

[0076] Meanwhile, a test circuit is required to perform, manage and / or control the testing of the test element (50) as well as the switching of the first switch (121) and the second switch (123) of the protection circuit (120).

[0077] Referring to FIG. 3, the test device (101) according to the first embodiment may include a test circuit (140).

[0078] The test circuit (140) can be connected to the test element (50). For example, the test circuit (140) can be connected to the third terminal (53) of the test element (50) and provide a test signal, i.e., a double pulse test signal (GS), to the third terminal (53) of the test element (50). The test element (50) can be turned on / off according to the test signal (GS).

[0079] Unless otherwise specified in the following description, the test signal refers to a double pulse test signal (GS), and the test signal and the double pulse test signal (GS) may be used interchangeably.

[0080] The test circuit (140) can generate and output a first switching signal (SS1) and a second switching signal (SS2). The first switch (121) can be switched on / off by the first switching signal (SS1). The second switch (123) can be switched on / off by the second switching signal (SS2). The first switching signal (SS1) and the second switching signal (SS2) can each include a high-level on signal and a low-level off signal. For example, the first switch (121) and / or the second switch (123) can be turned on by a high-level on signal. For example, the first switch (121) and / or the second switch (123) can be turned off by a low-level off signal.

[0081] The test circuit (140) can obtain the first switching signal (SS1) and the second switching signal (SS2) based on the trigger signal (TRI). The trigger signal (TRI) can be generated externally and input to the test circuit (140). The trigger signal (TRI) can be generated by an operator and provided to the test circuit (140). The trigger signal (TRI) can be generated and provided to the test circuit (140) simultaneously with the insertion of the test element (50) into the corresponding test device (101) or after a certain period of time. For example, when it is recognized that the test element (50) is inserted into the corresponding test device (101), the trigger signal can be generated and provided to the test circuit (140).

[0082] The test circuit (140) can obtain the first switching signal (SS1) and the second switching signal (SS2) according to preset information based on the trigger signal (TRI). The preset information can include a relationship between the trigger signal (TRI) and the first switching signal (SS1), a relationship between the trigger signal (TRI) and the second switching signal (SS2), a relationship between the first switching signal (SS1) and the second switching signal (SS2), a relationship between the trigger signal (TRI) and the double pulse test signal (GS), a relationship between the first switching signal (SS1) and the double pulse test signal (GS), etc.

[0083] In an embodiment, the test of the test element (50) may be operated by dividing it into three sections, namely, a separation section (CS), a test section (TS), and a discharge section (DS), as shown in FIG. 4.

[0084] The first switching signal (SS1) and the second switching signal (SS2) can be obtained based on the trigger signal (TRI).

[0085] The second switching signal (SS2) may have a low-level off signal in the separation section (CS) and the test section (TS). Accordingly, the second switch (123) may be turned off in the separation section (CS) and the test section (TS) according to the low-level off signal.

[0086] For example, the second switching signal (SS2) may be changed from a high-level ON signal to a low-level OFF signal in synchronization with the rising time of the trigger signal (TRI). For example, the second switching signal (SS2) may be maintained in an OFF state for a first period (T1) from the time at which it is changed to a low-level OFF signal. The first period (T1) may include a separation period (CS) and a test period (TS). Therefore, the first period (T1) may be set by considering the sum of the separation period (CS) and the test period (TS). The second switch (123) may be maintained in an OFF state for the first period (T1) after being turned off in synchronization with the rising time according to the second switching signal (SS2).

[0087] The second switching signal (SS2) may have a high-level ON signal during the discharge period (DS). The second switch (123) may change from a low-level OFF signal to a high-level ON signal at the end of the first period (T1). Thereafter, the ON state of the second switching signal (SS2) may be maintained until the next trigger signal (TRI) is received by the test circuit (140).

[0088] Accordingly, when the test circuit (140) outputs the second switching signal (SS2), the second switch (123) can be turned off in the separation section (CS) and the test section (TS) and turned on in the discharge section (DS) according to the second switching signal (SS2).

[0089] The first switching signal (SS1) may have a high-level on signal within the separation section (CS) and a low-level off signal within the test section (TS) and discharge section (DS). Accordingly, the first switch (121) may be turned on within the separation section (CS) according to the high-level on signal.

[0090] For example, the first switching signal (SS1) may change from a low-level off signal to a high-level on signal after a predetermined time has passed from the falling time of the trigger signal (TRI). For example, the first switching signal (SS1) may change to a high-level on signal after a predetermined time has passed from the rising time of the trigger signal (TRI), but later than the falling time of the trigger signal (TRI).

[0091] For example, the first switching signal (SS1) can maintain an ON state for a second period (T2) from the time point at which it changes to an ON signal of a high level. The first switching signal (SS1) can change from an ON signal of a high level to an OFF signal of a low level at the end point of the separation period (CS). Thereafter, the OFF state of the first switching signal (SS1) can continue until the next trigger signal (TRI) is received by the test circuit (140). The first switch (121) can be turned on after a predetermined time has passed from the falling time of the trigger signal (TRI) according to the first switching signal (SS1) and then maintain the ON state for a second period (T2).

[0092] The second period (T2) may be shorter than the separation interval (CS). The second period (T2) may be included within the first period (T1). The start time of the second period (T2) may be after the falling time of the second switching signal (SS2), and the end time of the second period (T2) may be before the rising time of the second switching signal (SS2).

[0093] Therefore, when the test circuit (140) outputs the first output signal, the first switch (121) can be turned on in the separation section (CS) and turned off in the test section (TS) and the discharge section (DS) by the first switching signal (SS1).

[0094]

[0095] Meanwhile, the test circuit (140) can generate and output a double pulse test signal (GS). The double pulse test signal (GS) can include a first pulse test signal (PTS1) and a second pulse test signal (PTS2). The first pulse test signal (PTS1) and the second pulse test signal (PTS2) can be temporally separated from each other. That is, the rising time of the second pulse test signal (PTS2) can be determined after a predetermined time has elapsed from the falling time of the first pulse test signal (PTS1).

[0096] The rising time of the first pulse test signal (PTS1) can be determined in relation to the first switching signal (SS1). That is, the rising time of the first pulse test signal (PTS1) can be determined to be synchronized with the falling time of the first switching signal (SS1). That is, the first pulse test signal (PTS1) can be acquired in synchronization with the falling time of the first switching signal (SS1).

[0097] Meanwhile, the double pulse test signal (GS) can be obtained using the second pulse signal (PS2) as illustrated in FIG. 4. In the double pulse test signal (GS), the first pulse test signal (PTS1) can be obtained based on the second-first pulse signal (PS21) of the second pulse signal (PS2), and the second pulse test signal (PTS2) can be obtained based on the second-second pulse signal (PS22) of the second pulse signal (PS2). For example, the first pulse test signal (PTS1) can have the same width as the second-first pulse signal (PS21) of the second pulse signal (PS2) and have a level greater than the level of the second-first pulse signal (PS21). For example, the second pulse test signal (PTS2) can have the same width as the second-second pulse signal (PS22) of the second pulse signal (PS2) and have a level greater than the level of the second-second pulse signal (PS22).

[0098]

[0099] Meanwhile, the test circuit (140) may include a controller (141), a pulse generation circuit (142), a test signal generation circuit (143), etc. The test signal generation circuit (143) may be called a gate driver.

[0100] The controller (141) can generate a first switching signal (SS1) and a second switching signal (SS2) based on a trigger signal (TRI). The controller (141) can output the first switching signal (SS1) to the first switch (121) and output the second switching signal (SS2) to the second switch (123).

[0101] As illustrated in Fig. 4, the controller (141) can generate a first pulse signal (PS1) based on a trigger signal (TRI). The controller (141) can output the first pulse signal (PS1) to a pulse generation circuit (142).

[0102] The pulse generation circuit (142) can generate a second pulse signal (PS2) using the first pulse signal (PS1). The pulse generation circuit (142) can output the second pulse signal (PS2) to the test signal generation circuit (143). The second pulse signal (PS2) can include a 2-1 pulse signal (PS21) and a 2-2 pulse signal (PS22). The 2-1 pulse signal (PS21) and the 2-2 pulse signal (PS22) can be temporally separated from each other. That is, the rising time of the 2-2 pulse signal (PS22) can be determined after a predetermined time has elapsed from the falling time of the 2-1 pulse signal (PS21). At this time, the predetermined time can be set in advance in consideration of the performance of the test device (101) or the specifications of the test element (50).

[0103] The test signal generation circuit (143) can generate a double pulse test signal (GS) using the second pulse signal (PS2).

[0104] As described above, the first pulse test signal (PTS1) and the second pulse test signal (PTS2) of the double pulse test signal (GS) can be generated using the second-first pulse signal (PS21) and the second-second pulse signal (PS22) of the second pulse signal (PS2), respectively. The first pulse test signal (PTS1) and the second pulse test signal (PTS2) can each have a level sufficiently large to turn on or off the test element (50). For example, when the test element (50) is turned on by the first pulse test signal (PTS1), the current (Id) in the inductor (131) of the current generation device (130) can increase to reach the target current (Id).

[0105] For example, by turning the test element (50) on or off by the second pulse test signal (PTS2), the operating characteristics of the test element (50), such as on, off, low level, high level, etc., can be detected, and a test on the test element (50) can be performed. Since the test element (50) must be on until the target current (Id) is reached, the width of the first pulse test signal (PTS1) may be greater than the width of the second pulse test signal (PTS2), but this is not limited thereto.

[0106]

[0107] Referring to FIGS. 5 and 6, the operation of the test device (101) is described.

[0108] <Normal operation>

[0109] Figure 5 shows a normal operation waveform of a test device (101) according to the first embodiment.

[0110] Referring to FIGS. 3 to 5, when a trigger signal (TRI) is received, the test circuit (140) can generate a first switching signal (SS1), a second switching signal (SS2), and a double pulse test signal (GS) using the trigger signal (TRI).

[0111] First, in the separation section (CS), the test circuit (140) can output a first switching signal (SS1) of a high level and a second switching signal (SS2) of a low level, respectively. The first switch (121) can be turned on by the first switching signal (SS1) of a high level, and the second switch (123) can be turned off by the second switching signal (SS2) of a low level. Accordingly, the voltage (VDC) of the power supply unit (110) can be charged in the capacitor (CAp).

[0112] When the charging of the capacitor (CAp) is completed, the test circuit (140) can output a first switching signal (SS1) of a low level. At this time, the second switching signal (SS2) can maintain a low level. The first switch (121) is turned off in response to the first switching signal (SS1) of a low level, thereby isolating the power supply unit (110) from the capacitor (CAp) and / or the test element (50).

[0113] In the test section (TS), the test circuit (140) can output a double pulse test signal (GS). The test circuit (140) can perform a test of the test element (50) using the double pulse test signal (GS).

[0114] The double pulse test circuit (140) can be obtained using a trigger signal (TRI). For example, the double pulse test circuit (140) can be obtained in synchronization with the falling time of the first switching signal (SS1).

[0115] The double pulse test signal (GS) may include a first pulse test signal (PTS1) and a second pulse test signal (PTS2).

[0116] First, the test element (50) is turned on by a first pulse test signal (PTS1), so that a current (Id) path composed of the test element (50), the current generation device (130), and the capacitor (CAp) can be formed. Accordingly, while the first pulse test signal (PTS1) is supplied to the test element (50), the current (Id) in the inductor (131) of the current generation device (130) can increase to reach the target current (Id).

[0117] A second pulse test signal (PTS2) having a time difference from the first pulse test signal (PTS1) is supplied to the test element (50), so that the test element (50) can be turned on or off. That is, the test element (50) can be turned on by the high level of the second pulse test signal (PTS2), and the test element (50) can be turned off by the low level of the second pulse test signal (PTS2). The operating characteristics of the test element (50) can be detected using a probe (not shown) for a detection device, so that the operating characteristics of the test element (50) can be evaluated. For example, it can be evaluated whether the test element (50) satisfies a desired specification or is a good product or a defective product.

[0118] After the test on the test element (50) is completed, the test circuit (140) can output a high-level second switching signal (SS2). The high-level second switching signal (SS2) can be obtained by considering the first period (T1) of the low-level second switching signal (SS2). That is, the second switching signal (SS2) changed from a low level to a high level can be obtained at a time point when the second period (T2) has passed from the falling time. At this time, the first switching signal (SS1) can maintain a low level.

[0119] The second switch (123) is turned on by a high-level second switching signal (SS2), so that a current (Id) path formed by the capacitor (CAp) and the second switch (123) can be formed. Accordingly, the voltage remaining in the test element (50) or the voltage (VDC) of the capacitor (CAp) is discharged via the second switch (123), so that electric shock to the operator can be prevented. The operator can insert or remove the test element (50) into or from the test device (101), or manage or operate the test device (101).

[0120]

[0121] <Abnormal behavior>

[0122] Fig. 6 illustrates an abnormal operation waveform of a test device according to the first embodiment.

[0123] Referring to FIGS. 3, 4 and 6, after the voltage (VDC) of the power supply (110) is charged to the capacitor (CAp) in the separation section (CS), the power supply (110) can be separated from the capacitor (CAp) and / or the test element (50).

[0124] A test can be performed on a test element (50) using a double pulse test signal (GS) in a test section (TS).

[0125] As shown in Fig. 6, an abnormality may occur in the test element (50) during the process in which the inductor (131) of the current generation device (130) generates the target current (Id) using the first pulse test signal (PTS1) of the double pulse test signal (GS).

[0126] When an abnormality occurs in the test element (50), the test element (50) may be short-circuited, and the current (Id) flowing in the test element (50) may increase. When the test element (50) is short-circuited, the test element (50) is not turned on by the second pulse test signal (PTS2) of the double pulse test signal (GS) and the short-circuit state is maintained, so that the current (Id) flowing in the test element (50) may further increase.

[0127] In this case, the test circuit (140) can output a high-level second switching signal (SS2). The second switch (123) is turned on, so that a current (Id) path formed by the capacitor (CAp) and the second switch (123) can be formed. Accordingly, the voltage remaining in the test element (50) or the voltage (VDC) of the capacitor (CAp) is discharged via the second switch (123), so that the current (Id) increased in the test element (50) can be reduced. By reducing the current (Id) of the test element (50), damage to the test circuit (140) connected to the test element (50) can be prevented. At this time, since the first switch (121) is turned off, the increased current (Id) of the test element (50) does not flow through the power supply unit (110), so that damage to the power supply unit (110) can also be prevented.

[0128] Additionally, the voltage (VDC) of the capacitor (CAp) can also be discharged via the second switch (123).

[0129] According to an embodiment, since the first switch (121) is turned off and the power supply (110) is separated from the capacitor (CAp) and / or the test element (50), the high current (Id) flowing in the test element (50) does not flow into the power supply (110), thereby preventing damage to the power supply (110).

[0130] According to the embodiment, the second switch (123) is turned on in the discharge section (DS) so that the high current (Id) flowing in the test element (50) is discharged via the second switch (123), thereby preventing electric shock to the operator.

[0131]

[0132] Meanwhile, as described above, in the first embodiment, even if an abnormality occurs in the test element (50) during the test of the test element (50) in the test section (TS), no immediate measures are taken to protect the test circuit (140). That is, after the test section (TS) has passed, the second switch (123) is turned on in the discharge section (DS) so that the voltage or current (Id) remaining in the test element (50) is discharged via the second switch (123), thereby protecting the test circuit (140). If the protective measures for the test circuit (140) are not immediately taken in this way, the test circuit (140) may be damaged.

[0133] A technique for immediately protecting a test circuit (140) is described in detail with reference to FIG. 7.

[0134] [Example 2]

[0135] Figure 7 illustrates a test device according to the second embodiment.

[0136] The second embodiment is identical to the first embodiment except for the current detection circuit (150). In the second embodiment, the same components as in the first embodiment are given the same drawing reference numerals and detailed descriptions are omitted.

[0137] Referring to FIG. 7, a test device (102) according to the second embodiment may include a capacitor (CAp), a power supply (110), a protection circuit (120), a current generation device (130), a test circuit (140), a current detection circuit (150), etc. Since the capacitor (CAp), the power supply (110), the protection circuit (120), the current generation device (130), and the test circuit (140) have been described in the first embodiment (FIG. 3), a detailed description thereof will be omitted.

[0138] A current detection circuit (150) may be connected to one side of a test element (50). The current detection circuit (150) may be connected between a second terminal (52) of the test element (50) and a second node (N21). The current detection circuit (150) may detect a current (Id) flowing in the test element (50). The detected current (Id) may be transmitted to a test circuit (140), specifically, a controller (141). The detected current (Id) may be referred to as a detection signal.

[0139] The test circuit (140) can determine whether the test element (50) is abnormal based on the detection signal. If an abnormality occurs in the test element (50), the test circuit (140) can prevent damage to the test circuit (140) due to the abnormality in the test element (50) by short-circuiting its output (or output terminal). That is, if an abnormality occurs in the test element (50), for example, a high current (Id) may flow into the test circuit (140), causing damage to the test circuit (140). Therefore, as soon as an abnormality occurs in the test element (50), the test circuit (140) can short-circuit its output (or output terminal) to prevent the high current (Id) of the test element (50) from flowing into the test circuit (140), thereby preventing damage to the test circuit (140).

[0140] Specifically, as illustrated in FIG. 7, if the controller (141) determines that there is an abnormality in the test element (50) based on the detection signal provided from the current detection circuit (150), the controller (141) can transmit an abnormality signal or a blocking signal to the test signal generation circuit (143). The test signal generation circuit (143) can short-circuit its output (or output terminal) according to the abnormality signal or blocking signal, so that the double pulse test signal (GS) can be changed to a low level. Therefore, even if an abnormality occurs in the test element (50) and a high current (Id) flows, the high current (Id) does not flow into the test circuit (140) including the test signal generation circuit (143), so that damage to the test circuit (140) can be prevented.

[0141] Although not shown, if an abnormality occurs in the test element (50), the output (or output terminal) of the test signal generation circuit (143) may be short-circuited according to an abnormal signal or a blocking signal from the controller (141). Accordingly, the path through which the high current (Id) generated in the test element (50) flows into the test signal generation circuit (143) is fundamentally blocked, thereby preventing damage to the test circuit (140) including the test signal generation circuit (143).

[0142]

[0143] Referring to FIGS. 8 and 9, the operation of the test device (102) is described.

[0144] Passive protective action

[0145] Fig. 8 illustrates a normal operation waveform of a test device (102) according to a second embodiment. The operation of the test device (102) illustrated in Fig. 8 may be identical to the abnormal operation illustrated in Fig. 6.

[0146] As shown in FIGS. 7 and 8, that is, in the separation section (CS), the first switch (121) is turned on and the second switch (123) is turned off so that the voltage (VDC) of the power supply unit (110) is charged to the capacitor (CAp), and then the first switch (121) is turned off so that the power supply unit (110) can be separated from the capacitor (CAp) and / or the test element (50).

[0147] A test can be performed on a test element (50) using a double pulse test signal (GS) in a test section (TS).

[0148] For example, an abnormality may occur in the test element (50) when the test element (50) is turned on by the first pulse test signal (PTS1) among the double pulse test signals (GS). In this case, even if the current (Id) in the test element (50) increases rapidly, the power supply unit (110) may not be damaged because the power supply unit (110) is separated from the capacitor (CAp) and / or the test element (50).

[0149] In the discharge section (DS), the second switch (123) is turned on, and the high current (Id) of the test element (50) flows through the second switch (123) to discharge, so that the test element (50) does not break down, or even if the test element (50) breaks down, damage to the test circuit (140) connected to the test element (50) can be prevented.

[0150] As described above, in the passive protection operation, even if an abnormality occurs in the test element (50) in the test section (TS), no protective action is immediately taken to prevent damage to the test circuit (140). That is, damage to the test circuit (140) can be prevented only when the second switch (123) is turned on in the discharge section (DS) after the test section (TS) and the voltage or current (Id) remaining in the test element (50) is discharged via the second switch (123).

[0151]

[0152] Active protective action

[0153] Fig. 9 illustrates an abnormal operation waveform of a test device (102) according to the second embodiment.

[0154] As shown in FIGS. 7 and 9, after the voltage (VDC) of the power supply unit (110) is charged to the capacitor (CAp) in the separation section (CS), the power supply unit (110) can be separated from the capacitor (CAp) and / or the test element (50) by turning off the first switch (121).

[0155] A test can be performed on a test element (50) using a double pulse test signal (GS) in a test section (TS).

[0156] For example, while generating a predetermined current (Id) in a current generation device (130) using the first pulse test signal (PTS1) among the double pulse test signals (GS), an abnormality may occur in the test element (50). In this case, the current (Id) flowing in the test element (50) may increase.

[0157] The current detection circuit (150) can detect the current (Id) flowing in the test element (50) and transmit a detection signal to the test circuit (140).

[0158] The test circuit (140), i.e., the controller (141), can compare the detection signal with a set value (SET). As soon as the detection signal exceeds the set value (SET), the controller (141) can transmit an abnormal signal or a blocking signal to the test signal generation circuit (143). The test signal generation circuit (143) can short-circuit or open its output (or output terminal) according to the abnormal signal or blocking signal, thereby preventing the high current (Id) of the test element (50) from flowing into the test signal generation circuit (143). Accordingly, even if the high current (Id) flows through the test element (50), damage to the test circuit (140) including the test signal generation circuit (143) can be prevented.

[0159] Since the first switch (121) is turned off and the power supply unit (110) is separated from the capacitor (CAp) and / or the test element (50), the high current (Id) flowing through the test element (50) does not flow into the power supply unit (110), thereby preventing damage to the power supply unit (110).

[0160] Meanwhile, in the discharge section (DS), the second switch (123) is turned on, and the high current (Id) flowing in the test element (50) is discharged via the second switch (123), thereby preventing electric shock to the operator.

[0161] According to an embodiment, when an abnormality occurs in the test element (50) using the current detection circuit (150), damage to the test circuit (140) due to a high current (Id) flowing in the test element (50) can be prevented by short-circuiting or disconnecting the output (or output terminal) of the test circuit (140).

[0162]

[0163] The above detailed description should not be construed as limiting in any respect and should be considered illustrative only. The scope of the embodiments should be determined by a reasonable interpretation of the appended claims, and all modifications within the equivalency range of the embodiments are intended to be included within the scope of the embodiments.

Claims

1. A device for testing a test element having a first terminal to a third terminal, A power supply connected to the first terminal and the second terminal of the test device; a protection circuit connected between the test element and the power supply; and a test circuit connected to the third terminal of the test element; The above protection circuit, A first switch connected between the first terminal of the test device and one side of the power supply; a second switch connected between the first terminal and the second terminal of the test element; and A capacitor connected in parallel with the second switch; Test device.

2. In paragraph 1, The above test circuit, Outputting a first switching signal for switching the first switch and a second switching signal for switching the second switch based on a trigger signal. Test device.

3. In paragraph 1, The above test circuit, By switching the first switch and the second switch, the capacitor is charged with the voltage of the power supply, and then the power supply is separated from the test element. Test device.

4. In paragraph 3, The above second switch is turned off in synchronization with the rising time of the trigger signal and remains in the off state for a first period. Test device.

5. In paragraph 4, The above first switch is turned on after a predetermined time from the polling time of the trigger signal and remains on for a second period. Test device.

6. In paragraph 5, The above second period is included within the above first period, Test device.

7. In paragraph 1, The above test circuit, Testing the above test device using a double pulse test signal, Test device.

8. In paragraph 2, The above test circuit, Outputting the double pulse test signal in synchronization with the polling time of the first switching signal. Test device.

9. In paragraph 3, The above test circuit, Discharging the test element by switching the first switch and the second switch, Test device.

10. In paragraph 7, further comprising a current generating device connected between the first terminal of the test element and one side of the power supply; Test device.

11. In paragraph 10, The above current generating device, Inductor; and A transistor connected in parallel with the above inductor; Test device.

12. In paragraph 11, The above double pulse test signal includes a first pulse test signal and a second pulse test signal, The above test circuit, The first pulse test signal is supplied to the test element to generate a predetermined current in the inductor, To perform a test of the test device by supplying the second pulse test signal to the test device, Test device.

13. In paragraph 1, further comprising a current sensing circuit connected to the second terminal of the test element; The above test circuit, If the current detected by the above current detection circuit exceeds the set value, the output is short-circuited. Test device.

14. A test method of a test device including a power supply connected to a test element, a protection circuit connected between the test element and the power supply, and a test circuit connected to the test element, A step of switching the first switch and the second switch of the above protection circuit to charge the capacitor with the voltage of the power supply, and then disconnecting the power supply from the test element; A step of testing the test device using a double pulse test signal; and A step of discharging the test element by switching the first switch and the second switch; How to test.

15. In paragraph 14, The above test device, Further comprising a current generating device connected between the test element and one side of the power supply; The above double pulse test signal includes a first pulse test signal and a second pulse test signal, A step of supplying the first pulse test signal to the test element to generate a predetermined current in the inductor; and further comprising a step of supplying the second pulse test signal to the test device to perform a test of the test device; How to test.

16. In paragraph 14, Further comprising a current sensing circuit connected to one side of the above test element; Further comprising a step of short-circuiting the output when the current detected by the current detection circuit is greater than the set value; How to test.

Images