Amplification circuit, chip and electronic device

Abstract

An amplification circuit, a chip and an electronic device. The amplification circuit comprises: a first input end of the amplification circuit is coupled to a gate electrode of a first transistor; a source electrode of the first transistor is coupled to the ground, and a drain electrode thereof is coupled to a source electrode of a second transistor; a drain electrode of the second transistor is coupled to a first output end of the amplification circuit and is coupled to a voltage supply end; a drain electrode of a third transistor is coupled to a second output end of the amplification circuit and is coupled to the voltage supply end; the source electrode of the second transistor is coupled to a source electrode of the third transistor by means of a switch circuit; a second input end of the amplification circuit is coupled to a gate electrode of a fourth transistor; a source electrode of the fourth transistor is coupled to the ground, and a drain electrode thereof is coupled to the source electrode of the third transistor; and the switch circuit is used for controlling connection or disconnection between the source electrode of the second transistor and the source electrode of the third transistor. The embodiments of the present application can reduce the size and cost of an amplifier chip.

Description

Amplifier circuits, chips and electronic devices

[0001] This invention claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on December 29, 2023, with application number 202311868651.8 and application name “Amplifying circuit, chip and electronic device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of circuit technology, and in particular to an amplifier circuit, a chip, and an electronic device. Background Art

[0003] In order to meet the requirements of single-user peak rate and system capacity improvement, the radio frequency system introduces carrier aggregation (CA) technology to increase the transmission bandwidth. In carrier aggregation technology, multiple carrier signals of the same frequency band are received from the same antenna and transmitted to the RFIC for demodulation of each carrier signal. A specific implementation method is that after the antenna receives multiple carrier signals of the same frequency band, it first amplifies and powers the signal through a low noise amplifier (LNA) chip, divides the signal into two signals, and inputs the two signals into the radio frequency integrated circuit (RFIC) for demodulation.

[0004] The LNA chip uses a Wilkinson power divider to perform signal power division processing. The Wilkinson power divider occupies a large chip area, which increases the size and cost of the LNA chip.

[0005] Summary of the Invention

[0006] Embodiments of the present application provide an amplifier circuit, a chip, and an electronic device, which can reduce the size and cost of the amplifier chip.

[0007] In a first aspect, an embodiment of the present application provides an amplifier circuit, comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, and a switching circuit; wherein a first input terminal of the amplifier circuit is coupled to the gate of the first transistor; a source of the first transistor is coupled to ground, and a drain is coupled to the source of the second transistor; a drain of the second transistor is coupled to the first output terminal of the amplifier circuit and to a voltage supply terminal; a drain of the third transistor is coupled to the second output terminal of the amplifier circuit and to a voltage supply terminal; a source of the second transistor is coupled to the source of the third transistor via the switching circuit; a second input terminal of the amplifier circuit is coupled to the gate of the fourth transistor; a source of the fourth transistor is coupled to ground, and a drain is coupled to the source of the third transistor; and the switching circuit is configured to control the conduction or disconnection between the source of the second transistor and the source of the third transistor. The amplifier circuit can implement amplification and power division of radio frequency signals and dual-band dual-open functions through the first to fourth transistors and the switching circuit, without the need for components such as inductors that occupy a large chip area, thereby reducing the size and cost of the amplifier chip including the amplifier circuit.

[0008] In some embodiments, coupling the drain of the second transistor to the first output terminal of the amplifier circuit may include: the drain of the second transistor is connected to the first output terminal of the amplifier circuit via a matching circuit. Connecting the drain of the second transistor to the first output terminal of the amplifier circuit via a matching circuit may include: the drain of the second transistor is directly connected to one end of the matching circuit, and the other end of the matching circuit is directly connected to the first output terminal. The matching circuit is used to adjust the matching of the first output terminal of the amplifier circuit according to RF performance requirements, and may be implemented using resistors, capacitors, and / or inductors.

[0009] In some embodiments, the amplifier circuit may further include: a controller; the controller is configured to: in a first mode, control the first transistor, the second transistor, the third transistor, and the switch circuit to conduct, and control the fourth transistor to shut down. In some embodiments, the amplifier circuit is configured to: in a first mode, a first signal received at the first input terminal is amplified by the first transistor and then power-split into a first sub-signal and a second sub-signal, the first sub-signal being output to the first output terminal via the second transistor, and the second sub-signal being output to the second output terminal via the switch circuit and the third transistor, without passing through the switch circuit. Optionally, the first mode may be, for example, an amplification and power-splitting mode. Optionally, the first signal may be a radio frequency signal.

[0010] In some embodiments, the amplifier circuit may further include a controller configured to, in a second mode, control the conduction of the first, second, third, and fourth transistors and the disconnection of the switch circuit. In some embodiments, the amplifier circuit may, in the second mode, output a second signal of a first frequency band received at the first input terminal to the first output terminal via the first and second transistors, and output a third signal of a second frequency band received at the second input terminal to the second output terminal via the fourth and third transistors. Optionally, the second mode may be, for example, a dual-band dual-on mode. Optionally, the second signal and / or the third signal may be a radio frequency signal.

[0011] In some embodiments, the switch circuit includes a switch having a first terminal coupled to the source of the second transistor and a second terminal coupled to the source of the third transistor. In some embodiments, the switch can be implemented by a transistor such as a field effect transistor, a bipolar transistor, or a high electron mobility transistor.

[0012] In a second aspect, an embodiment of the present application provides an amplifier circuit, comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, and a switching circuit; wherein the first input terminal of the amplifier circuit is coupled to the gate of the first transistor; the source of the first transistor is coupled to ground, and the drain is coupled to the source of the second transistor; the drain of the second transistor is connected to the first output terminal of the amplifier circuit through a matching circuit and is coupled to a voltage supply terminal; the drain of the third transistor is coupled to the second output terminal of the amplifier circuit and is coupled to the voltage supply terminal; the drain of the second transistor is coupled to the drain of the third transistor through a switching circuit; the second input terminal of the amplifier circuit is coupled to the gate of the fourth transistor, the source of the fourth transistor is coupled to ground, and the drain is coupled to the source of the third transistor; the switching circuit is used to control the conduction or disconnection between the drain of the second transistor and the drain of the third transistor. The drain of the second transistor is connected to the first output terminal of the amplifier circuit through the matching circuit, including: the drain of the second transistor is directly connected to one end of the matching circuit, and the other end of the matching circuit is directly connected to the first output terminal. The matching circuit is used to adjust the matching of the first output terminal of the amplifier circuit according to the RF performance requirements, and can be implemented by resistors, capacitors and / or inductors. The amplifier circuit can realize the amplification and power division of the radio frequency signal and the dual-frequency dual-open function through the first transistor to the fourth transistor and the switching circuit. In addition, only the matching circuit is connected between the first output end and the drain of the second transistor, and there are no additional inductors or other devices that occupy a large chip area, thereby reducing the size and cost of the amplifier chip including the amplifier circuit.

[0013] In some embodiments, the amplifier circuit may further include: a controller; the controller is configured to: in a first mode, control the first transistor, the second transistor, and the switch circuit to conduct, and control the third transistor and the fourth transistor to shut down. In some embodiments, the amplifier circuit may be configured to: in the first mode, a first signal received at the first input terminal is amplified by the first transistor and the second transistor, and then power-split into a first sub-signal and a second sub-signal, the first sub-signal being output to the first output terminal via a matching circuit, and the second sub-signal being output to the second output terminal via the switch circuit, without passing through the switch circuit. Optionally, the first mode may be, for example, an amplification and power-splitting mode.

[0014] In some embodiments, the amplifier circuit may further include a controller configured to, in a second mode, control the first, second, third, and fourth transistors to conduct, and control the switch circuit to disconnect. In some embodiments, the amplifier circuit may be configured to, in the second mode, receive a second signal in a first frequency band at the first input terminal and output it to the first output terminal via the first transistor, the second transistor, and the matching circuit; and receive a third signal in a second frequency band at the second input terminal and output it to the second output terminal via the fourth and third transistors. Optionally, the second mode may be, for example, a dual-band dual-on mode.

[0015] In some embodiments, the switch circuit includes a switch having a first terminal coupled to the drain of the second transistor and a second terminal coupled to the drain of the third transistor. In some embodiments, the switch can be implemented by a transistor such as a field effect transistor, a bipolar transistor, or a high electron mobility transistor.

[0016] In a third aspect, an embodiment of the present application provides an amplifier chip, comprising the amplifier circuit of any one of the first aspects.

[0017] In a fourth aspect, an embodiment of the present application provides an electronic device, characterized in that it includes the amplifier circuit of any one of the first aspects, or includes the amplifier chip of the third aspect.

[0018] In some embodiments, the electronic device may further include: a first antenna; a first input terminal of the amplifier circuit connected to the first antenna; and the amplifier circuit configured to receive, in a first mode, a radio frequency signal in a first frequency band transmitted by the first antenna via the first input terminal. In this case, the first output terminal and the second output terminal of the amplifier circuit may respectively output radio frequency signals, thereby enabling the amplifier circuit to amplify and divide the radio frequency signal in the first frequency band.

[0019] In some embodiments, the electronic device may further include: a second antenna; a first input terminal and a second input terminal of the amplifier circuit respectively connected to the first antenna; and the amplifier circuit configured to, in a second mode, receive a radio frequency signal in a second frequency band transmitted by the second antenna via the first input terminal, and receive a radio frequency signal in a third frequency band transmitted by the second antenna via the second input terminal. In this case, the first output terminal of the amplifier circuit may output a radio frequency signal in the second frequency band, and the second output terminal may output a radio frequency signal in the third frequency band, thereby achieving dual-band dual-operation of the amplifier circuit.

[0020] In some embodiments, the electronic device may further include: a third antenna and a fourth antenna; the first input terminal of the amplifier circuit is connected to the third antenna, and the second input terminal of the amplifier circuit is connected to the fourth antenna; the amplifier circuit is configured to, in the second mode, receive RF signals in a fourth frequency band transmitted by the third antenna via the first input terminal, and receive RF signals in a fifth frequency band transmitted by the fourth antenna via the second input terminal. In this case, the first output terminal of the amplifier circuit can output RF signals in the second frequency band, and the second output terminal can output RF signals in the third frequency band, thereby achieving dual-band dual-operation of the amplifier circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] FIG1 is a schematic structural diagram of a radio frequency system in an electronic device provided in an embodiment of the present application;

[0022] FIG2 is a schematic diagram of an implementation structure of a radio frequency path provided in an embodiment of the present application;

[0023] FIG3 is a schematic structural diagram of an LNA chip provided in an embodiment of the present application;

[0024] FIG4A is a schematic diagram of an implementation structure of a radio frequency path provided in an embodiment of the present application;

[0025] FIG4B is a schematic diagram of another implementation structure of a radio frequency path provided in an embodiment of the present application;

[0026] FIG4C is a schematic diagram of another implementation structure of a radio frequency path provided in an embodiment of the present application;

[0027] FIG4D is a schematic diagram of another implementation structure of a radio frequency path provided in an embodiment of the present application;

[0028] FIG5 is a schematic structural diagram of an amplifier circuit provided in an embodiment of the present application;

[0029] FIG6 is another schematic diagram of the structure of the amplifier circuit provided in an embodiment of the present application;

[0030] 7A and 7B are schematic diagrams showing the working principle of the amplifier circuit according to the embodiment of the present application shown in FIG6 ;

[0031] FIG7C is a simplified schematic diagram of the working principle of the amplifier circuit according to an embodiment of the present application;

[0032] FIG8 is a schematic diagram of a third structure of an amplifier circuit provided in an embodiment of the present application;

[0033] 9A and 9B are schematic diagrams showing the working principle of the amplifier circuit according to the embodiment of the present application shown in FIG8 ;

[0034] FIG10 is a schematic diagram of a fourth structure of an amplifier circuit provided in an embodiment of the present application;

[0035] FIG11 is a schematic diagram of a fifth structure of an amplifier circuit provided in an embodiment of the present application;

[0036] FIG12 is a sixth structural diagram of an amplifier circuit provided in an embodiment of the present application;

[0037] FIG13 is a seventh structural diagram of the amplifier circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] The terms used in the implementation section of this application are only used to explain the specific embodiments of this application and are not intended to limit this application.

[0039] Electronic devices, such as mobile phones, are equipped with radio frequency systems to support wireless communications. Figure 1 shows the structure of the RF system, which includes a radio frequency integrated circuit (RFIC), a low-noise amplifier (LNA), filters, and switches. In the signal receiving section, the RF signal received by the antenna passes through the switch, filter, and LNA before being transmitted to the RFIC for demodulation. The circuit structure from the antenna to the RFIC is also called the RF path.

[0040] In order to meet the requirements of single-user peak rate and system capacity improvement, the radio frequency system introduces carrier aggregation (CA) technology to increase the transmission bandwidth. In carrier aggregation technology, the radio frequency signal received by the antenna includes multiple carrier signals in the same frequency band. After the radio frequency signal is received from the antenna, it is transmitted to the RFIC for demodulation of each carrier signal. A specific implementation method is that after the antenna receives the radio frequency signal, it is necessary to use a low noise amplifier (LNA) chip to amplify and power divide the radio frequency signal, divide it into two radio frequency signals, and input the two radio frequency signals into the radio frequency integrated circuit (RFIC) for demodulation. The above-mentioned power division processing is to divide the radio frequency signal into two radio frequency signals. In order to reduce the mutual influence between the two radio frequency signals after power division, it is necessary to have a certain degree of isolation between the two output ends of the power division circuit, and the isolation is generally required to be greater than 10dB.

[0041] To provide both amplification and isolated power splitting (hereinafter referred to as the amplification and power splitting functions), the LNA chip structure, positioned between the antenna and the RFIC, is shown in Figure 2. This structure includes an amplifier circuit and a power splitter. When the RF signal received by the antenna is transmitted to the LNA chip, it first enters the amplifier circuit for power amplification. The amplified RF signal is then transmitted to the power splitter, which splits the RF signal into two RF signals. These two RF signals are then transmitted to the RFIC for demodulation. It should be understood that in order to illustrate the amplification and power splitting functions of the LNA chip, other components that may be included in the RF circuit, such as the switch and filter shown in Figure 1, have been omitted from the circuits of Figures 2 through 4C.

[0042] Figure 3 shows the specific implementation of the power splitter in an LNA chip. The structure includes multiple switches S01-S06, an inductor L01, an inductor L02, and a resistor R. The switches S01-S06 are used for path selection, while the inductors L01 and L02 form a Wilkinson power splitter. Resistor R isolates the two RF signals to reduce crosstalk. As can be seen, while the LNA chip shown in Figure 3 achieves power division of the RF signal through the power splitter, the two inductors that form the Wilkinson power splitter occupy a large area on the LNA chip, increasing its size and cost. Furthermore, they introduce additional insertion loss, degrading the performance of the LNA chip.

[0043] To this end, embodiments of the present application provide an amplifier circuit that, while achieving both RF signal amplification and isolated power division, can reduce the size and cost of the amplifier chip in which the amplifier circuit resides. Furthermore, because the method and circuit in the embodiments of the present application utilize active devices to amplify RF signals, no additional insertion loss is introduced, thereby improving the performance of the amplifier chip in which the amplifier circuit resides.

[0044] The following illustrates possible implementation structures of the radio frequency path applicable to the amplifier circuit according to the embodiment of the present application through FIG. 4A to FIG. 4D .

[0045] As shown in Figure 4A, the amplifier circuit provided in the embodiment of the present application can replace the LNA chip in the RF path shown in Figure 2, and simultaneously implement power amplification and power splitting functions for the RF signal. As shown in Figure 4A, the RF signal received by the antenna is transmitted to the first input terminal RFin1 of the amplifier circuit in the embodiment of the present application. The amplifier circuit in the embodiment of the present application amplifies the RF signal and power splits it into two RF signals, which are respectively transmitted to the RFIC through the first output terminal RFout1 and the second output terminal RFout2 of the amplifier circuit, and are demodulated by the RFIC.

[0046] In some embodiments, to meet the requirements of electronic devices for detecting RF signals in other frequency bands, as shown in FIG4B , the amplifier circuit in the embodiment of the present application may further include a second input terminal RFin2. In addition to the amplification and power splitting functions shown in FIG4A , the amplifier circuit may also implement a dual-band dual-on function. When the amplifier circuit implements the dual-band dual-on function, the first input terminal RFin1 of the amplifier circuit may receive an RF signal in one frequency band, which is amplified and output from the first output terminal RFout1 to the RFIC. The second input terminal RFin2 may receive an RF signal in another frequency band, which is amplified and output from the second output terminal RFout2 to the RFIC.

[0047] In some embodiments, unlike the embodiment shown in FIG4B , in which the RF signal received by the first input terminal RFin1 and the RF signal received by the second input terminal RFin2 of the amplifier circuit are received by the same antenna, the two RF signals may also be received by two separate antennas. For example, as shown in FIG4C , the RF signal received by the first input terminal RFin1 of the amplifier circuit is received by antenna 1, and the RF signal received by the second input terminal RFin2 is received by antenna 2. The RF signals received by antenna 1 and antenna 2 may be RF signals of different frequency bands. In this case, the amplifier circuit may also implement a dual-band dual-on function.

[0048] In some embodiments, the electronic device may include multiple RFICs, and the two output terminals of the amplifier circuit can be coupled to different RFICs respectively, so that the two RF signals output by the first output terminal RFout1 and the second output terminal RFout2 are respectively transmitted to different RFICs for demodulation. For example, as shown in Figure 4D, the first output terminal RFout1 of the amplifier circuit can be coupled to RFIC1, so that the RF signal is transmitted to RFIC1 for demodulation, and the second output terminal RFout2 of the amplifier circuit can be coupled to RFIC2, so that the RF signal is transmitted to RFIC2 for demodulation.

[0049] The following further illustrates the circuit structure implementation of the amplifier circuit according to the embodiment of the present application.

[0050] FIG5 is a schematic diagram of a structure of an amplifier circuit according to an embodiment of the present application. As shown in FIG5 , the circuit may include transistors S1 to S4 and a switch circuit; wherein,

[0051] The first input terminal RFin1 of the amplifier circuit is coupled to the gate of the transistor S1; the source of the transistor S1 is grounded GND, and the drain is coupled to the source of the transistor S2; the drain of the transistor S2 is coupled to the first output terminal RFout1 of the amplifier circuit and the voltage supply terminal VDD respectively;

[0052] The second input terminal RFin2 of the amplifier circuit is coupled to the gate of the transistor S3; the source of the transistor S3 is grounded GND, and the drain is coupled to the source of the transistor S4; the drain of the transistor S4 is coupled to the second output terminal RFout2 of the amplifier circuit and the voltage supply terminal VDD respectively;

[0053] A switch circuit is coupled between the drain of transistor S1 and the drain of transistor S3. In other words, a switch circuit is coupled between the source of transistor S2 and the source of transistor S4.

[0054] The switch circuit is used to control the conduction or disconnection between the drain of the transistor S1 and the drain of the transistor S3 . In other words, the switch circuit is used to control the conduction or disconnection between the source of the transistor S3 and the source of the transistor S4 .

[0055] In order to amplify the radio frequency signal, the transistors S1 to S4 may operate in an amplifying state when turned on. In some embodiments, the transistors operating in the amplifying state may also be referred to as amplifier tubes.

[0056] Optionally, the transistors S1 to S4 can be respectively implemented by field effect transistors, bipolar transistors, or high electron mobility transistors.

[0057] The above-mentioned switching circuit can be implemented by any circuit with a switching function. Optionally, in order to improve the circuit performance of the amplifier circuit, a switching circuit with low on-state insertion loss and high off-state isolation can be selected. For example, in one embodiment, the switching circuit may include: a switch, the two ends of the switch are respectively coupled to the drain of transistor S1 and the drain of transistor S3, so that the on and off of the switch can realize the on or off between the drain of transistor S1 and the drain of transistor S3. The above-mentioned switch can be implemented by a transistor such as a field effect transistor, a bipolar transistor, or a high electron mobility transistor. In another embodiment, the switching circuit can also include devices such as resistors, capacitors and / or inductors on the basis of the above-mentioned switch, and the above-mentioned switches, capacitors, and inductors can be connected in series or in parallel, as long as they have a switching function.

[0058] Optionally, the above coupling can be a direct connection, an indirect connection through a device (such as a capacitor, resistor or inductor, etc.) or a circuit, or an indirect coupling connection, etc., and the embodiments of the present application are not limited thereto. The above indirect coupling connection refers to the interaction between two devices through the transmission of electromagnetic fields or electromagnetic waves. For example, the interaction between devices such as transformers and inductive couplers in a circuit is indirect coupling. Taking the coupling of the source of the above-mentioned transistor S1 to the ground GND as an example, the source of the transistor S1 can be directly connected to the ground GND, or it can be connected to the ground GND through a device or circuit, etc.

[0059] For example, in some embodiments, in order to obtain the required RF performance, as shown in Figure 6, the first input terminal RFin1 of the amplifier circuit and the gate of the transistor S1 can be coupled through an input matching circuit 1, and the input matching circuit 1 is used to adjust the matching of the first input terminal RFin1 of the amplifier circuit according to the RF performance requirements.

[0060] For similar reasons, as shown in FIG6 , the second input terminal RFin2 of the amplifier circuit and the gate of the transistor S3 may be coupled via an input matching circuit 2 , which is used to adjust the matching of the first input terminal RFin2 of the amplifier circuit according to RF performance requirements;

[0061] As shown in FIG6 , the first output terminal RFout1 of the amplifier circuit and the drain of the transistor S2 may be coupled via an output matching circuit 1 to adjust the matching of the first output terminal RFout1 of the amplifier circuit according to RF performance requirements;

[0062] As shown in FIG6 , the second output terminal RFout2 of the amplifier circuit and the drain of the transistor S4 may be coupled via an output matching circuit 2 to adjust the matching of the second output terminal RFout2 of the amplifier circuit according to RF performance requirements;

[0063] As shown in FIG6 , the source of the transistor S1 can be coupled to the ground GND via a source matching circuit 1 to adjust the matching of the source of the transistor S1 according to RF performance requirements;

[0064] As shown in FIG6 , the source of the transistor S3 can be coupled to the ground GND via a source matching circuit 2 to adjust the matching of the source of the transistor S3 according to RF performance requirements;

[0065] As shown in FIG6 , the drain of the transistor S2 may be coupled to the voltage supply terminal VDD via a drain matching circuit 1 to adjust the matching of the drain of the transistor S2 according to RF performance requirements;

[0066] As shown in FIG6 , the drain of the transistor S4 may be coupled to the voltage supply terminal VDD via a drain matching circuit 2 , so as to adjust the matching of the drain of the transistor S4 according to radio frequency performance requirements.

[0067] For example, in some embodiments, in order to obtain the required RF performance, as shown in Figure 6, the drain of transistor S1 and the source of transistor S2 can be coupled through an inter-stage matching circuit 1 to adjust the matching between the drain of transistor S1 and the source of transistor S2 of the amplifier circuit according to the RF performance requirements, and the drain of transistor S3 and the source of transistor S4 can be coupled through an inter-stage matching circuit 2 to adjust the matching between the drain of transistor S3 and the source of transistor S4 of the amplifier circuit according to the RF performance requirements.

[0068] In some embodiments, any of the above matching circuits can be implemented by resistors, capacitors and / or inductors. The specific circuit implementation structure can be adjusted based on the required RF performance, and is not limited in the embodiments of the present application.

[0069] In some embodiments, in order to enable transistors S1 to S4 to operate in an amplifying state when turned on, as shown in Figure 6, the amplifier circuit of the embodiment of the present application may further include: bias circuits 1 to 4 respectively coupled to the gates of transistors S1 to S4, and bias circuits 1 to 4 are respectively used to provide appropriate bias voltages for the corresponding transistors, so that the corresponding transistors operate in an amplifying state when turned on, thereby amplifying the radio frequency signal.

[0070] It is understandable that the above-mentioned bias circuits (bias circuits 1 to 4) and matching circuits (for example, input matching circuits 1 to 2, output matching circuits 1 to 2, inter-stage matching circuits 1 to 2, etc.) can have different circuit implementations based on different circuit performance requirements, and the embodiments of the present application are not limited thereto.

[0071] It is understandable that based on circuit performance requirements, in some embodiments, the above-mentioned bias circuits (bias circuits 1 to 4) and matching circuits (for example, input matching circuits 1 to 2, output matching circuits 1 to 2, inter-stage matching circuits 1 to 2, etc.) in the circuit shown in Figure 6 can be adaptively increased or decreased.

[0072] It is understandable that based on circuit performance requirements, other circuit structures may be added to the circuit shown in FIG6 . For example, in order to achieve DC isolation, a capacitor may be coupled between the first input terminal RFin1 of the amplifier circuit and the gate of the transistor S1 , and / or a capacitor may be coupled between the second input terminal RFin2 of the amplifier circuit and the gate of the transistor S3 .

[0073] In some embodiments, the drain of transistor S2 can be connected to the first output terminal RFout1 of the amplifier circuit via the output matching circuit 1. Specifically, the drain of transistor S2 can be directly connected to one end of the output matching circuit 1, and the other end of the output matching circuit 1 can be directly connected to the first output terminal RFout1. In this case, only the output matching circuit 1 is connected between the drain of transistor S2 and the first output terminal RFout1 of the amplifier circuit. Compared to coupling other devices such as an inductor while still connected to the output matching circuit 1, this allows for better adjustment of the matching of the first output terminal RFout1 of the amplifier circuit according to RF performance requirements, thereby improving circuit performance.

[0074] For similar reasons, the drain of transistor S4 can be connected to the second output terminal RFout2 of the amplifier circuit via the output matching circuit 2. Specifically, the drain of transistor S4 can be directly connected to one end of the output matching circuit 2, and the other end of the output matching circuit 2 can be directly connected to the second output terminal RFout2. In this case, only the output matching circuit 2 is connected between the drain of transistor S4 and the second output terminal RFout2 of the amplifier circuit. Compared to coupling other components such as an inductor while still connected to the output matching circuit 2, this allows for better adjustment of the matching of the second output terminal RFout2 of the amplifier circuit according to RF performance requirements, thereby improving circuit performance.

[0075] The following uses the amplifier circuit shown in FIG6 as an example to exemplarily illustrate the working principles of the amplifier circuits shown in FIG5 and FIG6 of the embodiment of the present application.

[0076] For ease of description, in the embodiment of the present application, the working mode when the amplifier circuit realizes the amplification power division function is referred to as the amplification power division mode, and the working mode when the dual-band dual-open function is referred to as the dual-band dual-open mode.

[0077] When the amplifier circuit of the embodiment of the present application operates in the amplification power splitting mode, as shown in FIG7A , transistors S1, S2, and S4 can be controlled to be turned on, the switch circuit can be turned on, and transistor S3 can be turned off. At this time, the RF signal received by the first input terminal RFin1 of the amplifier circuit can be split into two RF signals after passing through the input matching circuit 1 and transistor S1. One RF signal can be output to the first output terminal RFout1 of the amplifier circuit via the inter-stage matching circuit 1, transistor S2, and output matching circuit 1, and the other RF signal can be output to the second output terminal RFout2 of the amplifier circuit via the switch circuit, inter-stage matching circuit 2, transistor S4, and output matching circuit 2. Transistors S1, S2, and S4 operate in the amplification state, which can realize the amplification function of the amplifier circuit for the RF signal. The RF signal received by the first input terminal RFin1 of the amplifier circuit is split into two RF signals, which are output from the first output terminal RFout1 and the second output terminal RFout2 of the amplifier circuit, respectively, to realize the power splitting function of the amplifier circuit.

[0078] When the amplifier circuit of the present embodiment operates in amplification and power splitting mode, transistors S2 and S4 are active devices, providing reverse isolation between them in the amplification state. This allows for high isolation between the two paths, ensuring that the two RF signals after power splitting meet phase and amplitude consistency requirements, reducing crosstalk between the two RF signals. Furthermore, the interstage matching circuit 1, switch circuit, interstage matching circuit 2, output matching circuit 1, and output matching circuit 2 within the paths also provide isolation, further enhancing the isolation between the two paths.

[0079] When the amplifier circuit of the embodiment of the present application operates in the dual-band dual-on mode, as shown in Figure 7B, the transistors S1 to S4 can be controlled to be turned on, and the switch circuit can be controlled to be turned off. At this time, the RF signal received by the first input terminal RFin1 of the amplifier circuit can be output to the first output terminal RFout1 of the amplifier circuit via the input matching circuit 1, the transistor S1, the inter-stage matching circuit 1, the transistor S2, and the output matching circuit 1. The RF signal received by the second input terminal RFin2 of the amplifier circuit can be output to the second output terminal RFout2 of the amplifier circuit via the input matching circuit 2, the transistor S3, the inter-stage matching circuit 2, the transistor S4, and the output matching circuit 2.

[0080] When the amplifier circuit operates in dual-band, dual-on mode, transistors S1-S4 are active devices, providing reverse isolation between the transistors in the two paths during the amplification state. This results in high isolation between the two paths. Furthermore, output matching circuits 1 and 2 within the paths also provide isolation, further enhancing the isolation between the two paths.

[0081] Optionally, the amplifier circuit in the embodiment of the present application can also implement an amplification and power division function for the RF signal received by the second input terminal RFin2 of the amplifier circuit. At this time, the transistor S1 can be controlled to be turned off, the transistors S2 to S4 can be turned on, and the switching circuit can be turned on, so as to amplify and power-divide the RF signal received by the second input terminal RFin2 of the amplifier circuit into two RF signals, which are output from the first output terminal RFout1 and the second output terminal RFout2 of the amplifier circuit respectively. The specific working principle can be referred to Figure 7A and will not be repeated here.

[0082] Optionally, the amplifier circuit of the embodiment of the present application may also have a single-pass function. In the single-pass mode for realizing the single-pass function, transistors S1 and S2 may be controlled to be turned on, while transistors S3, S4, and the switch circuit may be turned off, so that the RF signal received at the first input terminal RFin1 of the amplifier circuit is amplified and output from the first output terminal RFout1 of the amplifier circuit, thereby realizing single-input and single-output of the RF signal. Similarly, transistors S3 and S4 may be controlled to be turned on, while transistors S1, S2, and the switch circuit may be turned off, so that the RF signal received at the second input terminal RFin2 of the amplifier circuit is amplified and output from the second output terminal RFout2 of the amplifier circuit. In the single-pass mode, the amplifier circuit of the embodiment of the present application amplifies the RF signal through active devices such as transistors, without the additional insertion loss of passive devices, thereby improving the performance of the amplifier circuit in the single-pass mode.

[0083] A simplified diagram of the operating principle of the amplifier circuits shown in Figures 5 and 6 is shown in Figure 7C. In the power-splitting mode, the RF signal received at the first input terminal RFin1 of the amplifier circuit can be amplified and split into two RF signals, which are outputted from the first output terminal RFout1 and the second output terminal RFout2 of the amplifier circuit, respectively. Alternatively, the RF signal received at the second input terminal RFin2 of the amplifier circuit can be amplified and split into two RF signals, which are outputted from the first output terminal RFout1 and the second output terminal RFout2 of the amplifier circuit, respectively. In the dual-band dual-on mode, the RF signal received at the first input terminal RFin1 of the amplifier circuit can be amplified and outputted from the first output terminal RFout1 of the amplifier circuit, and the RF signal received at the second input terminal RFin2 of the amplifier circuit can be amplified and outputted from the second output terminal RFout2 of the amplifier circuit. In the single-pass mode, the RF signal received at the first input terminal RFin1 of the amplifier circuit can be amplified and outputted from the first output terminal RFout1 of the amplifier circuit, and the RF signal received at the second input terminal RFin2 of the amplifier circuit can be amplified and outputted from the second output terminal RFout2 of the amplifier circuit.

[0084] In the amplifier circuits shown in Figures 5 and 6, transistors S1-S4 and a switch circuit implement RF signal amplification and power division, as well as dual-band dual-opening functionality. This eliminates the need for components such as inductors that occupy a large chip area, thereby reducing the size and cost of the amplifier chip containing the amplifier circuit. Furthermore, the amplifier circuits utilize active components such as transistors for amplification and power division, eliminating the additional insertion loss of passive components, thereby increasing the gain of the amplifier circuit.

[0085] The embodiment of the present application also provides another amplifier circuit, which differs from the amplifier circuits shown in FIG. 5 and FIG. 6 mainly in that a switch circuit is coupled between the drain of the transistor S2 and the drain of the transistor S4 .

[0086] For example, in the amplifier circuit shown in FIG8 , the switch circuit of the amplifier circuit shown in FIG6 is coupled between the drain of transistor S2 and the drain of transistor S4. In the circuit shown in FIG8 , the switch circuit is used to control the conduction or disconnection between the drain of transistor S2 and the drain of transistor S4.

[0087] In some embodiments, the drain of transistor S2 can be connected to the first output terminal RFout1 of the amplifier circuit via the output matching circuit 1. Specifically, the drain of transistor S2 can be directly connected to one end of the output matching circuit 1, and the other end of the output matching circuit 1 can be directly connected to the first output terminal RFout1. In this case, only the output matching circuit 1 is connected between the drain of transistor S2 and the first output terminal RFout1 of the amplifier circuit. Compared to coupling other devices such as an inductor while still connected to the output matching circuit 1, this allows for better adjustment of the matching of the first output terminal RFout1 of the amplifier circuit according to RF performance requirements, thereby improving circuit performance.

[0088] For similar reasons, the drain of transistor S4 can be connected to the second output terminal RFout2 of the amplifier circuit via the output matching circuit 2. Specifically, the drain of transistor S4 can be directly connected to one end of the output matching circuit 2, and the other end of the output matching circuit 2 can be directly connected to the second output terminal RFout2. In this case, only the output matching circuit 2 is connected between the drain of transistor S4 and the second output terminal RFout2 of the amplifier circuit. Compared to coupling other components such as an inductor while still connected to the output matching circuit 2, this allows for better adjustment of the matching of the second output terminal RFout2 of the amplifier circuit according to RF performance requirements, thereby improving circuit performance.

[0089] The working principle of the amplifier circuit shown in FIG8 is exemplarily described as follows.

[0090] When the amplifier circuit of the embodiment of the present application operates in the amplification power splitting mode, as shown in FIG9A , transistors S1 and S2 can be controlled to be turned on, the switch circuit can be turned on, and transistors S3 and S4 can be turned off. At this time, the RF signal received by the first input terminal RFin1 of the amplifier circuit can be split into two RF signals after passing through the input matching circuit 1, transistor S1, the inter-stage matching circuit 1, and transistor S2. One RF signal can be output to the first output terminal RFout1 of the amplifier circuit via the output matching circuit 1, and the other RF signal can be output to the second output terminal RFout2 of the amplifier circuit via the switch circuit and the output matching circuit 2. Transistors S1 and S2 operate in the amplification state, which can realize the amplification function of the amplifier circuit for the RF signal. The RF signal received by the first input terminal RFin1 of the amplifier circuit is split into two RF signals, which are output from the first output terminal RFout1 of the amplifier circuit and the second output terminal RFout2 of the amplifier circuit, respectively, to realize the power splitting function of the amplifier circuit.

[0091] When the amplifier circuit operates in the amplification power splitting mode, the interstage matching circuit 1, the switch circuit, the interstage matching circuit 2, the output matching circuit 1 and the output matching circuit 2 in the two paths have an isolation function, which can improve the isolation between the two paths.

[0092] When the amplifier circuit of the embodiment of the present application operates in the dual-band dual-on mode, as shown in Figure 9B, the transistors S1 to S4 can be controlled to be turned on, and the switch circuit can be controlled to be turned off. At this time, the RF signal received by the first input terminal RFin1 of the amplifier circuit can be output to the first output terminal RFout1 of the amplifier circuit via the input matching circuit 1, the transistor S1, the inter-stage matching circuit 1, the transistor S2, and the output matching circuit 1. The RF signal received by the second input terminal RFin2 of the amplifier circuit can be output to the second output terminal RFout2 of the amplifier circuit via the input matching circuit 2, the transistor S3, the inter-stage matching circuit 2, the transistor S4, and the output matching circuit 2.

[0093] When the amplifier circuit operates in dual-band, dual-on mode, transistors S1-S4 are active devices, providing reverse isolation between the transistors in the two paths during the amplification state. This results in high isolation between the two paths. Furthermore, output matching circuits 1 and 2 within the paths also provide isolation, further enhancing the isolation between the two paths.

[0094] Optionally, the amplifier circuit of the embodiment of the present application can also realize the amplification and power division function of the radio frequency signal received by the second input terminal RFin2 of the amplifier circuit. At this time, the transistor S1 and the transistor S2 can be controlled to be turned off, the transistor S3 and the transistor S4 can be turned on, and the switching circuit is turned on, so that the radio frequency signal received by the second input terminal RFin2 of the amplifier circuit is amplified and power-divided into two radio frequency signals, which are output from the first output terminal RFout1 and the second output terminal RFout2 of the amplifier circuit respectively. The specific working principle can be referred to Figure 9A and will not be repeated here.

[0095] Optionally, the amplifier circuit of the embodiment of the present application may also operate in a single-pass mode. In this case, transistors S1 and S2 may be controlled to be turned on, while transistors S3, S4, and the switch circuit are turned off, thereby amplifying the RF signal received at the first input terminal RFin1 of the amplifier circuit and outputting it from the first output terminal RFout1 of the amplifier circuit. Similarly, transistors S3 and S4 may be controlled to be turned on, while transistors S1, S2, and the switch circuit are turned off, thereby amplifying the RF signal received at the second input terminal RFin2 of the amplifier circuit and outputting it from the second output terminal RFout2 of the amplifier circuit.

[0096] In the amplifier circuit shown in Figure 8, transistors S1-S4 and a switch circuit implement RF signal amplification and power division, as well as dual-band dual-opening functionality. This eliminates the need for components such as inductors that occupy a large chip area, thereby reducing the size and cost of the amplifier chip containing the amplifier circuit. Furthermore, the amplifier circuit uses active components such as transistors for amplification and power division, eliminating the additional insertion loss of passive components, thereby increasing the gain of the amplifier circuit.

[0097] In some embodiments, while ensuring that the amplifier circuit can realize the amplification power division function and the dual-frequency dual-open function, the structure of the amplifier circuit in the above embodiment can be simplified. For example, the transistor S1 and the transistor S3 in the amplifier circuit in the above embodiment can be omitted.

[0098] Taking the amplifier circuit shown in Figure 6 with transistor S1 and transistor S3 omitted as an example, the amplifier circuit structure after omitting transistor S1 and transistor S3 is shown in Figure 10. Among them, the first input terminal RFin1 of the amplifier circuit is coupled to the source of transistor S2, and the source of transistor S2 is coupled to the ground GND through the source matching circuit 1; the second input terminal RFin2 of the amplifier circuit is coupled to the source of transistor S4, and the source of transistor S4 is coupled to the ground GND through the source matching circuit 2. At this time, the inter-stage matching circuit 1 and the inter-stage matching circuit 2 are omitted, the source matching circuit 1 can be used to adjust the source matching of transistor S2, and the source matching circuit 2 can be used to adjust the source matching of transistor S4. The working principle of the amplifier circuit shown in Figure 10 can refer to the description of the working principle of the amplifier circuit shown in Figure 6, and will not be repeated here.

[0099] The amplifier circuit shown in FIG8 omitting transistors S1 and S3 is implemented as shown in FIG11 . For circuit connection relationships, refer to the corresponding description in FIG10 and are not repeated here. The operating principle of the amplifier circuit shown in FIG11 can be referred to the operating principle of the amplifier circuit shown in FIG8 and is not repeated here.

[0100] In some embodiments, if the amplifier circuit is required to have amplification and power division functions but is not required to have dual-frequency dual-open functions, the second output terminal RFout2 and the transistor S3 in the amplifier circuit of the above embodiment can be omitted.

[0101] Taking the amplifier circuit shown in FIG6 as an example, with the second output terminal RFout2 and transistor S3 omitted, the amplifier circuit structure after omitting transistor S3 is shown in FIG12 . The operating principle of the amplifier circuit shown in FIG12 can be referenced to FIG7A and its related description, and will not be repeated here. The amplifier circuit structure after omitting the second output terminal RFout2 and transistor S3 shown in FIG8 can be referenced to FIG12 , with the main difference being the different coupling position of the switch circuit. The operating principle of this amplifier circuit can be referenced to FIG9A and its related description, and will not be repeated here.

[0102] The implementation structure of the amplifier circuit shown in FIG10 after omitting the second output terminal RFout2 and the transistor S3 is shown in FIG13 . The operating principle of the amplifier circuit shown in FIG13 can be referred to FIG7A and its related description, which are not repeated here. The implementation structure of the amplifier circuit shown in FIG11 after omitting the second output terminal RFout2 and the transistor S3 can be referred to FIG13 . The main difference lies in the different coupling position of the switch circuit. The operating principle of the amplifier circuit can be referred to FIG9A and its related description, which are not repeated here.

[0103] In some embodiments, the above-mentioned amplifier circuit provided in the embodiments of the present application may further include a controller, which may be respectively coupled to the transistors and the switch circuit in the amplifier circuit of the above-mentioned embodiment to control the conduction or shutdown of the transistors and the switch circuit.

[0104] Taking the amplifier circuit shown in FIG6 as an example, the amplifier circuit may include a controller. The controller may be coupled to the gates of transistors S1 through S4, respectively, to control the on / off state of transistors S1 through S4 in different operating modes of the amplifier circuit. The controller may also be coupled to the control terminal of a switching circuit to control the on / off state of the switching circuit in different operating modes of the amplifier circuit. For example, if the switching circuit is implemented using a transistor, the controller may be coupled to the gate of the transistor to control the on / off state of the transistor.

[0105] It is understandable that the functions of the above controller can also be split into two controllers or multiple controllers for execution, for example, one controller controls the on or off of the transistor, and the other controller controls the on or off of the switch circuit.

[0106] When the amplifier circuit is applied to an electronic device, the controller of the amplifier circuit can be coupled to the processor of the electronic device. The processor can send a control instruction to the controller to indicate the operating mode of the amplifier circuit. The controller can control the conduction or shutdown of the transistor and the switch circuit in the amplifier circuit of the above embodiment based on the operating mode indicated by the control instruction.

[0107] An embodiment of the present application provides an amplifier chip, comprising an amplifier circuit provided by any of the above-mentioned embodiments of the present application.

[0108] An embodiment of the present application further provides an electronic device, comprising the amplifier circuit provided by any of the above embodiments of the present application or comprising the above amplifier chip.

[0109] In the embodiments of the present application, "at least one" refers to one or more, and "more" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Among them, A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can represent: a, b, c, a and b, a and c, b and c or a and b and c, where a, b, c can be single or multiple.

[0110] Those skilled in the art will appreciate that the various units and algorithm steps described in the embodiments disclosed herein can be implemented using a combination of electronic hardware, computer software, and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0111] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0112] In the several embodiments provided in this application, if any function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of this application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory; hereinafter referred to as: ROM), random access memory (Random Access Memory; hereinafter referred to as: RAM), magnetic disk or optical disk, and other media that can store program code.

[0113] The above description is merely a specific embodiment of the present application. Any person skilled in the art may easily conceive of variations or substitutions within the technical scope disclosed in this application, and such variations or substitutions shall be within the scope of protection of this application. The scope of protection of this application shall be subject to the scope of protection of the claims.

Claims

1. An amplifier circuit, characterized in that, Comprising: A first transistor, a second transistor, a third transistor, a fourth transistor, and a switching circuit; wherein, A first input terminal of the amplifier circuit is coupled to a gate of the first transistor; a source of the first transistor is coupled to ground, and a drain is coupled to a source of the second transistor; a drain of the second transistor is coupled to a first output terminal of the amplifier circuit and is coupled to a voltage providing terminal; A drain of the third transistor is coupled to a second output terminal of the amplifier circuit and is coupled to the voltage providing terminal; The source of the second transistor is coupled to the source of the third transistor through the switching circuit; A second input terminal of the amplifier circuit is coupled to a gate of the fourth transistor, a source of the fourth transistor is coupled to ground, and a drain is coupled to the source of the third transistor; The switching circuit is configured to control conduction or disconnection between the source of the second transistor and the source of the third transistor.

2. The circuit according to claim 1, wherein The drain of the second transistor is coupled to the first output terminal of the amplifier circuit, including: The drain of the second transistor is connected to the first output terminal of the amplifier circuit through a matching circuit.

3. The circuit according to claim 1, characterized in that, Further comprising: A controller; The controller is configured to: in a first mode, control the first transistor, the second transistor, the third transistor, and the switching circuit to conduct, and control the fourth transistor to turn off.

4. The circuit according to claim 3, wherein Further comprising: The amplifier circuit is configured to: in the first mode, a first signal received at the first input terminal is split into a first sub-signal and a second sub-signal after being amplified by the first transistor, the first sub-signal is output to the first output terminal through the second transistor, the second sub-signal is output to the second output terminal through the switching circuit and the third transistor, and the first sub-signal does not pass through the switching circuit.

5. The circuit according to claim 1, characterized in that Further comprising: A controller; The controller is configured to: in a second mode, control the first transistor, the second transistor, the third transistor, and the fourth transistor to conduct, and control the switching circuit to turn off.

6. The circuit according to claim 5, wherein Further comprising: The amplifier circuit is configured to: in the second mode, a second signal in a first frequency band received at the first input terminal is output to the first output terminal through the first transistor and the second transistor, and a third signal in a second frequency band received at the second input terminal is output to the second output terminal through the fourth transistor and the third transistor.

7. The circuit according to any one of claims 1 to 6, characterized in that, The switching circuit includes: a switch; A first terminal of the switch is coupled to the source of the second transistor, and a second terminal is coupled to the source of the third transistor.

8. The circuit according to claim 7, wherein The switch is implemented by a transistor.

9. An amplifier circuit, characterized in that, Comprising: A first transistor, a second transistor, a third transistor, the fourth transistor, and a switching circuit; wherein, A first input terminal of the amplifier circuit is coupled to a gate of the first transistor; a source of the first transistor is coupled to ground, and a drain is coupled to a source of the second transistor; a drain of the second transistor is connected to the first output terminal of the amplifier circuit through a matching circuit and is coupled to a voltage providing terminal; A drain of the third transistor is coupled to a second output terminal of the amplifier circuit and is coupled to the voltage providing terminal; The drain of the second transistor is coupled to the drain of the third transistor through the switching circuit; The second input terminal of the amplifying circuit is coupled to the gate of the fourth transistor. The source of the fourth transistor is coupled to ground, and the drain is coupled to the source of the third transistor; The switching circuit is used to control conduction or disconnection between the drain of the second transistor and the drain of the third transistor.

10. The circuit according to claim 9, characterized in that, It further includes: A controller; The controller is configured to: in the first mode, control the first transistor, the second transistor, and the switching circuit to conduct, and control the third transistor and the fourth transistor to turn off.

11. The circuit according to claim 10, wherein It further includes: The amplifying circuit is configured to: in the first mode, the first signal received at the first input terminal is amplified by the first transistor and the second transistor and then power-divided into a first sub-signal and a second sub-signal. The first sub-signal is output to the first output terminal through the matching circuit, and the second sub-signal is output to the second output terminal through the switching circuit. The first sub-signal does not pass through the switching circuit.

12. The circuit according to claim 9, wherein It further includes: A controller; The controller is configured to: in the second mode, control the first transistor, the second transistor, the third transistor, and the fourth transistor to conduct, and control the switching circuit to disconnect.

13. The circuit according to claim 12, wherein It further includes: The amplifying circuit is configured to: in the second mode, the second signal in the first frequency band received at the first input terminal passes through the first transistor, the second transistor, and the matching circuit and is output to the first output terminal. The third signal in the second frequency band received at the second input terminal passes through the fourth transistor and the third transistor and is output to the second output terminal.

14. The circuit according to any one of claims 9 to 13, characterized in that The switching circuit includes: a switch; The first terminal of the switch is coupled to the drain of the second transistor, and the second terminal is coupled to the drain of the third transistor.

15. The circuit according to claim 14, wherein The switch is implemented by a transistor.

16. An amplifier chip, characterized in that, It includes the amplifying circuit according to any one of claims 1 to 15.

17. An electronic device, characterized in that, It includes the amplifying circuit according to any one of claims 1 to 15, or includes the amplifier chip according to claim 16.

18. The electronic device according to claim 17, wherein It further includes: A first antenna; The first input terminal of the amplifying circuit is connected to the first antenna; The amplifying circuit is configured to receive, in the first mode, a radio frequency signal in the first frequency band transmitted by the first antenna through the first input terminal.

19. The electronic device according to claim 17, wherein It further includes: A second antenna; The first input terminal and the second input terminal of the amplifying circuit are respectively connected to the first antenna; The amplifying circuit is configured to receive, in the second mode, a radio frequency signal in the second frequency band transmitted by the second antenna through the first input terminal, and receive a radio frequency signal in the third frequency band transmitted by the second antenna through the second input terminal.

20. The electronic device according to claim 17, wherein It further includes: A third antenna and a fourth antenna; The first input terminal of the amplifying circuit is connected to the third antenna, and the second input terminal of the amplifying circuit is connected to the fourth antenna; The amplifying circuit is configured to receive, in the second mode, a radio frequency signal in the fourth frequency band transmitted by the third antenna through the first input terminal, and receive a radio frequency signal in the fifth frequency band transmitted by the fourth antenna through the second input terminal.

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