Light-emitting element drive device

Abstract

A light-emitting element driving device 1 outputs a current signal for driving a light-emitting element 2, and includes a load 10, a differential circuit 20, a balanced-to-unbalanced conversion circuit 30, and a dummy load 40. The balanced-to-unbalanced conversion circuit 30 has a first input end 31, a second input end 32, a first output end 33, and a second output end 34. The first input end 31 is connected to a first node N1. The second input end 32 is connected to a second node N2. The first output terminal 33 is connected to the light-emitting element 2. The second output end 34 is connected to the dummy load 40. The balanced-to-unbalanced conversion circuit 30 includes a balun 50. The balun 50 has a configuration in which a first inductor and a second inductor are electromagnetically coupled to each other.

Description

Light emitting element driving device

[0001] The present invention relates to a light emitting element driving device.

[0002] Patent Documents 1 to 3 disclose inventions of devices that output current signals for driving light-emitting elements (e.g., laser diodes). The light-emitting element driving devices described in these documents include a load and a differential circuit, input a differential voltage signal to the differential circuit, output a current signal corresponding to this differential voltage signal, and drive the light-emitting element using this current signal. However, conventional light-emitting element driving devices, including those described in these documents, are difficult to use in, for example, computer network systems, which are expected to become more widespread in the future. This will be explained below using a data center server system as an example.

[0003] Current data center server systems include multiple racks, each containing multiple types of resources such as a CPU, GPU, and memory. Data transmission and reception occurs both within each rack and between different racks. Data transmission and reception within each rack is short distance, allowing connection using PCIe (Peripheral Component Interconnect Express), which allows for low-latency communication. However, data transmission and reception between different racks requires a maximum transmission distance of approximately 30 meters, so Ethernet (registered trademark) is used, but this has a large latency. In this configuration, when the processing capacity of a certain rack is at its limit, even if an attempt is made to distribute processing to another rack with spare processing capacity, the large latency in data transmission and reception between these two racks makes it difficult to improve processing capacity.

[0004] In server systems that are expected to become more widespread in the future, each rack will be a resource pool that collects one type of resource, such as a CPU, GPU, or memory, and the racks will be connected with low latency. Since all resource pools can be connected with each other with low latency, there will be no resources with excess processing capacity, making it possible to maximize processing capacity. This new server system is called resource-distributed computing, etc. In order to further improve processing capacity, higher speeds and lower power consumption will also be required.

[0005] PCIe 6.0 has been released as a new standard to meet the various requirements of server systems. This standard aims to achieve high speeds and low latency by adopting a lightweight forward error correction (FEC) method (3-way interleaved single symbol correction). This standard also requires a lower pre-FEC symbol error rate (SER) than conventional standards.

[0006] Furthermore, in conventional PCIe transmission, data is transmitted over copper wiring, but it is difficult to achieve the low-latency transmission over medium distances of approximately 30 meters required for resource-distributed computing. Therefore, it has been proposed to achieve medium-distance transmission by transmitting data via optical communication instead of copper wiring. However, optical communication has issues such as high power consumption and latency due to the use of a DSP. The DSP is used as an equalizer on the transmitting side, and as a distortion correction circuit on the receiving side.

[0007] When a DSP is not used to achieve low power consumption and low latency, it is important to suppress degradation of the eye of the transmission signal. Meanwhile, PCIe 6.0 requires a smaller pre-FEC SER than conventional standards. This requires suppressing noise components in the eye of optical communication signals. Furthermore, this requires a large amplitude optical transmission signal in order to improve the signal-to-noise ratio on the optical signal receiving side of optical communication.

[0008] US Patent Application Publication No. 2022 / 0190554 US Patent No. 9,161,403 US Patent No. 9,570,917

[0009] As explained above using a data center server system as an example, in view of the future direction of signal transmission, it is important that various requirements be met in signal transmission via optical communication. However, the light-emitting element driving devices described in Patent Documents 1 to 3 have difficulty meeting these requirements.

[0010] The light-emitting element driver described in Patent Document 1 uses a PMOS transistor operating in the saturation region as a load, making it difficult to achieve high-speed feedback tracking, resulting in a dull rising waveform (rise current waveform) of the output current signal. When the light-emitting element is a vertical cavity surface-emitting laser diode (VCSEL), the output voltage rises due to the differential resistance of the VCSEL when the output current signal rises. When the output voltage rises, the Vds of the PMOS transistor decreases, causing an instantaneous decrease in the PMOS transistor current. However, the feedback loop bandwidth does not increase beyond several GHz, making it impossible to control the PMOS transistor current maintenance in time. This transient effect reduces the current driving power of the PMOS transistor current source, resulting in a dull rising current waveform. When the output current signal is a PAM4 signal, this dulling of the rise current waveform leads to a collapse of the Top eye, one of the three eyes (Top, Middle, and Bottom). The effect of this blunting of the rise current waveform becomes more pronounced as the signal amplitude increases. Therefore, it is difficult for the light emitting element driving device described in Patent Document 1 to meet the demand for high speed and large amplitude.

[0011] Furthermore, Patent Document 1 describes a circuit configuration for addressing the problem of blunted rise current waveforms. However, this circuit includes multiple driver circuits, multiple delay circuits that delay signals to adjust output timing, and multiple distortion correction circuits that correct duty cycle distortion, resulting in high power consumption and large delays. Furthermore, this circuit requires a retimer in the upstream stage, which adds to the power consumption and delays caused by the retimer.

[0012] The light emitting element driving device described in Patent Document 2 has a small output impedance, making it difficult to meet the demand for large amplitude operation. The light emitting element driving device described in Patent Document 3 uses a PMOS transistor that operates in a linear region as a load, making it difficult to achieve high-speed feedback tracking, making it difficult to meet the demand for higher speeds. Furthermore, the light emitting element driving device described in Patent Document 3 has a small output impedance, making it difficult to meet the demand for large amplitude operation.

[0013] As described above, the light emitting element driving devices described in Patent Documents 1 to 3 cannot meet the various requirements for future signal transmission by optical communications.

[0014] The present invention has been made to solve the above problems, and has as its object to provide a light emitting element driving device that can meet various requirements for signal transmission by future optical communications.

[0015] The light emitting element driving device of the present disclosure is a device that outputs a current signal for driving a light emitting element. A first aspect of the light-emitting element driving device of the present invention includes: (1) a load provided between a first reference potential supply terminal that supplies a first reference potential and a first node and a second node, and that supplies a current to each of the first node and the second node; (2) a differential circuit provided between a second reference potential supply terminal that supplies a second reference potential lower than the first reference potential and the first node and the second node, and that outputs a signal from the first node and the second node according to an input differential voltage signal; (3) a balanced-unbalanced conversion circuit having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, including a balun in which the first inductor and the second inductor are electromagnetically inductively coupled to each other, the first inductor being provided between the first input terminal and the first output terminal, and the second inductor being provided between the second input terminal and the second output terminal, the first input terminal being connected to the first node, the second input terminal being connected to the second node, and that outputs a current signal from the first output terminal; and (4) a dummy load provided between the second output terminal of the balanced-unbalanced conversion circuit and the reference potential supply terminal.

[0016] In a second aspect of the light-emitting element driving device of the present disclosure, in addition to the first aspect, the coupling coefficient between the first inductor and the second inductor of the balun, or the frequency characteristics of the signal path from the second input terminal of the balun through the second inductor and the second output terminal to the dummy load, are variable.

[0017] In a third aspect of the light-emitting element driving device of the present disclosure, in addition to the second aspect, the balanced-to-unbalanced conversion circuit further includes a variable capacitance section provided between an intermediate node of the second inductor and the reference potential supply end.

[0018] In a fourth aspect of the light-emitting element driving device of the present disclosure, in addition to the second or third aspect, the balanced-unbalanced conversion circuit further includes a third inductor provided between the first input terminal and the first inductor, a fourth inductor provided between the second input terminal and the second inductor, and a variable capacitance section provided between a node between the second inductor and the fourth inductor and a reference potential supply terminal.

[0019] In a fifth aspect of the light-emitting element driving device of the present disclosure, in addition to any of the second to fourth aspects, the balanced-unbalanced conversion circuit further includes a variable impedance element arranged in parallel with the second inductor between the second input terminal and the second output terminal.

[0020] In a sixth aspect of the light-emitting element driving device of the present disclosure, in addition to any of the second to fifth aspects, the balanced-unbalanced conversion circuit further includes a variable capacitance section arranged in parallel with the dummy load between the second output terminal and the reference potential supply terminal.

[0021] In a seventh aspect of the light-emitting element driving device of the present disclosure, in addition to any of the second to sixth aspects, the balanced-unbalanced conversion circuit further includes a variable capacitance section provided between the second input terminal and the reference potential supply terminal.

[0022] In an eighth aspect of the light-emitting element driving device of the present disclosure, in addition to any of the first to seventh aspects, the differential circuit includes a first NPN bipolar transistor having a collector connected to a first node, a second NPN bipolar transistor having a collector connected to a second node, and a tail current source provided between the emitters of the first NPN bipolar transistor and the second NPN bipolar transistor and a second reference potential supply terminal, and a differential voltage signal is input to the bases of the first NPN bipolar transistor and the second NPN bipolar transistor.

[0023] In a ninth aspect of the light-emitting element driving device of the present disclosure, in addition to any of the first to seventh aspects, the differential circuit includes a first NPN bipolar transistor having a collector connected to a first node, a second NPN bipolar transistor having a collector connected to a second node, a first tail current source provided between the emitter of the first NPN bipolar transistor and a second reference potential supply terminal, a second tail current source provided between the emitter of the second NPN bipolar transistor and the second reference potential supply terminal, and a resistor provided between the emitter of the first NPN bipolar transistor and the emitter of the second NPN bipolar transistor, and a differential voltage signal is input to the bases of the first NPN bipolar transistor and the second NPN bipolar transistor, respectively.

[0024] In a tenth aspect of the light-emitting element driving device of the present disclosure, in addition to any of the first to ninth aspects, the load includes a first current source provided between the first reference potential supply terminal and the first node, and a second current source provided between the first reference potential supply terminal and the second node.

[0025] In an eleventh aspect of the light-emitting element driving device of the present disclosure, in addition to any of the first to ninth aspects, the load includes a first resistor provided between the first reference potential supply terminal and the first node, and a second resistor provided between the first reference potential supply terminal and the second node.

[0026] In a twelfth aspect of the light emitting element driving device of the present disclosure, in addition to any one of the first to eleventh aspects, the dummy load has impedance characteristics equivalent to those of the light emitting element.

[0027] In a thirteenth aspect of the light-emitting element driving device of the present disclosure, in addition to the twelfth aspect, the dummy load includes a resistor and a diode connected in series with each other.

[0028] The light-emitting element driving device of the present disclosure includes a load connected to a first reference potential supply terminal, a differential circuit connected to a second reference potential supply terminal and having a first transistor and a second transistor for differential input, a driving current output terminal for the light-emitting element, a dummy load, and a balanced-to-unbalanced conversion circuit having a first input terminal connected to a first node between the load and the first transistor, a second input terminal connected to a second node between the load and the second transistor, a first output terminal connected to the driving current output terminal, and a second output terminal connected to the dummy load.

[0029] According to the present invention, it is possible to provide a light emitting element driving device that can meet various requirements for future signal transmission by optical communication.

[0030] FIG. 1 is a diagram showing an example of the configuration of the light-emitting element driving device 1. FIG. 2 is a diagram showing an example of the configuration of the balanced-unbalanced conversion circuit 30. FIG. 3 is a diagram showing an example of the configuration of the dummy load 40. FIGS. 4A and 4B are diagrams for schematically explaining signal waveforms of the balanced-unbalanced conversion circuit 30. FIG. 5 is a diagram showing another example of the configuration of the balanced-unbalanced conversion circuit 30. FIG. 6 is a diagram showing another example of the configuration of the balanced-unbalanced conversion circuit 30. FIG. 7 is a diagram showing another example of the configuration of the balanced-unbalanced conversion circuit 30. FIG. 8 is a diagram showing another example of the configuration of the balanced-unbalanced conversion circuit 30. FIG. 9 is a diagram showing another example of the configuration of the balanced-unbalanced conversion circuit 30. FIG. 10 is a diagram showing another example of the configuration of the light-emitting element driving device 1. FIG. 11 is a diagram showing another example of the configuration of the light-emitting element driving device 1. FIG. 12 is a diagram showing another example of the configuration of the light-emitting element driving device 1. FIG. 13 is a diagram showing another example of the configuration of the light-emitting element driving device 1.

[0031] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are designated by the same reference numerals, and duplicated explanations will be omitted.

[0032] 1 is a diagram showing an example of the configuration of a light-emitting element driving device 1. The light-emitting element driving device 1 is a device that outputs a current signal for driving a light-emitting element 2, and includes a load 10, a differential circuit 20, a balanced-to-unbalanced conversion circuit 30, and a dummy load 40. The light-emitting element 2 may be any element, but is preferably a semiconductor light-emitting element, and particularly a laser diode. Furthermore, the light-emitting element 2 is preferably a VCSEL (Vertical Cavity Surface Emitting Laser) among laser diodes.

[0033] The load 10 is provided between a first reference potential supply terminal V1 that supplies a first reference potential (e.g., a power supply potential) and a first node N1 and a second node N2. The load 10 supplies a current to each of the first node N1 and the second node N2. The load 10 may be an active load or a passive load.

[0034] The differential circuit 20 is provided between a second reference potential supply terminal V2 that supplies a second reference potential and the first and second nodes N1 and N2. The second reference potential is lower than the first reference potential, e.g., ground potential. The differential circuit 20 outputs signals corresponding to the input differential voltage signals (INP, INN) from the first and second nodes N1 and N2. The differential circuit 20 may have any configuration. The differential circuit 20 shown in this figure includes a first NPN transistor 21, a second NPN transistor 22, and a tail current source 23. The first NPN transistor 21 and the second NPN transistor 22 have the same characteristics. The collector of the first NPN transistor 21 is connected to the first node N1. The collector of the second NPN transistor 22 is connected to the second node N2. The tail current source 23 is provided between the emitters of the first NPN transistor 21 and the second NPN transistor 22 and the second reference potential supply terminal V2. A differential voltage signal (INP, INN) is input to the bases of the first NPN transistor 21 and the second NPN transistor 22. The NPN transistors are NPN bipolar transistors.

[0035] The balanced-to-unbalanced conversion circuit 30 has a first input terminal 31, a second input terminal 32, a first output terminal 33 (drive current output terminal), and a second output terminal 34. The first input terminal 31 is connected to a first node N1. The second input terminal 32 is connected to a second node N2. The first output terminal 33 is connected to the light-emitting element 2. The second output terminal 34 is connected to a dummy load 40.

[0036] The dummy load 40 is provided between the second output terminal 34 of the balanced-unbalanced conversion circuit 30 and the reference potential supply terminal. This reference potential supply terminal may be common to the second reference potential supply terminal V2, or may be different. The dummy load 40 has impedance characteristics equivalent to those of the light-emitting element 2. The impedance of the dummy load 40 may be substantially the same as the impedance of the light-emitting element 2. The impedance of the dummy load 40 may be 90% or more and 110% or less of the impedance of the light-emitting element 2.

[0037] FIG. 2 is a diagram showing an example configuration of a balanced-unbalanced conversion circuit 30. The balanced-unbalanced conversion circuit 30 includes a balun 50. The balun 50 has a configuration in which a first inductor 51 and a second inductor 52 are electromagnetically inductively coupled to each other. The first inductor 51 is provided between a first input terminal 31 and a first output terminal 33. The second inductor 52 is provided between a second input terminal 32 and a second output terminal 34. The balanced-unbalanced conversion circuit 30 including the balun 50 receives balanced signals as input to the first input terminal 31 and the second input terminal 32 and outputs an unbalanced signal corresponding to the balanced signal from the first output terminal 33. The balanced signals input to the first input terminal 31 and the second input terminal 32 correspond to differential voltage signals (INP, INN) input to the bases of the first NPN transistor 21 and the second NPN transistor 22 of the differential circuit 20, respectively. The unbalanced signal output from the first output terminal 33 is a current signal that drives the light-emitting element 2.

[0038] 3 is a diagram showing an example configuration of a dummy load 40. The dummy load 40 has impedance characteristics equivalent to those of the light-emitting element 2. When the light-emitting element 2 is a laser diode, the dummy load 40 can be configured by connecting a resistor 41 and diodes 42 and 43 in series. The diodes 42 and 43 can be configured by connecting the collector and base of an NPN transistor to each other. By providing such a dummy load 40, the left-right symmetry of the circuit operation can be improved, the pattern dependency of the power supply current can be suppressed, and power supply noise can be suppressed.

[0039] 4A and 4B are diagrams for schematically illustrating signal waveforms of the balanced-unbalanced conversion circuit 30. FIG. 4A schematically illustrates the waveforms of a signal (S31) at the first input terminal 31 and a signal (S32) at the second input terminal 32 of the balanced-unbalanced conversion circuit 30. FIG. 4B schematically illustrates the waveforms of the signal (S31) at the first input terminal 31 and an inverted signal (S32') of the signal at the second input terminal 32. In this diagram, the waveform of the signal (S31) at the first input terminal 31 is indicated by a solid line, and the waveform of the signal (S32) at the second input terminal 32 and the waveform of the inverted signal (S32') are indicated by dashed lines. It is easy to improve the frequency characteristics of the differential circuit 20 in the light-emitting element driving device 1. Therefore, the waveforms of the signals at the first node N1 and the second node N2, i.e., the waveforms of the signals at the first input terminal 31 and the second input terminal 32 of the balanced-unbalanced conversion circuit 30, have a blunted rising edge and an emphasized falling edge.

[0040] The signal output from the first output terminal 33 of the balanced-unbalanced conversion circuit 30 is designated as (S33). This signal (S33) is obtained by superimposing a signal (S32') obtained by inverting the signal input to the second input terminal 32 on the signal (S31) input to the first input terminal 31. The waveform of the signal (S32') obtained by inverting the signal input to the second input terminal 32 has an emphasized rising edge and a blunted falling edge. Therefore, the waveform of the signal (S33) output from the first output terminal 33 is a waveform in which only the rising edge is emphasized (pre-emphasized). Hereinafter, this emphasis on the rising edge will be referred to as rise edge emphasis.

[0041] This rise edge emphasis can increase the eye opening of the current signal output from the first output terminal 33. When the current signal output from the first output terminal 33 is a PAM4 signal (PAM: Pulse Amplitude Modulation), collapse of the Top eye opening can be suppressed among the three eyes, Top, Middle, and Bottom.

[0042] The effect of this rise edge emphasis can be adjusted by providing other passive elements in addition to the balun 50 in the balanced-to-unbalanced conversion circuit 30. Furthermore, by making the parameters of the added passive elements variable, it is possible to change the coupling coefficient between the first inductor 51 and the second inductor 52 in the balun 50 and the frequency characteristics of the dummy path (the signal path from the second input terminal 32 through the second inductor 52 and the second output terminal 34 to the dummy load 40), thereby making the effect of rise edge emphasis variable.

[0043] In this way, the light-emitting element driving device 1 uses the balanced-to-unbalanced conversion circuit 30, which can be composed only of passive elements, to enable rise edge emphasis, output a high-speed, large-amplitude current signal, and reduce power consumption. Furthermore, the light-emitting element driving device 1 can suppress eye degradation and eye noise components through high-speed, large-amplitude driving, eliminating the need for other circuits (such as a DSP or retimer, which were previously required), enabling low-latency operation. The light-emitting element driving device 1 can meet various requirements for future optical communication signal transmission.

[0044] Furthermore, since the balun 50 utilizes electromagnetic induction coupling between the first inductor 51 and the second inductor 52, the frequency characteristics of the signal path can be maintained without increasing the load on the signal path (the signal path from the first input terminal 31 through the first inductor 51 and the first output terminal 33 to the light-emitting element 2).

[0045] Next, we will explain other configuration examples of the balanced-unbalanced conversion circuit 30. In the configuration examples shown in Figures 5 to 9, the balanced-unbalanced conversion circuit 30 includes other passive elements in addition to the balun 50, which makes it possible to vary the coupling coefficient of the balun 50 or the frequency characteristics of the dummy path, and therefore to vary the effect of rise edge emphasis.

[0046] The balanced-to-unbalanced conversion circuit 30A shown in FIG. 5 includes a variable capacitance unit 61 in addition to a balun 50. The variable capacitance unit 61 is provided between an intermediate node of a second inductor 52 in the dummy path and a reference potential supply terminal. The intermediate node of the second inductor 52 may be a center tap of the second inductor 52. This reference potential supply terminal may be common to or different from the second reference potential supply terminal V2. In this configuration, when the capacitance value of the variable capacitance unit 61 changes, the self-resonant frequency of the second inductor 52 changes, the effective inductance value of the second inductor 52 at a specific frequency changes, and the coupling coefficient between the first inductor 51 and the second inductor 52 in the balun 50 changes.

[0047] The balanced-to-unbalanced conversion circuit 30B shown in FIG. 6 includes a third inductor 71, a fourth inductor 72, and a variable capacitance unit 62 in addition to the balun 50. The third inductor 71 is provided between the first input terminal 31 and the first inductor 51. The fourth inductor 72 is provided between the second input terminal 32 and the second inductor 52. The third inductor 71 and the fourth inductor 72 are not electromagnetically inductively coupled to each other. The variable capacitance unit 62 is provided between a node between the second inductor 52 and the fourth inductor 72 and a reference potential supply terminal. This reference potential supply terminal may be common to or different from the second reference potential supply terminal V2. In this configuration, when the capacitance value of the variable capacitance unit 62 changes, the self-resonant frequency of the second inductor 52 changes, the effective inductance value of the second inductor 52 at a specific frequency changes, and the coupling coefficient between the first inductor 51 and the second inductor 52 in the balun 50 changes.

[0048] 7 includes a variable impedance element 81 in addition to the balun 50. The variable impedance element 81 is provided in parallel with the second inductor 52 between the second input terminal 32 and the second output terminal 34. The variable impedance element 81 may be a variable capacitance unit or a variable resistor. In this configuration, when the impedance of the variable impedance element 81 changes, the self-resonant frequency of the second inductor 52 changes, the effective inductance value of the second inductor 52 at a specific frequency changes, and the coupling coefficient between the first inductor 51 and the second inductor 52 in the balun 50 changes.

[0049] The balanced-to-unbalanced conversion circuit 30D shown in FIG. 8 includes a variable capacitance unit 63 in addition to the balun 50. The variable capacitance unit 63 is provided between the second output terminal 34 and a reference potential supply terminal. This reference potential supply terminal may be common to the second reference potential supply terminal V2, or may be different. The variable capacitance unit 63 is provided in parallel with the dummy load 40. In this configuration, when the capacitance value of the variable capacitance unit 63 changes, the frequency characteristics of the dummy path change, and the rise edge emphasis of the signal waveform at the first output terminal 33 changes.

[0050] 9 includes a variable capacitance unit 64 in addition to the balun 50. The variable capacitance unit 64 is provided between the second input terminal 32 and a reference potential supply terminal. This reference potential supply terminal may be common to the second reference potential supply terminal V2, or may be different. In this configuration, when the capacitance value of the variable capacitance unit 64 changes, the self-resonant frequency of the second inductor 52 changes, and the frequency characteristics of the dummy path also change.

[0051] The balanced-unbalanced conversion circuit 30 may be configured by combining two or more of the configuration examples shown in Fig. 5 to Fig. 9. For example, the balanced-unbalanced conversion circuit 30 may be configured to include, in addition to the balun 50, the third inductor 71, the fourth inductor 72, and the variable capacitance unit 62 in Fig. 6 and the variable capacitance unit 63 in Fig. 8.

[0052] The load 10 and the differential circuit 20 of the light emitting element driving device 1 are not limited to the configuration shown in FIG. 1, but may have the configurations shown in FIGS.

[0053] The light-emitting element driving device 1A shown in FIG. 10 includes a load 10A as the load 10. The load 10A is an example of an active load and includes a first current source 11 and a second current source 12. The first current source 11 and the second current source 12 have the same configuration. The first current source 11 is provided between a first potential supply terminal and a first node N1. The second current source 12 is provided between the first potential supply terminal and a second node N2. The first current source 11 and the second current source 12 are each formed of a PMOS transistor, with their gates connected to a third node N3. A bias voltage Vbias is applied to their gates via the third node N3, causing a current to flow from the first reference potential supply terminal V1 to the first node N1 and the second node N2. The PMOS transistors are P-channel metal-oxide semiconductor field-effect transistors (MOSFETs).

[0054] 11 differs from the configuration shown in FIG. 10 in that it includes a load 10B instead of the load 10A. The load 10B includes a first current source 11, a second current source 12, a first resistor 13, and a second resistor 14. The first current source 11 and the second current source 12 have the same configuration. The first current source 11 and the first resistor 13 are connected in series to each other and are provided between the first potential supply terminal and a first node N1. The second current source 12 and the second resistor 14 are connected in series to each other and are provided between the first potential supply terminal and a second node N2.

[0055] The light-emitting element driving device 1C shown in FIG. 12 differs from the configuration shown in FIG. 10 in that it includes a differential circuit 20A instead of the differential circuit 20. The differential circuit 20A includes a first NPN transistor 21, a second NPN transistor 22, a resistor 24, a first tail current source 25, and a second tail current source 26. The first tail current source 25 is provided between the emitter of the first NPN transistor 21 and the second reference potential supply terminal V2. The second tail current source 26 is provided between the emitter of the second NPN transistor 22 and the second reference potential supply terminal V2. The resistor 24 is provided between the emitter of the first NPN transistor 21 and the emitter of the second NPN transistor 22. This configuration generates emitter degeneration, degenerating the transconductance of the differential pair. This suppresses gain, increases the input dynamic range, and enables linear operation of the light-emitting element driving device 1A.

[0056] The light-emitting element driving device 1D shown in FIG. 13 differs from the configuration shown in FIG. 10 in that it includes a load 10D instead of the load 10A. The load 10D is a passive load and includes a first resistor 13 and a second resistor 14. The first resistor 13 is provided between the first reference potential supply end V1 and the first node N1. The second resistor 14 is provided between the first reference potential supply end V1 and the second node N2. The first resistor 13 and the second resistor 14 may each be a passive resistor or an active resistor. Even with this configuration, the load 10D can supply current to each of the first node N1 and the second node N2.

[0057] As described above, one embodiment of the light-emitting element driving device includes: a load (10, 10A, 10B, 10D) connected to a first reference potential supply terminal V1; a differential circuit (20, 20A) connected to a second reference potential supply terminal V2 and including a first transistor (21) and a second transistor (22) for differential input; a drive current output terminal (33) for the light-emitting element 2; a dummy load 40; and a balanced-to-unbalanced conversion circuit (30, 30A, 30B, 30C, 30D, 30E) including a first input terminal 31 connected to a first node N1 between the load (10, 10A, 10B, 10D) and the first transistor (21), a second input terminal 32 connected to a second node N2 between the load (10, 10A, 10B, 10D) and the second transistor (22), a first output terminal 33 connected to a drive current output terminal, and a second output terminal 34 connected to the dummy load 40.

[0058] In one embodiment of the light-emitting element driving device, the balanced-unbalanced conversion circuit (30, 30A, 30B, 30C, 30D, 30E) includes a first inductor 51 connected between a first input terminal 31 and a first output terminal 33, and a second inductor 52 connected between a second input terminal 32 and a second output terminal 34 and electromagnetically inductively coupled to the first inductor 51.

[0059] In one embodiment of the light-emitting element driving device, the load (10, 10A, 10B) comprises a third transistor (first current source 11) connected between a first reference potential supply terminal V1 and a first node N1, and a fourth transistor (second current source 12) connected between the first reference potential supply terminal V1 and a second node N2, and the control input terminal (e.g., gate) of the third transistor (first current source 11) and the control input terminal (e.g., gate) of the fourth transistor (second current source 12) are connected, and a bias application terminal (Vbias) is connected to a third node N3 between these control input terminals.

[0060] In one embodiment of the light-emitting element driving device, the first transistor (first NPN transistor 21) and the second transistor (second NPN transistor 22) are each bipolar transistors, and the third transistor (first current source 11) and the fourth transistor (second current source 12) are each field-effect transistors. Field-effect transistors can be used instead of bipolar transistors in the differential circuit, but bipolar transistors can operate at high speeds. Since P-type and N-type semiconductors are interchangeable, it is also possible to use PNP bipolar transistors instead of N-channel field-effect transistors.

[0061] The light-emitting element driving device of one aspect further includes variable capacitance sections (61, 62, 63, 64) connected to nodes between the second input terminal 32 and the second output terminal 34.

[0062] The present invention is not limited to the above examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0063] 1, 1A to 1D...light-emitting element driving device, 2...light-emitting element, 10, 10A, 10B, 10D...load, 11...first current source, 12...second current source, 13...first resistor, 14...second resistor, 20, 20A...differential circuit, 21...first NPN transistor, 22...second NPN transistor, 23...tail current source, 24...resistor, 25...first tail current source, 26...second tail current source, 30, 30A to 30E...unbalanced Balanced conversion circuit, 31...first input terminal, 32...second input terminal, 33...first output terminal, 34...second output terminal, 40...dummy load, 41...resistor, 42, 43...diodes, 50...balun, 51...first inductor, 52...second inductor, 61-64...variable capacitance section, 71...third inductor, 72...fourth inductor, 81...variable impedance element, N1...first node, N2...second node, N3...third node.

Claims

1. An apparatus for outputting a current signal for driving a light-emitting element, comprising: a load provided between a first reference potential supply terminal for supplying a first reference potential and a first node and a second node, and supplying current to each of the first node and the second node; a differential circuit provided between a second reference potential supply terminal for supplying a second reference potential lower than the first reference potential and the first node and the second node, and outputting a signal corresponding to an input differential voltage signal from the first node and the second node; a balun having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, in which a first inductor and a second inductor are electromagnetically inductively coupled to each other, the first inductor is provided between the first input terminal and the first output terminal, the second inductor is provided between the second input terminal and the second output terminal, the first input terminal is connected to the first node, the second input terminal is connected to the second node, and a balun-unbalun conversion circuit for outputting the current signal from the first output terminal; and a dummy load provided between the second output terminal of the balun-unbalun conversion circuit and a reference potential supply terminal.

2. The light-emitting element driving apparatus according to claim 1, wherein a coupling coefficient between the first inductor and the second inductor of the balun, or a frequency characteristic of a signal path from the second input terminal of the balun through the second inductor and the second output terminal to the dummy load is variable.

3. The light-emitting element driving apparatus according to claim 2, wherein the balun-unbalun conversion circuit further includes a variable capacitance portion provided between an intermediate node of the second inductor and a reference potential supply terminal.

4. The light-emitting element driving apparatus according to claim 2, wherein the balun-unbalun conversion circuit further includes: a third inductor provided between the first input terminal and the first inductor; a fourth inductor provided between the second input terminal and the second inductor; and a variable capacitance portion provided between a node between the second inductor and the fourth inductor and a reference potential supply terminal.

5. The light-emitting element driving apparatus according to claim 2, wherein the balun-unbalun conversion circuit further includes a variable impedance element provided in parallel with the second inductor between the second input terminal and the second output terminal.

6. The balanced-unbalanced conversion circuit further includes a variable capacitance unit provided in parallel with the dummy load between the second output terminal and the reference potential supply terminal. The light-emitting element driving device according to claim 2.

7. The balanced-unbalanced conversion circuit further includes a variable capacitance unit provided between the second input terminal and the reference potential supply terminal. The light-emitting element driving device according to claim 2.

8. The differential circuit includes a first NPN bipolar transistor having a collector connected to the first node, a second NPN bipolar transistor having a collector connected to the second node, and a tail current source provided between the emitters of the first NPN bipolar transistor and the second NPN bipolar transistor and the second reference potential supply terminal. The differential voltage signal is input to the bases of the first NPN bipolar transistor and the second NPN bipolar transistor respectively. The light-emitting element driving device according to claim 1.

9. The differential circuit includes a first NPN bipolar transistor having a collector connected to the first node, a second NPN bipolar transistor having a collector connected to the second node, a first tail current source provided between the emitter of the first NPN bipolar transistor and the second reference potential supply terminal, a second tail current source provided between the emitter of the second NPN bipolar transistor and the second reference potential supply terminal, and a resistor provided between the emitter of the first NPN bipolar transistor and the emitter of the second NPN bipolar transistor. The differential voltage signal is input to the bases of the first NPN bipolar transistor and the second NPN bipolar transistor respectively. The light-emitting element driving device according to claim 1.

10. The load includes a first current source provided between the first reference potential supply terminal and the first node, and a second current source provided between the first reference potential supply terminal and the second node. The light-emitting element driving device according to claim 1.

11. The load includes a first resistor provided between the first reference potential supply terminal and the first node, and a second resistor provided between the first reference potential supply terminal and the second node. The light-emitting element driving device according to claim 1.

12. The light-emitting element driving device according to claim 1, wherein the dummy load has impedance characteristics equivalent to those of the light-emitting element.

13. The light-emitting element driving device according to claim 12, wherein the dummy load includes a resistor and a diode connected in series with each other.

14. A light-emitting element driving device comprising: a load connected to a first reference potential supply terminal; a differential circuit connected to a second reference potential supply terminal and including a first transistor and a second transistor for differential input; a drive current output terminal for a light-emitting element; a dummy load; a first input terminal connected to a first node between the load and the first transistor, a second input terminal connected to a second node between the load and the second transistor, a first output terminal connected to the drive current output terminal, and a second output terminal connected to the dummy load.

15. The light-emitting element driving device according to claim 14, wherein the balun circuit includes a first inductor connected between the first input terminal and the first output terminal, and a second inductor connected between the second input terminal and the second output terminal and electromagnetically inductively coupled to the first inductor.

16. The load includes a third transistor connected between the first reference potential supply terminal and the first node, and a fourth transistor connected between the first reference potential supply terminal and the second node, and the control input terminals of the third transistor and the fourth transistor are connected, and a bias application terminal connected to a third node between these control input terminals. The light-emitting element driving device according to claim 14.

17. The light-emitting element driving device according to claim 16, wherein the first transistor and the second transistor are bipolar transistors, respectively, and the third transistor and the fourth transistor are field effect transistors, respectively.

18. The light-emitting element driving device according to claim 14, further comprising a variable capacitance unit connected to a node between the second input terminal and the second output terminal.

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