Electrolyte gated transistor

Abstract

According to the invention a transistor is provided. This transistor is formed using an electrolyte slat and is suitable in uses especially, requiring a printable, wearable and / or flexible solution compatible with low silver migration in transistor electrodes.

Description

[0001] ELECTROLYTE GATED TRANSISTOR

[0002] FIELD OF THE INVENTION

[0003] This invention relates to transistors and specifically electrolyte salt transistor.

[0004] BACKGROUND

[0005] Printed electronics utilizes conventional printing techniques to develop thin film electrical devices from a bottom-up layer-by-layer approach. Leveraging printing methods such as inkjet, gravure, flexography, or aerosol jet printing, thin-film transistors, resistors, and capacitors can be fabricated. Combining these circuit components, more complex integrated circuits or sensors have been demonstrated with applications in large area microelectronics, low power portable and wearable electronics, as well as health monitoring systems. There are many advantages of printed electronics since they are solution processable, tunable, flexible, low- cost, and have high-throughput manufacturing capability.

[0006] The materials in printed electronics are often organic and inorganic inks, or solid or semi-solid polymer, which enable low temperature processing and thus energy saving. In addition, with its compatibility with commercial printing methods, the fabrication process also yields a high throughput and lower cost. One important component in printed electronics is the transistor, a 3-terminal device that is the backbone of modem electronics. Traditional transistors are made from silicon wafers with sophisticated etching and lithography. However, in printed electronics, these transistors, often known as “thin film transistors (TFTs)”, are made using thin layers of additively manufactured components.

[0007] The materials of these components are typically flexible and / or solution processable. The TFTs contain three contacts (source, drain, and gate) with a semiconductor between the source and drain electrodes that is separated from the gate electrode by a dielectric layer. When a voltage is applied to the gate electrode, the gate dielectric is polarized, resulting in an accumulation of charges at the gate / dielectric and dielectric / semiconductor interfaces, forming a double-layer capacitance similar to a capacitor. The charge carriers are also induced in the semiconductor via the field effect, flowing between drain and source with the application of a voltage at the drain to turn the device on.

[0008] An even more specific type of TFT is the “electrolyte-gated thin film transistor (EGFET)”. Instead of using an oxide or polymer to gate the thin film transistor, an electrolyte is used as a dielectric layer between the two electrode contacts on the transistor. Electrolytes are a class of materials that are ionic conducting but electrically insulating in their solid or liquid forms.

[0009] Polymer electrolyte dielectrics have been widely used in TFTs due to their high capacitance and ionic conductivity, solution processability, and compatibility with printed electronics manufacturing. Neutral pH polymer electrolytes in particular have advantages such as less safety risks, non-flammability, a less corrosive nature, and wide electrochemical stability window. Aqueous-based neutral-pH polymer electrolytes may be promising as iney are environmentally friendly and simple to synthesize.

[0010] The current-voltage relation of the transistor when in saturation mode (turned on) is IDS= - 1 where IDS is the drain-source voltage, W is the semiconductor channel width, L is the semiconductor channel length, p is the charge carrier mobility, C is the dielectric capacitance, VT is the threshold voltage, and VG is the gate voltage. From this relationship, a larger capacitance will enable lower gate voltage input for the same magnitude of current output. Consequently, this enables portable low-power devices that do not require bulky energy harvesting or storage capabilities.

[0011] Presently in the literature, there has been great progress in high-performance semiconductors and electrolyte dielectrics. However, the industry needs to search for alternatives to current expensive gold contacts for printed electrolyte-gated transistors, and develop conducting materials that are inexpensive, robust, and compatible with existing printing technologies.

[0012] SUMMARY

[0013] The invention disclosed herein provides for an electrolyte gated transistor comprising a solid polymer lithium salt-based electrolyte. Variations of this include the transistor wherein the solid polymer lithium salt-based electrolyte includes LiNO3; wherein the solid polymer lithium saltbased electrolyte has a polyvinylalcohol (PVA) matrix; wherein the solid polymer lithium saltbased electrolyte is a thin film, and wherein the thin film is a free standing, mechanically stable film; the transistor formed on a flexible polymer substrate; The transistor wherein gating is fabricated by at least: (a) drop-casting onto an active area of flexible transistor, and (b) allowing the electrolyte to dry to form a thin film; and the transistor of claim 1 having at least one electrode comprised of silver. Further, all these variations are also contemplated in terms of the use of the electrolyte for transisting.

[0014] BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The drawings have not necessarily been drawn to scale. Similarly, some components and / or operations can be separated into different blocks or combined into a single block for the purposes of discussion of some of the implementations of the present technology. Moreover, while the technology is amenable to various modifications and alternative forms, specific implementations have been shown by way of example in the drawings and are described in detail below. The intention, however, is not to limit the technology to the particular implementations described. On the contrary, the technology is intended to cover all modifications, equivalents, and alternatives falling within the scope of the technology as defined by the appended claims.

[0016] Figure 1 shows a transistor according to the invention. DETAILED DESCRIPTION

[0017] In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of implementations of the present technology. It will be apparent, however, to one skilled in the art that implementations of the present technology can be practiced without some of these specific details.

[0018] The phrases “in some implementations,” “according to some implementations,” “in the implementations shown,” “in other implementations,” and the like generally mean the particular feature, structure, or characteristic following the phrase is included in at least one implementation of the present technology, and can be included in more than one implementation. In addition, such phrases do not necessarily refer to the same implementations or different implementations.

[0019] According to the invention a transistor is provided. This transistor is formed using an electrolyte slat and is suitable in uses especially, requiring a printable, wearable and / or flexible solution compatible with low silver migration in transistor electrodes.

[0020] Silver is an industry-standard ink for commercial printed electronics, being solution processable, sintered at lower temperatures, and much cheaper compared to gold. However, there are certain limitations to existing silver contact EGFETs that hinder the creation of functional transistors: silver migration under moisturized conditions, and the chemical reactivity of silver. Ideally, the silver electrode in EGFETs should have the following properties:

[0021] 1) Having high specific capacitance.

[0022] 2) Possessing high electrical and ionic conductivities

[0023] 3) Being solution processable and printable components.

[0024] 4) Being comparable with various electrolytes and semiconductors.

[0025] 5) Being chemically and environmentally stable.

[0026] Again, according to the invention, silver migration is addressed by the use of a novel transistor electrolyte.

[0027] As a precursor to discussion of the transistor itself we first discuss the fundamental electrolyte in the experiment of a similar capacitive structure according to one aspect.

[0028] A precursor solution of LiNOs-PVA was prepared by dissolving LiNOs salt (Alfa Aesar, 99% anhydrous) in a 5 wt% PVA solution (Sigma- Aldrich, min. 99% degree of hydrolysis, 145,000 g mol-1) at various molar ratios, as outlined in Table 1 . The precursor solutions were snrreo ror ai least 24 h. and stored at ambient conditions.

[0029] Table 1

[0030] Ti foils (Mcmaster Carr, 127 pm thick) were used as electrodes and / or current collectors in EDLC. The preparation of MWCNT electrodes were described in previous reports

[0010] , A slurry consisting of 85 wt% MWCNT (USNano, >95% MWCNT content, outer diameter of 10-20 nm), 5 wt% graphite (Alfa Aesar), and 10 wt% cross-linked PVA binder, was coated onto Ti current collectors and allowed to dry at 80 °C for more than one hour. The resulting electrode loadings were between 2.2 and 2.8 mg cm-2.

[0031] Metallic cells using Ti electrodes for electrolyte characterizations and MWCNT electrodes for EDLC devices were fabricated with an apparent area of 1 cm2. The electrochemical performance of the liquid electrolyte was characterized using two electrodes in 1 M LiNOs solution, separated with a 3 mm spacer. The solid cells were fabricated by drop casting with an EG&G Princeton Applied Research 263A potentiostat / galvanostat coupled with a Solartron 1255 frequency response analyzer. Before testing at each different temperature, the metallic cells were stabilized for 20 mins., while the EDLC devices were equilibrated for >12 h.

[0032] The capacitance C from CVs and GC / D measurements was calculated by dividing the charge Q with voltage V (Eq. (1 )):

[0033] C = V (1)

[0034] The capacitance values of metallic cells were normalized to the cell active area, and those of carbon devices were normalized to the loading of a single electrode. The cycle life of the solid EDLC devices was studied using GC / D at 5 mA cm-2(based on the cell surface area) on the devices up to 10,000 cycles. The leakage current of the devices was measured using amperometric measurement at a constant voltage for 2 h between 0.6 V ano z.z v. ti rests were carried out using a 5 mV amplitude from 100 kHz to 1 Hz for metallic cells or to 0.01 Hz for MWCNT EDLC cells at 0 V bias. The ionic conductivity o was calculated from metallic cells using Eq. (2): o= t / (AxESR) (2) where the equivalent series resistance (ESR) of cells was obtained from the Nyquist plot, t is the electrolyte thickness, and A is the apparent area. The activation energies of ion conduction were estimated from the slopes in an Arrhenius plot using Eq. (3): o = o0exp(-Eo / RT) (3) where o0is a pre-exponential factor, Eo is the activation energy, R is the universal gas constant, and T is the temperature.

[0035] This section describes the materials and methods used in the preparation of the semiconductor and electrolyte solutions and fabrication of the organic electrolyte-gated field effect transistors (EGFETs) according to an aspect.

[0036] The chemicals used are listed in Table 2. The chemicals were used without modification.

[0037] Table 2 Polymer electrolyte ink : LINO3 / PVA polymer electrolyte was prepared by dissolving poiyvmyi alcohol (PVA) in water at 5 wt% (MW = 145 000), stirred overnight at 95 °C. The solution was cooled to room temperature and LiNO3 (99.999%) was added to the cooled PVA solution in a 3000:1 salt to polymer molar ratio. The LiNO3 / PVA mixture was stirred at room temperature for 24 h before application.

[0038] Semiconductor ink : P-type organic semiconductor PDPP2T-TT-OD was dissolved in anhydrous dichlorobenzene at 5 mg / mL stirring at 120 °C overnight in the glovebox. The temperature was lowered to 60 °C for 1 hr before printing.

[0039] Fabrication of gold electrodes: Polyethylene terephthalate (PET) substrates were coated with SU-8 using a doctor blade coater (Erichsen model 509 MC I) with a blade height of 300 pm and a speed of 2.5 mm / s. The SU-8 was soft baked at 90 °C for 10 minutes to evaporate the solvent and then crosslinked for 30 s with UV light followed by 30 min at 140 °C. Ti / Au (1 nm / 40 nm) was deposited by thermal or e-beam deposition and lithographically patterned via wet etching. The electrodes were cleaned using UV ozone to remove organic residues and lower the surface energy before the self-assembled monolayer (SAM) PFBT was attached to the surface by submerging the gold electrodes in a 4 vol% toluene solution.

[0040] The electrodes had a width of 200 pm, overlap length of 2 mm, 20 pm spacing between the source and drain, and 100 pm between the drain and gate.

[0041] Fabrication of silver electrodes: PET substrates were preshrunk by annealing at 140 °C for 30 min. Ag NP precursor ink was applied via flexography printing to form the silver electrodes, followed by annealing at 140 °C for 30 min. PFBT was attached to the surface by submerging the silver electrodes in a 4 vol% toluene solution. The electrodes had approximately 200 pm finger width, 2 mm or 4 mm electrode overlap, and approximately 50 pm spacing between the source and drain and drain and gate.

[0042] PET substrates were either used without modification or coated with SU-8 and crosslinked. Ag NP precursor ink was loaded into a Dimatix Materials Cartridge and printed via inkjet printer (Dimatix DMP-5005) with a drop spacing of 10 pm. The devices were annealed at 140 °C for 30 min. The resulting electrodes had approximate dimensions of 2 mm finger length and 150 to 200 pm finger width with 50 to 70 pm between the source and drain electrodes. The spacing between the drain and gate electrodes ranged from approximately 200 to as little as 100 pm due to variations in printing. The electrodes printed (either gold or silver) were cleaned and treated with PFBT if needed. Capacitors were fabricated by drop casting the electrolyte over the interdigitated area of an electrode. Transistor fabrication: After cleaning and SAM-application, the electrodes are piaceo on me inkjet printer stage. XSC4p semiconductor solution is loaded into the Dimatix cartridge and printed in the channel between the source and drain electrodes with 40 °C platen heating and 40 °C nozzle heating with a 5 or 10 pm drop spacing. The samples are annealed under vacuum for 30 min at 140 °C. The polymer electrolyte is drop casted onto the cooled devices using a 20 pL pipette tip over the entire active area.

[0043] The unfabricated electrodes, capacitors and transistors were stored in a nitrogen cabinet. The devices were tested in ambient conditions or in an environmental chamber with NaCI saturated solution to keep the relative humidity levels between 70 and 80%.

[0044] Enabling the aforementioned is a suitable electrolyte gating according to an aspect.

[0045] A diagram of a side gated EGFET 100 is shown in Figure 1. Shown is the electrolyte 105, substrate 110, semiconductor 120, gate 150, source 130 and drain 140.

[0046] They may be further separated by their mechanisms into electrical double layer transistors (EDLTs) and electrochemical transistors (ECTs).

[0047] In an EDLT, ions accumulate at the surface of the metal gate electrode / electrolyte and miconductor / electrolyte interface to form two electric double layer capacitors (EDLC). The EDLCs, shown in Figure 1 a and b, in turn induces charge buildup within the semiconductor, enabling current flow through the active region. It should be noted that, while studies of EGFETs have traditionally focused on the capacitance of the electrode-electrolyte system, the driving force for the device operation is the EDLC at the semiconductor-electrolyte interface. In an EDLT, the semiconductor is considered impermeable and ion penetration is minor: the primary driving mechanism of the device is the field effect caused by the buildup of ions at the surface of the active region. However, in an ECT, ions can diffuse into the semiconductor, and the primary driving mechanism for device operation is doping and de-doping ions. ECT devices have a characteristic transfer curve hysteresis wherein the backwards scan current is higher than the forward scan current, due to the time delay in the diffusion of ions into and out of the semiconductor.

[0048] Lithium salt based polymer electrolytes have previously demonstrated high conductivity, good shelf life, and wide voltage window when utilized for supercapacitors. In particular, Rosas et al., demonstrated that polymer electrolytes with LiNO3 in a polyvinylalcohol (PVA) matrix had a voltage window of 1 .6 V and retained good performance after 150 days at ambient humidity. However, the integration of lithium salt-based electrolytes into EGFETs is as yet unexplored.

[0049] Acording to an aspect of the invention, a 5% wt polyvinyl alcohol (PVA) solution was prepared by dissolving PVA (Sigma Aldrich, 89000 - 98000 g / mol, 99% hydrolyzed) in water. LiNO3 (Alfa Aesar, 99% anhydrous) was then added to the PVA solution in a 1000:i moiar rano io create the LiNO3-PVA electrolyte.

[0050] Diketopyrropyrrole thienothiophene (DPP-DTT) solutions were prepared by dissolving DPP- DTT (Xerox Research Canada) in dichlorobenzene (Sigma Aldrich, anhydrous) at a concentration of 5 mg / mL and heating for 120 °C overnight. Gold electrodes were prepared using electron beam deposited gold on SU8-2002 (Microchem) coated polyethylene terephthalate (PET) and cleaned by ozone treatment.

[0051] In order to explore the suitability of the electrolyte for the aforementioned aspects, gold cells (Figure 1 b) were created by drop-casting 20 pL of electrolyte onto the gold electrodes. The electrolytes measured were water, 0.5 M LiNO33 and LiNO3-PVA solid polymer electrolyte, and the cells are denoted as Au||water, Au||LiNO3, and Au||LiNO3-PVA respectively. Au||LiNO3-PVA cells were dried for 1 hour at 40% RH and room temperature to allow the LiNO3-PVA to form a thin film.

[0052] Semiconductor DPP-DTT on gold electrodes (Au||SC) were created by spin-coating DPP-DTT at 500 rpm onto gold electrodes and annealing for 30 minutes at 140 °C under vacuum (Figure 1c). Au||SC cells were created by using the same electrolytes and method as the gold cells. They are denoted as Au||SC||water, Au||SC||LiNO3, and Au||SC|| LiNO3-PVA respectively.

[0053] The capacitor cells were characterized by both cyclic voltammetry (CV) and electrical impedance spectroscopy (EIS) using a CHI 600 Electrochemical Analyzer. CV was performed at 10 mV / s.

[0054] All gold electrodes were cleaned by ozone treatment and functionalized by pentafluorobenzenthiol (PFBT) by submersion for 30 minutes into a solution of 20 pL PFBT (Sigma Aldrich) and 5 mL toluene (Sigma Aldrich, anhydrous, 99.8%).

[0055] Flexible transistor devices were fabricated by depositing DPP-DTT onto the active area (L = 20pm, W = 2mm) using inkjet printing (Dimatix DMP-2850). Interdigitated transistors were fabricated by spin-coating DPP-DTT at 1000 rpm onto electron beam deposited gold on Si / SiO2 wafers (Fraunhofer OFET substrate). After DPP-DTT deposition, devices were annealed for 30 minutes at 140 °C under vacuum.

[0056] LiNO3-PVA gated transistors (Figure 1 a) were fabricated by drop-casting LiNO3-PVA onto the active area of flexible transistors and allowing the electrolyte to dry at room temperature, 40% relative humidity for 1 hour to form a thin film. Water gated transistors were fabricated by dropcasting water onto interdigitated transistors and measuring in a probe- gated configuration. All devices were characterized by transfer and output curves over the course of three days using two Keithley 2400 Standard Series Source Measurement Units. Unless the context clearly requires otherwise, throughout the description and the claims, the words “comprise,” “comprising,” and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of “including, but not limited to.” As used herein, the terms “connected,” “coupled,” or any variant thereof, means any connection or coupling, either direct or indirect, between two or more elements; the coupling of connection between the elements can be physical, logical, or a combination thereof. Additionally, the words “herein,” “above,” “below,” and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the above Detailed Description using the singular or plural number may also include the plural or singular number respectively. The word “or,” in reference to a list of two or more items, covers all of the following interpretations of the word: any of the items in the list, all of the items in the list, and any combination of the items in the list.

[0057] The above detailed description of implementations of the system is not intended to be exhaustive or to limit the system to the precise form disclosed above. While specific implementations of, and examples for, the system are described above for illustrative purposes, various equivalent modifications are possible within the scope of the system, as those skilled in the relevant art will recognize.

[0058] Any patents and applications and other references noted above, including any that may be listed in accompanying filing papers, are incorporated herein by reference. Aspects of the technology can be modified, if necessary, to employ the systems, functions, and concepts of the various references described above to provide yet further implementations of the technology.

[0059] These and other changes can be made to the invention in light of the above Detailed Description. While the above description describes certain implementations of the technology, and describes the best mode contemplated, no matter how detailed the above appears in text, the invention can be practiced in many ways. Details of the system may vary considerably in its implementation details, while still being encompassed by the technology disclosed herein. As noted above, particular terminology used when describing certain features or aspects of the technology should not be taken to imply that the terminology is being redefined herein to be restricted to any specific characteristics, features, or aspects of the technology with which that terminology is associated. In general, the terms used in the following claims should not be construed to limit the invention to the specific implementations disclosed in the specification, unless the above Detailed Description section explicitly defines such terms. Accordingly, the actual scope of the invention encompasses not only the disclosed implementations, but also all equivalent ways of practicing or implementing the invention under the claims. While certain aspects of the technology are presented below in certain claim rorms, me inventors contemplate the various aspects of the technology in any number of claim forms. For example, while only one aspect of the invention is recited as implemented in a computer- readable medium, other aspects may likewise be implemented in a computer-readable medium. Accordingly, the inventors reserve the right to add additional claims after filing the application to pursue such additional claim forms for other aspects of the technology.

Claims

ClaimsWhat is claimed is:1 . A electrolyte gated transistor comprising:A solid polymer lithium salt-based electrolyte.2 The transistor of claim 1 wherein the solid polymer lithium salt-based electrolyte includes LiNO3.3 The transistor of claim 1 wherein the solid polymer lithium salt-based electrolyte has a polyvinylalcohol (PVA) matrix.4 The transistor of claim 1 wherein the solid polymer lithium salt-based electrolyte is a thin ilm.5 The transistor of claim 4 wherein the thin film is a free standing, mechanically stable film6 The transistor of claim 1 formed on a flexible polymer substrate.7 The transistor of claim 1 wherein gating is fabricated by at least:(a) drop-casting onto an active area of flexible transistor, and(b) allowing the electrolyte to dry to form a thin film.8 The transistor of claim 1 having at least one electrode comprised of silver.9 The use of A solid polymer lithium salt-based electrolyte for transisting.10 The use of claim 9 wherein the solid polymer lithium salt-based electrolyte includes LiNO3.11 The use of claim 9 wherein the solid polymer lithium salt-based electrolyte has a polyvinylalcohol (PVA) matrix.12 The use of claim 9 wherein the solid polymer lithium salt-based electrolyte is a thin film.13 The use of claim 9 wherein the thin film is a free standing, mechanically stable film.

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