Method and apparatus for preparing substrate including silicon carbide layer

Abstract

The present application relates to the technical field of semiconductors. Disclosed are a method and apparatus for preparing a substrate including a silicon carbide layer. The method for preparing a substrate including a silicon carbide layer comprises: creating, around a substrate including a surface silicon layer, an atmosphere containing a carbide gas, and heating the substrate including the surface silicon layer to cause the formation of silicon carbide on the surface layer; or heating the substrate including the surface silicon layer and then performing annealing, and accompanied by extracting generated silicon vapor from a reaction region, and creating, around the substrate including the surface silicon layer, an atmosphere containing a carbide gas, causing the formation of silicon carbide on the surface layer.

Description

Method and device for preparing substrate containing silicon carbide layer Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method and apparatus for preparing a substrate comprising a silicon carbide layer. Background Art

[0002] Currently, commercial applications typically use SiC single crystals as substrates for wide-bandgap semiconductor devices. SiC epitaxial layers are then grown on the SiC single crystal substrates to further fabricate power devices such as Schottky diodes and MOSFETs. Alternatively, GaN epitaxial layers are grown on SiC single crystal substrates to further fabricate microwave and radio frequency devices. Compared to Si, SiC boasts 10 times the breakdown field strength, 2-3 times the bandgap width, twice the electron saturation drift rate, and 2-3 times the cooling capacity.

[0003] However, the production of 4H-SiC or 6H-SiC single crystal substrates currently commercially viable is difficult and costly. On the one hand, SiC ingots are extremely sensitive to process conditions; even the slightest fluctuation in these conditions can produce numerous defects, resulting in a large number of low-quality SiC ingots. On the other hand, defects are also easily introduced during the SiC ingot cutting and polishing processes, resulting in low product yields and high costs.

[0004] In order to reduce the cost of SiC substrates, there are two main routes:

[0005] One approach involves epitaxially growing SiC thin films on Si substrates to create SiC / Si composite substrates. While 3C-SiC single crystals, another crystalline form of SiC, cannot be obtained through traditional crystal growth processes compared to 4H-SiC or 6H-SiC, they can be grown on silicon wafers. Compared to developing larger diameter 4H-SiC or 6H-SiC wafers, growing 3C-SiC on silicon wafers offers the potential for faster wafer size expansion and significantly reduces the cost of producing SiC single crystal substrates.

[0006] Currently, 3C-SiC is generally produced on silicon wafers using the CVD method. However, due to the large lattice mismatch between Si and SiC, crystal defects may occur in the resulting SiC film. To ensure the quality of 3C-SiC, certain thickness requirements are imposed on the 3C-SiC film. Only when the thickness reaches a certain level, such as above 1 μm, can the crystal quality be improved. However, as the thickness increases, the large thermal mismatch between Si and SiC will lead to problems such as cracking and warping during the cooling process after the SiC is prepared. Therefore, it is difficult to form high-quality 3C-SiC on Si using existing technologies.

[0007] Another approach is to bond a high-quality single-crystal SiC layer to a low-quality SiC layer to create a composite substrate, or to grow a polycrystalline SiC layer directly on a high-quality SiC layer to create a composite SiC substrate. This approach can reduce the cost of high-quality single-crystal SiC material, but a certain amount of high-quality single-crystal SiC is still required.

[0008] Summary of the Invention

[0009] The present disclosure provides a method for preparing a substrate including a silicon carbide layer, comprising:

[0010] forming an atmosphere containing a carbide gas around the substrate including the surface silicon layer, and

[0011] heating a substrate comprising a surface silicon layer to generate silicon carbide from the surface silicon layer; or

[0012] heating the substrate including the surface silicon layer and then annealing it, accompanied by extraction of the generated silicon vapor from the reaction zone, and

[0013] An atmosphere containing a carbide gas is formed around the substrate including the surface silicon layer, so that silicon carbide is grown on the surface silicon layer.

[0014] The present disclosure provides an apparatus for preparing a substrate including a silicon carbide layer, comprising:

[0015] a housing, including a receiving space;

[0016] an air inlet, provided on the housing, for introducing the carbide-containing gas into the accommodation space;

[0017] an air outlet, disposed on the housing; and

[0018] The air permeable chamber component is arranged in the accommodating space and is used for placing at least one substrate including a surface silicon layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only one embodiment of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] FIG1 is a schematic structural diagram of an apparatus for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0021] FIG. 2 shows a photograph of a substrate comprising a silicon carbide layer prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0022] 3 shows a reflection high energy electron diffraction (RHEED) image of a substrate comprising a silicon carbide layer prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0023] FIG4 illustrates an X-ray diffraction (XRD) test result of a substrate comprising a silicon carbide layer prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0024] FIG5 shows an optical microscope photograph of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0025] FIG6 shows an AFM (atomic force microscope) scanning image of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0026] FIG. 7 shows a SEM (scanning electron microscope) image of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0027] FIG8 shows a partially enlarged SEM image of a silicon-based silicon carbide patterned substrate prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0028] FIG9 shows an optical microscope photograph of a silicon-based silicon carbide patterned substrate with suppressed surface voids, prepared by a method for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0029] FIG10 shows an AFM scan of a substrate comprising a silicon carbide layer with suppressed surface voids, prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0030] In the above drawings, the reference numerals represent:

[0031] 100-Apparatus for preparing a substrate comprising a silicon carbide layer

[0032] 110-housing

[0033] 111-Accommodation Space

[0034] 120-air inlet

[0035] 130-Air outlet

[0036] 140-Breathable chamber assembly

[0037] 141-Graphite cartridge

[0038] 14101-Loading Steps

[0039] 14102-Stacking Steps

[0040] 14103-Silicon powder placement area

[0041] 141a-Graphite bottom box

[0042] 141b-Graphite Raised Box

[0043] 142-lid

[0044] 200-Substrate including a surface silicon layer DETAILED DESCRIPTION

[0045] Some embodiments of the present disclosure will be described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only exemplary embodiments of the present disclosure, rather than all embodiments.

[0046] In the description of the present disclosure, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", "top", "bottom", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In the description of the present disclosure, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", and "coupled" should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal connection of two elements. In the present disclosure, the term "distal end" or "distal side" refers to the end or side that extends into a vacuum environment (e.g., a vacuum chamber), and the term "proximal end" or "proximal side" refers to the end or side opposite the distal end or distal end (e.g., the end or side that is away from the vacuum chamber, or the end or side within the vacuum chamber that is close to the vacuum chamber wall, etc.). Those skilled in the art will understand the specific meanings of the above terms in the present disclosure based on specific circumstances.

[0047] The method of preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure may include: forming an atmosphere containing a carbide gas around the substrate including a surface silicon layer, and heating the substrate including the surface silicon layer to generate silicon carbide in the surface silicon layer.

[0048] In some embodiments of the present disclosure, the air surrounding the substrate including the surface silicon layer is evacuated before the carbide-containing gas is introduced. For example, the substrate including the surface silicon layer can be placed in a vacuum furnace, the air is evacuated, and the carbide-containing gas is then introduced to form a carbide-containing gas atmosphere around the substrate including the surface silicon layer and to a certain pressure. Subsequently, the substrate including the surface silicon layer is heated to form silicon carbide (3C-SiC) on the surface silicon layer.

[0049] In some embodiments of the present disclosure, the surface silicon layer in the substrate including the surface silicon layer is a single crystal silicon layer.

[0050] In some embodiments of the present disclosure, the substrate comprising the surface silicon layer may be a silicon wafer or a polished silicon wafer. The silicon wafer may include any crystal plane (e.g., 111 crystal plane, 100 crystal plane, 110 crystal plane, etc.) and any size of silicon wafer, or may be a substrate comprising a surface silicon layer obtained by depositing or bonding a silicon layer on the surface of another substrate material. The techniques that may be used to deposit the silicon layer on the surface of the substrate material include, but are not limited to, vapor phase epitaxy, liquid phase epitaxy, sol-gel method, plasma chemical vapor deposition, as well as molecular beam epitaxy, magnetron sputtering, vacuum arc evaporation, ion beam sputtering, and the like. The method of bonding the silicon layer to the surface of the substrate material will be described in detail later.

[0051] Those skilled in the art will understand that the matrix material does not participate in the process of generating silicon carbide from the surface silicon layer. The selection of the matrix material is mainly limited by its melting point. The matrix material includes but is not limited to sapphire, quartz, graphite, tungsten, iron, titanium, platinum, zirconium, molybdenum, corundum, metal carbides, various steels and alloys, ceramics, metal ceramics, etc.

[0052] In some embodiments of the present disclosure, the surface silicon layer in the substrate including the surface silicon layer includes a Si(111) crystal plane.

[0053] In some embodiments of the present disclosure, the surface Si layer, while providing Si atoms for the grown SiC layer, also continuously leaves vacancies in the Si matrix due to the formation of SiO gas. These nanoscale vacancies continue to grow and accumulate into micron-scale holes, forming holes at the interface between silicon and silicon carbide. These holes significantly reduce the total contact area between the SiC layer and the Si layer, giving the resulting SiC composite substrate a certain degree of elasticity, facilitating the stress relief caused by the substrate-film lattice mismatch, and making it suitable for the epitaxial growth of a wider range of semiconductor materials, such as crack-free AlN and GaN samples.

[0054] The method of preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure may include: heating the substrate including a surface silicon layer and then pre-annealing it, accompanied by extracting the generated silicon vapor from the reaction zone, and forming an atmosphere containing a carbide gas around the substrate including the surface silicon layer, so that the surface silicon layer generates silicon carbide.

[0055] In some embodiments of the present disclosure, the air surrounding the substrate including the surface silicon layer is evacuated, and the substrate including the surface silicon layer is then heated and pre-annealed. For example, the substrate including the surface silicon layer can be placed in a vacuum furnace, and the air can be evacuated before pre-annealing at a certain temperature (e.g., 1200-1400° C.).

[0056] In some embodiments of the present disclosure, pre-annealing under vacuum conditions creates a large number of thermal vacancies near the surface of the silicon crystal. This results in a large number of non-equilibrium thermal vacancies in the surface silicon layer before chemical vacancies are formed by the interaction between the carbide-containing gas and Si. In this region, the chemical bonds within the silicon are strongly weakened, the silicon lattice is unstable, and the gas easily penetrates the silicon. This allows for the production of a relatively thick SiC layer, for example, 0.5-5 μm.

[0057] In some embodiments of the present disclosure, the carbide-containing gas includes carbon monoxide and / or carbon dioxide, or a mixture of carbon monoxide and / or carbon dioxide and an inert gas.

[0058] In some embodiments of the present disclosure, the carbide-containing gas may include only carbon monoxide (CO), or only carbon dioxide (CO2), or a mixture of carbon monoxide and carbon dioxide, or a mixture of carbon monoxide and an inert gas (e.g., nitrogen, argon, etc.), or a mixture of carbon dioxide and an inert gas, or a mixture of carbon monoxide, carbon dioxide, and an inert gas. For example, the carbide-containing gas includes, by mass fraction, 45% carbon monoxide, 50% argon, and 5% nitrogen.

[0059] In some embodiments of the present disclosure, the atmosphere containing carbide gas may further include silicon-containing gas.

[0060] The silicon atoms in the silicon-containing gas can prevent the surface evaporation of silicon atoms during the formation of silicon carbide, which can achieve high crystallization perfection of SiC and the absence of defects such as etch pits.

[0061] In some embodiments of the present disclosure, forming the atmosphere containing carbide gas includes: heating silicon powder to generate silicon-containing gas; and / or introducing the silicon-containing gas into a substrate including a surface silicon layer.

[0062] In some embodiments of the present disclosure, the silicon-containing gas includes but is not limited to silane (SiH4) and / or disilane (Si2H6) and / or trichlorosilane (SiHCl3).

[0063] In some embodiments of the present disclosure, silicon powder can be heated alone to generate a silicon-containing gas, thus avoiding the use of hazardous silicon-containing gases such as silane. Furthermore, after silicon carbide is formed on the surface silicon layer, silicon vapor can be used to etch the silicon carbide surface to further improve the quality of the silicon carbide surface. This is because silicon and silicon carbide react: Si + SiC = Si2C, and Si2C has a higher vapor pressure than SiC, which facilitates subsequent epitaxial growth.

[0064] In addition, only by heating silicon powder to generate silicon-containing gas, not only the process is simplified but also the purpose of automatically balancing the vapor pressure on the surface of the silicon wafer can be achieved. The chemical reaction formula for the preparation of silicon carbide thin film is Si+CO=SiO+SiC. Too high silicon vapor pressure will hinder the progress of the silicon carbide formation reaction, but too low silicon vapor pressure will cause the generation of surface holes. In some embodiments of the present disclosure, only by heating silicon powder to generate silicon-containing gas, the silicon powder has a larger surface area than the substrate containing the surface silicon layer. At the same temperature, the silicon vapor pressure generated by the silicon powder is slightly higher than the vapor pressure on the surface of the substrate containing the surface silicon layer, thereby suppressing the evaporation of silicon on the surface of the substrate containing the surface silicon layer and suppressing the generation of holes. At the same time, because the vapor pressure of Si is much lower than the vapor pressure of SiO at the same temperature, the silicon vapor pressure will not be too high to hinder the silicon carbide formation reaction.

[0065] In some embodiments of the present disclosure, the atmospheric pressure around the substrate including the surface silicon layer is controlled at 20-600 Pa; heating the substrate including the surface silicon layer includes heating the atmospheric temperature of the substrate including the surface silicon layer to 950-1400° C., so that the surface silicon layer generates silicon carbide.

[0066] In some embodiments, the pressure of the atmosphere surrounding the substrate including the surface silicon layer can be controlled to, for example, 20-100 Pa, 70-250 Pa, 200-600 Pa, 100 Pa, 300 Pa, etc. In some embodiments, heating the substrate including the surface silicon layer can include heating the temperature of the atmosphere surrounding the substrate including the surface silicon layer to, for example, 950-1200° C., 1000-1300° C., 1200-1400° C., etc., so that silicon carbide is generated in the surface silicon layer.

[0067] At lower pressures, such as below 20 Pa, and lower temperatures, such as below 950°C, the rate at which silicon carbide is formed from the surface silicon layer is very low, and almost no silicon carbide is formed. At higher pressures and temperatures, such as above 600 Pa and above 1400°C, the rate at which silicon carbide is formed from the surface silicon layer is too high, resulting in a bulk structure of the silicon carbide film.

[0068] In some embodiments of the present disclosure, the substrate comprising a surface silicon layer is heated and then pre-annealed, comprising: placing the substrate in a vacuum furnace, extracting the air, heating the substrate comprising the surface silicon layer to 1200-1400°C, and maintaining the temperature at a pressure of <25Pa for 1-150 minutes, while extracting silicon vapor generated from the reaction zone; after the pre-annealing, supplying a carbide-containing gas into the vacuum furnace to form an atmosphere of carbide-containing gas around the substrate comprising the surface silicon layer, and controlling the atmospheric pressure around the substrate comprising the surface silicon layer to 10-800Pa; heating the atmospheric temperature of the substrate comprising the surface silicon layer to 1000-1400°C to generate silicon carbide on the surface silicon layer.

[0069] In some embodiments, the substrate including the surface silicon layer can be heated to, for example, 1200-1300° C., 1250-1400° C., 1300° C., 1350° C., etc., at a pressure of <10 Pa, <5 Pa, <1 Pa, <0.1 Pa, etc., for 1-150 minutes, while silicon vapor generated is extracted from the reaction zone. After pre-annealing, a carbide-containing gas is supplied to a vacuum furnace to form an atmosphere of carbide-containing gas around the substrate including the surface silicon layer. The pressure of the atmosphere around the substrate including the surface silicon layer can be controlled to, for example, 10-100 Pa, 70-250 Pa, 200-400 Pa, 300-800 Pa, etc.; the atmosphere temperature of the substrate including the surface silicon layer can be heated to 1000-1300° C., 1250-1400° C., so that silicon carbide is formed on the surface silicon layer.

[0070] In some embodiments of the present disclosure, the thickness of the SiC layer depends on the silicon evaporation rate, which is determined by temperature, vacuum level, and reaction time. At temperatures below 1250°C, the silicon evaporation rate is not very high, and therefore the SiC layer thickness is not very thick. If the evaporated silicon is not extracted, it will quickly diffuse back from the surface, causing the vacancy to "heal."

[0071] FIG1 is a schematic structural diagram of an apparatus for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure.

[0072] As shown in FIG1 , an apparatus 100 for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure may include a housing 110, an air inlet 120, an air outlet 130, and a gas permeable chamber assembly 140. The housing 110 may include a receiving space 111. The air inlet 120 is provided on the housing 110 for introducing a carbide-containing gas into the receiving space 111. The air outlet 130 is provided on the housing 110. The gas permeable chamber assembly 140 is provided within the receiving space 111 for placing at least one substrate 200 including a surface silicon layer.

[0073] In some embodiments of the present disclosure, the accommodating space 111 can be evacuated to a pressure of <25Pa. For example, in some embodiments, the accommodating space 111 can be evacuated to a pressure of ≤20Pa, or ≤5Pa, or 10Pa. -2 Pa.

[0074] In some embodiments of the present disclosure, the gas permeable chamber assembly 140 may further include at least one graphite box 141 for placing at least one substrate 200 including a surface silicon layer.

[0075] In some embodiments of the present disclosure, the at least one graphite cartridge 141 may include a plurality of stacked graphite cartridges, for example, eight stacked graphite cartridges as shown in FIG1 . Those skilled in the art will appreciate that, although FIG1 shows only eight graphite cartridges, the at least one graphite cartridge 141 may also include other numbers of graphite cartridges.

[0076] In some embodiments of the present disclosure, the graphite box 141 may include a flange or supporting step 14101 formed on the inner wall, a stacking step 14102 formed on the bottom outer wall, and a silicon powder placement area 14103. The flange or supporting step 14101 formed on the inner wall is used to support the substrate 200 including the surface silicon layer. The stacking step 14102 formed on the bottom outer wall is used to stack with adjacent graphite boxes. The silicon powder placement area 14103 is used to place silicon powder. For example, as shown in FIG1 , each of the eight stacked graphite boxes may include a flange or supporting step 14101 formed on the inner wall, a stacking step 14102 formed on the bottom outer wall, and a silicon powder placement area 14103.

[0077] In some embodiments of the present disclosure, the silicon powder placement area 14103 can be set at the bottom of the graphite box.

[0078] As shown in FIG. 1 , in some embodiments of the present disclosure, the air permeable chamber assembly 140 may further include a cover 142 disposed on top of the at least one graphite box 141 .

[0079] As shown in FIG1 , in some embodiments of the present disclosure, a cover 142 may be disposed on top of a topmost stack of a plurality of stacked graphite cartridges. For example, the cover 142 may be adapted to fit within a stacking step 14102 at the top of the topmost stack of graphite cartridges. The cover 142 is disposed on the stacking step 14102 at the top of the topmost stack of graphite cartridges. However, this is merely exemplary, and those skilled in the art will appreciate that other arrangements may be employed for placement of the cover 142.

[0080] As shown in Figure 1, in some embodiments of the present disclosure, at least one graphite box 141 includes a graphite bottom box 141a and a graphite raised box 141b. The upper end of the graphite bottom box 141a includes a supporting step 14101 for supporting a substrate 200 including a surface silicon layer. The lower end of the graphite raised box 141b includes a step adapted to the supporting step 14101, which is used to be stacked on the graphite bottom box 141a, but does not affect the substrate 200 including the surface silicon layer. For example, the upper end of the graphite bottom box 141a includes a Z-shaped supporting step 14101, and the lower end of the graphite raised box 141b includes a small Z-shaped step whose height is less than the Z-shaped supporting step 14101. The small Z-shaped step can be stacked on the graphite bottom box 141a, while reserving space for placing the substrate 200 including the surface silicon layer. Those skilled in the art will appreciate that the at least one graphite box 141 including the graphite bottom box 141 a and the graphite raised box 141 b is merely exemplary, and the at least one graphite box 141 may also be integrally formed.

[0081] The apparatus for preparing a substrate including a silicon carbide layer according to any embodiment of the present disclosure can be used to prepare a substrate including a silicon carbide layer.

[0082] In some embodiments of the present disclosure, a method for preparing a substrate including a silicon carbide layer may include the following steps:

[0083] Step 1: The accommodation space within the housing of the device for preparing the substrate containing the silicon carbide layer is placed in a vacuum environment and heated to a temperature T1, for example, 900° C., so that the internal pressure P1 of the device for preparing the substrate containing the silicon carbide layer is less than 0.1 Pa. The surface of the substrate containing the silicon carbide layer within the gas permeable chamber is subjected to the silicon vapor pressure generated by the high-purity silicon powder at the bottom of the gas permeable chamber, and surface deoxidation is achieved at a relatively low temperature, which is beneficial for suppressing defects caused by high-temperature deoxidation.

[0084] Step 2: Continue heating to temperature T2, for example, 1000°C-1300°C, and introduce a carbide-containing gas (such as CO gas) to convert the surface silicon into silicon carbide (2Si+CO=SiO+SiC). The silicon vapor generated by the silicon powder is greater than the silicon evaporation amount on the surface of the single crystal silicon wafer, effectively suppressing the formation of holes on the silicon surface;

[0085] Step 3: Stop introducing the carbide-containing gas (such as CO gas) to complete the conversion of silicon carbide.

[0086] In some embodiments, since pure silicon is very likely to form SiO2 after being exposed to the atmosphere, the surface needs to be deoxidized first. In some embodiments, the temperature can be first heated from room temperature to 300°C, and the internal pressure P1 of the device for preparing the substrate containing the silicon carbide layer is made less than 0.02 Pa (if the pressure is greater than 0.02 Pa, then maintain 300°C until the pressure is less than 0.02 Pa), and then continue to heat and raise the temperature to 900°C, and the internal pressure P1 of the device for preparing the substrate containing the silicon carbide layer is made less than 0.1 Pa (if the pressure is greater than 0.1 Pa at 900°C, then continue to maintain 900°C until the pressure is less than 0.1 Pa). Since the substrate containing the surface silicon layer in the breathable chamber is exposed to silicon vapor pressure, the reaction of Si+SiO2=2SiO is beneficial to suppressing defects formed by high-temperature deoxidation, and surface deoxidation can be achieved at a relatively low temperature.

[0087] In some embodiments, a carbide-containing gas (e.g., CO) can be introduced at a flow rate of 10-50 sccm to raise the pressure to 70-250 Pa. After the pressure inside the device stabilizes, the device is heated to a temperature of 1000°C-1300°C and maintained at this pressure and temperature for a period of time, e.g., 5-60 minutes. The silicon on the surface will gradually convert into silicon carbide (2Si+CO=SiO+SiC). During this process, the silicon vapor generated by the silicon powder is greater than the amount of silicon evaporating from the surface of the single crystal silicon wafer, which will continue to suppress the formation of pores on the silicon surface.

[0088] In some embodiments, the introduction of carbide-containing gas (e.g., CO) is stopped, the carbide gas and other gases generated by the reaction are extracted from the device, and heating is stopped. After the temperature inside the device cools to room temperature, the sample whose surface has been converted to silicon carbide is removed.

[0089] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include step 4: continuing heating to a temperature T3, where T3 is higher than T2 but lower than 1415°C, for example, T3 is higher than 1000°C-1300°C but lower than 1415°C, and utilizing the silicon vapor pressure generated by the bottom silicon powder to etch the silicon carbide surface. This further improves the surface quality of the silicon carbide and facilitates subsequent epitaxial growth.

[0090] In some embodiments of the present disclosure, the method for preparing a substrate comprising a silicon carbide layer may further include: generating silicon point vacancies inside the silicon at the same time as or after deoxidizing the surface of the silicon wafer in step 1, and the thickness of the silicon wafer where the silicon point vacancies are generated may be controlled by the heating temperature and heating time, thereby controlling the subsequent silicon carbide conversion thickness, that is, the thickness of the silicon carbide film.

[0091] In some embodiments of the present disclosure, the apparatus for preparing a substrate comprising a silicon carbide layer can generate internal silicon vacancies while suppressing the formation of surface defects on the silicon wafer because the vapor pressure of silicon powder at the bottom of the gas permeable chamber where the substrate comprising the silicon carbide layer is located is higher than that of silicon vaporized from the silicon wafer surface. Therefore, the apparatus for preparing a substrate comprising a silicon carbide layer in some embodiments of the present disclosure can produce not only thicker silicon carbide films, but also films with higher surface quality.

[0092] In some embodiments of the present disclosure, a method for preparing a substrate comprising a silicon carbide layer can form a patterned silicon carbide substrate by controlling the reaction temperature and the pressure of the carbide atmosphere to generate regularly shaped and evenly distributed holes on the silicon carbide surface. The patterned substrate obtained by the method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure is a self-assembly process for obtaining a silicon-based silicon carbide patterned substrate.

[0093] According to the method for preparing a substrate containing a silicon carbide layer in some embodiments of the present disclosure, a silicon carbide pattern substrate is formed, and the obtained same image substrate is characterized. Figure 5 shows an optical microscope photo of a silicon-based silicon carbide pattern substrate prepared by the method for preparing a substrate containing a silicon carbide layer in some embodiments of the present disclosure. Figure 6 shows an AFM (atomic force microscope) scan of a silicon-based silicon carbide pattern substrate prepared by the method for preparing a substrate containing a silicon carbide layer in some embodiments of the present disclosure, with a scanning range of 50μm*50μm. Figure 7 shows an SEM (scanning electron microscope) image of a silicon-based silicon carbide pattern substrate prepared by the method for preparing a substrate containing a silicon carbide layer in some embodiments of the present disclosure. Figure 8 shows a locally enlarged SEM image of a silicon-based silicon carbide pattern substrate prepared by the method for preparing a substrate containing a silicon carbide layer in some embodiments of the present disclosure.

[0094] As shown in FIG. 5 to FIG. 8 , according to the method for preparing a substrate including a silicon carbide layer in some embodiments of the present disclosure, a patterned substrate having a triangular shape can be obtained.

[0095] In some embodiments of the present disclosure, a method for preparing a substrate comprising a silicon carbide layer can also suppress the generation of surface voids by adjusting the silicon vapor pressure, thereby obtaining a silicon-based silicon carbide patterned substrate with surface voids suppressed to a certain extent.

[0096] According to some embodiments of the present disclosure, a method for preparing a substrate comprising a silicon carbide layer is used to obtain a silicon-based silicon carbide patterned substrate with surface voids suppressed to a certain extent, and the obtained substrate is characterized. Figure 9 shows an optical microscope photograph of a silicon-based silicon carbide patterned substrate with surface voids suppressed to a certain extent, obtained by the method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure. Figure 10 shows an AFM scan of a substrate comprising a silicon carbide layer with surface voids suppressed to a certain extent, obtained by the method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure, with a scan range of 50μm*50μm.

[0097] In some embodiments of the present disclosure, the shapes of the graphics formed in the graphic substrate include, but are not limited to, triangles, hexagons, etc.

[0098] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include: bonding a low-quality SiC substrate to a silicon layer to form a substrate including a surface silicon layer.

[0099] Those skilled in the art will understand that in some embodiments of the present disclosure, low-quality SiC refers to SiC with various defects and impurities, for example, SiC with a large number of crystal defects, such as dislocations, stacking faults, etc.; and / or SiC containing a high level of impurity elements, such as iron, titanium, aluminum, etc.; and / or SiC with a relatively rough surface and a large number of microcracks and defects.

[0100] In some embodiments of the present disclosure, forming a substrate including a surface silicon layer may include the following steps:

[0101] The back surface of the single crystal silicon wafer and the front surface of the low-quality single crystal silicon carbide layer are directly contact-bonded to obtain a substrate including a surface silicon layer.

[0102] In some embodiments of the present disclosure, the thickness of the bonding layer formed by direct contact bonding is less than or equal to 5 nm.

[0103] In some embodiments of the present disclosure, the back surface of the single crystal silicon wafer and the front surface of the low-quality silicon carbide layer are surface treated so that the roughness of the back surface of the single crystal silicon wafer and the front surface of the low-quality silicon carbide layer is less than or equal to 0.5 nm, thereby improving the step bonding effect.

[0104] In some embodiments of the present disclosure, the obtained substrate including the surface silicon layer is subjected to the method in some embodiments of the present disclosure to partially generate silicon carbide on the surface silicon layer.

[0105] In some embodiments of the present disclosure, the thickness of a single-crystal silicon wafer can be 50-300 μm, and the thickness of the silicon carbide layer obtained after the surface silicon layer is partially formed into silicon carbide (3C-SiC) is 10-5000 nm. If the 3C-SiC layer is relatively thick, it can be directly separated from the silicon and subsequently transferred to another substrate (such as sapphire), thereby obtaining a silicon carbide composite substrate.

[0106] In some embodiments of the present disclosure, forming a substrate including a surface silicon layer may include the following steps:

[0107] 1) implanting ions from the back surface of the single crystal silicon wafer so that the implanted ions reach a predetermined depth, forming a defect layer at the predetermined depth, and forming a first single crystal silicon layer on a side of the defect layer facing the back surface of the single crystal silicon wafer;

[0108] 2) directly contact bonding the back surface of the single crystal silicon wafer and the front surface of the low-quality single crystal silicon carbide layer to form a first composite structure comprising the bonded single crystal silicon wafer, the low-quality single crystal silicon carbide layer, and a bonding layer between the single crystal silicon wafer and the low-quality silicon carbide layer;

[0109] 3) applying stress to the first composite structure so that the first single crystal silicon layer in the first composite structure peels off along the defective layer, thereby obtaining a second composite structure and a remaining single crystal silicon wafer. The second composite structure includes the bonded first single crystal silicon layer and the low-quality silicon carbide layer, as well as the damaged layer separated from the defective layer;

[0110] 4) performing surface treatment on the surface of the first single crystal silicon layer away from the low-quality silicon carbide layer to remove the damaged layer, thereby obtaining a substrate including a surface silicon layer.

[0111] In some embodiments of the present disclosure, the ions in step 1) may be hydrogen ions and / or helium ions.

[0112] In some embodiments of the present disclosure, the preset depth in step 1) is generally less than or equal to 1 μm, for example, it can be 0.1 μm, 0.15 μm, 0.2 μm, 0.5 μm or 1 μm.

[0113] In some embodiments of the present disclosure, the thickness of the bonding layer formed by direct contact bonding in step 2) is less than or equal to 5 nm.

[0114] In some embodiments of the present disclosure, the back surface of the single crystal silicon wafer and the front surface of the low-quality silicon carbide layer are surface treated so that the roughness of the back surface of the single crystal silicon wafer and the front surface of the low-quality silicon carbide layer is less than or equal to 0.5 nm, thereby improving the step bonding effect.

[0115] In some embodiments of the present disclosure, the method of applying stress in step 3) includes heat treatment and / or mechanical separation.

[0116] In some embodiments of the present disclosure, the method of removing the damaged layer in step 4) includes but is not limited to: at least one of wet cleaning, plasma activation, high temperature annealing, chemical mechanical polishing, mechanical polishing, reactive ion etching, ion beam etching, or ion beam grazing incidence polishing.

[0117] In some embodiments of the present disclosure, there is no specific limitation on the doping of the single crystal silicon wafer. For example, it can be a boron-doped p-type silicon wafer or an antimony-doped n-type silicon wafer.

[0118] In some embodiments of the present disclosure, the obtained substrate including the surface silicon layer is subjected to the methods of some embodiments of the present disclosure so that the surface silicon layer is entirely converted into silicon carbide, thereby obtaining a 3C-SiC / low-quality SiC composite substrate.

[0119] In some embodiments of the present disclosure, 3C-SiC in a 3C-SiC / low-quality SiC composite substrate is used as a seed layer and grown by a PVT (Physical Vapor Transport) method to obtain a 3C-SiC single crystal ingot material.

[0120] In some embodiments of the present disclosure, forming a substrate including a surface silicon layer may include the following steps:

[0121] S1. Using a Fast Atom Beam (FAB) in an ultra-high vacuum environment to clean the SiC wafer surface, for example, to remove oxide layers and contaminants.

[0122] S2. After cleaning the SiC wafer surface, a Si target is used for FAB sputtering to deposit a Si layer of approximately 10 nm on the SiC wafer;

[0123] S3. The Si wafer is subjected to FAB irradiation; at the same time, the surface of the SiC wafer is again activated by FAB irradiation, wherein about 3 nm of the Si layer deposited on the SiC is etched;

[0124] S4. The SiC wafer and the Si wafer were directly bonded at a pressure of about 4 MPa for 180 seconds to obtain a substrate containing a surface silicon layer.

[0125] In some embodiments of the present disclosure, during the surface cleaning of the SiC layer in step S1 and the sputtering deposition of the Si layer in step S2, the voltage and current of the FAB source are 1 kV and 100 mA, respectively. The substrate pressure is 5.0×10 -6 Pa.

[0126] In some embodiments of the present disclosure, the fast atom beam in step S1, step S2, and step S3 includes an argon fast atom beam (Argon Fast Atom Beam, abbreviated as Ar-FAB).

[0127] By adopting steps S1 to S4 in some embodiments of the present disclosure to form a substrate including a surface silicon layer, there is no need to use an ion beam implantation stripping process, and no damage is caused to the crystal quality. Therefore, there is no need to use annealing or other processes for subsequent repair, and the quality of the substrate including the surface silicon layer formed is better.

[0128] In some embodiments of the present disclosure, the obtained substrate including the surface silicon layer is subjected to the method in some embodiments of the present disclosure to partially generate silicon carbide on the surface silicon layer.

[0129] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include bonding low-quality SiC to the silicon layer and then thinning the silicon layer.

[0130] In some embodiments of the present disclosure, the silicon layer is thinned to within 200 nm.

[0131] In some embodiments of the present disclosure, after the silicon layer is thinned, the surface silicon layer is completely converted into silicon carbide using the methods in some embodiments of the present disclosure.

[0132] In some embodiments of the present disclosure, the processes for thinning the silicon layer on the surface of the SiC wafer include but are not limited to: ultra-precision grinding, lapping, chemical mechanical polishing (CMP), dry-polishing, electrochemical-etching, wet-etching, plasma-assisted chemical etching (PACE), and atmospheric-downstream-plasma-etching (ADPE).

[0133] In some embodiments of the present disclosure, annealing is performed during the process of generating silicon carbide in the surface silicon layer, or annealing is performed after silicon carbide is generated, so as to convert amorphous silicon in the Si layer deposited on the surface of the SiC layer during sputtering into silicon carbide to obtain a 3C-SiC / SiC composite substrate.

[0134] The 3C-SiC / SiC composite substrate obtained in some embodiments of the present disclosure can be used directly or after the 3C-SiC layer is thickened, according to actual needs.

[0135] In some embodiments of the present disclosure, the method for preparing a substrate including a silicon carbide layer may further include thickening the silicon carbide layer.

[0136] Processes for thickening the silicon carbide layer include, but are not limited to, chemical vapor deposition (CVD), physical vapor deposition (PVD), physical chemical vapor deposition (PCVD), and vacuum sublimation epitaxy. For example, in some embodiments of the present disclosure, vacuum sublimation epitaxy can be used to further thicken the 3C-SiC layer to approximately 1 mm.

[0137] In some embodiments of the present disclosure, the method of preparing a substrate including a silicon carbide layer may further include forming an epitaxial III-V layer by epitaxial growth on the silicon carbide layer.

[0138] In some embodiments of the present disclosure, the epitaxial III-V layer may include gallium nitride (GaN).

[0139] In some embodiments of the present disclosure, the substrate including the surface silicon layer is a single crystal silicon wafer. By using the methods in some embodiments of the present disclosure, silicon carbide is generated on the surface silicon layer on at least one side of the single crystal silicon wafer to obtain a 3C-SiC / Si composite substrate.

[0140] In some embodiments of the present disclosure, the substrate comprising a surface silicon layer is a diamond, sapphire or ceramic, and the surface thereof is a silicon layer. By using the methods in some embodiments of the present disclosure, the silicon layer on the surface of the diamond, sapphire or ceramic is entirely converted into silicon carbide, thereby obtaining composite substrates such as 3C-SiC / diamond, 3C-SiC / sapphire, and 3C-SiC / ceramic, respectively.

[0141] FIG. 2 shows a photograph of a substrate comprising a silicon carbide layer prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0142] As shown in FIG. 2 , the substrate comprising a silicon carbide layer prepared according to the method for preparing a substrate comprising a silicon carbide layer in some embodiments of the present disclosure does not have problems such as cracking and warping.

[0143] 3 shows a reflection high energy electron diffraction (RHEED) image of a substrate comprising a silicon carbide layer prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0144] As can be seen from FIG3 , the atomic arrangement within the surface of the prepared substrate including the silicon carbide layer is periodic and is a single crystal.

[0145] FIG4 illustrates an X-ray diffraction (XRD) test result of a substrate comprising a silicon carbide layer prepared by a method for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure.

[0146] As can be seen from Figure 4, the substrate containing a silicon carbide layer obtained by the method for preparing a substrate containing a silicon carbide layer according to some embodiments of the present disclosure has a periodic atomic arrangement in the direction perpendicular to the film, and pure SiC is obtained on the surface silicon layer, that is, silicon, rather than SixCy (x:y≠1:1) of other compositions. At the same time, there are no peaks of other crystal orientations of SiC except the Si substrate, indicating that single crystal SiC is obtained.

[0147] The methods for preparing a substrate comprising a silicon carbide layer according to some embodiments of the present disclosure can provide beneficial technical effects. For example, in some embodiments of the present disclosure, the method for preparing a substrate comprising a silicon carbide layer converts the surface silicon layer into a SiC layer by replacing silicon atoms with carbon atoms, thereby overcoming problems such as dislocations and cracks caused by lattice mismatch and different thermal expansion coefficients.

[0148] For example, in some embodiments of the present disclosure, inexpensive, low-quality silicon carbide and inexpensive single-crystal silicon wafers are used to produce composite substrates such as 3C-SiC / Si, thereby reducing the cost of SiC substrates. In another example, in some embodiments of the present disclosure, single-crystal silicon is bonded with low-quality silicon carbide and then converted into 3C-SiC. This process eliminates impurity diffusion issues and results in a higher-quality SiC substrate.

[0149] Those skilled in the art will appreciate that the method and apparatus for preparing a substrate including a silicon carbide layer according to some embodiments of the present disclosure are not limited to forming a substrate, but can also be used to form various semiconductor structures or semiconductor devices.

[0150] It should be pointed out that the above are only exemplary embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A method for preparing a substrate comprising a silicon carbide layer, characterized in that, Comprising: Forming an atmosphere of carbide-containing gas around a substrate including a surface silicon layer, and Heating the substrate including the surface silicon layer to form silicon carbide in the surface silicon layer; Or Performing pre-annealing after heating the substrate including the surface silicon layer, along with extracting the generated silicon vapor from the reaction zone, and Forming an atmosphere of carbide-containing gas around the substrate including the surface silicon layer, and heating the substrate including the surface silicon layer to form silicon carbide in the surface silicon layer.

2. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, The carbide-containing gas includes carbon monoxide and / or carbon dioxide, or A mixed gas of carbon monoxide and / or carbon dioxide and an inert gas.

3. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, The atmosphere of the carbide-containing gas further includes a silicon-containing gas.

4. The method for preparing a substrate comprising a silicon carbide layer according to claim 3, characterized in that, Forming an atmosphere of carbide-containing gas includes: Heating silicon powder to generate a silicon-containing gas; and / or Introducing a silicon-containing gas into the substrate including the surface silicon layer.

5. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, The silicon-containing gas includes silane and / or disilane and / or trichlorosilane.

6. The method for preparing a substrate comprising a silicon carbide layer according to claim 1, characterized in that, Controlling the ambient air pressure around the substrate including the surface silicon layer to 20 - 600 Pa; and Heating the ambient temperature of the substrate including the surface silicon layer to 950 - 1400 °C to form silicon carbide in the surface silicon layer; Or Performing pre-annealing after heating the substrate including the surface silicon layer, including: placing the substrate in a vacuum furnace, evacuating the air, heating the substrate including the surface silicon layer to 1200 - 1400 °C, and maintaining it for 1 - 150 minutes under a pressure of < 25 Pa, along with extracting the generated silicon vapor from the reaction zone; And Forming an atmosphere of carbide-containing gas around the substrate including the surface silicon layer, and controlling the ambient air pressure around the substrate including the surface silicon layer to 10 - 800 Pa; heating the ambient temperature of the substrate including the surface silicon layer to 1000 - 1400 °C to form silicon carbide in the surface silicon layer.

7. A method for preparing a substrate comprising a silicon carbide layer according to any one of claims 1-6, characterized in that, Further comprising: Bonding a low-quality SiC substrate with a silicon layer to form a substrate including a surface silicon layer.

8. The method for preparing a substrate comprising a silicon carbide layer according to claim 7, characterized in that, Further comprising, after bonding the low-quality SiC with the silicon layer, thinning the silicon layer.

9. The method for preparing a substrate comprising a silicon carbide layer according to any one of claims 1-6, characterized in that, Thickening the silicon carbide layer.

10. An apparatus for preparing a substrate comprising a silicon carbide layer, characterized in that, Comprising: A housing including an accommodation space; An air inlet provided on the housing for introducing a carbide-containing gas into the accommodation space; An air outlet provided on the housing; And A breathable chamber assembly provided in the accommodation space for placing at least one substrate including a surface silicon layer.

11. The apparatus for preparing a substrate comprising a silicon carbide layer according to claim 10, wherein, The breathable chamber assembly includes at least one graphite box for placing at least one substrate including a surface silicon layer.

12. The apparatus for preparing a substrate comprising a silicon carbide layer according to claim 11, wherein, At least one graphite box includes a plurality of stacked graphite boxes, and the graphite box includes: A flange or a bearing step formed on the inner wall for bearing the substrate including the surface silicon layer; A stacking step formed on the outer wall of the bottom for stacking with an adjacent graphite box; and A silicon powder placement area for placing silicon powder.

13. The apparatus for preparing a substrate comprising a silicon carbide layer according to claim 12, characterized in that, The breathable chamber assembly further includes a lid provided on top of at least one graphite box.

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