Light source driving device, light-emitting device, and ranging system

Abstract

[Problem] To prevent deterioration of light-emitting characteristics of a light-emitting element. [Solution] This light source driving device includes: a plurality of first transistors that are respectively provided for a plurality of light-emitting elements and that generate a current which flows in the corresponding light-emitting elements; and a plurality of second transistors arranged along a first direction with respect to the plurality of first transistors and that perform switching control with regard to whether or not to generate the current in the corresponding first transistors. The corresponding first transistors and the corresponding second transistors are arranged according to the pitch of two or more of the light-emitting elements arranged in a second direction intersecting the first direction.

Description

Light source driving device, light emitting device and ranging system

[0001] The present disclosure relates to a light source driving device, a light emitting device, and a distance measuring system.

[0002] A light emitting device has been proposed in which a light emitting element and a light source driving device that drives the light emitting element are stacked. For example, Patent Document 1 discloses a structure in which a vertical cavity surface emitting laser (VCSEL) chip is used as the light emitting element and the VCSEL chip and a laser driver chip are stacked.

[0003] Japanese Patent Application Laid-Open No. 2021-22689

[0004] Advances in microfabrication technology have led to a trend toward an increasing number of light-emitting elements in VCSEL chips. Laser driver chips are equipped with driver circuits that drive individual light-emitting elements. To increase the light-emitting intensity of the light-emitting elements, the transistors that make up the circuits mounted on the laser driver chip must be made to withstand high voltages, which increases the circuit area. This causes the length of the wiring connecting the light-emitting elements to the driver circuit in the laser driver chip to vary for each light-emitting element, and the magnitude of the parasitic capacitance of each wiring also varies. This can lead to variations in the light-emitting timing and light-emitting intensity of each light-emitting element, potentially degrading the light-emitting characteristics of a VCSEL chip equipped with multiple light-emitting elements.

[0005] Therefore, the present disclosure provides a light source driving device, a light emitting device, and a distance measuring system that can prevent deterioration of the light emitting characteristics of a light emitting element.

[0006] In order to solve the above problems, according to the present disclosure, a light emitting element includes a plurality of first transistors provided for each of a plurality of light emitting elements, each generating a current flowing through the corresponding light emitting element; and a plurality of second transistors arranged along a first direction for each of the plurality of first transistors, switching control of whether or not the corresponding first transistor generates the current, wherein the corresponding first transistors and second transistors are arranged to match the pitch of two or more of the light emitting elements arranged in a second direction intersecting the first direction.

[0007] A plurality of first wirings connecting the corresponding first transistors and the corresponding second transistors to the two or more light-emitting elements arranged in the second direction may be arranged substantially parallel to each other along the first direction.

[0008] The lengths of the plurality of first wirings connecting the corresponding first transistors and the corresponding second transistors to the two or more light-emitting elements arranged in the second direction may be substantially the same.

[0009] Each of the plurality of first wirings may be a wiring that connects the source of the corresponding first transistor and the drain of the corresponding second transistor.

[0010] The semiconductor device may further include a first capacitor disposed between regions of two of the second transistors adjacent to each other in the second direction, the first capacitor being connected to the gate of the corresponding first transistor and a reference voltage node.

[0011] Two or more second wirings connecting two or more of the light-emitting elements arranged in the second direction to the corresponding two or more first transistors may be arranged at intervals in the first direction, each of the two or more second wirings being a laminate of a first wiring layer and a second wiring layer extending in the second direction, and the two or more first transistors arranged in the second direction may be alternately connected to the first wiring layer or the second wiring layer of each of the different second wirings.

[0012] The first transistor may have a higher breakdown voltage than the second transistor, and may include a guard ring region disposed around the second transistor.

[0013] Two or more of the light-emitting elements may be arranged at a predetermined pitch along the first direction, two regions of the second transistors corresponding to two adjacent light-emitting elements in the first direction may be arranged to face each other without the guard ring region, and the guard ring region may be arranged to surround the two second transistor regions.

[0014] The light emitting element may further include a third transistor provided for each of the plurality of light emitting elements, connected in series to the corresponding first transistor, and configured to control the timing at which the corresponding light emitting element stops emitting light.

[0015] The third transistor may be disposed in the second direction relative to the corresponding first transistor.

[0016] In an area that overlaps in a planar view with the two or more light-emitting elements arranged in the second direction, two or more areas of the first transistors and two or more corresponding areas of the second transistors are arranged, and two or more areas of the third transistors corresponding to the two or more light-emitting elements arranged in the second direction may be arranged in an area that does not overlap in a planar view with the two or more light-emitting elements arranged in the second direction.

[0017] The regions of the two or more third transistors corresponding to the two or more light-emitting elements arranged in the second direction may be arranged on one or both ends of a group of regions including the regions of the two or more first transistors arranged in the second direction and the corresponding regions of the two or more second transistors.

[0018] The gate wiring may include a plurality of gate wirings that are connected to the gates of two or more of the first transistors corresponding to two or more of the light-emitting elements arranged in the first direction, each of which extends in the first direction and is arranged at intervals in the second direction; and beam wirings that connect two of the gate wirings adjacent to each other in the second direction, wherein the beam wirings may be arranged in a region of the two or more first transistors arranged in the second direction.

[0019] The regions of the two or more third transistors corresponding to the two or more light-emitting elements arranged in the second direction may be arranged on one end side or both end sides in the second direction relative to the arrangement region of the plurality of gate wirings.

[0020] The pixel may further include a fourth transistor that forms a current mirror circuit with two or more of the first transistors arranged in the second direction, and each of the plurality of gate wirings may be electrically connected to a gate of the fourth transistor.

[0021] The light-emitting element may include two or more conductive members each extending in the second direction, arranged between a plurality of second wirings connecting each of the two or more light-emitting elements arranged in the first direction to the corresponding first transistor.

[0022] The device may further include two or more second capacitors consisting of parasitic capacitances arranged between each of the two or more first conductive members and the corresponding second wiring, and each of the two or more first conductive members may be set to a predetermined reference voltage.

[0023] The semiconductor device may include a plurality of second conductive members arranged between a plurality of third wirings connecting each of the plurality of first transistors and the corresponding second transistor, each extending in the second direction; and two or more third capacitors consisting of parasitic capacitance arranged between each of the plurality of second conductive members and the corresponding third wiring, wherein each of the plurality of second conductive members may be set to a predetermined reference voltage.

[0024] According to the present disclosure, there is provided a light emitting device including: a light emitting section having the plurality of light emitting elements that perform surface emission; and the above-described light source driving device that drives the light emitting section.

[0025] According to the present disclosure, there is provided a ranging system comprising: the above-mentioned light emitting device that emits a pulsed light signal; a light receiving unit that receives a reflected light signal from an object irradiated with the light signal; and a ranging unit that measures the distance to the object based on the light signal emitted by the light emitting device and the reflected light signal received by the light receiving unit.

[0026] 1A and 1B are planar layout diagrams showing the layout arrangement of first wiring. FIGS. 3A and 3B are planar layout diagrams showing the layout arrangement of a light source driving device according to a second embodiment and a comparative example, respectively. FIG. 1B is an equivalent circuit diagram of a light source driving device according to a comparative example. FIG. 1C is an equivalent circuit diagram of a light source driving device according to a second embodiment. FIG. 1D is a planar layout diagram of the second embodiment corresponding to the equivalent circuit diagram of FIG. 5. FIG. 1E is an equivalent circuit diagram of a light source driving device taking into account parasitic capacitance between cathode wirings. FIGS. 8A and 8B are planar layout diagrams and cross-sectional views of cathode wiring in a third embodiment and a comparative example. FIG. 1E is a planar layout diagram in which a guard ring region is provided around the region of a second transistor. FIGS. 10A and 10B are cross-sectional views and plan views of a light source driving device according to a fourth embodiment and a comparative example. FIG. 1F is a planar layout diagram showing the layout arrangement of a light source driving device according to a fifth embodiment. FIG. 1G is a planar layout diagram showing the layout arrangement of a light source driving device according to a fifth embodiment and the layout arrangement of a plurality of light-emitting elements provided in a light-emitting device, as viewed from above. 18. A planar layout diagram showing the layout of a light source driving device according to a comparative example. A circuit diagram of a light source driving device according to the sixth embodiment. A planar layout diagram showing the layout of a light source driving device according to the sixth embodiment. A circuit diagram of a light source driving device according to a comparative example. A circuit diagram of a light source driving device according to the seventh embodiment. A current waveform diagram of the cathode wiring of each light-emitting element of FIG. 18 in a plurality of light-emitting channels. A planar layout diagram showing the layout of a light source driving device according to the seventh embodiment. A circuit diagram of a light source driving device according to a comparative example. A current waveform diagram of the cathode wiring of the light-emitting channel. A planar layout diagram of a light source driving device according to a comparative example. A block diagram showing an example configuration of a ranging system as an implementation example of the light-emitting device according to the present embodiment. A block diagram showing a detailed configuration of a light-emitting device having the light-source driving devices according to the first to seventh embodiments. A block diagram showing an example of the schematic configuration of a vehicle control system. An explanatory diagram showing an example of the installation positions of an outside vehicle information detection unit and an imaging unit.

[0027] Hereinafter, embodiments of a light source driving device, a light emitting device, and a distance measuring system will be described with reference to the drawings. The following description will focus on the main components of the light source driving device, the light emitting device, and the distance measuring system, but the light source driving device, the light emitting device, and the distance measuring system may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0028] First Embodiment FIG. 1 is a circuit diagram of a light source driving device 1 according to a first embodiment of the present disclosure. The light source driving device 1 according to the first embodiment drives each light emitting element of a VCSEL. The VCSEL includes multiple light emitting units, each of which has multiple light emitting channels. Each light emitting channel has multiple light emitting elements 2. The light source driving device 1 can individually control the light emission mode for each light emitting unit. The light emission mode refers to any combination of lighting or extinguishing of the individual light emitting channels in each light emitting unit.

[0029] 1 shows the circuit configuration of four light-emitting channels included in one light-emitting unit. Hereinafter, the four light-emitting channels will be referred to as light-emitting channels A, B, C, and D. Note that the number of light-emitting channels included in a light-emitting channel may be other than four. The number of light-emitting units included in a VCSEL is also arbitrary.

[0030] 1, four light-emitting elements 2 corresponding to four light-emitting channels are arranged in a first direction (e.g., row direction) X. Although not explicitly shown in FIG. 1, two or more light-emitting elements 2 are also arranged at a predetermined pitch in a second direction (e.g., column direction) Y in the VCSEL.

[0031] The light source driving device 1 has first to third transistors Q1 to Q3 for each light emitting element 2. The first transistor Q1 and the second transistor Q2 are, for example, NMOS (N-channel type Metal Oxide Semiconductor) transistors, and the third transistor Q3 is, for example, a PMOS (P-channel type Metal Oxide Semiconductor) transistor. In this specification, the first transistor Q1 and the second transistor Q2 may be referred to as a driving circuit.

[0032] The first transistor Q1 generates a current flowing through the corresponding light-emitting element 2. The first transistor Q1 and the fourth transistor Q4 form a current mirror circuit 3. The gate and drain of the fourth transistor Q4 are shorted, a current source 4 is connected between the drain of the fourth transistor Q4 and a first reference voltage node (e.g., a power supply voltage VDD node), a drain of a fifth transistor Q5 is connected to the source of the fourth transistor Q4, and the source of the fifth transistor Q5 is connected to a second reference voltage node (e.g., a ground voltage VSS node). The gate of the fifth transistor Q5 is connected to the first reference voltage node, and the fifth transistor Q5 functions as a constant current source 4. The gate of the first transistor Q1 is connected to the gate of the fourth transistor Q4, and a current proportional to the current flowing between the drain and source of the fourth transistor Q4 flows between the drain and source of the first transistor Q1.

[0033] The drain of the second transistor Q2 is connected to the source of the first transistor Q1, and the source of the second transistor Q2 is connected to a second reference voltage node. The second transistor Q2 controls whether or not the corresponding first transistor Q1 generates the current described above. An adjustment signal is input to the gate of the second transistor Q2 from a timing adjustment unit (not shown in FIG. 1). When the second transistor Q2 is turned on, a current flows between the drain and source of the corresponding first transistor Q1 when the gate of the first transistor Q1 goes high, causing the corresponding light-emitting element 2 to emit light. When the second transistor Q2 is turned off, no current flows between the drain and source of the corresponding first transistor Q1, causing the corresponding light-emitting element 2 to turn off.

[0034] The source of the third transistor Q3 is connected to the first reference voltage node, and the drain of the third transistor Q3 is connected to the drain of the first transistor Q1 and the cathode of the light-emitting element 2. A bias signal is input to the gate of the third transistor Q3 from a bias circuit not shown in FIG. 1. The third transistor Q3 controls the timing at which the corresponding light-emitting element 2 stops emitting light. The third transistor Q3 turns on in synchronization with the timing at which the second transistor Q2 turns off. When the third transistor Q3 turns on, the voltage level of the cathode wiring of the light-emitting element 2 rises, and the corresponding light-emitting element 2 stops emitting light.

[0035] 1, the gates of the four first transistors Q1 corresponding to the four light-emitting elements 2 are all connected to the gate of the fourth transistor Q4. In this specification, the wiring connecting the gate of the fourth transistor Q4 and the gates of the four first transistors Q1 is referred to as a common gate wiring CG.

[0036] Since different switching control signals are input to the gates of the four second transistors Q2 in the four light-emitting units shown in FIG. 1, the light-emitting timing of the four light-emitting elements 2 can be controlled individually.

[0037] Of the first to third transistors Q1 to Q3 shown in FIG. 1 , the first transistor Q1 and the third transistor Q3 may be configured, for example, as high-voltage transistors (e.g., LDMOS: Laterally Diffused Meta Oxide Semiconductor), and the second transistor Q2 may be configured as a low-voltage transistor. The first to third transistors may also be configured as medium-voltage or low-voltage transistors. Increasing the light-emitting intensity of the light-emitting element 2 requires increasing the current flowing through the light-emitting element 2. When the light-emitting element 2 is not in operation, the drain of the first transistor Q1 increases to the power supply voltage level, so it is desirable for the first transistor Q1 to have a higher voltage resistance than the second transistor Q2. When the light-emitting element 2 is in operation, the cathode potential of the light-emitting element 2 drops by the forward voltage, lowering the drain potential of the third transistor Q3. Therefore, it is desirable for the third transistor Q3 to have a high voltage resistance. If the first transistor Q1 and the third transistor Q3 are made high-voltage transistors, the areas of the regions RG1 and RG3 of the first transistor Q1 and the third transistor Q3 become large, and the operating speed decreases.

[0038] 2A and 2B are planar layout diagrams showing the layout of a region RG1 of a first transistor Q1, a region RG2 of a second transistor Q2, and a first wiring WR1 connecting the source of the first transistor Q1 and the corresponding drain of the second transistor Q2. Fig. 2A shows the layout of a light-source driving device 1 according to the first embodiment, and Fig. 2B shows the layout of a light-source driving device 1 according to a comparative example. Both Fig. 2A and Fig. 2B show the layout of a total of eight light-emitting channels in two light-emitting units.

[0039] 2A , in the first embodiment, a region RG1 of a first transistor Q1 and a region RG2 of a corresponding second transistor Q2 are arranged along a first direction (e.g., a row direction) X. Furthermore, corresponding first transistors Q1 and second transistors Q2 are arranged to match the pitch of light-emitting elements 2 arranged in a second direction (e.g., a column direction) Y. As a result, a wiring WR1 connecting the source of the corresponding first transistor Q1 and the drain of the corresponding transistor Q2 is arranged approximately parallel to the second direction Y.

[0040] Furthermore, the regions RG1 of the first transistors Q1 of different light-emitting channels are arranged along the second direction Y. Similarly, the regions RG2 of the second transistors Q2 of different light-emitting channels are arranged along the second direction Y. More specifically, in the first embodiment, the regions RG1 of the first transistors Q1 of each light-emitting channel included in one light-emitting unit are arranged along the second direction Y, and then the regions RG1 of the first transistors Q1 of each light-emitting channel included in another light-emitting unit are arranged along the second direction Y. Parallel to the regions RG1 of the first transistors Q1, the regions RG2 of the second transistors Q2 of each light-emitting channel included in one light-emitting unit are arranged along the second direction Y, and then the regions RG2 of the second transistors Q2 of each light-emitting channel included in another light-emitting unit are arranged along the second direction Y.

[0041] 2B , in one comparative example, the four first transistors Q1 in the four light-emitting channels included in one light-emitting unit are sequentially arranged in the second direction Y, and then the four second transistors Q2 in the four light-emitting channels included in another light-emitting unit are sequentially arranged in the second direction Y. In the comparative example, the first wiring WR1 connecting the source of the first transistor Q1 and the drain of the corresponding second transistor Q2 extends along the second direction Y.

[0042] 2A , the first embodiment has a shorter first wiring WR1 connecting the source of the first transistor Q1 and the drain of the second transistor Q2 than the comparative example, and the variation in the length of the first wiring WR1 is smaller. The longer the first wiring WR1, the longer the signal propagation time, resulting in a delay in the light emission timing. Furthermore, the longer the first wiring WR1, the greater the variation in wiring length, resulting in a greater deviation in the light emission timing.

[0043] 2A , in the first embodiment, the region RG1 of the first transistor Q1 and the corresponding region RG2 of the second transistor Q2 are arranged adjacent to each other along the first direction X. This allows the first wiring WR1 connecting the source of the first transistor Q1 and the drain of the second transistor Q2 to be arranged along the first direction X, and the wiring length of the first wiring WR1 can be made as short as possible, thereby suppressing variations in the wiring length of the first wiring WR1. In this way, in the first embodiment, the first wirings WR1 arranged in the second direction Y can be arranged substantially parallel to each other along the first direction X, and the wiring lengths of the first wirings WR1 can be made uniform. This reduces deviations in the light emission timing of the light-emitting elements 2, and uniforms the light-emitting characteristics of the light-emitting elements 2.

[0044] 2A is adopted, the width in the second direction Y of the region RG1 of the first transistor Q1 does not necessarily match the width in the second direction Y of the region RG2 of the second transistor Q2. In particular, if the first transistor Q1 has a high withstand voltage and the second transistor Q2 has a low withstand voltage, the width in the second direction Y of the region RG1 of the first transistor Q1 becomes larger than the width in the second direction Y of the region RG2 of the second transistor Q2.

[0045] 3A and 3B are planar layout diagrams showing the layout of the light source driving device 1 according to the second embodiment and a comparative example, respectively. Fig. 3A shows the layout of the light source driving device 1 according to the second embodiment, and Fig. 3B shows the layout of the light source driving device 1 according to the comparative example.

[0046] As described above, the first transistor Q1 is a high-voltage transistor, and the second transistor Q2 is a low-voltage transistor, and the width in the second direction Y of the region RG1 of the first transistor Q1 is larger than the width in the second direction Y of the region RG2 of the second transistor Q2.

[0047] Therefore, in the second embodiment, as shown in FIG. 3A , among the regions RG2 of the multiple second transistors Q2 aligned in the second direction Y, a gap 5 is provided between the regions RG2 of two adjacent second transistors Q2 in the second direction Y, so that the pitch of the regions RG1 of the multiple first transistors Q1 aligned in the first direction X matches the pitch of the regions RG2 of the multiple second transistors Q2 aligned in the second direction Y. This allows the first wiring WR1 connecting the source of the corresponding first transistor Q1 and the drain of the corresponding second transistor Q2 to be arranged approximately parallel to the first direction X. Some kind of circuit component may be mounted in the gap 5. For example, a dummy transistor may be arranged in the gap 5.

[0048] In contrast, in one comparative example, the regions RG2 of two second transistors Q2 adjacent to each other in the second direction Y are brought into close contact with each other, so that the lengths and directions of the first wirings WR1 connecting the sources of the first transistors Q1 aligned in the second direction Y to the drains of the corresponding second transistors Q2 are different from each other. As a result, in the comparative example, the light emission timings of the plurality of light-emitting elements 2 differ, making it difficult to uniform the light-emitting characteristics of the plurality of light-emitting elements 2.

[0049] FIG. 4 is an equivalent circuit diagram of a light source driving device 1 according to a comparative example. In this comparative example, as shown in FIG. 2B , the length of the wiring connecting the source of the first transistor Q1 and the drain of the second transistor Q2 is not constant. Therefore, as shown in FIG. 4 , the circuit is equivalent to a circuit in which wiring resistors R1 to R4 with different resistance values ​​are connected between the source of the first transistor Q1 and the drain of the second transistor Q2 for each light-emitting channel. Furthermore, since the fourth transistor Q4, which forms the current mirror circuit 3 with the first transistor Q1, is often located far from the first transistor Q1, a capacitor C1 is connected between the wiring (common gate wiring CG) connecting the gate of the first transistor Q1 and the gate of the fourth transistor Q4 and the ground voltage VSS node to suppress AC voltage level drops in the gate voltage. The common gate wiring CG also has a wiring resistor R5. Therefore, in the light source driving device 1 according to the comparative example, it is necessary to secure an area for placing the capacitor C1.

[0050] 5 is an equivalent circuit diagram of a light source driving device 1 according to a second embodiment. In the second embodiment, the capacitor C1 in FIG. 4 is replaced with a plurality of capacitors C2, one for each light-emitting channel, and each capacitor C2 is disposed immediately adjacent to the gate of the first transistor Q1 of the corresponding light-emitting channel. Furthermore, in this embodiment, as shown in FIG. 2A , the length of the first wiring WR1 connecting the source of the first transistor Q1 and the drain of the second transistor Q2 is shorter and more uniform than in the comparative example. This allows the wiring resistances R1 to R4 to be uniformly small, thereby suppressing variations in the wiring resistances R1 to R4.

[0051] 6 is a planar layout diagram of the second embodiment corresponding to the equivalent circuit diagram of FIG. The width in the second direction Y of the region RG1 of the first transistor Q1 is larger than the width in the second direction Y of the region RG2 of the second transistor Q2. To match the pitch, a gap 5 similar to that shown in FIG. 3A is provided between the regions RG2 of two second transistors Q2 adjacent to each other in the second direction Y, and a capacitor C2 is disposed in this gap 5. The capacitor C2 may have any structure, such as a MOS (Metal Oxide Semiconductor) capacitor, a MIM (Metal Insulator Metal), or a MOM (Metal Oxide Metal) capacitor.

[0052] This allows the pitch of the placement areas in the second direction Y of the first transistor Q1 and the second transistor Q2 to be aligned, and the length and direction of the first wiring WR1 connecting the source of the first transistor Q1 and the drain of the second transistor Q2 of each light-emitting channel to be aligned, thereby suppressing deviations in light-emitting timing.

[0053] As described above, in the second embodiment, since the first transistor Q1 is a high-voltage transistor and the second transistor Q2 is a low-voltage transistor, the region RG1 of the first transistor Q1 is wider than the region RG2 of the second transistor Q2. Therefore, a gap 5 is provided between the regions RG2 of two adjacent second transistors Q2 in the second direction Y, and the pitch of the regions RG1 of the multiple first transistors Q1 arranged in the second direction Y can be aligned with the pitch of the regions RG2 of the multiple second transistors Q2.

[0054] Furthermore, the capacitor C1 connected to the common gate wiring CG connecting the gate of the fourth transistor Q4 and the gates of the plurality of first transistors Q1 is replaced with a plurality of capacitors C2, and each capacitor C2 is arranged near the gate of the corresponding first transistor Q1, thereby eliminating the need for the capacitor C1 connected to the common gate wiring CG and eliminating the need for space for the capacitor C1, thereby reducing the circuit size of the light source driving device 1. Furthermore, the plurality of capacitors C2 arranged near the gates of the plurality of first transistors Q1 are arranged in the gaps 5 between the regions of the plurality of second capacitors aligned in the second direction Y, eliminating the need to reserve space for these capacitors C2. Thus, the light emission characteristics of the plurality of light-emitting elements 2 can be made uniform while reducing the circuit size of the light source driving device 1.

[0055] Third Embodiment With the advancement of microfabrication technology, VCSELs tend to have an increasing number of light-emitting elements 2. As the number of light-emitting elements 2 increases, the distance between the wirings (hereinafter referred to as cathode wirings or second wirings WR2) extending from the cathodes of two adjacent light-emitting elements 2 becomes narrower, which increases the parasitic capacitance between the cathode wirings WR2 and may adversely affect the light-emitting characteristics.

[0056] 7 is an equivalent circuit diagram of the light source driving device 1 taking into consideration the parasitic capacitance between the cathode wirings WR2. As shown in Fig. 7, of the four cathode wirings WR2 corresponding to the four light-emitting channels, a parasitic capacitance C3 occurs between two cathode wirings WR2 adjacent to each other in the first direction X. This parasitic capacitance C3 increases as the distance between the two adjacent cathode wirings WR2 decreases.

[0057] The light source driving device 1 according to the third embodiment is characterized in that the cathode of the light emitting element 2 is connected to the drain of the corresponding first transistor Q1 so that the parasitic capacitance C3 between the plurality of cathode wirings WR2 adjacent to each other in the first direction X is minimized.

[0058] 8A and 8B are planar layout and cross-sectional views of the cathode wiring WR2 according to the third embodiment and a comparative example, respectively. Fig. 8A shows the planar layout and cross-sectional structure of the cathode wiring WR2 according to the third embodiment, and Fig. 8B shows the planar layout and cross-sectional structure of the cathode wiring WR2 according to a comparative example.

[0059] The cathode wiring WR2 has a layered structure in which a second wiring layer WR22 is stacked on a first wiring layer WR21. In the third embodiment, as shown in FIG. 8A , the first wiring layer WR21 and the second wiring layer WR22, which are different layers, are alternately arranged in the first direction X, and the first wiring layer WR21 is connected to the source of, for example, an odd-numbered first transistor Q1 among the multiple first transistors Q1 aligned in the second direction Y. The second wiring layer WR22 is connected to the source of, for example, an even-numbered first transistor Q1 among the multiple first transistors Q1 aligned in the second direction Y. This makes it possible to widen the gap between two cathode wirings WR2 adjacent to each other in the first direction X, thereby suppressing the parasitic capacitance C3 between two cathode wirings WR2 adjacent to each other in the first direction X.

[0060] On the other hand, in one comparative example, as shown in FIG. 8B , the first wiring layer WR21 and the second wiring layer WR22 that constitute the cathode wiring WR2 are joined, and two cathode wirings WR2 adjacent to each other in the first direction X are connected to the sources of two first transistors Q1 adjacent to each other in the second direction Y. As a result, the distance between two adjacent cathode wirings WR2 is narrower than in the third embodiment shown in FIG. 8A , and the parasitic capacitance C3 between two adjacent cathode wirings WR2 in the second direction Y becomes larger.

[0061] In this way, in the third embodiment, the plurality of cathode wirings WR2 are formed using the first wiring layers WR21 or the second wiring layers WR22 arranged alternately along the first direction X, so that the parasitic capacitance C3 between two cathode wirings WR2 adjacent to each other in the first direction X can be reduced, and fluctuations in the light-emitting characteristics of the plurality of light-emitting elements 2 can be suppressed.

[0062] Fourth Embodiment When the first transistor Q1 and the second transistor Q2 have different structures (for example, different breakdown voltages), a guard ring region must be provided around the region RG2 of the second transistor Q2. The guard ring region is a well region in which impurity ions are diffused.

[0063] 9 is a planar layout diagram in which a guard ring region 6 is provided around the region RG2 of the second transistor Q2, based on the layout arrangement of FIG. 2A. The provision of the guard ring region 6 increases the circuit area in the first direction X and the second direction Y.

[0064] 10A and 10B are cross-sectional and plan views of a light source driving device 1 according to the fourth embodiment and a comparative example. FIG. 10A is a cross-sectional and plan view taken along line A-A in FIG. 9. Provided on a P-type silicon substrate 7 are a P-type well region 8 for a first transistor Q1, a gate layer 9 for the first transistor Q1, a guard ring region 6 including an N-type well region 10 and a deep N-type well region 11 surrounding a second transistor Q2, a P-type well region 12 for a second transistor Q2 disposed within the guard ring region 6, and a gate layer 13 for the second transistor Q2. An N-channel region 14 is disposed below the gate layer 9 for the first transistor Q1, and an N-channel region 15 is disposed below the gate layer 13 for the second transistor Q2.

[0065] The light source driving device 1 according to the fourth embodiment is characterized in that the area of ​​the guard ring region 6 surrounding the region RG2 of the second transistor Q2 is reduced.

[0066] 11 is a planar layout diagram showing the layout of a light source driving device 1 according to the fourth embodiment. As shown in FIG. 11 , the light source driving device 1 according to the fourth embodiment has two second transistors Q2 for two light-emitting channels closely arranged facing each other along the first direction X without a guard ring region 6, and these two second transistors Q2 are surrounded by a guard ring region 6. This makes it possible to eliminate the guard ring region 6 between the two second transistors Q2, thereby reducing the width in the second direction Y.

[0067] 10B is a cross-sectional view and a plan view taken along line A-A in FIG. 11. Regions RG2 of two second transistors Q2, each consisting of two P-type well regions 8 for two light-emitting channels, are connected along the first direction X, and a guard ring region 6 consisting of an N-type well region 10 and a deep N-type well region 11 is arranged to surround these two P-type well regions 8. This allows the guard ring region 6 in the second direction Y to be partially omitted compared to the comparative example, thereby reducing the circuit area in the first direction X.

[0068] In this way, in the fourth embodiment, even when the region RG2 of the second transistor Q2 is surrounded by the guard ring region 6, the regions RG2 of the two second transistors Q2 for the two light-emitting channels arranged in the first direction X are connected to face each other and are surrounded by the guard ring region 6, thereby reducing the circuit area in the first direction X.

[0069] 1, the light source driving device 1 according to the first to fourth embodiments includes a third transistor Q3 that controls the timing of stopping light emission of the light emitting element 2. The third transistor Q3 is arranged, for example, at one end or both ends of a row of a region RG2 of the first transistor Q1 and the second transistor Q2 arranged along the second direction Y.

[0070] Fig. 12 is a planar layout diagram showing the layout of a light source driving device 1 according to the fifth embodiment. The light source driving device 1 according to the fifth embodiment has a layout in which a region RG3 of the third transistor Q3 is arranged at one end or both ends in the second direction Y in the layout of Fig. 3B or Fig. 6. Fig. 12 shows an example in which the region RG3 of the third transistor Q3 is arranged at one end in the second direction Y in the layout of Fig. 3B or Fig. 6, but the region RG3 of the third transistor Q3 may also be arranged at both ends in the second direction Y in the layout of Fig. 6.

[0071] When the light source driving device 1 according to the fifth embodiment has the circuit configuration shown in FIG. 1, for example, it has a light-emitting unit having four light-emitting channels, and therefore, in FIG. 12, the regions RG3 of the four third transistors Q3 corresponding to the four light-emitting channels are arranged in order in the second direction Y.

[0072] Since the current that flows between the drain and source of the third transistor Q3 is not as large as that between the drain and source of the first transistor Q1 and the second transistor Q2, even if the length of the wiring connecting the source of the third transistor Q3 and the drain of the first transistor Q1 varies, the effect on the light-emitting characteristics is small. Therefore, in Figure 12, multiple regions RG3 of the third transistor Q3 are provided at one end or both ends of the second direction Y where multiple regions RG1 of the first transistor Q1 and regions RG2 of the second transistor Q2 are aligned.

[0073] 13 is a planar layout diagram showing the layout of the light-source driving device 1 according to the fifth embodiment and the layout of the plurality of light-emitting elements 2 included in the light-emitting device 30. The plurality of light-emitting elements 2 are arranged in the center of the arrangement area of ​​the light-source driving device 1 in the second direction Y. In FIG. 13, each light-emitting element 2 is indicated by a black circle, and the outer size of the light-emitting device 30 is illustrated by a dashed-dotted frame 20A.

[0074] 13 , a region RG2 of some of the first transistors Q1 and second transistors Q2 in the light source driving device 1 is arranged within the range of the external size of the light emitting device 30, while the remaining first transistors Q1 and second transistors Q2 are arranged outside the range of the external size of the light emitting device 30. Furthermore, a region RG3 of the third transistor Q3 is arranged outside the region RG2 of the first transistors Q1 and second transistors Q2 arranged in order in the second direction Y. Thus, in FIG. 13 , the regions of two or more first transistors Q1 and the regions of two or more corresponding second transistors Q2 are mainly arranged in the region overlapping with two or more light emitting elements 2 arranged in the second direction Y in a planar view, while the regions of two or more third transistors Q3 corresponding to two or more light emitting elements 2 arranged in the second direction Y are mainly arranged in the region not overlapping with two or more light emitting elements 2 arranged in the second direction Y in a planar view.

[0075] 13 , since as many first transistors Q1 and second transistors Q2 as possible are disposed directly below the plurality of light-emitting elements 2, it is possible to shorten the length of the first wiring WR1 connecting the cathodes of the plurality of light-emitting elements 2, the sources of the corresponding first transistors Q1, and the drains of the corresponding second transistors Q2. Also, in the example of FIG. 13 , since the regions RG3 of the plurality of third transistors Q3 that do not affect the light-emitting characteristics are disposed on both end sides in the second direction Y where the plurality of first transistors Q1 and second transistors Q2 are arranged, it is possible to dispose as many first transistors Q1 and second transistors Q2 as possible in the vicinity of the plurality of light-emitting elements 2.

[0076] 14 is a planar layout diagram showing the layout of a light source driving device 1 according to a comparative example. As shown in Fig. 14, the light source driving device 1 according to the comparative example includes a region RG3 of multiple third transistors Q3 arranged near the center in the second direction Y of the arrangement region of the light source driving device 1, regions RG1 of two first transistors Q1 arranged on both ends of this arrangement region in the second direction Y, and regions RG2 of two second transistors Q2 arranged on both ends of the region RG1 of the two first transistors Q1 in the second direction Y.

[0077] In one comparative example, the regions RG3 of the multiple third transistors Q3 are arranged directly below the multiple light-emitting elements 2, so the length of the first wiring WR1 connecting the cathodes of the multiple light-emitting elements 2, the sources of the corresponding first transistors Q1, and the drains of the corresponding second transistors Q2 becomes longer, and the variation in wiring length becomes greater, making it more likely that fluctuations in the light-emitting characteristics will occur.

[0078] In this way, in the fifth embodiment, a plurality of first transistors Q1 and second transistors Q2 are arranged in a concentrated manner directly below a plurality of light-emitting elements 2, and the third transistor Q3 is arranged at one end or both ends in the second direction Y where the regions RG2 of the plurality of first transistors Q1 and second transistors Q2 are aligned. This makes it possible to shorten the length of the first wiring WR1 connecting the cathodes of the plurality of light-emitting elements 2, the sources of the corresponding first transistors Q1, and the drains of the corresponding second transistors Q2, and thereby suppress variation in wiring length, thereby improving the light-emitting characteristics.

[0079] Sixth Embodiment Fig. 15 is a circuit diagram of a light source driving device 1 according to a sixth embodiment. The circuit configuration of the light source driving device 1 in Fig. 15 is the same as that of the light source driving device 1 in Fig. 1, but the light source driving device 1 according to the sixth embodiment is characterized in the layout of the common gate wiring CG that connects the gates of the plurality of first transistors Q1 and the gate of the fourth transistor Q4 that constitute the current mirror circuit 3.

[0080] 16 is a planar layout diagram showing the layout of a light source driving device 1 according to a sixth embodiment. In Fig. 16, similar to Fig. 11, regions RG2 of two second transistors Q2 for two light-emitting channels adjacent in the first direction X are arranged to face each other. Regions RG1 of multiple first transistors Q1 and regions RG2 of corresponding second transistors Q2 are concentrated along the second direction Y near the center of the arrangement area of ​​the light source driving device 1 in the second direction Y, and regions RG3 of multiple third transistors Q3 are arranged at one end or both ends of the regions RG2 of the multiple first and second transistors Q1 and Q2 in the second direction Y.

[0081] Furthermore, near the center in the second direction Y in the arrangement area of ​​the light source driving device 1, three common gate wirings CG each extending in the first direction X are arranged at intervals in the second direction Y, and two common gate wirings CG adjacent to each other in the second direction Y are connected by a plurality of beam wirings 16. The plurality of beam wirings 16 can be arranged in the gap 5 between the first transistor Q1 and the second transistor Q2 arranged in the first direction X, and the length of the beam wirings 16 can be shortened, so that the wiring resistance of the beam wirings 16 can be reduced and variations in the voltage level of each common gate wiring CG can be suppressed. Note that the arrangement locations of the plurality of beam wirings 16 are arbitrary and are not necessarily limited to being arranged in the gap 5.

[0082] 16, the three common gate wirings CG are arranged so as to overlap the regions RG2 of the plurality of first and second transistors Q1 and Q2 in a plan view, so that the length of the first wiring WR1 connecting the cathode of the light-emitting element 2, the source of the first transistor Q1, and the drain of the second transistor Q2 can be shortened, and the difference in timing of transition of the gate signals of the plurality of first transistors Q1 can be suppressed, thereby making the light-emitting characteristics uniform. Note that there is no limit to the number of common gate wirings CG, and it is not limited to three.

[0083] In particular, even if the number of light-emitting elements 2 that emit light differs above and below the three common gate wirings CG in the second direction Y, the voltage levels of the three common gate wirings CG can be made common, thereby suppressing fluctuations in the light-emitting characteristics.

[0084] Although not shown in FIG. 16, the ground wiring can also be arranged in a layer different from the common gate wiring CG in the same manner as the three common gate wirings CG, thereby suppressing variations in the ground voltage VSS.

[0085] 17 is a circuit diagram of a light source driving device 1 according to a comparative example. The light source driving device 1 according to the comparative example includes a region RG3 of multiple third transistors Q3 arranged in approximately the center in the second direction Y of the arrangement region of the light source driving device 1, regions RG1 of two first transistors Q1 arranged on both end sides in the second direction Y of the region RG3 of the multiple third transistors Q3, and regions RG2 of two second transistors Q2 arranged on both end sides in the second direction Y of the region RG1 of the two first transistors Q1.

[0086] In addition, the light source driving device 1 according to one comparative example includes two common gate wirings CG that are arranged to overlap the regions RG1 of the two first transistors Q1 in a planar view, and a beam wiring 16 that connects these two common gate wirings CG.

[0087] The third transistor Q3 is a transistor of a different conductivity type (e.g., P-type) than the first and second transistors Q1 and Q2. The region RG3 of the multiple third transistors Q3 requires different power wiring and well regions than the region RG2 of the multiple first and second transistors Q1 and Q2, leaving no space for the beam wiring 16. For this reason, in FIG. 17 , the beam wiring 16 is provided in a location different from the region of the multiple first to third transistors Q1 to Q3, increasing the area of ​​the light source driving device 1. Furthermore, the longer the beam wiring 16, the higher the wiring resistance and the larger the voltage drop across the beam wiring 16, which can easily cause variations in light-emitting characteristics. In particular, if the number of light-emitting elements 2 emitting light differs above and below the two common gate wirings CG in the second direction Y, the difference in voltage levels between the two common gate wirings CG becomes significant, resulting in different light-emitting characteristics of the light-emitting elements 2 on the upper and lower sides.

[0088] As described above, in the sixth embodiment, the regions RG1 and RG2 of the first and second transistors Q1 and Q2 are concentrated near the center in the second direction Y in the arrangement region of the light source driving device 1, and a plurality of common gate wirings CG and beam wirings 16 are also arranged. This makes it possible to suppress fluctuations in the gate voltages of the plurality of first transistors Q1, and also to suppress voltage drops in the beam wirings 16 by shortening the beam wirings 16, thereby reducing variations in the light emission characteristics of the plurality of light-emitting elements 2.

[0089] Seventh Embodiment Fig. 18 is a circuit diagram of a light source driving device 1 according to a seventh embodiment. The light source driving device 1 according to the seventh embodiment includes a first transistor Q1 and a second transistor Q2 connected in series between the cathode of the light emitting element 2 and a second reference voltage (e.g., ground voltage VSS) node. Although the third transistor Q3 is omitted in Fig. 18, a third transistor Q3 similar to that in Fig. 1 may be added. Fig. 18 illustrates the circuit configuration of one light emitting unit having four light emitting channels.

[0090] The light source driving device 1 according to the seventh embodiment includes a shield wiring 17 and a capacitor C4 for each light-emitting channel. The shield wiring 17 is a conductive member connected to a second reference voltage (e.g., ground voltage VSS) node. The capacitor C4 is connected between the shield wiring 17 and the cathode wiring WR2 of the light-emitting element 2. The capacitor C4 is a parasitic capacitance of the wiring.

[0091] 19 is a current waveform diagram of the cathode wiring WR2 of each light-emitting element 2 of FIG. 18 in the multiple light-emitting channels A to D. When multiple cathode wirings WR2 are arranged closely together, parasitic capacitance occurs between two adjacent cathode wirings WR2, and when the voltage level of one cathode wiring WR2 changes, the voltage level of the other cathode wiring WR2 changes accordingly. However, by providing a shield wiring 17 and a capacitor C4 between each cathode wiring WR2 as in this embodiment, the influence of the above-mentioned parasitic capacitance can be avoided, and the voltage waveform of each cathode wiring WR2 in the multiple light-emitting channels A to D becomes as shown in FIG. 19, thereby suppressing variations in the light-emitting characteristics of each light-emitting channel.

[0092] FIG. 20 is a planar layout diagram showing the layout of the light source driving device 1 according to the seventh embodiment. The layout of FIG. 20 corresponds to the circuit configuration in which a third transistor Q3 is added to the circuit of FIG. 18 . The layout of FIG. 20 is the layout in which shielding wiring 17 is added to the layout of FIG. 12 . Each shielding wiring 17 is arranged along the second direction Y. More specifically, each shielding wiring 17 is arranged along the second direction Y so as to pass through a region RG1 of a plurality of first transistors Q1 and a region RG3 of a third transistor Q3. A capacitor C4 connected between the shielding wiring 17 and the cathode wiring WR2 is arranged, for example, between the regions RG2 of two second transistors Q2 adjacent to each other in the second direction Y.

[0093] FIG. 21 is a circuit diagram of a light source driving device 1 according to a comparative example, FIG. 22 is a current waveform diagram of the cathode wiring WR2 of light-emitting channels A to D, and FIG. 23 is a planar layout diagram of the light source driving device 1 according to the comparative example. In the light source driving device 1 according to the comparative example, shield wiring 17 is connected via a capacitor C4 to two cathode wirings WR2 corresponding to two of the four light-emitting channels in one light-emitting unit that are located at both ends in the second direction Y. The two cathode wirings WR2 corresponding to the other two light-emitting channels are not provided with shield wiring 17. A parasitic capacitance C4 is generated between the two cathode wirings WR2 that are not provided with shield wiring 17 and the two cathode wirings WR2 that are provided with shield wiring 17. For example, when the voltage level of the cathode wiring WR2 of light-emitting channel B changes, the voltage level of the cathode wiring WR2 of light-emitting channel C also changes due to capacitive coupling caused by the parasitic capacitance C4. Therefore, the voltage waveform of the cathode wiring WR2 of the light-emitting channels B and C, which are not provided with the shield wiring 17, will be different from the voltage waveform of the cathode wiring WR2 of the light-emitting channels A and D, which are provided with the shield wiring 17.

[0094] 18 to 20 show an example in which a shield wiring 17 and a capacitor C4 are provided between each cathode wiring WR2, but a plurality of shield wirings (second conductive members) extending in the second direction Y may be provided between each wiring (third wiring) connecting the sources of the plurality of first transistors Q1 and the drains of the corresponding second transistors Q2 in FIG. 18. A parasitic capacitance (third capacitor) is disposed between each of these shield wirings and the corresponding third wiring. Similar to the shield wiring 17 in FIG. 20, these shield wirings are connected to, for example, a second reference voltage (e.g., ground voltage VSS) node.

[0095] In this way, in the seventh embodiment, the shield wiring 17 and the capacitor C4 are provided for each light-emitting channel, so even if two adjacent cathode wirings WR2 are close to each other and a parasitic capacitance C4 occurs between the two cathode wirings WR2, there is no risk of a change in the voltage level of one cathode wiring WR2 being transmitted to the other cathode wiring WR2, and the voltage waveforms of all the cathode wirings WR2 can be made uniform. Therefore, according to this embodiment, it is possible to suppress variations in the light-emitting characteristics of each light-emitting channel.

[0096] Eighth Embodiment A light source driving device 1 can be realized by arbitrarily combining the technical features of the light source driving devices 1 according to the first to seventh embodiments described above.

[0097] It is also possible to configure a light emitting device 30 including the light source driving device 1 according to the first to seventh embodiments and a plurality of light emitting elements 2. In this case, the light emitting device 30 may have a stacked structure in which an LDD (Laser Diode Driver) chip on which the light source driving device 1 is mounted and a VCSEL chip on which a plurality of light emitting elements 2 are mounted are stacked, or a structure in which the LDD chip and the VCSEL chip are placed flat on a single substrate, or a structure in which the LDD chip and the VCSEL chip are arranged on separate substrates.

[0098] It is possible to configure a distance measuring system including the above-described light emitting device 30. Fig. 24 is a block diagram showing an example of the configuration of a distance measuring system 40 as an example of implementation of the light emitting device 30 according to this embodiment.

[0099] As shown in the figure, the distance measurement system 40 includes an emitter 51, a driver 52, a power supply circuit 53, an emitter optical system 54, a receiver optical system 55, a receiver 56, a signal processor 57, a controller 58, and a temperature detector 59.

[0100] The light-emitting unit 51 emits light from a plurality of light sources. The light-emitting unit 51 and the light-emitting side optical system 54 correspond to the light-emitting device 30 described above. As will be described later, the light-emitting unit 51 in this example has light-emitting elements 2, each of which is a vertical cavity surface-emitting laser (VCSEL), as its light source, and these light-emitting elements 2 are arranged in a predetermined pattern, such as a matrix.

[0101] The driver 52 is the light source driver 1 according to any one of the first to seventh embodiments described above, and drives the light-emitting unit 51. The driver 52 receives a power supply voltage VDD from a power supply circuit 53. The power supply circuit 53 generates a power supply voltage VDD (a driving voltage Vd, described later) for the driver 52 based on an input voltage (an input voltage Vin, described later) from, for example, a battery (not shown) or the like provided in the distance measurement system 40. The driver 52 drives the light-emitting unit 51 based on the power supply voltage VDD.

[0102] Light emitted from the light-emitting unit 51 is irradiated onto a subject (object) S, which is the object of distance measurement, via a light-emitting side optical system 54. The light thus irradiated is reflected from the subject S and enters the light-receiving surface of the light-receiving unit 56 via a light-receiving side optical system 55.

[0103] The light receiving unit 56 is a light receiving element such as a CCD (Charge Coupled Device) sensor or a CMOS (Complementary Metal Oxide Semiconductor) sensor, and receives reflected light from the subject S that enters through the light receiving side optical system 55 as described above, converts it into an electrical signal, and outputs it.

[0104] The light receiving unit 56 performs processes such as CDS (Correlated Double Sampling) and AGC (Automatic Gain Control) on the electrical signal obtained by photoelectrically converting the received light, and then performs A / D (Analog / Digital) conversion on the electrical signal, and outputs the resulting digital data to the signal processing unit 57 at the subsequent stage.

[0105] Furthermore, the light receiving unit 56 in this example outputs a frame synchronization signal Fs to the driving unit 52. This enables the driving unit 52 to cause the light emitting element 2 in the light emitting unit 51 to emit light at a timing according to the frame period of the light receiving unit 56.

[0106] The signal processing unit 57 is configured as a signal processor, for example, a DSP (Digital Signal Processor), etc. The signal processing unit 57 performs various signal processes on the digital signal input from the light receiving unit 56.

[0107] The control unit 58 is configured with, for example, a microcomputer having a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), etc., or an information processing device such as a DSP, and controls the drive unit 52 for controlling the light-emitting operation by the light-emitting unit 51, and controls the light-receiving operation by the light-receiving unit 56.

[0108] The control unit 58 has a function as a distance measuring unit 58a. The distance measuring unit 58a measures the distance to the subject S based on a signal input via the signal processing unit 57 (i.e., a signal obtained by receiving reflected light from the subject S). The distance measuring unit 58a in this example measures the distance to each part of the subject S in order to be able to identify the three-dimensional shape of the subject S.

[0109] The specific distance measurement method used in the distance measurement system 40 will be described later.

[0110] The temperature detection unit 59 detects the temperature of the light emitting unit 51. The temperature detection unit 59 may be configured to detect the temperature using, for example, a diode.

[0111] In this example, information about the temperature detected by the temperature detection unit 59 is supplied to the drive unit 52, which enables the drive unit 52 to drive the light emitting unit 51 based on the temperature information.

[0112] (Range Measurement Method) The distance measurement method used in the distance measurement system 40 may be, for example, a STL (Structured Light) method or a ToF (Time of Flight) method.

[0113] The STL method is a method for measuring distance based on an image of a subject S illuminated with light having a predetermined light / dark pattern, such as a dot pattern or a grid pattern.

[0114] FIG. 25 is a block diagram showing a detailed configuration of a light-emitting device 30 having a light-source driving device 1 according to the first to seventh embodiments that can be used as the driving unit 52 in FIG. 24 . Note that there is no limit to the number of light-emitting elements 2 driven by the light-emitting device 30 in FIG. 25 . As described in the first to seventh embodiments, the light-source driving device 1 may drive multiple light-emitting units, and each light-emitting unit may have multiple light-emitting channels. Alternatively, the light-source driving device 1 may individually drive one or more light-emitting elements 2. Below, an example will be described in which the light-source driving device 1 drives multiple light-emitting elements 2 of a VCSEL.

[0115] The light emitting device 30 shown in FIG. 25 includes a timing adjustment section 31, buffer amplifiers 32 to 34, level shifters 35 and 36, a dummy circuit 37, a phase detection section 38, and a timing control section 39.

[0116] An input signal IN indicating a laser emission period is input from a circuit in the preceding stage to the light source driving device 1. This input signal IN is a signal generated according to the control of the control unit 58 at a timing based on a frame synchronization signal.

[0117] The input signal IN is input to the timing adjustment unit 31. The timing adjustment unit 31 generates a drive control signal POUT and an assist control signal TFOUT from the input signal IN.

[0118] The drive control signal POUT is a signal that causes the drive circuit 21 to perform laser emission drive and is supplied to the gate of the second transistor Q2. For the sake of explanation, the signal that is output from the timing adjustment unit 31 and input to the gate of the second transistor Q2 (and the signal up to the phase detection unit 38, which will be described later) is called the drive control signal POUT.

[0119] The assist control signal TFOUT is a signal that causes the assist circuit 41 to execute assist in the falling edge of the laser drive current, and is a signal that is supplied to the gate of the third transistor Q3. For the sake of explanation, the signal that is output from the timing adjustment unit 31 and supplied to the gate of the third transistor Q3 and the level shifter 35 is called the assist control signal TFOUT.

[0120] The drive control signal POUT output from the timing adjustment unit 31 is supplied to the gate of the second transistor Q2 via a buffer amplifier 32.

[0121] The assist control signal TFOUT output from the timing adjustment unit 31 is supplied to a level shifter 36 via a buffer amplifier 33, where it is voltage-converted and then supplied to the gate of the third transistor Q3 via a buffer amplifier 34.

[0122] The drain and source of the third transistor Q3 are connected to the anode and cathode of the light-emitting element 2. The anode of the light-emitting element 2 is connected to the power supply line of the voltage V3.

[0123] A first transistor Q1 and a second transistor Q2 are connected in series between the cathode of the light-emitting element 2 and a second reference voltage (for example, a ground voltage VSS) node. The gate and drain of a fourth transistor Q4 are connected together, and the gates of the first transistor Q1 and the fourth transistor Q4 are connected together. The first transistor Q1 and the fourth transistor Q4 form a current mirror circuit 3.

[0124] A fifth transistor Q5 is connected between the source of the fourth transistor Q4 and a second reference voltage (for example, ground voltage VSS) node, and a current source 4 connected to a power supply line of a voltage V2 supplies a drain-source current to the series connection of the fourth transistor Q4 and the fifth transistor Q5. A voltage V1 is supplied to the gate of the fifth transistor Q5.

[0125] A current equivalent to the current flowing through the fourth transistor Q4 and the fifth transistor Q5 flows through the first transistor Q1 and the second transistor Q2. That is, the light emission drive current value of the light emitting element 2 is determined by the current mirror circuit 3, and the light emission drive current is turned on / off by the second transistor Q2.

[0126] As a result, when the pulse serving as the drive control signal POUT supplied to the gate of the second transistor Q2 becomes high level (hereinafter referred to as "H level"), a light emission drive current flows to the light emitting element 2, causing laser light emission.

[0127] The drive circuit 21 is a circuit that drives the light emitting element 2 to emit light based on the drive control signal POUT, and includes a first transistor Q1 and a second transistor Q2. Alternatively, the drive circuit 21 may be collectively referred to as the first transistor Q1, the second transistor Q2, the fourth transistor Q4, the fifth transistor Q5, and the current source 4.

[0128] As described above, the third transistor Q3 is connected in parallel with, for example, the light-emitting element 2. Therefore, when the third transistor Q3 is turned on, the anode and cathode of the light-emitting element 2 are short-circuited, the light-emitting drive current stops flowing, and light emission is stopped. Therefore, if the third transistor Q3 is turned on in synchronization with the timing at which the second transistor Q2 is turned off, the fall time can be shortened.

[0129] The assist circuit 41 refers to at least the third transistor Q3, but may also include the buffer amplifier 34 and the level shifter 36.

[0130] 2 shows power supply voltages V1, V2, and V3, where V1<V2≦V3, for example. The power supply voltage V1 is supplied to the timing adjustment unit 31, buffer amplifiers 32 and 33, and fifth transistor Q5. On the other hand, the power supply voltage V3 is supplied to the buffer amplifier 34 and third transistor Q3.

[0131] In the configuration described above, the fall time shortening function provided by the third transistor Q3 may not function sufficiently.

[0132] In order to improve distance measurement accuracy, the light source driving device 1 that drives the light emitting element 2 as a VCSEL needs to shorten the rise time and fall time of the current that flows through the light emitting element 2. For this reason, the fall time is made faster by an assist circuit 41 as shown in FIG.

[0133] However, in the light source driving device 1, due to the demand for various functions, it has become necessary to use micro-processing to take measures such as making the front end of the output stage transistor thinner, even if the film thickness of the transistor remains the same as before.

[0134] 25, the transistors in the buffer amplifier 34 may have the same film thickness as before, but the buffer amplifiers 32 and 33 may use thinner transistors. The path of the drive control signal POUT uses voltage V1 as a power source, and the path of the assist control signal TFOUT uses voltage V3 as a power source.

[0135] Therefore, the assist control signal TFOUT on the assist circuit 41 side causes a longer delay before driving the final third transistor Q3 than the delay before the drive control signal POUT drives the second transistor Q2.

[0136] In consideration of this delay, it is necessary to adjust the timing of the drive control signal to the second transistor Q2 on the drive circuit 21 side by delaying it. Furthermore, the optimum delay time changes depending on the temperature, the state of the power supply voltage VDD, and the like.

[0137] The timing at which the second transistor Q2 turns off to stop light emission and the timing at which the third transistor Q3 turns on to start assisting coincide with each other, so that the fall time of the light emission drive current can be sufficiently shortened.

[0138] More specifically, it is necessary that the timing at which light emission is stopped by the drive control signal POUT at the gate node of the second transistor Q2 and the timing at which assist is started by the assist control signal TFOUT at the gate node of the third transistor Q3 coincide with each other.

[0139] However, considering that the delay time of the assist control signal TFOUT relative to the drive control signal POUT at each gate node varies depending on the temperature and the state of the power supply voltage VDD, it becomes difficult to adjust the timing to match.

[0140] Therefore, the light source driving device 1 of FIG. 25 has a configuration including a phase detection section 38, a timing control section 39, a level shifter 35, and a dummy circuit 37.

[0141] The level shifter 35 receives the assist control signal TFOUT at the gate node of the third transistor Q3.

[0142] The dummy circuit 37 also receives the drive control signal POUT at the gate node of the second transistor Q2.

[0143] The level shifter 35 performs a voltage level shift on the assist control signal TFOUT to a pulse signal of the voltage V1 system. The dummy circuit 37 gives a delay equivalent to the delay time of the level shifter 35 to the drive control signal POUT.

[0144] The phase detection unit 38 compares the phase of the assist control signal TFOUT output from the level shifter 35 with the phase of the drive control signal POUT output from the dummy circuit 37, and outputs a phase comparison signal PDC.

[0145] The phase comparison signal PDC is input to the timing control unit 39. The timing control unit 39 is configured by a logic circuit, a central processing unit (CPU), or the like, and generates a timing adjustment signal TA based on the phase comparison signal PDC and supplies it to the timing adjustment unit 31.

[0146] The phase detection unit 38 and timing control unit 39 operate using the voltage V1 as the power supply voltage VDD.

[0147] The phase comparison signal PDC from the phase detection unit 38 reflects a delay in the rising timing of the assist control signal TFOUT at the gate node of the third transistor Q3 relative to the falling timing of the drive control signal POUT at the gate node of the second transistor Q2. As a result, the delay time of the drive control signal POUT is dynamically adjusted regardless of fluctuations in various conditions at that time (temperature and voltage state), and the timing of the drive control signal POUT and the assist control signal TFOUT are synchronized. Therefore, the assist circuit 41 functions properly, and the fall time of the light-emission drive current can be shortened.

[0148] It is desirable that the delay time applied to the drive control signal POUT be adjusted continuously or periodically during the laser light emission operation based on such phase comparison. By dynamically adjusting the delay time in this manner, even if the optimum delay time changes depending on the temperature conditions or the state of the power supply voltage VDD, the delay time can be optimized accordingly.

[0149] Furthermore, the delay time adjustment for the drive control signal POUT may be performed in response to the detection of a change in conditions. For example, after the delay time adjustment is performed once, the delay time adjustment may be triggered by the detection of a temperature change of a predetermined value or more.

[0150] Furthermore, a certain degree of effect can be obtained even if such delay time adjustment is performed, for example, only during a calibration period before actual operation of the light emitting device 30. For example, it may be performed only before shipment from a factory or during a preparation period before actual operation on the user side.

[0151] For example, if the timing control unit 39 is not provided within the laser driver chip, it is possible to connect the timing control unit 39 outside the laser driver chip before shipping from the factory so that the delay time can be adjusted.

[0152] <Application Example to Mobile Object> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile object, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot. Note that the technology according to the present disclosure is not necessarily applicable to mobile objects, but can also be applied to mobile devices such as smartphones or tablets, or electronic devices such as PCs (Personal Computers).

[0153] FIG. 26 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0154] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 26, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0155] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0156] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0157] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0158] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0159] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0160] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the distance between vehicles, maintaining vehicle speed, vehicle collision warning, vehicle lane departure warning, etc.

[0161] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0162] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0163] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 26, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0164] FIG. 27 is a diagram showing an example of the installation position of the imaging unit 12031.

[0165] In FIG. 27, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0166] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0167] 27 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0168] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0169] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.

[0170] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0171] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0172] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 and the like among the components described above. Specifically, the light source driving device 1 according to the present disclosure can be applied to the image capturing unit 12031. By applying the technology according to the present disclosure to the image capturing unit 12031 and the like, it is possible to obtain a captured image with higher image quality that is easier to see, thereby reducing driver fatigue.

[0173] The present technology may be configured as follows: (1) A light source driving device including: a plurality of first transistors provided for a plurality of light-emitting elements, each generating a current flowing through the corresponding light-emitting element; and a plurality of second transistors arranged along a first direction for each of the plurality of first transistors, each controlling whether or not the corresponding first transistor generates the current, wherein the corresponding first transistors and the corresponding second transistors are arranged to match the pitch of two or more light-emitting elements arranged in a second direction intersecting the first direction. (2) The light source driving device described in (1), wherein a plurality of first wirings connecting corresponding first transistors and second transistors to each other for the two or more light-emitting elements arranged in the second direction are arranged substantially parallel to each other along the first direction. (3) The light source driving device described in (1) or (2), wherein the lengths of the plurality of first wirings connecting corresponding first transistors and second transistors to each other for the two or more light-emitting elements arranged in the second direction are substantially the same. (4) The light source driving device according to (2) or (3), wherein each of the plurality of first wirings is a wiring connecting a source of the corresponding first transistor and a drain of the corresponding second transistor. (5) The light source driving device according to any one of (1) to (4), further comprising a first capacitor arranged between regions of two of the second transistors adjacent to each other in the second direction, wherein the first capacitor is connected to a gate of the corresponding first transistor and a reference voltage node. (6) The light source driving device according to any one of (1) to (5), wherein two or more second wirings connecting two or more of the light-emitting elements arranged in the second direction to two or more corresponding first transistors are arranged at intervals in the first direction, wherein each of the two or more second wirings is a laminate of a first wiring layer and a second wiring layer extending in the second direction, and wherein the two or more first transistors arranged in the second direction are alternately connected to the first wiring layer or the second wiring layer of different second wirings.(7) The light source driving device according to any one of (1) to (6), wherein the first transistor has a higher withstand voltage than the second transistor, and includes a guard ring region arranged around the second transistor. (8) The light source driving device according to (7), wherein two or more of the light-emitting elements are arranged at a predetermined pitch along the first direction, wherein regions of two of the second transistors corresponding to two of the light-emitting elements adjacent in the first direction are arranged to face each other without the guard ring region, and wherein the guard ring region is arranged to surround the regions of the two second transistors. (9) The light source driving device according to any one of (1) to (8), further including a third transistor provided for each of the plurality of light-emitting elements, connected in series to the corresponding first transistor, and configured to control a timing for stopping light emission of the corresponding light-emitting element. (10) The light source driving device according to (9), wherein the third transistor is arranged in the second direction relative to the corresponding first transistor. (11) The light source driving device according to (9) or (10), wherein regions of two or more of the first transistors and regions of two or more corresponding second transistors are arranged in regions that overlap with the two or more light-emitting elements arranged in the second direction in a planar view, and regions of two or more of the third transistors corresponding to the two or more light-emitting elements arranged in the second direction are arranged in regions that do not overlap with the two or more light-emitting elements arranged in the second direction in a planar view. (12) The light source driving device according to any one of (9) to (11), wherein regions of two or more of the third transistors corresponding to the two or more light-emitting elements arranged in the second direction are arranged on one end side or both end sides of a region group including regions of two or more of the first transistors arranged in the second direction and regions of the corresponding two or more second transistors.(13) The light source driving device according to any one of (9) to (12), comprising: a plurality of gate wirings connected to gates of two or more first transistors corresponding to two or more light-emitting elements arranged in the first direction, each extending in the first direction and arranged at intervals in the second direction; and beam wirings connecting two of the gate wirings adjacent in the second direction, wherein the beam wirings are arranged in a region of the two or more first transistors arranged in the second direction. (14) The light source driving device according to (13), wherein a region of two or more third transistors corresponding to two or more light-emitting elements arranged in the second direction is arranged on one end side or both end sides in the second direction with respect to an arrangement region of the plurality of gate wirings. (15) The light source driving device according to (13) or (14), comprising: a fourth transistor forming a current mirror circuit with two or more first transistors arranged in the second direction, wherein each of the plurality of gate wirings is electrically connected to a gate of the fourth transistor. (16) The light source driving device according to any one of (1) to (15), further comprising: two or more conductive members each extending in the second direction and arranged between a plurality of second wirings connecting each of the two or more light-emitting elements arranged in the first direction to a corresponding one of the first transistors. (17) The light source driving device according to (16), further comprising: two or more second capacitors each consisting of parasitic capacitance and arranged between each of the two or more first conductive members and the corresponding one of the second wirings, wherein each of the two or more first conductive members is set to a predetermined reference voltage. (18) The light source driving device according to any one of (1) to (17), further comprising: a plurality of second conductive members each extending in the second direction and arranged between a plurality of third wirings connecting each of the plurality of first transistors to the corresponding one of the second transistors, wherein the second conductive members each extend in the second direction; and two or more third capacitors each consisting of parasitic capacitance and arranged between each of the plurality of second conductive members and the corresponding one of the third wirings, wherein each of the plurality of second conductive members is set to a predetermined reference voltage. (19) A light emitting device comprising: a light emitting section having the plurality of light emitting elements that perform surface emission; and a light source driving device according to any one of (1) to (18) that drives the light emitting section.(20) The light emitting device according to (19), wherein the light emitting unit is a VCSEL (Vertical Cavity Surface Emitting Laser). (21) A distance measuring system comprising: the light emitting device according to (19) or (20), which emits a pulsed optical signal; a light receiving unit which receives a reflected optical signal from an object irradiated with the optical signal; and a distance measuring unit which measures a distance to the object based on the optical signal emitted by the light emitting device and the reflected optical signal received by the light receiving unit.

[0174] The aspects of the present disclosure are not limited to the individual embodiments described above, but include various modifications that may be conceived by those skilled in the art, and the effects of the present disclosure are not limited to the above-described contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and spirit of the present disclosure, which is derived from the contents defined in the claims and their equivalents.

[0175] 1 Light source driving device, 2 Light emitting element, 3 Current mirror circuit, 4 Current source, 5 Gap, 6 Guard ring region, 7 P-type silicon substrate, 8 P-type well region, 9 Gate layer, 10 N-type well region, 11 Deep N-type well region, 12 P-type well region, 13 Gate layer, 14 N-channel region, 15 N-channel region, 16 Beam wiring, 17 Shield wiring, 20A Dot-dash frame, 30 Light emitting device, 31 Timing adjustment unit, 32 Buffer amplifier, 33 Buffer amplifier, 34 Buffer amplifier, 35 Level shifter, 36 Level shifter, 37 Dummy circuit, 38 Phase detection unit, 39 Timing control unit, 40 Distance measurement system, 41 Assist circuit, 51 Light emitting unit, 52 Drive unit, 53 Power supply circuit, 54 Light emitting side optical system, 55 Light receiving side optical system, 56 Light receiving unit, 57 Signal processing unit, 58 Control unit, 58a distance measurement unit, 59 temperature detection unit

Claims

1. A light source driving device comprising: a plurality of first transistors provided for each of a plurality of light-emitting elements, each generating a current flowing through the corresponding light-emitting element; and a plurality of second transistors arranged along a first direction for each of the plurality of first transistors, switching control of whether or not the corresponding first transistor generates the current, wherein the corresponding first transistors and second transistors are arranged in accordance with the pitch of two or more of the light-emitting elements arranged in a second direction intersecting the first direction.

2. The light source driving device according to claim 1, wherein a plurality of first wirings connecting the corresponding first transistors and second transistors for the two or more light-emitting elements arranged in the second direction are arranged substantially parallel to each other along the first direction.

3. The light source driving device according to claim 1, wherein the lengths of the plurality of first wirings connecting the corresponding first transistors and second transistors for the two or more light-emitting elements arranged in the second direction are substantially the same.

4. The light source driving device according to claim 2, wherein each of the plurality of first wirings is a wiring that connects the source of the corresponding first transistor and the drain of the corresponding second transistor.

5. The light source driving device according to claim 1, further comprising a first capacitor disposed between regions of two of the second transistors adjacent to each other in the second direction, the first capacitor being connected to the gate of the corresponding first transistor and a reference voltage node.

6. The light source driving device of claim 1, wherein two or more second wirings connecting two or more of the light-emitting elements arranged in the second direction to two or more corresponding first transistors are arranged at intervals in the first direction, each of the two or more second wirings is a laminate of a first wiring layer and a second wiring layer extending in the second direction, and the two or more first transistors arranged in the second direction are alternately connected to the first wiring layer or the second wiring layer of different second wirings.

7. The light source driving device according to claim 1, wherein the first transistor has a higher breakdown voltage than the second transistor, and the light source driving device further comprises a guard ring region disposed around the second transistor.

8. The light source driving device according to claim 7, wherein two or more of the light-emitting elements are arranged at a predetermined pitch along the first direction, two second transistor regions corresponding to two light-emitting elements adjacent to each other in the first direction are arranged to face each other without the guard ring region, and the guard ring region is arranged to surround the two second transistor regions.

9. The light source driving device according to claim 1, further comprising a third transistor provided for each of the plurality of light emitting elements, connected in series to the corresponding first transistor, and controlling the timing at which the corresponding light emitting element stops emitting light.

10. The light source driving device according to claim 9, wherein the third transistor is disposed in the second direction relative to the corresponding first transistor.

11. A light source driving device as described in claim 9, wherein regions of two or more of the first transistors and regions of two or more corresponding second transistors are arranged in regions that overlap in a planar view with the two or more light-emitting elements arranged in the second direction, and regions of two or more of the third transistors corresponding to the two or more light-emitting elements arranged in the second direction are arranged in regions that do not overlap in a planar view with the two or more light-emitting elements arranged in the second direction.

12. A light source driving device as described in claim 9, wherein regions of two or more of the third transistors corresponding to two or more of the light-emitting elements arranged in the second direction are arranged on one end side or both ends side of a region group including regions of two or more of the first transistors arranged in the second direction and regions of two or more of the corresponding second transistors.

13. A light source driving device as described in claim 9, comprising: a plurality of gate wirings each extending in the first direction and arranged at intervals in the second direction, the gate wirings being connected to the gates of two or more of the first transistors corresponding to two or more of the light-emitting elements arranged in the first direction; and beam wirings connecting two of the gate wirings adjacent to each other in the second direction, the beam wirings being arranged in regions of the two or more first transistors arranged in the second direction.

14. A light source driving device as described in claim 13, wherein regions of two or more of the third transistors corresponding to two or more of the light-emitting elements arranged in the second direction are arranged on one end side or both end sides in the second direction relative to the arrangement region of the plurality of gate wirings.

15. The light source driving device according to claim 13, further comprising a fourth transistor that forms a current mirror circuit with two or more of the first transistors arranged in the second direction, and each of the plurality of gate wirings is electrically connected to the gate of the fourth transistor.

16. The light source driving device according to claim 1, further comprising two or more first conductive members each extending in the second direction and arranged between a plurality of second wirings connecting each of the two or more light-emitting elements arranged in the first direction to a corresponding one of the first transistors.

17. The light source driving device according to claim 16, further comprising two or more second capacitors each consisting of parasitic capacitance arranged between each of the two or more first conductive members and the corresponding second wiring, wherein each of the two or more first conductive members is set to a predetermined reference voltage.

18. A light source driving device according to claim 1, comprising: a plurality of second conductive members each extending in the second direction and arranged between a plurality of third wirings connecting each of the plurality of first transistors to a corresponding one of the second transistors; and two or more third capacitors consisting of parasitic capacitance arranged between each of the plurality of second conductive members and the corresponding one of the third wirings, wherein each of the plurality of second conductive members is set to a predetermined reference voltage.

19. A light emitting device comprising: a light emitting section having the plurality of light emitting elements that emit surface light; and a light source driving device according to claim 1 that drives the light emitting section.

20. A ranging system comprising: a light emitting device according to claim 19 that emits a pulsed optical signal; a light receiving unit that receives a reflected optical signal from an object illuminated with the optical signal; and a distance measuring unit that measures the distance to the object based on the optical signal emitted by the light emitting device and the reflected optical signal received by the light receiving unit.

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