Power conversion device, power transmission system, and high-frequency power supply

Abstract

This power conversion device comprises: a switch that is connected to a DC power supply and that performs a zero-voltage switching (ZVS) operation or a zero-current switching (ZCS) operation; a first resonance circuit that has a first inductor and a first capacitor; a second resonance circuit that has a second inductor and a second capacitor; a switching circuit that switches between a first period in which an element value of at least two elements among the first inductor, the first capacitor, the second inductor, and the second capacitor is used as a first value, and a second period in which the element value is set to a second value different from the first value; and an output terminal from which AC power is outputted. The first value is an element value with which, in the first period, a first amplitude of a voltage or a current outputted to the output terminal is independent of the magnitude of a load connected to the output terminal. The second value is an element value with which, in the second period, a second amplitude of the voltage or the current outputted to the output terminal is independent of the magnitude of the load.

Description

Power conversion device, power transmission system, and high-frequency power supply

[0001] The present disclosure relates to a power conversion device, a power transmission system, and a high-frequency power supply.

[0002] Known power conversion devices include an E-class load-independent inverter, which is capable of zero voltage switching operation and whose output voltage is independent of the load size, and an E / F-class load-independent inverter, whose output current is independent of the load size (see, for example, Patent Document 1).

[0003] International Application No. 2023 / 219107

[0004] In a power conversion device capable of zero-voltage switching (ZVS) operation or zero-current switching (ZCS) operation and load-independent operation, the output voltage or output current may be modulated, which may impair the ZVS operation, the ZCS operation, or the load-independent operation.

[0005] An object of the present disclosure is to provide a power conversion device, a wireless power transmission system, and a high-frequency power supply that are capable of modulating output power with little effect on ZVS operation or ZCS operation and load-independent operation.

[0006] According to an embodiment of the present disclosure, a power conversion device includes: a switch connected to a DC power supply and performing ZVS operation or ZCS operation; a first resonant circuit having a first inductor and a first capacitor; a second resonant circuit having a second inductor and a second capacitor; a switching circuit that switches element values ​​of at least two elements among the first inductor, the first capacitor, the second inductor, and the second capacitor between a first period in which the element values ​​are a first value and a second period in which the element values ​​are a second value different from the first value; and an output terminal from which AC power is output, wherein the first value is the element value that makes a first amplitude of a voltage or current output to the output terminal independent of the size of a load connected to the output terminal during the first period, and the second value is the element value that makes a second amplitude of a voltage or current output to the output terminal independent of the size of the load during the second period.

[0007] According to the present disclosure, the output voltage or output current can be modulated with little effect on ZVS or ZCS operation and load-independent operation.

[0008] FIG. 1 is a circuit diagram of a power conversion device according to a first embodiment. FIG. 2A is a diagram illustrating parameters for achieving load independence. FIG. 2B is a diagram illustrating parameters for achieving load independence. FIG. 3 is a circuit diagram of a power conversion device according to a first modification of the first embodiment. FIG. 4 is a timing chart of the first modification of the first embodiment. FIG. 5 is a circuit diagram of a power conversion device according to a second modification of the first embodiment. FIG. 6 is a circuit diagram of a power conversion device according to a third modification of the first embodiment. FIG. 7 is a circuit diagram of a power conversion device according to a second embodiment. FIG. 8 is a circuit diagram of a power conversion device according to the first modification of the second embodiment. FIG. 9 is a circuit diagram illustrating a wireless power transmission system according to a third embodiment. FIG. 10 is a timing chart illustrating voltages in the third embodiment.

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant explanations will be omitted where appropriate.

[0010] (First Embodiment) The first embodiment is an example of a power conversion device that converts direct current to alternating current, and is an example of performing ZVS operation and voltage load independent operation. Fig. 1 is a circuit diagram of the power conversion device according to the first embodiment. As shown in Fig. 1, the power conversion device 100 according to the first embodiment includes an input terminal Tin, inductors L1 and L2, a switch S1, a diode Do, capacitors C1 and C2, and an output terminal Tout.

[0011] The inductor L1 and the capacitor C1 form a resonant circuit 11, and the inductor L2 and the capacitor C2 form a resonant circuit 12. One end of a DC power supply 18 is electrically connected to the input terminal Tin. The other end of the DC power supply 18 is grounded. The DC power supply 18 applies a positive voltage Vin to the input terminal Tin with respect to the ground. The current flowing from the DC power supply 18 to the input terminal Tin is Iin.

[0012] The switch S1 is connected in parallel to the DC power supply 18 and is, for example, a transistor, such as an N-type metal oxide semiconductor field effect transistor (MOSFET). The switch S1 may be, for example, a gallium nitride (GaN) FET or a bipolar transistor. The source and drain of the switch S1 are electrically connected to ground and a node N1, respectively. The gate, which is the control terminal of the switch S1, is connected to the drive circuit 14.

[0013] The diode Do is connected in parallel with the switch S1. The anode and cathode of the diode Do are electrically connected to the ground and the node N1, respectively. A voltage Vs is applied across the switch S1 and the diode Do. The diode Do may not be provided.

[0014] One end of the inductor L1 is electrically connected to the input terminal Tin and the other end of the inductor L1 is electrically connected to the node N1, respectively. The capacitor C1 is connected in parallel to the DC power supply 18 and the switch S1. The inductor L1 (first inductor) and the capacitor C1 (first capacitor) form a resonant circuit 11 (first resonant circuit).

[0015] A resonant circuit 12 is connected between the node N1 and the output terminal Tout. The resonant circuit 12 (second resonant circuit) has a capacitor C2 (second capacitor) and an inductor L2 (second inductor) connected in series. For convenience, the inductor L2 includes inductors La and Lb. The angular frequency at the resonant frequency of the inductor La and the capacitor C2 is the switching angular frequency ω. The inductor Lb adjusts the phase of the resonance of the resonant circuit 12.

[0016] One end of a load RL is electrically connected to the output terminal Tout. The other end of the load RL is grounded. A voltage Vout is output to the output terminal Tout relative to the ground. The current flowing from the output terminal Tout to the load RL is Iout. The power output to the output terminal Tout is AC power.

[0017] The drive circuit 14 applies a control signal Vg1 to the gate of the switch S1. If the switch S1 is an N-type MOSFET, the switch S1 turns on when the control signal Vg1 is positive, and turns off when the control signal Vg1 is 0 V or negative. The drive circuit 14 operates the switch S1 at a switching angular frequency ω.

[0018] The ZVS operation will now be described. The resonant circuit 12 generates a resonant current with an angular frequency ω=1 / √(La×C2). Here, La is the inductance of the inductor La, and C2 is the capacitance of the capacitor C2. When the switch S1 is off, the resonant current of the resonant circuit 12 discharges the parasitic capacitance of the capacitor C1 and the switch S1. When the parasitic capacitance of the capacitor C1 and the switch S1 is completely discharged, the voltage Vs across the switch S1 becomes 0 V. At this time, the switch S1 is turned on. As a result, no charge is transferred when the switch S1 is turned on, and loss due to turn-on can be suppressed.

[0019] By performing ZVS operation, it is possible to suppress loss when the switch S1 switches. When the switching frequency of the switch S1 is high, the frequency of switching of the switch S1 increases. Therefore, when the switch S1 operates at a high frequency, for example, 1 MHz or higher, ZVS operation is effective.

[0020] It should be noted that zero voltage in ZVS operation does not mean that the voltage Vs is strictly 0 V. For example, it is sufficient that the switch S1 is turned on when the voltage Vs is 10% or less of the voltage Vin.

[0021] The following explains voltage load independence. If the ZVS conditions change when the size (e.g., resistance value) of the load RL fluctuates, ZVS operation will no longer occur. Therefore, making the amplitude voltage Vo of the voltage Vout independent of the size of the load RL is what is meant by load independence of the voltage. Note that independence does not mean that the voltage Vo is completely independent of the load RL. For example, it is sufficient if the fluctuation in the amplitude voltage Vo when the load RL fluctuates is 5% or less compared to the amplitude of the output voltage Vout (so-called rated output voltage) when the load RL is at a reference size.

[0022] 2A and 2B are diagrams showing parameters for realizing load independence. The horizontal axis of FIG. 2A and FIG. 2B represents the duty ratio D of the switch S1. The vertical axis of FIG. 2A represents ωs ＊ and Vo ＊ The vertical axis of FIG. 2B represents Λ and φ. The duty ratio D is the ratio of the off period to the on and off period of the switch S1. ＊ is the ratio of the resonant angular frequency of the inductor L1 and the capacitor C1 to the switching angular frequency ω. ＊ = 1 / (ω × √(L1 × C1)), where L1 is the inductance of the inductor L1, and C1 is the capacitance of the capacitor C1. ＊ is the ratio of the amplitude voltage Vo of the voltage Vout to the voltage Vin. Λ is Lb / L1. Lb is the inductance of the inductor Lb. The phase φ is π / 2-π×D.

[0023] Voltage Vo ＊ is expressed by Equation 1.

[0024] Vo ＊ The load-independent condition 1 for making constant regardless of the magnitude of the load RL is expressed by Equation 2.

[0025] Furthermore, when φ=π / 2−π×D is substituted into the switch voltage wave form and subjected to Fourier analysis, Equation 3 is obtained as the load-independent condition 2.

[0026] 2A and 2B are diagrams showing Equations 1 to 3 and π / 2-π×D. Note that the duty ratio D and the voltage Vo ＊ , ωs ＊ The relationship between and is an example, and can be changed as appropriate depending on the circuit configuration, etc.

[0027] For example, when the duty ratio D is D1, ωs ＊ is ωs1 ＊ If the values ​​of the inductors L1, L2 and the capacitors C1 and C2 are set so that Λ becomes Λ1, the load becomes independent. ＊ is the voltage Vo1 ＊ This becomes:

[0028] In the first embodiment, the voltage Vo ＊ to the first voltage Vo1 ＊ In the first period T1, a switching circuit (not shown) (for example, the switch S2 in the second embodiment) ＊ is ωs1 ＊ The element values ​​of the inductors L1 and L2 and the capacitors C1 and C2 are set so that Λ becomes Λ1. ＊ to the first voltage Vo1 ＊ A second voltage Vo2 different from ＊ In the second period T2, the switching circuit ＊ is ωs2 ＊ and the element values ​​of the inductors L1, L2 and the capacitors C1 and C2 are set so that Λ becomes Λ2. In this way, the switching circuit switches between a first period T1 in which the element values ​​have a first value and a second period T2 in which the element values ​​have a second value different from the first value.

[0029] The element values ​​of at least two of the inductors L1, L2 and the capacitors C1 and C2 may be set to a first value in the first period T1 and a second value in the second period T2. This allows the voltage Vo to be maintained in a state where ZVS operation and load independence are maintained. ＊ That is, in the first period T1, the amplitude voltage Vo1 (first amplitude) of the voltage Vout output to the output terminal Tout is independent of the magnitude of the load RL. In the second period T2, the amplitude voltage Vo2 (second amplitude) of the voltage Vout is independent of the magnitude of the load RL.

[0030] ωs ＊ =1 / (ω×√(L1×C1)), it is preferable that the at least two elements whose element values ​​are switched include at least one of the inductor L1 and the capacitor C1.

[0031] The drive circuit 14 sets the duty ratio D to a first duty ratio D1 in the first period T1 and to a second duty ratio D2 in the second period T2, thereby modulating the voltage Vout while maintaining load independence.

[0032] As shown in FIG. 2A, the first duty ratio D1 is set lower than the second duty ratio D2. ＊ ωs2 ＊ As shown in FIG. 2B, Λ1 is set to be smaller than Λ2. This causes the first voltage Vo1 ＊ to the second voltage Vo2 ＊ It can be made higher.

[0033] (First Modification of First Embodiment) Fig. 3 is a circuit diagram of a power conversion device according to the first modification of the first embodiment. As shown in Fig. 3, the power conversion device 101 according to the first modification of the first embodiment includes an input terminal Tin, inductors L1a and L1b, switches S1 and S2, a diode Do, capacitors C1a and C1b, a resonant circuit 12, and an output terminal Tout.

[0034] One end and the other end of the inductor L1a are electrically connected to the input terminal Tin and the node N1, respectively. The inductor L1b and the capacitor C1b are connected in series between the input terminal Tin and the ground. A switch S2 is connected between the node N1 and a node between the inductor L1b and the capacitor C1b. The switch S2 is a transistor such as an FET. The control circuit 16 outputs a control signal Vg2 to the switch S2. The switch S2 is turned on and off in response to the control signal Vg2. A capacitor C1a is connected in parallel with the switch S1 between the node N1 and the ground. The other configurations are the same as those in FIG. 1 of the first embodiment, and therefore description thereof will be omitted.

[0035] When switch S2 is off, L1 = L1a and C1 = C1a. When switch S2 is on, L1 = (L1a × L1b) / (L1a + L1b) and C1 = C1a + C1b. Here, L1 and C1 are the inductance of inductor L1 and the capacitance of capacitor C1 in the first embodiment. L1a, L1b, C1a, and C1b are the inductances of inductors L1a and L1b and the capacitances of capacitors C1a and C1b in FIG. 3, respectively.

[0036] FIG. 4 is a timing chart for Modification 1 of the first embodiment. The horizontal axis represents time. The vertical axis represents the voltage of signal Vg2, the voltage of signal Vg1, voltage Vs, and voltage Vout. As shown in FIG. 4 , the period between times t1 and t2 corresponds to a second period T2, and the period between times t2 and t3 corresponds to a first period T1. During the second period T2, signal Vg2 is at a positive voltage Vh2 (high level), and switch S2 is turned on. During the first period T1, signal Vg2 is at 0 V (low level), and switch S2 is turned off. Note that if switch S2 is turned on when Vg2 is at a low level and turned on when Vg2 is at a high level, signal Vg2 is at a low level during the second period T2, and signal Vg2 is at a high level during the first period T1.

[0037] During the second period T2, the drive circuit 14 sets the signal Vg1 to a positive voltage Vh1 (high level) between times t11 and t12, and sets the signal Vg1 to 0 V (low level) between times t12 and t13. As a result, the switch S1 is turned on between times t11 and t12 and off between times t12 and t13. The ratio of the off period Toff (t12-t11) of the switch S1 to the cycle Ts (t13-t11) of the switch S1 is duty ratio D2.

[0038] During the first period T1, the drive circuit 14 sets the signal Vg1 to a positive voltage Vh1 (high level) between times t21 and t22, and sets the signal Vg1 to 0 V (low level) between times t22 and t23. As a result, the switch S1 is turned on between times t21 and t22 and off between times t22 and t23. The ratio of the off period Toff (t22-t21) of the switch S1 to the cycle Ts (t23-t21) of the switch S1 is duty ratio D1.

[0039] In addition, if the switch S1 is turned on when the signal Vg1 is at a low level and turned off when the signal Vg1 is at a high level, the drive circuit 14 sets the signal Vg1 to a low level between times t11 and t12 and between times t21 and t22, and sets the signal Vg1 to a high level between times t12 and t13 and between times t22 and t23.

[0040] In the first period T1, ωs ＊ is ωs1 ＊ In the second period T2, the element values ​​of the inductors L1a, L1b, and L2 and the capacitors C1a, C1b, and C2 are set so that Λ becomes Λ1. ＊ is ωs2 ＊ The element values ​​of the inductors L1a, L1b, and L2 and the capacitors C1a, C1b, and C2 are set so that Λ becomes Λ2. As a result, the voltage Vo ＊ is Vo1 ＊ and the voltage Vo in the second period T2 ＊ is Vo2 ＊As shown in the dashed circle 50, the voltage Vs is 0 V at time t12 when the switch S1 is turned on in the second period T2 and at time t22 when the switch S1 is turned on in the first period T1.

[0041] (Second Modification of First Embodiment) Fig. 5 is a circuit diagram of a power conversion device according to a second modification of the first embodiment. As shown in Fig. 5, a power conversion device 102 according to the second modification of the first embodiment includes an input terminal Tin, inductors L1 and L2, switches S1, S21, and S22, a diode Do, capacitors C1a, C1b, C2a, and C2b, and an output terminal Tout. A resonant circuit 12 includes capacitors C2a and C2b and an inductor L2.

[0042] The capacitors C1a and C1b are connected in parallel, and the switch S21 is connected in series to the capacitor C1b and in parallel to the capacitor C1a. The capacitors C2a and C2b are connected in parallel, and the switch S22 is connected in series to the capacitor C2b and in parallel to the capacitor C2a. The other configurations are the same as those in FIG. 1 of the first embodiment, and therefore description thereof will be omitted.

[0043] When switches S21 and S22 are on, C1=C1a+C1b and C2=C2a+C2b. When switches S21 and S22 are off, C1=C1a and C2=C2a.

[0044] (Third Modification of First Embodiment) Fig. 6 is a circuit diagram of a power conversion device according to a third modification of the first embodiment. As shown in Fig. 6, a power conversion device 103 according to the third modification of the first embodiment includes an input terminal Tin, inductors L1a, L1b, and L2, switches S1, S21, and S22, a diode Do, capacitors C1, C2a, and C2b, and an output terminal Tout. A resonant circuit 12 includes capacitors C2a and C2b and an inductor L2.

[0045] Inductors L1a and L1b are connected in parallel, and switch S21 is connected in series to inductor L1b and in parallel to inductor L1a. Capacitors C2a and C2b are connected in parallel, and switch S22 is connected in series to capacitor C2b and in parallel to capacitor C2a. The other configurations are the same as those in FIG. 1 of the first embodiment, and therefore description thereof will be omitted.

[0046] When switch S21 is on and switch S22 is off, L1=(L1a×L1b) / (L1a+L1b) and C2=C2a. When switch S21 is off and switch S22 is on, L1=L1a and C2=C2a+C2b.

[0047] Table 1 summarizes the parameters in the modified examples of the first embodiment. 101, 102, and 103 indicate power conversion devices 101 to 103 of modified examples 1 to 3, respectively. An upward arrow ↑ indicates that the value of the parameter in the first period T1 is greater than the value of the parameter in the second period. A downward arrow ↓ indicates that the value of the parameter in the first period T1 is smaller than the value of the parameter in the second period.

[0048] As shown in Table 1, for all of the modifications 1 to 3, Vo1 ＊ >Vo2 ＊ In order to achieve this, D1<D2, ωs1 ＊ >ωs2 ＊ 2A and 2B, Vo is larger than Vo in the second period T2. ＊ , D, ωs ＊ and the conditions of Λ can be satisfied.

[0049] In the second modification, the switches S21 and S22 are turned off in the first period T1, and the switches S21 and S22 are turned on in the second period T2, so that C1 and C2 are smaller in the first period T1 than in the second period T2.

[0050] In Modification 3, in the first period T1, the switch S21 is turned on and the switch S22 is turned off, and in the second period T2, the switch S21 is turned off and the switch S22 is turned on. As a result, L1 and C2 are smaller in the first period T1 than in the second period T2.

[0051] In circuits other than those of Modifications 1 to 3 of the first embodiment, it is sufficient to switch the element values ​​of at least two elements among the inductors L1 and L2 and the capacitors C1 and C2 between the first period T1 and the second period T2. Although the switches S2, S21, and S22 have been used as an example of the switching circuit, the element values ​​may be switched using a method other than switches.

[0052] Second Embodiment Fig. 7 is a circuit diagram of a power conversion device according to a second embodiment. As shown in Fig. 7, a power conversion device 104 according to the second embodiment includes an input terminal Tin, inductors L1a, L1b, and L2, switches S1 and S2, capacitors C1a, C1b, and C2, and an output terminal Tout.

[0053] The inductors L1a and L1b and the capacitors C1a and C1b form a resonant circuit 11, and the inductor L2 and the capacitor C2 form a resonant circuit 12. One end of a DC power supply 18 is electrically connected to the input terminal Tin. The other end of the DC power supply 18 is grounded.

[0054] An inductor L1b, a capacitor C1b, an inductor L1a, and a capacitor C1a are connected in series between the input terminal Tin and a node N1. A switch S2 is connected in parallel to the inductor L1b and the capacitor C1b, and in series to the inductor L1a and the capacitor C1a. The inductor L2 and the capacitor C2 are each connected in parallel to a load RL between the nodes N1 and N2. If the switch S1 is an FET, the source and drain of the switch S1 are electrically connected to ground and the node N2, respectively. The other configurations are the same as those of the first embodiment and its modified example, and therefore description thereof will be omitted.

[0055] The power conversion device 104 of the second embodiment shown in FIG. 7 is an example in which a switch S2 is added to a circuit based on A. Komanaka et al., “Generalized Analysis of Load-Independent ZCS Parallel-Resonant Inverter,” in IEEE Transactions on Industrial Electronics, vol. 69, no. 1, pp. 347-356, Jan. 2022, and corresponds to the inverse circuit of the power conversion device 100 of the first embodiment.

[0056] The power conversion device 104 performs ZCS operation and can make the voltage independent of the load. The output voltage can be switched by switching the resonant frequency of the inductor L1 and the capacitor C1 using the switch S2.

[0057] (Modification 1 of Second Embodiment) Fig. 8 is a circuit diagram of a power conversion device according to Modification 1 of Second Embodiment. As shown in Fig. 8, a power conversion device 105 according to Modification 1 of Second Embodiment includes an input terminal Tin, inductors Lc, L1a, L1b, and L2, switches S1, S21, and S22, capacitors C1a, C1b, and C2, and an output terminal Tout.

[0058] The inductors L1a and L1b and the capacitors C1a and C1b form a resonant circuit 11, and the inductor L2 and the capacitor C2 form a resonant circuit 12. One end of a DC power supply 18 is electrically connected to the input terminal Tin. The other end of the DC power supply 18 is grounded.

[0059] An inductor Lc is connected between the input terminal Tin and a node N1. Inductors L1a and L1b are connected in parallel between the node N1 and the drain of a switch S1. The source of the switch S1 is grounded. A switch S22 is connected in parallel to the inductor L1a and in series to the inductor L1b. A switch S21 is connected in parallel to the capacitor C1a and the switch S1 and in series to the capacitor C1b. The other configurations are the same as those of the first embodiment and its modified example, and therefore description thereof will be omitted.

[0060] The power conversion device 105 of the first modified example of the second embodiment in FIG. 8 is an example in which switches S21 and S22 are added to a circuit based on Y. Komiyama et al., "Load-Independent Constant-Current / Zero-Current Switching Inverter with Series Resonant Filter," 2023 IEEE Applied Power Electronics Conference and Exposition (APEC), Orlando, FL, USA, 2023, pp. 490-494.

[0061] The power conversion device 105 performs ZVS operation and can make the current independent of the load. The output voltage can be switched by switching the resonance frequency of the inductor L1 and the capacitor C1 using the switches S21 and S22.

[0062] As in the first embodiment, the second embodiment, and their modifications, the switch S1 operates in ZVS or ZCS mode, and in each of the first and second periods, the amplitude of the voltage or current output to the output terminal Tout needs to be independent of the size of the load RL connected to the output terminal Tout.

[0063] Note that ZCS operation is an operation in which the switch S1 is turned on when the current Is of the switch S1 is zero, i.e., 0 A, but zero current does not mean that the current Is is strictly 0 A. For example, the switch S1 may be turned on when the absolute value of the current Is is 5% or less of the maximum value of the current Iin.

[0064] In the current load independence, independence does not mean that the amplitude current of the output current Iout is completely independent of the load RL. For example, it is sufficient if the fluctuation in the amplitude current when the load RL fluctuates is 5% or less compared to the amplitude of the output current Iout (so-called rated output current) when the load RL is at a reference value.

[0065] As described above, the voltage Vout or the current Iout can be modulated while maintaining ZVS operation or ZCS operation and load-independent operation. In the first embodiment, the second embodiment, and their modifications, examples in which the voltage Vout is modulated to two levels have been described, but the voltage Vout may also be modulated to three or more levels.

[0066] (Third Embodiment) The third embodiment is an example of a wireless power transfer (WPT) system using the power conversion devices according to the first embodiment, the second embodiment, and their modifications. WPT requires that a control signal be transmitted from a power transmitting device to a power receiving device in addition to wireless power transmission. However, providing a transceiver that wirelessly transmits a control signal separately from the wireless power transmission would increase the system size. Therefore, in the third embodiment, power transmission and wireless transmission are performed using the power conversion devices according to the first embodiment, the second embodiment, and their modification 1.

[0067] Fig. 9 is a circuit diagram showing a wireless power transmission system according to the third embodiment. As shown in Fig. 9, the wireless power transmission system 106 of the third embodiment includes a power transmitting device 30 and a power receiving device 32. The power transmitting device 30 includes the power conversion device of the first modification of the first embodiment, a drive circuit 14, a transmitter 20, and a DC power supply 18.

[0068] The transmitter 20 includes an encoding circuit 16a. The encoding circuit 16a generates a signal Vg2, which is a control signal, based on a signal Si to be transmitted to the power receiving device 32.

[0069] The power receiving device 32 includes an inductor L3, a rectifier circuit 28, a DC / DC converter 26, a receiver 22, and a load RL. The inductor L3 is magnetically coupled to the inductor L1 of the power transmitting device 30. An AC current flowing through the inductor L1 generates a magnetic field. The generated magnetic field causes an AC induced current to flow through the inductor L3.

[0070] The rectifier circuit 28 includes an inductor L4, capacitors C3 and C4, and diodes Do1 and Do2. Capacitor C3, diode Do2, and inductor L4 are connected in parallel with inductor L3. Diode Do1 is connected between one end of capacitor C3 and one end of diode Do2, and inductor L4 is connected between one end of diode Do2 and one end of capacitor C4. The input node and output node of the rectifier circuit 28 are nodes N4 and N5, respectively, and the voltages of nodes N4 and N5 are V4 and V5, respectively.

[0071] A receiver 22 is connected to node N5. The receiver 22 includes resistors R1 and R2 and a comparator 24. The resistors R1 and R2 are connected in series between node N5 and ground. The comparator 24 receives a voltage V6 at a node N6 between resistors R1 and R2 and a reference voltage Vref. When the voltage V6 at node N6 is greater than the reference voltage Vref, the comparator 24 outputs a high level Vh as an output signal So, and when the voltage V6 is equal to or less than the reference voltage Vref, the comparator 24 outputs a low level (e.g., 0 V). A DC / DC converter 26 converts voltage V5 to a constant voltage V7 and supplies it to a load RL.

[0072] 10 is a timing chart showing the voltages in Embodiment 3. As shown in Fig. 10, the transmitter 20 of the power transmitting device 30 switches the signal Vg2, so that the voltage V4 at the node N4 has an amplitude of V41 in the first period T1 and a voltage V42 whose amplitude is smaller than V41 in the second period T2.

[0073] As a result of the rectifier circuit 28 rectifying the voltage V4, the voltage V5 at the node N5 becomes a DC voltage V51 during the first period T1, and becomes a DC voltage V52, which is smaller than V51, during the second period T2. As the resistors R1 and R2 resistively divide the voltage V5, the voltage V6 at the node N6 becomes a voltage V61 during the first period T1, and becomes a voltage V62, which is smaller than V61, during the second period T2. The reference voltage Vref is set to a voltage between the voltages V61 and V62. As a result, the voltage of the output signal So becomes a high level Vh (bit 1) during the first period T1, and becomes a low level 0 V (bit 0) during the second period T2.

[0074] By DC / DC converter 26 setting voltage V5 to a constant voltage, voltage V7 supplied to load RL becomes constant voltage V70. This allows power receiving device 32 to receive power that is outputted to the output terminal of the power conversion device through wireless power transmission.

[0075] As described above, the encoding circuit 16a supplies the signal Vg2 to the switch S2, thereby encoding the signal Si using the amplitude voltages Vo1 and Vo2, as shown in FIG. 4 . As shown in FIG. 10 , the comparator 24 (decoding circuit) decodes the signal So based on the received power (e.g., voltage V4). This allows a signal to be transmitted from the power transmitting device 30 to the power receiving device 32 by amplitude modulating the voltage of the power to be transmitted. This eliminates the need for a transmitter and receiver for transmitting and receiving signals separately from the power, thereby enabling the power transmission system to be miniaturized. Furthermore, by using the power conversion device of the first embodiment and its first modification, Class E load-independent operation can be maintained even when the voltage is modulated. This allows losses to be suppressed even when the switching frequency of the switch S1 is increased when the load resistance of the load RL fluctuates. Furthermore, since fluctuations in the voltage V7 are small even when the load resistance fluctuates, robustness and reliability can be improved.

[0076] In the third embodiment, an example has been described in which the power conversion device 102 according to Modification 1 of the first embodiment is used as the power conversion device, but the power conversion devices according to the first embodiment and Modifications 2 and 3, and the second embodiment and Modifications 2 and 3 may also be used as the power conversion device. In the third embodiment, an example has been described in which the power transmission device 30 and the power receiving device 32 are magnetically coupled, but the power transmission device 30 and the power receiving device 32 may also be electric-field coupled.

[0077] The power conversion devices according to the first embodiment, the second embodiment, and their modifications may be used as high-frequency power supplies. This allows for ZVS or ZCS operation even when the magnitude of the load RL fluctuates. Furthermore, the voltage supplied to the load RL can be modulated while maintaining ZVS or ZCS operation and load independence. Because of the ZVS or ZCS operation, losses can be suppressed even in high-frequency power supplies of 1 MHz or higher.

[0078] The power conversion devices according to the first embodiment, the second embodiment, and the modifications thereof are inverters that convert DC to AC. The high-frequency power supply may include a converter that converts AC output from the power conversion devices according to the first embodiment, the second embodiment, and the modifications thereof into DC.

[0079] The above describes in detail preferred embodiments, but the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

[0080] This application claims priority from basic patent application No. 2024-026659, filed with the Japan Patent Office on February 26, 2024, the entire contents of which are incorporated herein by reference.

[0081] 11, 12: Resonant circuit 14: Drive circuit 16: Control circuit 16a: Encoding circuit 18: DC power supply 20: Transmitter 22: Receiver 24: Comparator 26: DC / DC converter 28: Rectifier circuit 30: Power transmitting device 32: Power receiving device

Claims

1. A power conversion device comprising: a switch connected to a DC power supply and operating in ZVS or ZCS mode; a first resonant circuit having a first inductor and a first capacitor; a second resonant circuit having a second inductor and a second capacitor; a switching circuit that switches between a first period in which element values ​​of at least two elements from the first inductor, the first capacitor, the second inductor, and the second capacitor are a first value and a second period in which the element values ​​are a second value different from the first value; and an output terminal from which AC power is output, wherein the first value is the element value that makes a first amplitude of a voltage or current output to the output terminal independent of the magnitude of a load connected to the output terminal during the first period, and the second value is the element value that makes a second amplitude of a voltage or current output to the output terminal independent of the magnitude of the load during the second period.

2. The power conversion device of claim 1, wherein a first duty cycle, which is the ratio of the off period to the on and off cycle of the switch during the first period, is different from a second duty cycle, which is the ratio of the off period to the on and off cycle of the switch during the second period.

3. The power conversion device according to claim 2, wherein the switch is connected in parallel to the DC power supply and operates in ZVS mode, one end of the first inductor is connected to one end of the DC power supply and the other end of the first inductor is connected to one end of the switch, the first capacitor is connected in parallel with the DC power supply and the switch, and the second inductor and the second capacitor are connected in series between one end of the switch and the output terminal.

4. The power conversion device according to claim 3, wherein the at least two elements include at least one of the first inductor and the first capacitor.

5. The power conversion device according to claim 3, wherein the first value is the element value that makes a first amplitude of the voltage output to the output terminal independent of the magnitude of the load connected to the output terminal during the first period, and the second value is the element value that makes a second amplitude of the voltage output to the output terminal independent of the magnitude of the load during the second period.

6. The power conversion device according to claim 5, wherein the first amplitude is greater than the second amplitude, and the first duty ratio is lower than the second duty ratio.

7. The power conversion device according to any one of claims 1 to 6, wherein the output power output to the output terminal is transmitted wirelessly to a power receiving device.

8. A power transmission system comprising: a power conversion device according to any one of claims 1 to 6; and a power receiving device that receives power transmitted wirelessly as output power output to an output terminal of the power conversion device.

9. The power transmission system according to claim 8, wherein the power conversion device includes an encoding circuit that encodes a signal using the first amplitude and the second amplitude, and the power receiving device includes a decoding circuit that decodes the signal based on the received power.

10. A high frequency power supply comprising a power conversion device according to any one of claims 1 to 6.

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