Capacitor

Abstract

A capacitor according to an embodiment of the present invention includes: a base including a trench formed in a direction from a first surface toward a second surface opposite to the first surface; a first electrode layer disposed on the first surface and the trench; a first dielectric layer disposed on the first electrode layer; a second electrode layer disposed on the first dielectric layer; and a filling layer disposed on the second electrode layer, wherein the filling layer includes a first region disposed on the first surface and a second region disposed on the trench, and a region of an upper surface of the filling layer having a lowest height with respect to the second surface of the base is disposed in the second region.

Description

capacitor

[0001] An embodiment of the present invention relates to a capacitor.

[0002] Semiconductor packages are used in a variety of fields, including automobiles, communications, and computers. They typically include printed circuit boards (PCBs), semiconductor chips positioned on the PCBs, and passive components positioned on the PCBs. Passive components may include, for example, resistors, inductors, and capacitors.

[0003] As semiconductor packaging becomes more sophisticated, the demand for high-performance, highly reliable, and ultra-small capacitors is increasing. To meet these demands, silicon-based capacitors and anodic aluminum oxide (AAO)-based capacitors have been proposed. Silicon-based capacitors include electrode layers, dielectric layers, and electrode layers sequentially stacked on a silicon base, while AAO-based capacitors include electrode layers, dielectric layers, and electrode layers sequentially stacked on an AAO base.

[0004] As the need for reducing the signal path of semiconductor packages and the size of semiconductor packages increases, high-capacity capacitors that can be mounted inside or underneath semiconductor packages are required.

[0005] The AAO base is a porous substrate with a large surface area. Therefore, AAO-based capacitors can have high capacitance. However, because the AAO base is porous and amorphous, it is weak and prone to breakage. Heat treatment can be performed to increase the rigidity of the AAO base, but this can cause changes in its properties or distortion.

[0006] The technical problem to be achieved by the present invention is to provide a capacitor having an ultra-small size, high capacity, and high strength.

[0007] A capacitor according to one embodiment of the present invention comprises a base including a trench formed in a direction from a first surface toward a second surface opposite the first surface, a first electrode layer disposed on the first surface and the trench, a first dielectric layer disposed on the first electrode layer, a second electrode layer disposed on the first dielectric layer, and a filling layer disposed on the second electrode layer, wherein the filling layer includes a first region disposed on the first surface and a second region disposed on the trench, and a region of an upper surface of the filling layer having a lowest height based on the second surface of the base is disposed in the second region.

[0008] The horizontal thickness of at least one of the first electrode layer, the first dielectric layer, and the second electrode layer disposed on the wall surface of the trench may be greater than the vertical thickness of at least one of the first electrode layer, the first dielectric layer, and the second electrode layer disposed on the first surface.

[0009] The total horizontal thickness of the first electrode layer, the first dielectric layer, and the second electrode layer arranged on the wall surface of the trench may be 15 nm or more and 35 nm or less.

[0010] The capacitor may further include a first electrode pad connected to the first electrode layer and a second electrode pad connected to the second electrode layer.

[0011] The charging layer may include a first opening and a second opening on the second electrode layer of the first surface, and the first electrode pad may be arranged in the first opening, and the second electrode pad may be arranged in the second opening.

[0012] A hole is formed in the first dielectric layer that vertically overlaps the first opening, the filling layer extends along the first opening to the first dielectric layer, and the first opening and the hole can be filled with an electrode material forming the first electrode layer.

[0013] A hole is formed in the first dielectric layer and the second electrode layer, at least a portion of which vertically overlaps the first opening, and the filling layer may be further disposed on the hole wall of the first dielectric layer and the second electrode layer.

[0014] The first electrode pad is exposed above the upper surface of the charging layer, and the horizontal width of the first electrode pad exposed above the upper surface of the charging layer may be greater than the horizontal width of the first electrode pad disposed between the hole wall of the first dielectric layer and the second electrode layer.

[0015] The upper surface of the second region may be concave in a direction toward the second surface of the base.

[0016] The above base may include an anodic oxide metal.

[0017] The above base may include AAO (anodic aluminum oxide).

[0018] The above-mentioned filling layer may include a resin.

[0019] The above resin may include an epoxy resin.

[0020] Bubbles may be formed in the filling layer within the trench.

[0021] Among the upper surfaces of the above-mentioned charging layer, a region having the lowest height based on the second surface of the above-mentioned base may overlap with the bubbles in a direction from the first surface toward the second surface.

[0022] The width of the above trench may be 100 to 200 nm.

[0023] The width of the filling layer within the trench may be 100 nm or less.

[0024] The width of the filling layer within the trench may be 30 nm to 70 nm.

[0025] The above resin may have a viscosity of 250 cPs or less.

[0026] According to another embodiment of the present invention, a capacitor includes a base including a through hole formed in a direction from a first surface toward a second surface opposite to the first surface, a first electrode layer disposed on the first surface, the second surface, and an inner wall of the through hole, a first dielectric layer disposed on the first electrode layer, a second electrode layer disposed on the first dielectric layer, and a charging layer disposed on the second electrode layer, wherein the charging layer includes a first region disposed on the first surface and a second region disposed in the through hole, and a region of an upper surface of the charging layer having a lowest height based on the second surface of the base is disposed in the second region.

[0027] The charging layer may further include a third region disposed on the second electrode layer on the second surface.

[0028] According to another embodiment of the present invention, a capacitor includes a base including a trench formed in a direction from a first surface toward a second surface opposite the first surface, a first electrode layer disposed on the first surface and the trench, a first dielectric layer disposed on the first electrode layer, a second electrode layer disposed on the first dielectric layer, and a filling layer disposed on the second electrode layer, wherein the filling layer includes a first region disposed on the first surface and a second region disposed in the trench, and at least one bubble is formed in the second region.

[0029] According to embodiments of the present invention, an ultra-small, high-capacity, and high-strength capacitor can be provided. Furthermore, according to embodiments of the present invention, a capacitor with a simple manufacturing process, low manufacturing cost, and high reliability can be provided.

[0030] FIG. 1 is a cross-sectional view of a base within a capacitor according to one embodiment of the present invention.

[0031] FIG. 2 is a cross-sectional view of a capacitor according to one embodiment of the present invention.

[0032] Figure 3 is an enlarged view of a portion of the capacitor of Figure 2.

[0033] FIG. 4 is a perspective view of a base included in a capacitor according to another embodiment of the present invention.

[0034] Figure 5 is a cross-sectional view of a capacitor according to another embodiment of the present invention.

[0035] Figures 6 and 7 are cross-sectional views showing electrode pads arranged in a capacitor according to an embodiment of the present invention.

[0036] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the attached drawings.

[0037] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0038] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0039] Additionally, the terms used in the embodiments of the present invention are intended to describe the embodiments and are not intended to limit the present invention.

[0040] In this specification, the singular may also include the plural unless specifically stated otherwise in the phrase, and when it is described as “A and / or at least one (or more) of B, C”, it may include one or more of all combinations that can be combined with A, B, C.

[0041] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0042] These terms are intended only to distinguish one component from another, and are not intended to limit the nature, order, or sequence of the component.

[0043] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0044] Additionally, when described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Furthermore, when expressed as "above" or "below", it can include the meaning of a downward direction as well as an upward direction based on one component.

[0045] Hereinafter, embodiments will be described in detail with reference to the attached drawings. Regardless of the drawing numbers, identical or corresponding components are given the same reference numbers, and redundant descriptions thereof will be omitted.

[0046] FIG. 1 is a cross-sectional view of a base within a capacitor according to one embodiment of the present invention, FIG. 2 is a cross-sectional view of a capacitor according to one embodiment of the present invention, and FIG. 3 is an enlarged view of a portion of the capacitor of FIG. 2.

[0047] Referring to FIGS. 1 to 3, the capacitor (100) includes a base (110), a first electrode layer (120), a first dielectric layer (130), a second electrode layer (140), and a charging layer (150).

[0048] According to an embodiment of the present invention, the base (110) includes a first surface (111), a second surface (112) which is an opposite surface of the first surface (111), and a third surface (113) which is disposed between the first surface (111) and the second surface (112). The first surface (111), the second surface (112), and the third surface (113) may be referred to as an upper surface, a lower surface, and a side surface, respectively. The base (110) may have a hexahedral shape, but is not limited thereto, and may be a cylinder, an elliptical cylinder, a prism, or the like.

[0049] The base (110) includes a plurality of trenches (117) formed in a direction from the first surface (111) toward the second surface (112) which is the opposite surface of the first surface (111). Accordingly, the base (110) includes a plurality of structures (115) protruding from the second surface (112) toward the first surface (111), and the plurality of structures (115) can be arranged to be spaced apart from each other by the trenches (117).

[0050] The plurality of trenches (117) may have the same shape or a regular shape, and the width (W1) of the plurality of trenches (117) and the spacing distance (D1) between the plurality of trenches (117) may be the same as each other, or may have a pattern of regularly increasing or regularly decreasing.

[0051] At least some of the plurality of structures (115) may have a columnar shape. For example, at least some of the plurality of structures (115) may have a polygonal columnar shape or a cylindrical shape. For example, at least some of the plurality of structures (115) may have a triangular columnar shape. In FIG. 1, the bottom surface (117B) of the trench (117) is illustrated as having a flat shape, but is not limited thereto, and the bottom surface (117B) of the trench (117) may also have a concave shape. As illustrated in FIG. 1, the width (W1) of the trench (117) may be constant in the direction from the first surface (111) to the second surface (112), but is not limited thereto, and may increase or decrease in the direction from the first surface (111) to the second surface (112).

[0052] According to an embodiment of the present invention, the first electrode layer (120) is disposed on the surface of the base (110), the first surface (111), and the wall surface (117W) and the bottom surface (117B) of the trench (117) within the trench (117), the first dielectric layer (130) is disposed on the first electrode layer (120) according to the shape of the first electrode layer (120), and the second electrode layer (140) is disposed on the first dielectric layer (130) according to the shape of the first dielectric layer (130).

[0053] The base substrate (110) may include a semiconductor material or an insulator material. For example, the base substrate (110) may include an anodized metal. For example, the base substrate (110) may be an anodized substrate of at least one of aluminum (Al), magnesium (Mg), zinc (Zn), titanium (Ti), tantalum (Ta), hafnium (Hf), and niobium (Nb). For example, the base substrate (110) may include anodic aluminum oxide (AAO). Alternatively, the base substrate (110) may be a silicon (Si) substrate. For example, the base substrate (110) may be a doped silicon substrate. For example, the base substrate (110) may be an n-type doped silicon substrate or a p-type doped silicon substrate.

[0054] If the base (110) is an anodic oxide substrate including an anodic oxide metal, for example, an AAO substrate, the base (110) may be a porous substrate, so that the surface area of ​​the base (110) increases, and accordingly, the surface areas of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) disposed on the base (110) may also increase.

[0055] According to an embodiment of the present invention, a first electrode layer (120) is disposed on a base (110), a first dielectric layer (130) is disposed on the first electrode layer (120), a second electrode layer (140) is disposed on the first dielectric layer (130), a first electrode pad (not shown) is connected to the first electrode layer (120), and a second electrode pad (not shown) is connected to the second electrode layer (140).

[0056] The capacitance of a capacitor can be calculated according to the following mathematical formula 1.

[0057]

[0058] Here, C is the capacitance, ε is the permittivity, S is the area of ​​the electrode layer, and d is the distance between the electrode layers. According to this, it can be seen that the larger the area of ​​the electrode layer, the greater the capacitance.

[0059] According to an embodiment of the present invention, the width (W1) of the trench (117) may be 100 nm to 200 nm. When the base (110) includes AAO, it is easy to implement the width (W1) of the trench (117) within this numerical range.

[0060] According to this, as the surface area of ​​the base (110) increases, the area of ​​the electrode layer increases, so a capacitor (100) having a high electrostatic capacitance can be obtained.

[0061] According to an embodiment of the present invention, the first electrode layer (120) may include at least one of titanium (Ti), molybdenum (Mo), tungsten (W), and indium-tin. For example, the first electrode layer (120) may include TiN, TiO2, MoO x , WO x , may include at least one of ITO and ITGO, wherein x is a positive integer.

[0062] The first dielectric layer (130) is made of SiO2, Si3N3, HfO2, ZrO2, Hf x Zr y O z and may include at least one of Al2O3, wherein x, y, and z are positive integers. When the material of the first dielectric layer (130) satisfies these conditions, it is easy to deposit the first dielectric layer (130) on the first electrode layer (120) with a uniform thickness.

[0063] Next, the second electrode layer (140) may include at least one of titanium (Ti), molybdenum (Mo), tungsten (W), and indium-tin. For example, the second electrode layer (140) may include TiN, TiO2, MoO x , WO x, may include at least one of ITO and ITGO, wherein x is a positive integer.

[0064] The material of the second electrode layer (140) may be the same as the material of the first electrode layer (120), but is not limited thereto. That is, the material of the second electrode layer (140) may be different from the material of the first electrode layer (120).

[0065] The capacitor (100) according to an embodiment of the present invention further includes a charging layer (150) disposed on the second electrode layer (140). Since the charging layer (150) is disposed on the second electrode layer (140), the charging layer (150) includes a first region (151) disposed on the second electrode layer (140) on the first surface (111) of the base (110) and a second region (152) disposed on the second electrode layer (140) in the trench (117). After the trench (117) is filled with the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140), the empty space can be filled by the second region (152) of the charging layer (150). At this time, since the charging layer (150) performs a passivation function, it can be referred to as a passivation layer. That is, the first region (151) of the charging layer (150) can protect the second electrode layer (140) on the first surface (111) of the base (110). In addition, the second region (152) of the charging layer (150) not only protects the second electrode layer (140) in the trench (117), but also prevents current conduction between the second electrode layers (140) arranged on the facing wall surfaces (117W) of the trench (117), and can increase the strength of the structure (115) of the porous base (110).

[0066] According to an embodiment of the present invention, the height of the first region (151) of the charging layer (150) is higher than the height of the second region (152) based on the second surface (112) of the base (110). That is, the region having the lowest height among the upper surfaces of the charging layer (150) based on the second surface (112) of the base (110) is arranged in the second region (152). For example, the upper surface of the second region (152) of the charging layer (150) may be concave in the direction toward the second surface (112) of the base (110). Accordingly, it is easy to arrange an electrode pad (not shown) on the first surface (111) of the base (110). In addition, since the surface area of ​​the upper surface of the second region (152) of the charging layer (150) can be increased, heat generated inside the trench (117) when the capacitor (100) is driven can be easily discharged to the outside through the upper surface of the second region (152).

[0067] According to an embodiment of the present invention, the filling layer (150) may include a resin. For example, the resin may include an epoxy resin. When the filling layer (150) includes a resin, the filling layer (150) insulates between the second electrode layers (140) arranged on the wall surface (117W) of the trench (117), so that conduction within the trench (117) can be prevented. In addition, when the filling layer (150) includes a resin, bubbles (152P) are easily formed in the second region (152) of the filling layer (150), and the upper surface of the second region (152) of the filling layer (150) is easily formed to be concave in a direction toward the second surface (112) of the base (110). When the capacitor (100) is driven, the filling layer (150) may repeatedly contract or expand depending on the heat generation of the capacitor (100). At this time, when bubbles (152P) are formed in the second region (152) of the charging layer (150), the bubbles (152P) can act as a buffer against shrinkage or expansion of the charging layer (150), thereby reducing the stress applied to the structure (115) of the base (110) and preventing the base (110) from being broken or damaged, thereby increasing the durability of the capacitor (100).

[0068] In particular, when a concave region in the direction toward the second surface (112) of the base (110) among the upper surfaces of the second region (152) of the filling layer (150), i.e., a region having the lowest height with respect to the second surface (112) among the upper surfaces of the second region (152) of the filling layer (150), overlaps with a bubble (152) in the direction from the first surface (111) of the base (110) toward the second surface (112), the path through which heat generated in the trench (117) is released through the upper surface of the second region (152) becomes shorter, and thus the thermal stress of the second region (152) can be lowered. That is, the heat generated when the capacitor (100) is driven can be efficiently released through the surface of the bubble (152P) and the upper surface of the second region (152), and when expansion occurs in the second region (152) of the charging layer (150) due to the heat generated when the capacitor (100) is driven, the stress applied to the charging layer (150) can be absorbed by the surface of the bubble (152P) and the upper surface of the second region (152).

[0069] The width (W1) of the trench (117) of the base (110) may be 100 nm to 200 nm, and the total thickness of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) may be 10 nm to 40 nm, preferably 15 nm to 35 nm, and more preferably 20 nm to 30 nm. When the materials and thicknesses of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) satisfy the above conditions, it is easy to deposit the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) on the base (110) with a uniform thickness. It is possible to deposit the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) with a uniform thickness on the wall surface (117B) of the trench (117) of the base (110) having a width (W1) of 100 nm to 200 nm.

[0070] At this time, the thickness of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) arranged on the wall surface (117B) of the trench (117) may be greater than or equal to the thickness of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) arranged on the first surface (111) of the base (110). Here, the thickness of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) arranged on the wall surface (117B) of the trench (117) may mean the thickness in the direction parallel to the first surface (111) of the base (110), and the thickness of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) arranged on the first surface (111) of the base (110) may mean the thickness in the direction perpendicular to the first surface (111) of the base (110). Accordingly, since the strength of the structure (115) formed by the wall surface (117B) of the adjacent trench (117) is increased, the possibility of damage during movement may be reduced even if the base (110) includes a porous substrate that is AAO.

[0071] For example, the thickness of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) arranged on the wall surface (117B) of the trench (117) may be 15 nm to 35 nm, preferably 25 nm to 35 nm. Accordingly, the width (W2) of the filling layer (150) within the trench (117) may be 100 nm or less, preferably 30 nm to 70 nm.

[0072] When the width (W1) of the trench (117) of the base (110), the thicknesses of the first electrode layer (120), the first dielectric layer (130) and the second electrode layer (140), and the width (W2) of the filling layer (150) within the trench (117) satisfy these numerical ranges, the structure (115) of the base (110) can maintain high rigidity while having a high electrostatic capacitance due to the increase in the surface area of ​​the first electrode layer (120), the first dielectric layer (130) and the second electrode layer (140), and thus durability can also be improved.

[0073] According to an embodiment of the present invention, the resin included in the filling layer (150) may have a viscosity of 250 cPs (centipoise) or less, preferably 150 cPs or less. Accordingly, when the width (W1) of the trench (117) of the base (110) is 100 nm to 200 nm, the space between the second electrode layers (140) in the trench (117) can be easily filled. That is, when the viscosity of the resin included in the filling layer (150) is 250 cPs or less, a high-temperature CVD (chemical vapor deposition) process for forming passivation is not required, so that the process time and process cost can be significantly reduced, and the problem of the characteristics of the base (110) changing due to high-temperature treatment can also be prevented.

[0074] FIG. 4 is a perspective view of a base included in a capacitor according to another embodiment of the present invention, and FIG. 5 is a cross-sectional view of a capacitor according to another embodiment of the present invention.

[0075] Referring to FIGS. 4 and 5, the base (110) includes a plurality of through holes (TH) penetrating from the first surface (111) to the second surface (112). That is, the plurality of through holes (TH) extend from the first surface (111) to the second surface (112) of the base (110). At this time, at least some of the plurality of through holes (TH) may be parallel to each other. For example, a virtual line connecting the center of the bottom surface of one of the plurality of through holes (TH) to the center of the upper surface may be parallel to a virtual line connecting the center of the top surface of another of the plurality of through holes (TH) to the center of the upper surface. Accordingly, since an electrode layer can be easily deposited with a uniform thickness on the inner wall surfaces of the plurality of through holes (TH), a highly reliable capacitor can be obtained.

[0076] The first electrode layer (120) is disposed on the first surface (111), the second surface (112) of the base (110) and the inner wall surfaces of the plurality of through holes (TH), the first dielectric layer (130) is disposed on the first electrode layer (120) on the first surface (111), the second surface (112) of the base (110) and the inner wall surfaces of the plurality of through holes (TH), the second electrode layer (140) is disposed on the first dielectric layer (130) on the first surface (111), the second surface (112) of the base (110) and the inner wall surfaces of the plurality of through holes (TH2), the first electrode pad (not shown) is connected to the first electrode layer (120), and the second electrode pad (not shown) is connected to the second electrode layer (140).

[0077] Except that the trench (117) of the base (110) in the embodiments of FIGS. 1 to 3 is replaced with the through hole (TH) of the base (110) in the embodiments of FIGS. 4 to 5, the contents described in the embodiments of FIGS. 1 to 3 regarding the base (110), the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) can be applied as is to the embodiments of FIGS. 4 to 5. That is, the materials and thicknesses of the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) according to the embodiments of FIGS. 4 to 5 can be the same as those described in the embodiments of FIGS. 1 to 3. The description regarding the width (W) of the trench (117) according to the embodiments of FIGS. 1 to 3 can also be applied to the width of the through hole (TH). The description of the charging layer (150) according to the embodiments of FIGS. 1 to 3 can be equally applied to the embodiments of FIGS. 4 to 5, and for the convenience of explanation, duplicate descriptions of the same contents are omitted.

[0078] That is, the charging layer (150) includes a first region (151) disposed on the second electrode layer (140) on the first surface (111) of the base (110) and a second region (152) disposed on the second electrode layer (140) in the through hole (TH). Here, the charging layer (150) may further include a third region (153) disposed on the second electrode layer (140) on the second surface (112) of the base (110).

[0079] As in the embodiments of FIGS. 1 to 3, in the embodiments of FIGS. 4 to 5, the region having the lowest height based on the second surface (112) of the base (110) among the upper surfaces of the charging layer (150) is arranged in the second region (152) of the charging layer (150), and a bubble (152P) is formed in the second region (152) of the charging layer (150), and the region having the lowest height based on the second surface (112) of the base (110) among the upper surfaces of the charging layer (150) can overlap with the bubble (152P) in the direction from the first surface (111) toward the second surface (112).

[0080] In the above, only the MIM structure in which the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) are arranged on the base (110) is described as an example, but the embodiment of the present invention is not limited thereto. The embodiment of the present invention can be equally applied to a MIMIM structure in which the first electrode layer (120), the first dielectric layer (130), and the second electrode layer (140) are sequentially arranged on the base (110), and which includes a second dielectric layer (not shown) arranged on the second electrode layer (140) and a third electrode layer (not shown) arranged on the second dielectric layer (not shown).

[0081] Figures 6 and 7 are cross-sectional views showing electrode pads arranged in a capacitor according to an embodiment of the present invention. For convenience of explanation, only the electrode pad arrangement shape in the capacitor according to the embodiment of Figures 1 to 3 is illustrated, but the same electrode pad arrangement shape can also be applied to the capacitor according to the embodiment of Figures 4 and 5. Duplicate explanations for the same contents as those described with reference to Figures 1 to 5 will be omitted.

[0082] Referring to FIG. 6, the capacitor (100) includes a base (110), a first electrode layer (120) disposed on the base (110), a first dielectric layer (130) disposed on the first electrode layer (120), a second electrode layer (140) disposed on the first dielectric layer (130), a charging layer (150) disposed on the second electrode layer (140), and a first electrode pad (160) connected to the first electrode layer (120) and a second electrode pad (170) connected to the second electrode layer (140).

[0083] On the second electrode layer (140) of the first surface (111) of the base (110), the charging layer (150) includes a first opening (150C1) and a second opening (150C2). A first electrode pad (160) may be arranged in the first opening (150C1), and a second electrode pad (170) may be arranged in the second opening (150C2). Accordingly, the second electrode pad (170) arranged in the second opening (150C2) may be connected to the second electrode layer (140). In order to connect the first electrode pad (160) arranged in the first opening (150C1) with the first electrode layer (120), the filling layer (150) may extend along the edge of the first opening (150C1) to the first dielectric layer (130), and the first dielectric layer (130) may include a first hole (130C1) corresponding to the first opening (150C1). The electrode material forming the first electrode layer (120) may be arranged along the first hole (130C1) and the first opening (150C1) to the lower surface of the first electrode pad (160), so that the first electrode pad (160) may be connected to the first electrode layer (120).

[0084] When the first electrode pad (160) and the second electrode pad (170) are arranged in this structure, the first electrode pad (160) and the second electrode pad (170) of the same height can be arranged to have the same maximum height. Accordingly, when the capacitor (100) according to the embodiment of the present invention is mounted on a printed circuit board, there is no need to separately adjust the heights of the first electrode pad (160) and the second electrode pad (170), so the assembly process can be improved, and the bonding strength between the first electrode pad (160) and the second electrode pad (170) and the printed circuit board can be improved.

[0085] Referring to FIG. 7, a first electrode layer (120), a first dielectric layer (130), a second electrode layer (140), and a charging layer (150) are sequentially arranged on a base (110). A first electrode pad (160) may be connected to the first electrode layer (120) through a first opening extending from the upper surface of the charging layer (150) to the first electrode layer (120), and a second electrode pad (170) may be connected to the second electrode layer (140) through a second opening extending from the upper surface of the charging layer (150) to the upper surface of the second electrode layer (140). At this time, the charging layer (150) may be further arranged along the side surfaces of the first dielectric layer (130) and the second electrode layer (140) in the first opening. According to this, the charging layer (150) can electrically insulate between the first electrode pad (160) connected to the first electrode layer (120) and the second electrode layer (140).

[0086] At this time, the first electrode pad (160) is exposed above the upper surface of the charging layer (150), and the width of the first electrode pad (160) exposed above the upper surface of the charging layer (150) may be greater than the width of the first electrode pad (160) in the first opening. Similarly, the second electrode pad (170) is exposed above the upper surface of the charging layer (150), and the width of the second electrode pad (170) exposed above the upper surface of the charging layer (150) may be greater than the width of the second electrode pad (170) in the second opening. Accordingly, not only is it easy to deposit the first electrode pad (160) and the second electrode pad (170) in the first opening and the second opening, but it is also easy to stably connect the first electrode pad (160) and the second electrode pad (170) to an external electrode or an external wire.

[0087] Although the present invention has been described above with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various modifications and changes may be made to the present invention without departing from the spirit and scope of the present invention as set forth in the claims below.

Claims

1. A base including a trench formed in a direction from the first side toward the second side, which is the opposite side of the first side; A first electrode layer disposed on the first surface and the trench, A first dielectric layer disposed on the first electrode layer, A second electrode layer disposed on the first dielectric layer, and Including a charging layer disposed on the second electrode layer, The above-mentioned charging layer includes a first region disposed on the first surface and a second region disposed on the trench, A capacitor is a region having the lowest height based on the second surface of the base among the upper surfaces of the charging layer.

2. In paragraph 1, A capacitor in which the upper surface of the second region is concave in a direction toward the second surface of the base.

3. In paragraph 1, The above base is a capacitor comprising an anode oxide metal.

4. In paragraph 3, The above base is a capacitor including AAO (anodic aluminum oxide).

5. In paragraph 3, The above-mentioned charging layer is a capacitor comprising a resin.

6. In paragraph 5, The above resin is a capacitor containing epoxy resin.

7. In paragraph 5, A capacitor in which bubbles are formed in the charging layer within the trench.

8. In paragraph 7, A capacitor in which the area having the lowest height based on the second surface of the base among the upper surfaces of the charging layer overlaps the bubbles in the direction from the first surface toward the second surface.

9. In paragraph 5, A capacitor having a trench width of 100 to 200 nm.

10. In paragraph 9, A capacitor in which the width of the charging layer within the trench is 100 nm or less.

Images