PCB assembly and PCB assembly processing method

Abstract

Disclosed in the present application are a PCB assembly and a PCB assembly processing method. The PCB assembly comprises a first PCB, a second PCB and a power chip, wherein the first PCB comprises an organic substrate and a first circuit arranged on the organic substrate, and a first through groove is provided on the first PCB; the second PCB is arranged in the first through groove, the second PCB comprises a ceramic substrate and a first copper layer arranged on a first surface of the ceramic substrate, and the first copper layer is electrically connected to the first circuit; and the power chip is arranged on the first copper layer. In the technical solution, by means of arranging the second PCB in the first through groove and electrically connecting the first copper layer on the first surface of the ceramic substrate to the first circuit, it is ensured that the PCB assembly can control the power chip normally to operate; moreover, arranging the power chip on the first copper layer can utilize the good heat dissipation performance and insulation performance of the ceramic substrate.

Description

PCB assembly and PCB assembly processing method

[0001] This application is based on the Chinese invention application with application number 202410412851.0 filed on April 3, 2024, entitled “PCB assembly and PCB assembly processing method”, and claims priority. Technical Field

[0002] The present application relates to the field of PCB technology, and in particular to a PCB assembly and a PCB assembly processing method. Background Art

[0003] Currently, in the field of PCB (Printed Circuit Board, PCB for short), the power of various types of power devices installed on the PCB is getting higher and higher, and the heat dissipation requirements of the PCB are also getting higher and higher.

[0004] Currently, the most widely used method for PCB heat dissipation is to embed copper blocks in the PCB to dissipate heat from the power module. Since the thermal conductivity of copper blocks is approximately 400W / mK, they have an excellent heat dissipation effect on the power modules on the PCB. However, as the requirements for fine circuits in PCBs become increasingly stringent, the size of copper blocks is also getting smaller and smaller, and the difficulty of manufacturing the dimensional precision of copper blocks is becoming increasingly difficult, which also limits the use of copper blocks in PCBs. At the same time, due to the conductive properties of copper blocks, there are insulation challenges when processing high-voltage, high-current chips (such as IGBTs and SiC devices). Adding an insulating resin layer on the surface of the copper blocks will seriously reduce the heat dissipation performance of the copper base. Therefore, how to simultaneously ensure the heat dissipation and insulation performance of power devices in PCBs has become a technical problem that needs to be solved urgently.

[0005] Application Contents

[0006] The embodiments of the present application provide a PCB assembly and a PCB assembly processing method to solve the problem of being unable to simultaneously ensure the heat dissipation performance and insulation performance of power devices in the PCB.

[0007] A PCB assembly includes a first PCB board, a second PCB board and a power chip;

[0008] The first PCB board includes an organic substrate and a first circuit provided on the organic substrate, and a first through groove is provided on the first PCB board;

[0009] The second PCB is disposed in the first through groove, the second PCB comprising a ceramic substrate and a first copper layer disposed on a first surface of the ceramic substrate, the first copper layer being electrically connected to the first circuit;

[0010] The power chip is disposed on the first copper layer.

[0011] Furthermore, the first surface is spaced apart from a surface of the first circuit by a preset distance.

[0012] Furthermore, the first surface is flush with a surface of the first circuit.

[0013] Furthermore, the second PCB board further includes a second copper layer provided on the second surface of the ceramic substrate;

[0014] The PCB assembly further includes a heat sink connected to the second copper layer.

[0015] Furthermore, the PCB assembly further includes a target insulating layer, which fills the gap between the first PCB board and the second PCB board and wraps around the periphery of the second copper layer;

[0016] The target insulating layer is provided with a first blind hole communicating with the second copper layer and the heat sink.

[0017] Furthermore, the first PCB board includes at least three layers of organic substrates; the at least three layers of organic substrates include an outer organic substrate and an inner organic substrate; the first circuit is provided on the outer organic substrate; the inner organic substrate is provided with a second circuit;

[0018] The second circuit is connected to the first circuit via a metal interconnection structure.

[0019] A PCB assembly processing method, comprising:

[0020] A first through groove is formed on a first PCB board, wherein the first PCB board includes an organic substrate and a first circuit provided on the organic substrate;

[0021] Mounting a second PCB board in the first through-slot, the second PCB board comprising a ceramic substrate and a first copper layer disposed on a first surface of the ceramic substrate;

[0022] electrically connecting the first circuit and the first copper layer;

[0023] A power chip is mounted on the first copper layer to obtain a PCB assembly.

[0024] Furthermore, mounting the second PCB board in the first through slot includes:

[0025] Laying an auxiliary layer on the first PCB board, wherein the auxiliary layer covers the first through groove;

[0026] placing the second PCB board in the first through groove, with the first copper layer of the second PCB board connected to the auxiliary layer, and forming a gap between the second PCB board and the first PCB board;

[0027] A target insulating layer is filled in the gap, and the auxiliary layer is removed, so as to mount the second PCB board in the first through groove.

[0028] Furthermore, the auxiliary layer is made of high-temperature adhesive tape.

[0029] Furthermore, the electrically connecting the first circuit and the first copper layer includes:

[0030] Processing a first PCB hole on the first PCB board and processing a second PCB hole on the target insulating layer;

[0031] Performing pattern transfer on the first PCB board and the second PCB board to form a first photoresist pattern;

[0032] Electroplating the first PCB board and the second PCB board to form a first metal layer;

[0033] etching the first metal layer based on the first photoresist pattern to form the target circuit;

[0034] The first PCB hole is used to connect the first circuit and the metal interconnection structure in the first PCB board; the second PCB hole is used to connect the second copper layer of the second PCB board and the power heat sink; and the target circuit is electrically connected to the first circuit and the first copper layer.

[0035] The above-mentioned PCB assembly and PCB assembly processing method include a first PCB board, a second PCB board and a power chip; the first PCB board includes an organic substrate and a first circuit arranged on the organic substrate, and the first PCB board is provided with a first through-slot; the second PCB board is arranged in the first through-slot, and the second PCB board includes a ceramic substrate and a first copper layer arranged on the first surface of the ceramic substrate, and the first copper layer is electrically connected to the first circuit; the power chip is arranged on the first copper layer. Since the ceramic substrate has high thermal conductivity and high insulation performance, the second PCB board is arranged in the first through-slot and the first copper layer on the first surface of the ceramic substrate is electrically connected to the first circuit to ensure that the PCB assembly can normally control the operation of the power chip. At the same time, the power chip is arranged on the first copper layer, which can utilize the good heat dissipation and insulation properties of the ceramic substrate to dissipate heat for the power chip while ensuring high insulation. In addition, by burying the second PCB board in the first PCB board, the heat dissipation and insulation of the power chip are ensured, and the integration of the PCB assembly can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0037] FIG1 is a circuit diagram of a PCB assembly according to an embodiment of the present application;

[0038] FIG2 is a flow chart of a PCB assembly processing method according to an embodiment of the present application;

[0039] FIG3 is another flow chart of a PCB assembly processing method according to an embodiment of the present application;

[0040] FIG4 is another flow chart of a PCB assembly processing method according to an embodiment of the present application;

[0041] FIG5 is a schematic diagram of a PCB assembly processing method according to an embodiment of the present application.

[0042] In the figure: 1. First PCB board; 11. Organic substrate; 12. First circuit; 13. First through-groove; 14. Second circuit; 15. Metal interconnect structure; 2. Second PCB board; 21. Ceramic substrate; 22. First copper layer; 23. Second copper layer; 3. Power chip; 4. Heat sink; 5. Target insulation layer; 51. First blind via; 6. Auxiliary layer; 71. First PCB hole; 72. Second PCB hole; 8. Chip housing. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0044] It should be understood that the present application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make the disclosure thorough and complete and to fully convey the scope of the present application to those skilled in the art. In the drawings, the dimensions and relative dimensions of layers and regions may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0045] It should be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms.

[0046] In order to fully understand the present application, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present application. The preferred embodiments of the present application are described in detail below. However, in addition to these detailed descriptions, the present application may also have other implementation methods.

[0047] This embodiment provides a PCB assembly, including a first PCB board 1, a second PCB board 2, and a power chip 3. The first PCB board 1 includes an organic substrate 11 and a first circuit 12 disposed on the organic substrate 11. The first PCB board 1 is provided with a first through-slot 13. The second PCB board 2 is disposed within the first through-slot 13. The second PCB board 2 includes a ceramic substrate 21 and a first copper layer 22 disposed on a first surface of the ceramic substrate 21. The first copper layer 22 is electrically connected to the first circuit 12. The power chip 3 is disposed on the first copper layer 22.

[0048] In a specific embodiment, the organic substrate 11 is made of an organic material. Exemplarily, the material of the organic substrate 11 is glass fiber cloth reinforced epoxy resin (FR-4), BT resin, or Ajinomoto laminated film (ABF). The organic substrate 11 may include a single organic substrate 11 or multiple organic substrates 11. Preferably, the organic substrate 11 includes multiple organic substrates 11. The first circuit 12 is an outward-facing circuit provided on the surface of an outer organic substrate 11 in the multi-layer organic substrate 11. As an example, the multi-layer organic substrates 11 are laminated separately. Exemplarily, an insulating dielectric layer and a copper foil layer are laminated between adjacent organic substrates 11. The copper foil layer is used to provide an inner-layer circuit provided on the surface of an inner organic substrate 11 in the multi-layer organic substrate 11. The first circuit 12 or the inner-layer circuit can be designed according to actual needs and is not limited here. The first circuit 12 and the inner-layer circuit are electrically connected via a metal interconnect structure 15. The metal interconnect structure 15 can be a PCB through-hole, a PCB blind hole, or both. Optionally, the copper foil layer has a thickness greater than or equal to 3 microns, and preferably, the copper foil layer has a thickness of 12 microns. Exemplarily, the insulating dielectric layer includes prepreg (PP), Ajinomoto build film (ABF), or epoxy molding compound (EMC). Preferably, the insulating dielectric layer is made of prepreg, such as FR4 or BT material.

[0049] In one embodiment, the first PCB board 1 is provided with a first through-slot 13. The position and size of the first through-slot 13 on the first PCB board 1 can be designed according to actual needs and are not limited here. Optionally, the shape of the first through-slot 13 can be rectangular, such as a rectangle or a square, or circular.

[0050] In a specific embodiment, the ceramic substrate 21 is made of a ceramic material. Optionally, the ceramic material includes silicon nitride, aluminum nitride ceramic, aluminum oxide, zirconium oxide toughened aluminum oxide, silicon carbide ceramic, or diamond. As an example, the ceramic substrate 21 is copper-clad on both sides. The ceramic substrate 21 includes a first surface for arranging the power chip 3. For example, the first copper layer 22 of the first surface is provided with a target circuit, which is used to electrically connect to the first circuit 12 and the power chip 3 and is used to configure the first circuit 12 to control the operation of the power chip 3. It is understandable that the circuit pattern of the target circuit can be designed according to actual needs and is not limited here. The second surface of the ceramic substrate 21 is provided with a second copper layer 23, which is a large copper surface for heat dissipation. The second copper layer 23 may or may not be designed with a pattern. Preferably, the second copper layer 23 can be designed with a pattern for stress buffering, and the specific pattern can be designed based on actual experience.

[0051] In one specific embodiment, a second PCB board 2 is disposed within the first through-slot 13. The second PCB board 2 includes a ceramic substrate 21 and a first copper layer 22 disposed on a first surface of the ceramic substrate 21, the first copper layer 22 being electrically connected to the first circuit 12. The power chip 3 is disposed on the first copper layer 22. In this embodiment, because the ceramic substrate 21 has high thermal conductivity and high insulation properties, disposing the second PCB board 2 within the first through-slot 13 and electrically connecting the first copper layer 22 on the first surface of the ceramic substrate 21 to the first circuit 12 ensures that the PCB assembly can properly control the operation of the power chip 3. Furthermore, disposing the power chip 3 on the first copper layer 22 utilizes the excellent heat dissipation and insulation properties of the ceramic substrate 21, dissipating heat from the power chip 3 while maintaining high insulation.

[0052] It can be understood that by arranging the second PCB board 2 in the first through groove 13, electrically connecting the first copper layer 22 on the first surface of the ceramic substrate 21 to the first circuit 12, and arranging the power chip 3 on the first copper layer 22, that is, by burying the second PCB board 2 in the first PCB board 1, the heat dissipation and insulation of the power chip 3 are ensured while also improving the integration of the PCB assembly.

[0053] Optionally, the number of second PCB boards 2 and the number of first through slots 13 in the PCB assembly can be one or more, and can be selected according to actual needs.

[0054] In this embodiment, a PCB assembly includes a first PCB board 1, a second PCB board 2, and a power chip 3. The first PCB board 1 includes an organic substrate 11 and a first circuit 12 disposed on the organic substrate 11. The first PCB board 1 is provided with a first through-slot 13. The second PCB board 2 is disposed within the first through-slot 13. The second PCB board 2 includes a ceramic substrate 21 and a first copper layer 22 disposed on a first surface of the ceramic substrate 21. The first copper layer 22 is electrically connected to the first circuit 12. The power chip 3 is disposed on the first copper layer 22. Because the ceramic substrate 21 has high thermal conductivity and high insulation properties, the second PCB board 2 is disposed within the first through-slot 13 and the first copper layer 22 on the first surface of the ceramic substrate 21 is electrically connected to the first circuit 12 to ensure that the PCB assembly can properly control the operation of the power chip 3. Furthermore, by disposing the power chip 3 on the first copper layer 22, the excellent heat dissipation and insulation properties of the ceramic substrate 21 are utilized to dissipate heat from the power chip 3 while ensuring high insulation. Furthermore, by embedding the second PCB board 2 within the first PCB board 1, the heat dissipation and insulation properties of the power chip 3 are ensured, thereby improving the integration of the PCB assembly.

[0055] In one embodiment, the first surface is spaced apart from the surface of the first circuit 12 by a predetermined distance.

[0056] In this embodiment, if the distance between the first surface and the surface of the first circuit 12 is too large, it will be difficult for the first copper layer 22 on the first surface of the ceramic substrate 21 to be electrically connected to the first circuit 12. Therefore, a predetermined distance is maintained between the first surface and the surface of the first circuit 12 to facilitate the electrical connection between the first copper layer 22 on the first surface of the ceramic substrate 21 and the first circuit 12.

[0057] In one embodiment, the first surface is flush with the surface of the first circuit 12. In this embodiment, the first surface is flush with the surface of the first circuit 12, so that the first copper layer 22 on the first surface of the ceramic substrate 21 and the first circuit 12 have a better electrical connection effect.

[0058] In one embodiment, the second PCB 2 further includes a second copper layer 23 disposed on the second surface of the ceramic substrate 21. The PCB assembly further includes a heat sink 4 connected to the second copper layer 23. In this embodiment, the heat sink 4 is connected to the second copper layer 23 to directly form a good heat dissipation path through the ceramic substrate 21, the second copper layer 23, and the heat sink 4, thereby improving the heat dissipation effect of the power chip 3.

[0059] In one embodiment, the PCB assembly further includes a target insulating layer 5, which fills the gap between the first PCB board 1 and the second PCB board 2 and wraps around the periphery of the second copper layer 23; a first blind hole 51 connecting the second copper layer 23 and the heat sink 4 is provided on the target insulating layer 5.

[0060] In one embodiment, the target insulating layer 5 is made of a resin material. In this embodiment, the target insulating layer 5 fills the gap between the first PCB board 1 and the second PCB board 2 and wraps around the periphery of the second copper layer 23 to achieve the purpose of insulating and fixing the second PCB board 2.

[0061] In a specific embodiment, the target insulating layer 5 is provided with a first blind hole 51 connecting the second copper layer 23 and the heat sink 4. The first blind hole 51 includes a plurality of dense blind holes distributed in an array, so as to connect the second copper layer 23 and the heat sink 4 through the blind hole, thereby improving the heat dissipation effect of the power chip 3.

[0062] In this embodiment, the PCB assembly further includes a target insulating layer 5, which fills the gap between the first PCB board 1 and the second PCB board 2 and wraps around the periphery of the second copper layer 23 to achieve the purpose of insulating and fixing the second PCB board 2; the target insulating layer 5 is provided with a first blind hole 51 connecting the second copper layer 23 and the heat sink 4, so that the second copper layer 23 and the heat sink 4 are connected through the blind hole, thereby improving the heat dissipation effect of the power chip 3.

[0063] In one embodiment, the first PCB board 1 includes at least three layers of organic substrates 11; the at least three layers of organic substrates 11 include an outer organic substrate 11 and an inner organic substrate 11; a first circuit 12 is provided on the outer organic substrate 11; the inner organic substrate 11 is provided with a second circuit 14; the second circuit 14 is connected to the first circuit 12 via a metal interconnection structure 15.

[0064] In one specific embodiment, the outer substrate is an inner circuit disposed on the surface of the inner organic substrate 11. The design can be tailored to actual needs and is not a limitation here. The metal interconnect structure 15 can be a PCB through-hole, a PCB blind via, or both. In this embodiment, a first circuit 12 is disposed on the outer organic substrate 11; the inner organic substrate 11 is provided with a second circuit 14. The second circuit 14 is connected to the first circuit 12 via the metal interconnect structure 15, establishing an electrical connection with the first PCB 1.

[0065] This embodiment provides a PCB assembly processing method for processing the PCB assembly in the above embodiment, as shown in FIG2 and FIG5 , including:

[0066] S201 : opening a first through groove 13 on a first PCB board 1 . The first PCB board 1 includes an organic substrate 11 and a first circuit 12 disposed on the organic substrate 11 .

[0067] S202 : Mounting the second PCB board 2 in the first through groove 13 . The second PCB board 2 includes a ceramic substrate 21 and a first copper layer 22 disposed on a first surface of the ceramic substrate 21 .

[0068] S203 : electrically connecting the first circuit 12 and the first copper layer 22 .

[0069] S204: Mount the power chip 3 on the first copper layer 22 to obtain a PCB assembly.

[0070] As an example, in step S201, first through slots 13 are formed on the first PCB board 1. Exemplarily, the shape, size, number and position of the first through slots 13 on the first PCB board 1 are determined, and the first through slots 13 are formed on the first PCB board 1.

[0071] As an example, before step S201, a multilayer organic substrate 11 is provided, comprising an outer organic substrate 11 and an inner organic substrate 11. A first circuit 12 is fabricated on the outer organic substrate 11, and a second circuit 14 is fabricated on the inner organic substrate 11. An insulating dielectric layer is placed between the outer and inner organic substrates 11, and the two substrates are laminated to form a first PCB 1 comprising the multilayer organic substrates 11.

[0072] As an example, in step S202, a second PCB 2 is mounted within the first through-slot 13. The second PCB 2 includes a ceramic substrate 21 and a first copper layer 22 disposed on a first surface of the ceramic substrate 21. In this embodiment, mounting the second PCB 2 within the first through-slot 13 improves the integration of the PCB assembly.

[0073] As an example, in step S203 , the first circuit 12 and the first copper layer 22 are electrically connected to ensure that the PCB assembly can normally control the power chip 3 to operate.

[0074] As an example, in step S204, a power chip 3 is mounted on the first copper layer 22 to obtain a PCB assembly. In this embodiment, the PCB assembly is obtained by mounting the power chip 3 on the first copper layer 22. Since the ceramic substrate 21 has high thermal conductivity and high insulation properties, the second PCB board 2 is disposed within the first through-slot 13, and the first copper layer 22 on the first surface of the ceramic substrate 21 is electrically connected to the first circuit 12 to ensure that the PCB assembly can properly control the operation of the power chip 3. Furthermore, by disposing the power chip 3 on the first copper layer 22, the excellent heat dissipation and insulation properties of the ceramic substrate 21 can be utilized to dissipate heat from the power chip 3 while ensuring high insulation. Furthermore, by embedding the second PCB board 2 within the first PCB board 1, the heat dissipation and insulation properties of the power chip 3 are ensured, and the integration of the PCB assembly is also improved.

[0075] Furthermore, in step S204, the first copper layer 22 on the first surface of the ceramic substrate 21 is provided with a target circuit, which is used to be electrically connected to the first circuit 12 and the power chip 3, and is used to configure the first circuit 12 to control the operation of the power chip 3. After the power chip 3 is mounted on the first copper layer 22, the power chip 3 and the target circuit of the first copper layer 22 are interconnected by wire bonding. Optionally, the lead material can be gold, aluminum or copper. Optionally, the power chip 3 includes a Si IGBT (Insulate Gate Bipolar Transistor, insulated gate bipolar transistor, referred to as Si IGBT) chip and a SiC MOSFET (Field Effect Transistor, field effect transistor, referred to as SiC MOSFET) chip. Among them, aluminum leads are preferably used for Si IGBT chips, and copper leads are preferably used for SiC MOSFET chips.

[0076] Furthermore, in step S204, the power chip 3 is mounted on the first copper layer 22 to obtain a PCB assembly. The process also includes encapsulating the power chip 3 with a chip housing 8 to protect the power chip 3. The chip housing 8 is shown in FIG1 . Optionally, a heat dissipation material may be directly filled between the chip housing 8 and the power chip 3 to conduct heat and ensure good heat dissipation. Preferably, the heat dissipation material is silicone gel.

[0077] In this embodiment, a first through-slot 13 is defined in a first PCB board 1. The first PCB board 1 includes an organic substrate 11 and a first circuit 12 disposed on the organic substrate 11. A second PCB board 2 is mounted within the first through-slot 13. The second PCB board 2 includes a ceramic substrate 21 and a first copper layer 22 disposed on a first surface of the ceramic substrate 21. The first circuit 12 and the first copper layer 22 are electrically connected. Finally, a power chip 3 is mounted on the first copper layer 22 to obtain a PCB assembly. Because the ceramic substrate 21 has high thermal conductivity and high insulation properties, the second PCB board 2 is positioned within the first through-slot 13 and the first copper layer 22 on the first surface of the ceramic substrate 21 is electrically connected to the first circuit 12. This ensures that the PCB assembly can properly control the operation of the power chip 3. Furthermore, by positioning the power chip 3 on the first copper layer 22, the excellent heat dissipation and insulation properties of the ceramic substrate 21 are utilized to dissipate heat from the power chip 3 while ensuring high insulation. Furthermore, by embedding the second PCB board 2 within the first PCB board 1, both heat dissipation and insulation of the power chip 3 are ensured, thereby improving the integration of the PCB assembly.

[0078] In one embodiment, the second PCB board 2 is mounted in the first through slot 13, as shown in FIG3 , including:

[0079] S301 : Laying an auxiliary layer 6 on the first PCB board 1 , wherein the auxiliary layer 6 covers the first through groove 13 .

[0080] S302 : placing the second PCB board 2 in the first through groove 13 , connecting the first copper layer 22 of the second PCB board 2 to the auxiliary layer 6 , and forming a gap between the second PCB board 2 and the first PCB board 1 .

[0081] S303 : filling the gap with a target insulating layer 5 and removing the auxiliary layer 6 , so as to mount the second PCB board 2 in the first through groove 13 .

[0082] As an example, in step S301 , an auxiliary layer 6 is laid on the first PCB board 1 , and the auxiliary layer 6 covers the first through groove 13 , so that the second PCB board 2 is placed in the first through groove 13 using the auxiliary layer 6 in subsequent steps.

[0083] As an example, in step S302, the second PCB board 2 is placed in the first through-slot 13, the first copper layer 22 of the second PCB board 2 is connected to the auxiliary layer 6, and a gap is formed between the second PCB board 2 and the first PCB board 1 to preliminarily fix the position of the second PCB board 2 in the first through-slot 13 through the auxiliary layer 6.

[0084] As an example, in step S303, the target insulating layer 5 is filled into the gap and the auxiliary layer 6 is removed, so that the second PCB board 2 can be mounted in the first through-slot 13. In this embodiment, after the second PCB board 2 is secured in the first through-slot 13 by the target insulating layer 5, the auxiliary layer 6 can be removed, thereby achieving the purpose of insulating and securing the second PCB board 2 by the target insulating layer 5.

[0085] In this embodiment, an auxiliary layer 6 is laid on the first PCB board 1, covering the first through-slot 13. A second PCB board 2 is placed within the first through-slot 13, with the first copper layer 22 of the second PCB board 2 connected to the auxiliary layer 6. A gap is formed between the second PCB board 2 and the first PCB board 1. The gap is then filled with the desired insulating layer 5 and the auxiliary layer 6 is removed, allowing the second PCB board 2 to be mounted within the first through-slot 13.

[0086] In one embodiment, the auxiliary layer 6 is made of high-temperature adhesive tape.

[0087] In one embodiment, electrically connecting the first circuit 12 and the first copper layer 22, as shown in FIG4 , includes:

[0088] S401 : processing a first PCB hole 71 on the first PCB board 1 , and processing a second PCB hole 72 on the target insulating layer 5 .

[0089] S402: performing pattern transfer on the first PCB board 1 and the second PCB board 2 to form a first photoresist pattern.

[0090] S403: Electroplating the first PCB board 1 and the second PCB board 2 to form a first metal layer.

[0091] S404: etching the first metal layer based on the first photoresist pattern to form a target circuit.

[0092] Among them, the first PCB hole 71 is used to connect the first circuit 12 and the metal interconnect structure 15 in the first PCB board 1; the second PCB hole 72 is used to connect the second copper layer 23 of the second PCB board 2 and the power heat sink 4; the target circuit is electrically connected to the first circuit 12 and the first copper layer 22.

[0093] As an example, in step S401, both the first PCB hole 71 and the second PCB hole 72 can be through-holes or blind vias. In this embodiment, the first PCB hole 71 is formed on the first PCB board 1, and the second PCB hole 72 is formed on the target insulating layer 5. The first PCB hole 71 connects the first trace 12 to the metal interconnect structure 15 in the first PCB board 1, thereby establishing an electrical connection environment in the first PCB board 1. The second PCB hole 72 is used to connect the second copper layer 23 of the second PCB board 2 to the power heat sink 4, thereby dissipating heat from the power device.

[0094] As an example, after step S204, a heat sink 4 is mounted on the PCB assembly. The heat sink 4 is connected to the second copper layer 23 of the second PCB board 2 through the second PCB hole 72. Optionally, the size of the heat sink 4 can be selected based on actual needs. The heat sink 4 can be air-cooled, water-cooled, or other types. Preferably, the heat sink 4 is water-cooled.

[0095] As an example, in step S402, a conductive seed layer (not shown) is formed on the inner wall of first PCB hole 71, the inner wall of second PCB hole 72, the surface of first PCB board 1, and the surface of second PCB board 2 by sputtering, electroless plating, adsorption of conductive organic matter, adsorption of carbon particles, or other methods. Then, a pattern is transferred onto first PCB board 1 and second PCB board 2 by applying a dry film, exposing, and developing, forming a first photoresist pattern. Optionally, the dry film can be replaced with photoresist.

[0096] As an example, in step S403, first PCB board 1 and second PCB board 2 are electroplated to form a first metal layer. It will be appreciated that this first metal layer is formed on the inner wall of first PCB hole 71, the inner wall of second PCB hole 72, the surface of first PCB board 1, and the surface of second PCB board 2. This first metal layer also electrically connects first trace 12 of first PCB board 1 with first copper layer 22 of second PCB board 2.

[0097] As an example, in step S404 , the first photoresist pattern is removed, and the first metal layer below the first photoresist pattern is etched to form a target circuit.

[0098] As an example, after step S404 and before step S204, solder mask and surface treatment (not shown) are performed on the surfaces of the first PCB board 1 and the second PCB board 2. Optionally, the surface treatment includes any one of organic solderability preservatives (OSP), chemical nickel-gold plating, and chemical silver plating.

[0099] In this embodiment, a first PCB hole 71 is processed in the first PCB board 1, a second PCB hole 72 is processed in the target insulating layer 5, a pattern transfer is performed on the first PCB board 1 and the second PCB board 2 to form a first photoresist pattern, the first PCB board 1 and the second PCB board 2 are electroplated to form a first metal layer, and the first metal layer is etched based on the first photoresist pattern to form the target circuit.

[0100] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A PCB assembly, wherein: It includes a first PCB board, a second PCB board and a power chip; The first PCB board includes an organic substrate and a first circuit provided on the organic substrate, and a first through groove is provided on the first PCB board; The second PCB is disposed in the first through groove, the second PCB comprising a ceramic substrate and a first copper layer disposed on a first surface of the ceramic substrate, the first copper layer being electrically connected to the first circuit; The power chip is disposed on the first copper layer.

2. The PCB assembly according to claim 1, wherein: The first surface is spaced apart from a surface of the first circuit by a preset distance.

3. The PCB assembly according to claim 1, wherein: The first surface is flush with a surface of the first circuit.

4. The PCB assembly according to claim 1, wherein: The second PCB board further includes a second copper layer disposed on the second surface of the ceramic substrate; The PCB assembly further includes a heat sink connected to the second copper layer.

5. The PCB assembly according to claim 4, wherein: The PCB assembly further includes a target insulating layer, which fills the gap between the first PCB board and the second PCB board and wraps around the periphery of the second copper layer; The target insulating layer is provided with a first blind hole communicating with the second copper layer and the heat sink.

6. The PCB assembly according to claim 1, wherein The first PCB board includes at least three layers of organic substrates; the at least three layers of organic substrates include an outer organic substrate and an inner organic substrate; the first circuit is provided on the outer organic substrate; the inner organic substrate is provided with a second circuit; The second circuit is connected to the first circuit via a metal interconnection structure.

7. A PCB assembly processing method, wherein: include: A first through groove is formed on a first PCB board, wherein the first PCB board includes an organic substrate and a first circuit provided on the organic substrate; Mounting a second PCB board in the first through-slot, the second PCB board comprising a ceramic substrate and a first copper layer disposed on a first surface of the ceramic substrate; electrically connecting the first circuit and the first copper layer; A power chip is mounted on the first copper layer to obtain a PCB assembly.

8. The PCB assembly processing method according to claim 7, wherein: The step of mounting the second PCB board in the first through slot includes: Laying an auxiliary layer on the first PCB board, wherein the auxiliary layer covers the first through groove; placing the second PCB board in the first through groove, with the first copper layer of the second PCB board connected to the auxiliary layer, and forming a gap between the second PCB board and the first PCB board; A target insulating layer is filled in the gap, and the auxiliary layer is removed, so as to mount the second PCB board in the first through groove.

9. The PCB assembly processing method according to claim 8, wherein: The auxiliary layer is made of high-temperature adhesive tape.

10. The PCB assembly processing method according to claim 8, wherein: The electrically connecting the first circuit and the first copper layer includes: Processing a first PCB hole on the first PCB board and processing a second PCB hole on the target insulating layer; Performing pattern transfer on the first PCB board and the second PCB board to form a first photoresist pattern; Electroplating the first PCB board and the second PCB board to form a first metal layer; etching the first metal layer based on the first photoresist pattern to form the target circuit; The first PCB hole is used to connect the first circuit and the metal interconnection structure in the first PCB board; the second PCB hole is used to connect the second copper layer of the second PCB board and the power heat sink; and the target circuit is electrically connected to the first circuit and the first copper layer.

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