Semiconductor light-emitting element, method for manufacturing same, and semiconductor light-emitting device

Abstract

This semiconductor light-emitting element includes an epitaxial layer (30), an electrode (31), and a conductive via (32). The epitaxial layer (30) has at least one light-emitting unit layer, in which a p-type layer, a light-emitting layer, and an n-type layer are laminated in this order when viewed from the surface on which the electrode (31) is provided, and is divided into a light-emitting part (74) and a non-light-emitting part (75) by a dividing groove (801) that reaches the n-type layer and divides the light-emitting layer. The electrode (31) is disposed on the epitaxial layer (30) on the light-emitting part side and the non-light-emitting part side. The conductive via (32) is disposed so as to electrically connect the electrode (31) on the non-light-emitting part (75) side and the n-type layer of the light-emitting unit layer.

Description

Semiconductor light emitting element, manufacturing method thereof, and semiconductor light emitting device

[0001] The present invention relates to a semiconductor light emitting element, a method for manufacturing the same, and a semiconductor light emitting device.

[0002] Patent Document 1 discloses a configuration in which LEDs that emit light of different emission wavelengths are arranged on a substrate, with grooves formed between adjacent LEDs. Patent Document 1 also discloses mounting multiple LEDs with different emission wavelengths on a mounting substrate that has steps of different heights to match each LED.

[0003] International Publication No. 2019 / 126728

[0004] However, when LEDs with different emission wavelengths are combined to form one pixel, in order for a viewer to recognize the combination of LEDs with different emission wavelengths as one pixel, the pixel must be configured within an angular range equivalent to the resolution of the viewer's eyes. Furthermore, it is difficult to fabricate the mounting substrate with the steps described in Patent Document 1. Furthermore, it is also difficult to fill the gap between the LEDs and the mounting substrate by changing the electrode thickness for each LED with a different emission wavelength.

[0005] The present invention has been made in consideration of the above-mentioned conventional situation, and aims to provide a semiconductor light-emitting device with a simple structure that allows electrodes to have uniform heights, and a method for manufacturing the same. Another aim of the present invention is to provide a semiconductor light-emitting device that improves the color mixing of light from LEDs with different emission wavelengths that make up a single pixel, and a method for manufacturing the same.

[0006] A semiconductor light-emitting element of the first invention has an epitaxial layer, an electrode, and a conductive via, wherein the epitaxial layer has at least one light-emitting unit layer in which a p-type layer, a light-emitting layer, and an n-type layer are stacked in that order when viewed from the surface on which the electrode is provided, and the epitaxial layer is divided into a light-emitting portion and a non-light-emitting portion by a dividing groove that reaches the n-type layer and divides the light-emitting layer, the electrodes are arranged on the epitaxial layer on the light-emitting portion side and the non-light-emitting portion side, and the conductive via is arranged to electrically connect the electrode on the non-light-emitting portion side and the n-type layer of the light-emitting unit layer.

[0007] By using conductive vias, the semiconductor light emitting device of the first invention can easily align the height of the electrodes without using a mounting substrate with complex steps or changing the thickness of the electrodes for each sub-element, as described in Patent Document 1. As a result, it becomes easier to mount the semiconductor light emitting device on the mounting substrate, and it becomes possible to stably mount fine-sized devices.

[0008] A semiconductor light-emitting element of a second invention comprises: a substrate; a buffer layer stacked on the substrate and having a higher refractive index than the substrate; and an epitaxial layer stacked on the buffer layer and having a higher refractive index than the substrate, the epitaxial layer having a plurality of light-emitting layers with different emission wavelengths, the epitaxial layer having a plurality of pixels partitioned by partition grooves that reach at least the buffer layer, the pixels having a plurality of sub-pixels with different emission wavelengths, the sub-pixels having a portion of the epitaxial layer removed to the extent that the buffer layer is not exposed, and a power supply layer that supplies power to a predetermined light-emitting layer is exposed and provided with an electrode, and the sub-pixels radiate light generated inside and light incident from adjacent sub-pixels to the outside.

[0009] The subpixels of the semiconductor light-emitting element of the second invention are configured to radiate, via the substrate, light generated internally (from themselves) and light generated in and incident on adjacent subpixels, so that light of different wavelengths generated in the individual light-emitting layers within the pixel is radiated from each subpixel to the outside. This improves color mixing compared to Patent Document 1, in which adjacent subpixels are partitioned by grooves reaching the sapphire substrate, preventing light from passing between adjacent subpixels.

[0010] A third invention provides a method for manufacturing a semiconductor light-emitting element, comprising: a substrate; a buffer layer laminated on the substrate and having a refractive index higher than that of the substrate; and an epitaxial layer laminated on the buffer layer and having a refractive index higher than that of the substrate, the epitaxial layer having a plurality of light-emitting layers with different emission wavelengths, the epitaxial layer having a plurality of pixels partitioned by partition grooves that reach at least the buffer layer, the pixels having a plurality of sub-pixels, the sub-pixels being formed by removing a portion of the epitaxial layer so as not to expose the buffer layer, and exposing a power supply layer that supplies power to a predetermined light-emitting layer and providing an electrode thereon, wherein the partition grooves are formed perpendicular to the substrate by a groove formation etching process using a stacked mask having an etching selectivity of 40 or more.

[0011] In conventional technology, the groove width tends to widen, hindering efforts to increase the pixel density. Furthermore, when the pixel density is fixed, a wider groove width narrows the light-emitting area, raising concerns about the impact on electrical and optical characteristics. However, according to the configuration of the second invention, the partitioning grooves are formed perpendicular to the substrate through an etching process using a stacked mask with an etching selectivity of 40 or more. This prevents the groove width from widening in a planar view due to a taper angle, reducing concerns about the impact on electrical and optical characteristics.

[0012] In order to achieve the above object, the present invention employs the following configuration: [1] A semiconductor light-emitting device comprising an epitaxial layer, an electrode, and a conductive via, wherein the epitaxial layer has at least one light-emitting unit layer in which a p-type layer, a light-emitting layer, and an n-type layer are stacked in this order when viewed from a surface on which the electrode is provided, the epitaxial layer is divided into a light-emitting portion and a non-light-emitting portion by a dividing groove that reaches the n-type layer and divides the light-emitting layer, the electrodes are disposed on the epitaxial layer on the light-emitting portion side and the non-light-emitting portion side, and the conductive via is disposed so as to electrically connect the electrode on the non-light-emitting portion side and the n-type layer of the light-emitting unit layer. [2] The semiconductor light-emitting element according to [1], wherein the epitaxial layer is formed by stacking two or more of the light-emitting unit layers, and a tunnel junction layer is provided between the p-type layer and the n-type layer of adjacent light-emitting unit layers, and is divided into a light-emitting portion and a non-light-emitting portion by a dividing groove that reaches the n-type layer in a predetermined light-emitting unit layer and divides the light-emitting layer, and the electrodes are arranged on the same plane on the light-emitting portion side and the non-light-emitting portion side, and the conductive via is arranged to electrically connect the electrode on the light-emitting portion side to the tunnel junction layer on the p-type layer side of the predetermined light-emitting unit layer, and to electrically connect the electrode on the non-light-emitting portion side to the n-type layer of the predetermined light-emitting unit layer. (Note that here, "predetermined light-emitting unit layer" means a light-emitting unit layer having a light-emitting layer that is caused to emit light in the semiconductor light-emitting element.) [3] The semiconductor light-emitting element according to [1] or [2], wherein the epitaxial layer is formed by stacking a tunnel junction layer adjacent to the p-type layer of the light-emitting unit layer and an n-type layer between the electrode and the light-emitting unit layer. [4] The semiconductor light-emitting element according to any one of [1] to [3], wherein the light-emitting portion side electrode and the non-light-emitting portion side electrode are all provided on the same plane. [5] The semiconductor light-emitting element according to any one of [1] to [4], wherein the conductive via has a shape including an inclined surface that tapers from the electrode toward the n-type layer to which it is electrically connected. [6] The semiconductor light-emitting element according to any one of [1] to [5], wherein the conductive via has a slit shape. [7] The semiconductor element according to any one of [1] to [6], wherein the electrode and the conductive via are formed of the same material.[8] The semiconductor light-emitting element according to any one of [1] to [7], which has three or more light-emitting unit layers, and the light-emitting layer spacing in each light-emitting unit layer is different. [9] A semiconductor light-emitting element having an epitaxial layer, electrodes, and conductive vias, wherein the epitaxial layer comprises: a plurality of light-emitting unit layers emitting different colors of light, each having a p-type layer, a light-emitting layer, and an n-type layer stacked in this order when viewed from a surface on which the electrodes are provided; and a tunnel junction layer stacked between the plurality of light-emitting unit layers, wherein the semiconductor light-emitting element has a plurality of pixels each having a plurality of sub-pixels partitioned by partitioning grooves, the sub-pixels having the epitaxial layer, wherein the sub-pixels have a light-emitting portion and a non-light-emitting portion divided by a dividing groove that divides the light-emitting layer, the electrodes being disposed on the epitaxial layer on the light-emitting portion side and the non-light-emitting portion side, and wherein in the sub-pixels within the pixel, circuits are formed in the different light-emitting unit layers by the conductive via electrically connecting the electrode in the non-light-emitting portion and the n-type layer side of a predetermined light-emitting unit layer, and the conductive via electrically connecting the electrode on the light-emitting portion side and the tunnel junction layer on the p-type layer side of the predetermined light-emitting unit layer and the adjacent n-type layer side,

[10] A semiconductor light-emitting element in which, in the plurality of pixels, the electrodes on the light-emitting portion side are all formed on the same surface, and the electrodes on the non-light-emitting portion side are all formed on the same surface.

[10] A semiconductor light-emitting element according to [9], in which the electrodes on the light-emitting portion side and the electrodes on the non-light-emitting portion side are all provided on the same surface, and all mounting surfaces have the same height.

[11] A semiconductor light-emitting device in which the semiconductor light-emitting element according to [9] is arranged on a mounting substrate so that the plurality of pixels are independently arranged.

[12] The semiconductor light-emitting device according to

[11] , in which the sub-pixels in the pixels are not separated.

[13] The semiconductor light-emitting device according to

[11] , characterized in that a light-absorbing member is arranged in the partition grooves of the pixels.

[14] The semiconductor light-emitting element according to [9] or

[10] , which is a dot-matrix display in which the pixel width is less than 100 μm.

[15] A semiconductor light-emitting device comprising: a substrate; a buffer layer laminated on the substrate and having a refractive index higher than that of the substrate; and an epitaxial layer laminated on the buffer layer and having a refractive index higher than that of the substrate, the epitaxial layer having a plurality of light-emitting layers with different emission wavelengths, the epitaxial layer having a plurality of pixels partitioned by partition grooves reaching at least the buffer layer, the pixels having a plurality of sub-pixels with different emission wavelengths, the sub-pixels having a power supply layer that supplies power to a predetermined light-emitting layer exposed and provided with an electrode, the sub-pixels emitting light generated therein and light incident from an adjacent sub-pixel to the outside.

[16] The semiconductor light-emitting device according to

[15] , wherein the partition grooves of the pixels reach the substrate, and each of the pixels is formed in an island shape on the substrate.

[17] The semiconductor light-emitting device according to

[15] or

[16] , wherein the light-emitting layer that receives power from the power supply layer is continuous with the adjacent sub-pixels.

[18] The semiconductor light-emitting device according to

[15] or

[16] , wherein the light-emitting layer to which power is supplied from the power supply layer is not continuous with the adjacent sub-pixels.

[19] A semiconductor light-emitting device comprising: a buffer layer; and an epitaxial layer stacked on the buffer layer and having a plurality of light-emitting layers with different emission wavelengths, wherein the epitaxial layer has a plurality of pixels partitioned by partition grooves that reach at least the buffer layer, wherein the pixels have a plurality of sub-pixels with different emission wavelengths, wherein a portion of the epitaxial layer is removed to such an extent that the buffer layer is not exposed, and a power supply layer that supplies power to a predetermined light-emitting layer is exposed and provided with an electrode, and wherein the sub-pixels radiate light generated therein and light incident from adjacent sub-pixels to the outside.

[20] The semiconductor light-emitting device according to [9] or

[19] , wherein the pixels are independently arranged on a mounting substrate.

[21] The method for manufacturing a semiconductor light-emitting element according to any one of [9],

[15] , and

[19] , wherein the partitioning grooves are formed in the stacking direction of the epitaxial layers by a groove formation etching step using a stacked mask having an etching selectivity of 40 or more.

[22] The method for manufacturing a semiconductor light-emitting element according to

[21] , further comprising a layered mask formation step of forming the layered mask using a fluoride gas, wherein the layered mask is composed of a combination of an oxide film made of any of SiO2, Al2O3, and Si3N4 that is stacked on the epitaxial layer, and a metal film made of any of Ni, Pt, and Cr that is stacked on the oxide film.

[0013] According to the present invention, it is possible to provide a semiconductor light-emitting device with a simple structure that allows electrodes to have uniform heights, and a method for manufacturing the same. Also, according to the present invention, it is possible to provide a semiconductor light-emitting device that improves the color mixing of light from LEDs with different emission wavelengths that constitute one pixel, and a method for manufacturing the same.

[0014] 1A is a schematic diagram showing the positional relationship between a semiconductor light-emitting element mounted on a mounting substrate provided in VR goggles and the viewer's eyes. FIG. 1B is a side view showing the structure of the semiconductor light-emitting element of Example 1A. FIG. 1C is a perspective view showing the structure of the semiconductor light-emitting element of Example 1A. FIG. 1D is a partially enlarged plan view showing an enlarged pixel of the semiconductor light-emitting element of Example 1A. FIG. 1E is a schematic diagram showing a process for manufacturing the semiconductor light-emitting element of Example 1A. FIG. 1F is a schematic diagram showing a process for forming partition grooves. FIG. 1G is a side view showing a state in which the semiconductor light-emitting element of Example 1A is mounted on a mounting substrate. FIG. 1H is a schematic diagram showing the path of light generated from each light-emitting layer of the semiconductor light-emitting element mounted on a mounting substrate. FIG. 1H shows the state of the sapphire substrate of the semiconductor light-emitting element of Example 2A, where (A) is a plan view of the sapphire substrate on which convex portions are formed, and (B) is a side view of the sapphire substrate on which convex portions are formed. FIG. 1F is a schematic diagram showing the path of light generated from each light-emitting layer in the semiconductor light-emitting element of Example 2A. FIG. 1G is a side view of the semiconductor light-emitting element of another example, showing a state in which partition grooves are formed between adjacent sub-pixels. FIG. 1H is a partially enlarged plan view showing an enlarged pixel of the semiconductor light-emitting device of Example 1B. 13 is a cross-sectional view of the pixel shown in FIG. 12 taken along line A-A, line B-B, and line C-C. FIG. 13 is a cross-sectional view of the pixel shown in FIG. 12 taken along line D-D. FIG. 13 is a schematic cross-sectional view for explaining the principle of current flow in the semiconductor light-emitting device of Example 1B. FIG. 13 is a schematic view showing another example of the shape of the conductive via. FIG. 13 is a schematic cross-sectional view of the semiconductor light-emitting device of Example 1B. FIG. 13 is a schematic view for explaining the partition groove (S) in Example 2B. FIG. 13 is a schematic cross-sectional view of a semiconductor light-emitting device comprising a plurality of pixels shown in FIG. 18. FIG. 13 is a schematic cross-sectional view of a mounted semiconductor light-emitting device in Example 3B. FIG. 13 is a schematic cross-sectional view of a semiconductor light-emitting device in Example 4B.

[0015] In this specification, an element in which an epitaxial layer and an electrode, which will be described later, are arranged so that a predetermined light-emitting layer in the epitaxial layer can emit light is referred to as a "semiconductor light-emitting element," and an element in which the semiconductor light-emitting element is arranged on a mounting substrate is referred to as a "semiconductor light-emitting device." Preferred embodiments of the present invention will now be described.

[0016] For convenience, this specification will first describe the semiconductor light-emitting device according to the second invention and the method for manufacturing the semiconductor light-emitting device according to the third invention. In the second invention, the partition grooves of the pixels can reach the substrate, and multiple pixels can be formed in an island shape on the substrate. In this case, light leakage to adjacent pixels can be suppressed.

[0017] In the second invention, the light-emitting layer supplied with power from the power supply layer may be continuous with the adjacent sub-pixels. In this case, light is emitted from the light-emitting layer in the adjacent sub-pixels as well. This improves the color mixing of light.

[0018] In the second aspect of the present invention, the light-emitting layer to which power is supplied from the power supply layer does not need to be continuous with the adjacent sub-pixel, which makes static lighting possible in addition to dynamic lighting.

[0019] In the second invention, each subpixel is formed to extend elongately in one direction and can be aligned in a direction intersecting that direction. In this case, the area between adjacent subpixels can be increased, which facilitates the exchange of light between adjacent subpixels, thereby enhancing the effect of radiating light generated within the subpixel (from itself) and light generated in and incident on an adjacent subpixel to the outside. In contrast, in the device of Patent Document 1, adjacent subpixels are separated by grooves that reach the sapphire substrate, which significantly restricts the movement of light between adjacent subpixels.

[0020] In the second aspect of the present invention, the substrate may be formed to have an uneven surface, which facilitates light diffusion within the pixel.

[0021] The third invention further includes a layered mask formation step of forming a layered mask using a fluoride gas, and the layered mask may be configured by combining an oxide film made of any of SiO2, Al2O3, and Si3N4 that is laminated on the epitaxial layer and a metal film made of any of Ni, Pt, and Cr that is laminated on the oxide film. In this case, tapering is less likely to occur, and grooves perpendicular to the substrate can be more effectively formed.

[0022] Next, Example 1A, which embodies the semiconductor light emitting device of the present invention, will be described with reference to FIGS.

[0023] Example 1A The semiconductor light-emitting element 1 of Example 1A is used in a display device such as VR goggles. As shown in FIG. 1 , the semiconductor light-emitting element 1 used in VR goggles 200 is placed in front of a viewer's eye 202, with a lens 201 sandwiched between them. The distance between the semiconductor light-emitting element 1 and the viewer's eye 202 is approximately 5 cm. As shown in FIG. 2 , the semiconductor light-emitting element 1 of Example 1A includes a sapphire substrate 10, a buffer layer 20, and an epitaxial layer 30. The semiconductor light-emitting element 1 is placed such that the epitaxial layer 30 is on the opposite side of the sapphire substrate 10 from the viewer's eye 202 (see FIG. 2 ). Light emitted from the epitaxial layer 30 passes through the sapphire substrate 10 and reaches the viewer's eye 202.

[0024] [Configuration of Sapphire Substrate] The sapphire substrate 10 is a plate-shaped sapphire substrate having both surfaces polished to flat surfaces. The thickness of the sapphire substrate 10 is, for example, 300 μm. In the following description, the surface of the sapphire substrate 10 opposite the viewer's eye 202 is referred to as the top surface. The surface of each layer opposite the viewer's eye 202 is also referred to as the top surface.

[0025] [Configuration of Buffer Layer] The buffer layer 20 is stacked on the sapphire substrate 10. The buffer layer 20 has a thickness of, for example, 2 μm. The buffer layer 20 is made of AlN, GaN, or the like grown at a low temperature.

[0026] [Configuration of Epitaxial Layer] The epitaxial layer 30 is stacked on the upper surface of the buffer layer 20. The epitaxial layer 30 has a first n-type layer 301, a first light-emitting layer 30B (light-emitting layer), a first p-type layer 302, a first tunnel junction layer 303, a second n-type layer 304, a second light-emitting layer 30G (light-emitting layer), a second p-type layer 305, a second tunnel junction layer 306, a third n-type layer 307, a third light-emitting layer 30R (light-emitting layer), a third p-type layer 308, a third tunnel junction layer 309, and a fourth n-type layer 310, which are stacked in this order.

[0027] The first n-type layer 301 is stacked on the upper surface of the buffer layer 20. The thickness of the first n-type layer 301 is, for example, 2 μm. The first n-type layer 301 is formed of, for example, GaN doped with n-type impurities such as Si.

[0028] The first light-emitting layer 30B is laminated on the upper surface of the first n-type layer 301. The first light-emitting layer 30B is formed, for example, as a multiple quantum well. The thickness of the first light-emitting layer 30B is, for example, 50 nm. The first light-emitting layer 30B is configured to be able to emit light with an emission wavelength corresponding to blue (for example, 450 to 470 nm).

[0029] The first p-type layer 302 is stacked on the upper surface of the first light-emitting layer 30B. The thickness of the first p-type layer 302 is, for example, 180 nm. The first p-type layer 302 is formed of, for example, GaN doped with p-type impurities such as Mg.

[0030] The first tunnel junction layer 303 is stacked on the upper surface of the first p-type layer 302. The thickness of the first tunnel junction layer 303 is, for example, 25 nm. The first tunnel junction layer 303 is formed by stacking an n++ GaN layer doped with a high concentration of Si and a p++ GaN layer doped with a high concentration of Mg. Here, n++ means a state in which n-type impurities are doped with a high concentration, and p++ means a state in which p-type impurities are doped with a high concentration. The tunnel junction layer is a layer that allows current to flow from an n-type semiconductor to a p-type semiconductor.

[0031] The second n-type layer 304 is stacked on the upper surface of the first tunnel junction layer 303. The second n-type layer 304 has a thickness of, for example, 400 nm. The second n-type layer 304 is made of, for example, GaN doped with n-type impurities such as Si.

[0032] The second light-emitting layer 30G is stacked on the upper surface of the second n-type layer 304. The second light-emitting layer 30G is formed, for example, as a multiple quantum well. The thickness of the second light-emitting layer 30G is, for example, 50 nm. The second light-emitting layer 30G is configured to be able to generate light with an emission wavelength corresponding to green (for example, 500 to 570 nm).

[0033] The second p-type layer 305 is stacked on the upper surface of the second light-emitting layer 30G. The thickness of the second p-type layer 305 is, for example, 180 nm. The second p-type layer 305 is made of GaN doped with p-type impurities such as Mg.

[0034] The second tunnel junction layer 306 is stacked on the upper surface of the second p-type layer 305. The thickness of the second tunnel junction layer 306 is, for example, 25 nm. The second tunnel junction layer 306 is formed by stacking an n++ GaN layer doped with a high concentration of Si and a p++ GaN layer doped with a high concentration of Mg.

[0035] The third n-type layer 307 is stacked on the upper surface of the second tunnel junction layer 306. The third n-type layer 307 has a thickness of, for example, 2000 nm. The third n-type layer 307 is made of, for example, GaN doped with n-type impurities such as Si.

[0036] The third light-emitting layer 30R is laminated on the upper surface of the third n-type layer 307. The third light-emitting layer 30R is formed, for example, as a multiple quantum well. The thickness of the third light-emitting layer 30R is, for example, 50 nm. The third light-emitting layer 30R is configured to be able to emit light with an emission wavelength corresponding to red (for example, 600 to 650 nm).

[0037] The third p-type layer 308 is stacked on the upper surface of the third light-emitting layer 30R. The third p-type layer 308 has a thickness of, for example, 180 nm. The third p-type layer 308 is formed of, for example, GaN doped with p-type impurities such as Mg.

[0038] The third tunnel junction layer 309 is stacked on the top surface of the third p-type layer 308. The thickness of the third tunnel junction layer 309 is, for example, 25 nm. The third tunnel junction layer 309 is formed by stacking an n++ GaN layer doped with a high concentration of Si and a p++ GaN layer doped with a high concentration of Mg.

[0039] The fourth n-type layer 310 is stacked on the upper surface of the third tunnel junction layer 309. The fourth n-type layer 310 has a thickness of, for example, 300 nm. The fourth n-type layer 310 is formed of, for example, GaN doped with n-type impurities such as Si.

[0040] [Pixel Configuration] As shown in FIG. 4 , the semiconductor light-emitting element 1 has a pixel 701 defined by a defining groove 80. The pixel 701 has a plurality of sub-pixels 71. Each sub-pixel 71 includes a red light-emitting diode 71R, a green light-emitting diode 71G, and a blue light-emitting diode 71B. In a plan view of the semiconductor light-emitting element 1 viewed from above, the pixel 701 is formed in a square shape. Each of the sub-pixels 71, i.e., the red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B, is formed to extend elongately in one direction. The red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B are formed adjacent to each other in a direction perpendicular to the one direction.

[0041] The partition grooves 80 are recessed from the upper surface of the fourth n-type layer 310 toward the sapphire substrate 10 (in the stacking direction 81), and their bottom surfaces reach the upper surface of the sapphire substrate 10. The partition grooves 80 are formed perpendicular to the sapphire substrate 10. As shown in FIG. 4, the outer periphery of each pixel 701 is formed in an island shape on the upper surface of the sapphire substrate 10 by the partition grooves 80. On the upper surface of the sapphire substrate 10, a plurality of island-shaped pixels 701 are aligned in one direction and in a direction perpendicular to the one direction. The depth dimension of the partition grooves 80 in the stacking direction 81 (see FIG. 2) (depth dimension from the upper surface of the fourth n-type layer 310) is approximately 6 μm.

[0042] As shown in FIG. 3 , the red light-emitting diode 71R has a light-emitting body 72 and a non-light-emitting portion 73. The light-emitting body 72 exposes the upper surface of the fourth n-type layer 310 (the uppermost surface of the epitaxial layer 30). The non-light-emitting portion 73 is adjacent to the light-emitting body 72 and aligned in one direction. The non-light-emitting portion 73 has the third light-emitting layer 30R through the fourth n-type layer 310 removed, exposing the third n-type layer 307. A positive electrode 31p, which is an electrode 31, is laminated on the upper surface of the light-emitting body 72 (the upper surface of the fourth n-type layer 310, which serves as a power supply layer from the p-type layer side to the third light-emitting layer 30R). A negative electrode 31n, which is an electrode 31, is laminated on the upper surface of the non-light-emitting portion 73 (the surface where the third n-type layer 307, which serves as a power supply layer from the n-type layer side to the third light-emitting layer 30R, is exposed). In the red light-emitting diode 71R, a circuit for supplying electricity to the third light-emitting layer 30R is formed by a positive electrode 31p provided on the fourth n-type layer 310 and a negative electrode 31n provided on the third n-type layer 307.

[0043] The green light-emitting diode 71G has a light-emitting body 74 and a non-light-emitting portion 75. The light-emitting body 74 has the third light-emitting layer 30R through the fourth n-type layer 310 removed, exposing the third n-type layer 307. The non-light-emitting portion 75 is adjacent to the light-emitting body 74 and aligned in one direction. The non-light-emitting portion 75 has the second light-emitting layer 30G through the fourth n-type layer 310 removed, exposing the second n-type layer 304. A positive electrode 31p, which is an electrode 31, is laminated on the upper surface of the light-emitting body 74 (the surface where the third n-type layer 307, which serves as a power supply layer from the p-type layer side to the second light-emitting layer 30G, is exposed). A negative electrode 31n, which is an electrode 31, is laminated on the upper surface of the non-light-emitting portion 75 (the surface on which the second n-type layer 304, which serves as a power supply layer from the n-type layer side to the second light-emitting layer 30G, is exposed). In the green light-emitting diode 71G, a circuit for supplying electricity to the second light-emitting layer 30G is formed by the positive electrode 31p provided on the third n-type layer 307 and the negative electrode 31n provided on the second n-type layer 304. Here, the second light-emitting layer 30G is continuous with the red light-emitting diode 71R, which is the adjacent sub-pixel 71, and is also included in the region of the red light-emitting diode 71R.

[0044] The blue light-emitting diode 71B has a light-emitting body 76 and a non-light-emitting portion 77. The light-emitting body 76 has the second light-emitting layer 30G through the fourth n-type layer 310 removed, exposing the second n-type layer 304. The non-light-emitting portion 77 is adjacent to the light-emitting body 76 and aligned in one direction. The non-light-emitting portion 77 has the first light-emitting layer 30B through the fourth n-type layer 310 removed, exposing the first n-type layer 301. A positive electrode 31p, which is an electrode 31, is laminated on the upper surface of the light-emitting body 76 (the surface where the second n-type layer 304, which serves as a power supply layer from the p-type layer side to the first light-emitting layer 30B, is exposed). A negative electrode 31n, which is an electrode 31, is laminated on the upper surface of the non-light-emitting portion 77 (the surface on which the first n-type layer 301, which serves as a power supply layer from the n-type layer side to the first light-emitting layer 30B, is exposed). In the blue light-emitting diode 71B, a circuit for supplying electricity to the first light-emitting layer 30B is formed by a positive electrode 31p provided on the second n-type layer 304 and a negative electrode 31n provided on the first n-type layer 301. Here, the first light-emitting layer 30B is continuous with the green light-emitting diode 71G, which is an adjacent sub-pixel 71, and is also included in the regions of the green light-emitting diode 71G and the red light-emitting diode 71R.

[0045] Thus, in each subpixel 71, a portion of the epitaxial layer 30 is removed to the extent that the buffer layer 20 is not exposed. Furthermore, in each subpixel 71, the power supply layers that supply current from the p-type layer side and the n-type layer side of each of the first light-emitting layer 30B, the second light-emitting layer 30G, and the third light-emitting layer 30R are exposed. An electrode 31 is provided on the exposed power supply layers. Even if the power supply layers are n-type layers, a current can be passed from the n-type semiconductor to the p-type semiconductor via a tunnel junction layer. If a tunnel junction layer is not provided, it is necessary to take measures such as exposing the p-type layer as the power supply layer and forming the electrode 31.

[0046] [Method for Manufacturing Semiconductor Light-Emitting Device] A method for manufacturing the semiconductor light-emitting device 1 will be described with reference to Figures 5 and 6. The semiconductor light-emitting device 1 is manufactured by performing a lamination process, a partition groove formation process, and a pixel formation process. First, in the lamination process, a buffer layer 20 and an epitaxial layer 30 are crystal-grown and laminated on the upper surface side of the sapphire substrate 10 using MOVPE (metal-organic vapor phase epitaxy) as shown in Figure 5(A).

[0047] Next, in the partitioning groove forming step, partitioning grooves 80 are formed as shown in Fig. 5(B) . The partitioning groove forming step includes a layer mask forming step for forming vertical grooves, and a groove forming etching step.

[0048] [Layer Mask Formation Process] In the layer mask formation process, first, as shown in Fig. 6(A), a SiO2 film is formed as a lower layer film 51 on the entire upper surface of the epitaxial layer 30. Next, as shown in Fig. 6(B), a Ni film is laminated as an upper layer film 52 on the lower layer film 51 in an area other than the area where the partition grooves 80 are to be formed. The lower layer film 51 can be formed using, for example, a sputtering device. The upper layer film 52 can be formed using, for example, a vapor deposition device.

[0049] The laminated mask 50, which is composed of the lower layer film 51 and the upper layer film 52, is a combination in which the etching selectivity of the material of the lower layer film 51 relative to the material of the upper layer film 52 is 40 or more in the etching process of the lower layer film 51 described below. In the case of a combination of SiO2 and Ni, the etching selectivity is approximately 50. As the lower layer film 51, oxides such as Al2O3 and nitrides such as Si3N4 can be used in addition to SiO2. As the upper layer film 52, Pt, Cr, etc. can be used in addition to Ni.

[0050] To form the upper layer film 52 by laminating it in a predetermined region, a resist mask formed by commonly used lithography can be used. Specifically, a resist material is applied to the upper surface of the lower layer film 51 to form a resist film, and then a resist mask is formed in the region where the partitioning grooves 80 are to be formed. The upper layer film 52 is then deposited and laminated on the exposed upper surface of the lower layer film 51 and on the upper surface of the resist mask. Then, by removing the resist mask, the upper layer film 52 can be laminated in the region other than the region where the partitioning grooves 80 are to be formed, as shown in FIG. 6B .

[0051] Furthermore, as shown in FIG. 6C, the lower layer 51 in the region where the partition grooves 80 are to be formed and not covered by the upper layer 52 is removed by dry etching using CF4, which is a fluoride gas. At this time, since the etching rate of the lower layer 51 is higher than that of the upper layer 52, the side surfaces of the layered mask 50 are formed to have an extremely small taper and to stand upright vertically. In this way, the layered mask 50 is formed. Note that SF4 may be used instead of CF4. ６ and CHF ３ Alternatively, etching may be performed using a fluoride gas such as fluoride gas to remove the lower film 51 in the region where the partition grooves 80 are to be formed.

[0052] [Groove Forming Etching Process] The groove forming etching process is carried out by using Cl ２ 6(D), the buffer layer 20 and the epitaxial layer 30 in the exposed regions not covered by the layer mask 50 are removed. The etching is performed to a depth that reaches the upper surface of the sapphire substrate 10, and is stopped when the etching reaches the upper surface of the sapphire substrate 10. As a result, as shown in FIG. 5(B), island-shaped pixels 701 are formed on the sapphire substrate 10 by partition grooves 80 whose peripheries reach the upper surface of the sapphire substrate 10. At this time, the partition grooves 80 can be formed into a deep, vertically sheer shape by etching using the layer mask 50.

[0053] Then, the stack mask 50 is removed by hydrofluoric acid treatment. This completes the process of forming the partition grooves 80. In this way, the partition grooves 80 are formed, and a plurality of island-shaped pixels 701 are formed. In addition, in experiments conducted by the inventors, it was confirmed that the angle formed by the wall surfaces of the partition grooves 80 with respect to the upper surface of the sapphire substrate 10 was 89 degrees or more, and that the partition grooves 80 were formed to be almost vertical.

[0054] 5C to 5E, in the pixel forming process, the surface on which the sub-pixels 71 are to be formed is exposed. First, a resist mask is laminated on the epitaxial layer 30 in the region where the light-emitting body 72 is to be formed, and then Cl ２ The third light-emitting layer 30R through the fourth n-type layer 310 are removed by dry etching using a resist mask. As a result, as shown in Fig. 5C, the light-emitting body 72 remains in a protruding shape in the region where the resist mask is laminated, and the third n-type layer 307 is exposed in the region where the resist mask is not laminated. Note that the resist mask used when laminating the upper layer 52 can be used.

[0055] Next, a resist mask is deposited on the regions where the light-emitting main body 72, the non-light-emitting portion 73, and the light-emitting main body 74 will be formed. Then, dry etching is performed using Cl to remove the second light-emitting layer 30G through the third n-type layer 307 from the epitaxial layer 30 in the regions where the resist mask is not deposited. As a result, as shown in FIG. 5D , the second n-type layer 304 is exposed in the regions where the resist mask is not deposited.

[0056] Next, a resist mask is laminated on the regions where the light-emitting main body 72, the non-light-emitting portion 73, the light-emitting main body 74, the non-light-emitting portion 75, and the light-emitting main body 76 will be formed. Then, dry etching is performed using Cl2 to remove the first light-emitting layer 30B through the second n-type layer 304 in the epitaxial layer 30 in the regions where the resist mask is not laminated. As a result, as shown in FIG. 5E, the first n-type layer 301 is exposed in the regions where the resist mask is not laminated, forming the non-light-emitting portion 77.

[0057] The electrodes 31 are formed on the respective exposed surfaces to form the sub-pixels 71. The electrodes 31 are formed by depositing SiO ２ This is performed after forming a passivation film (not shown) using the method described above.

[0058] The semiconductor light emitting element 1 thus formed is mounted on a mounting substrate 90 as shown in FIG. 7. The mounting substrate 90 is made of, for example, Si. FIG. 7 corresponds to the A-A cross section in FIG. 4. Wiring 91 made of Cu is formed on the mounting substrate 90. In the semiconductor light emitting element 1, the positive electrode 31p and negative electrode 31n of each of the red light emitting diode 71R, green light emitting diode 71G, and blue light emitting diode 71B are electrically connected to the wiring 91 via metal bumps 92. The metal bumps 92 are made of, for example, an alloy of Au and Sul. Note that the negative electrode 31n is not shown in FIG. 7.

[0059] The semiconductor light emitting element 1 is driven by a dynamic lighting method. A voltage is applied to a predetermined power supply layer in the epitaxial layer 30 of the semiconductor light emitting element 1 via the mounting substrate 90. When a current flows through a predetermined light emitting layer of each light emitting layer (first light emitting layer 30B, second light emitting layer 30G, third light emitting layer 30R), light is emitted from the predetermined light emitting layer. In the dynamic lighting method, each subpixel is sequentially lit in a short period of time. A viewer perceives this as if each subpixel is lit simultaneously.

[0060] When the light-emitting layer of a predetermined sub-pixel 71 in the semiconductor light-emitting element 1 is turned on, the light that reaches the viewer is not only the sub-pixel 71 of this light-emitting layer but also light from other sub-pixels 71 within the pixel 701. Furthermore, when the light-emitting layers of other predetermined sub-pixels 71 are also turned on to light up multiple colors, light of emission wavelengths of multiple colors reaches the viewer from the same sub-pixel 71.

[0061] For example, when the second light-emitting layer 30G is turned on, as shown by the solid line in FIG. 8 , a portion of light (L1) generated in the second light-emitting layer 30G inside the green light-emitting diode 71G, which is one of the sub-pixels 71, passes through the buffer layer 20 and the sapphire substrate 10 and reaches the viewer's eye directly from the green light-emitting diode 71G. In addition, a portion of the light generated in the second light-emitting layer 30G is incident on the red light-emitting diode 71R and the blue light-emitting diode 71B, which are adjacent sub-pixels 71. The light is then reflected within the buffer layer 20 and the epitaxial layer 30 in the pixel 701. A portion of the light (L2) is reflected upward in FIG. 8 by the red light-emitting diode 71R and the blue light-emitting diode 71B, passes through the buffer layer 20 and the sapphire substrate 10 from the adjacent sub-pixel 71, and reaches the viewer's eye as light L1, for example, as shown by the dashed line and the two-dot chain line. The second light-emitting layer 30G is continuous with the red light-emitting diode 71R, and also emits light from the red light-emitting diode 71R. A part of this light reaches the viewer's eyes from the red light-emitting diode 71R.

[0062] Furthermore, the first light-emitting layer 30B and the third light-emitting layer 30R are turned on. Then, as in the case where the second light-emitting layer 30G is turned on, a portion of the light (L1) generated inside the sub-pixel 71 and a portion of the light (L2) incident from the adjacent sub-pixel 71 in the pixel reach the viewer's eyes. Then, blue, green, and red light from each sub-pixel 71 reach the viewer's eyes.

[0063] Since the buffer layer 20 is made of AlN (refractive index 2.2) or GaN (refractive index 2.4), reflection occurs at the interface with sapphire (refractive index 1.7). Furthermore, since the epitaxial layer 30 is made of GaN (refractive index 2.4) and the partition grooves 80 are air (refractive index 1.0), reflection occurs at these interfaces. In either case, the epitaxial layer 30 on which the light-emitting layer is formed has a higher refractive index than the surrounding sapphire substrate 10 and partition grooves 80. Therefore, light incident at an angle equal to or greater than the critical angle is totally reflected.

[0064] In the semiconductor light-emitting device 1 of the present invention, no partition grooves are formed between adjacent subpixels 71, and adjacent subpixels 71 are continuous with each other using high-refractive-index AlN or GaN. Therefore, light generated in each subpixel 71 easily enters adjacent subpixels 71. Meanwhile, due to the partition grooves 80 that reach the sapphire substrate 10, light generated in each subpixel 71 tends to remain within the pixel 701. Furthermore, light generated in the subpixels 71 of each color tends to be repeatedly reflected within the pixel 701. Therefore, light can easily reach the viewer's eyes from subpixels 71 other than the subpixel 71 from which the light was generated.

[0065] In this way, the semiconductor light-emitting element 1 can improve color mixing because each sub-pixel 71 emits light generated in other sub-pixels 71 within the pixel 701. Furthermore, the constraint of configuring one pixel 701 within an angular range approximately equal to the resolution of the viewer's eyes can be alleviated, and the semiconductor light-emitting element 1 can be made to be capable of color mixing even when the pixel size is large.

[0066] The semiconductor light emitting element 1 includes a sapphire substrate 10, a buffer layer 20 having a higher refractive index than the sapphire substrate 10 and stacked on the sapphire substrate 10, and an epitaxial layer 30 having a higher refractive index than the sapphire substrate 10 and stacked on the buffer layer 20, the epitaxial layer 30 including a plurality of light emitting layers (a first light emitting layer 30B, a second light emitting layer 30G, and a third light emitting layer 30R) having different emission wavelengths. The epitaxial layer 30 is recessed in a stacking direction 81 and has a plurality of pixels 701 partitioned by partition grooves 80 extending to the sapphire substrate 10. The pixels 701 have different emission wavelengths. The device is provided with a plurality of sub-pixels 71, and in each sub-pixel 71, a portion of the epitaxial layer 30 is removed to the extent that the buffer layer 20 is not exposed, and an n-type layer (first n-type layer 301, second n-type layer 304, third n-type layer 307, fourth n-type layer 310) that serves as a power supply layer that supplies power to a predetermined light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) is exposed, and an electrode 31 is provided. Each sub-pixel 71 radiates to the outside light generated internally (from itself) and light generated in an adjacent sub-pixel 71 and incident from this sub-pixel 71.

[0067] Each subpixel 71 of the semiconductor light-emitting element 1 is configured to externally radiate light generated internally (from itself) and light generated in an adjacent subpixel 71 and incident thereon, so that light of different wavelengths generated in the individual light-emitting layers (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) within the pixel 701 is radiated externally from each subpixel 71. This improves color mixing compared to Patent Document 1, in which adjacent subpixels are partitioned by grooves reaching the sapphire substrate, preventing light from traveling between adjacent subpixels.

[0068] The partition grooves 80 of the pixels 701 reach the upper surface of the sapphire substrate 10, and the pixels 701 are formed in an island shape on the sapphire substrate 10. This makes it possible to prevent light from leaking to adjacent pixels 701.

[0069] The first light-emitting layer 30B and the second light-emitting layer 30G, which receive power from the power supply layer, are continuous with the adjacent sub-pixels 71. In this case, light is also generated from the light-emitting layer 30 in the adjacent sub-pixels 71. This improves the color mixing of light.

[0070] Each subpixel 71 is formed to extend long in one direction along the upper surface of the sapphire substrate 10, and is aligned in a direction intersecting that direction. With this configuration, the area in which each subpixel 71 is adjacent to another can be increased, which facilitates the exchange of light between adjacent subpixels 71, and therefore facilitates the enhancement of the effect of radiating to the outside light generated within the subpixel 71 (from itself) and light generated in and incident on an adjacent subpixel 71. In contrast, in the device of Patent Document 1, adjacent subpixels are partitioned by grooves that reach the sapphire substrate, which significantly restricts the movement of light between adjacent subpixels.

[0071] The method for manufacturing a semiconductor light-emitting device includes a sapphire substrate, a buffer layer stacked on the sapphire substrate and having a higher refractive index than the sapphire substrate, and an epitaxial layer stacked on the buffer layer and having a higher refractive index than the sapphire substrate, the epitaxial layer having a plurality of light-emitting layers (a first light-emitting layer, a second light-emitting layer, and a third light-emitting layer) with different emission wavelengths, the epitaxial layer having a plurality of pixels partitioned by partition grooves recessed in a stacking direction and reaching the sapphire substrate, each pixel having a plurality of sub-pixels. In the subpixel 71, a portion of the epitaxial layer 30 is removed to the extent that the buffer layer 20 is not exposed, and n-type layers (first n-type layer 301, second n-type layer 304, third n-type layer 307, fourth n-type layer 310) that serve as power supply layers that supply power to predetermined light-emitting layers (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) are exposed and provided with electrodes 31. In this semiconductor light-emitting element 1, partition grooves 80 are formed in a stacking direction 81 of the epitaxial layer 30 by a groove formation etching step using a stack mask 50 with an etching selectivity of 40 or more. More specifically, the partition grooves 80 are formed perpendicular to the sapphire substrate 10.

[0072] In conventional techniques, taper formation is likely to occur during groove formation, which tends to widen the groove width and hinders efforts to increase pixel density. Furthermore, when the pixel density is fixed, a wider groove width narrows the light-emitting area, raising concerns about the impact on electrical and optical characteristics. However, according to this method for manufacturing a semiconductor light-emitting device, grooves perpendicular to the sapphire substrate 10 are formed by an etching process using a layered mask 50 with an etching selectivity of 40 or more, so that the partitioning grooves 80 can be prevented from widening in plan view due to the occurrence of a taper angle, and concerns about the impact on electrical and optical characteristics are less likely to arise.

[0073] The method for manufacturing a semiconductor light-emitting element further includes a layered mask formation step of forming a layered mask 50 using a fluoride gas, and the layered mask 50 is composed of a lower layer film 51 made of any of SiO2, Al2O3, and Si3N4 and laminated on the epitaxial layer 30, and an upper layer film 52 made of any of Ni, Pt, and Cr and laminated on the lower layer film 51. This makes it more difficult for tapers to occur, and enables better formation of grooves perpendicular to the sapphire substrate 10.

[0074] Example 2A The semiconductor light emitting device 2 of Example 2A is different from Example 1A in that the upper surface 114 of the sapphire substrate 110 is formed in an uneven shape, but is otherwise the same as Example 1A. In Example 2A, the same components as those in Example 1A are denoted by the same reference numerals, and detailed descriptions thereof will be omitted.

[0075] As shown in FIG. 9 , a plurality of conical convex portions 111 are formed on the upper surface 114 of the sapphire substrate 110, forming the upper surface 114 of the sapphire substrate 110 in an uneven shape. For example, the outer dimensions of each convex portion 111 are 2.8 μm in diameter and 1.8 μm in height. The pitch (the distance between the central axes) between adjacent convex portions 111 is 3 μm. As shown in FIG. 9 (B) , the inclination angle 113 of the slope 112 of the convex portion 111 is preferably 90−θc or more with respect to the upper surface 114 of the sapphire substrate 110. Here, θc is the critical angle of light incident on the interface between AlN and sapphire from the AlN side.

[0076] These convex portions 111 are buried in a buffer layer. As shown in FIG. 10 , in the semiconductor light-emitting element 2, light generated in each light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) is diffused within the pixel 701 by the multiple convex portions 111. FIG. 10 corresponds to a position corresponding to the A-A cross section in FIG. 4 . Here, each convex portion 111 protrudes from the upper surface 114 of the sapphire substrate 110 toward the light-emitting layer (first light-emitting layer 30B, second light-emitting layer 30G, third light-emitting layer 30R) side. Therefore, light generated in each of the red light-emitting diode 71R, green light-emitting diode 71G, and blue light-emitting diode 71B is likely to hit each convex portion 111. The semiconductor light-emitting element 2 using the sapphire substrate 110 is easily diffused within the pixel 701 due to its uneven surface.

[0077] In the semiconductor light-emitting element 1 of Example 1A, light that has been repeatedly reflected within the pixel 701 becomes light that reaches the viewer's eyes from sub-pixels 71 other than the sub-pixel 71 where the light is generated. In addition, according to the configuration of the semiconductor light-emitting element 2 of Example 2A, light that reaches the upper surface 114 of the sapphire substrate 110 and is scattered becomes light that reaches the viewer's eyes from sub-pixels 71 other than the sub-pixel 71 where the light is generated. This further enhances the color mixing effect.

[0078] However, in such a processed sapphire substrate, light is scattered on the upper surface 114 of the sapphire substrate 110. This raises the concern that the scattered light may intrude into other adjacent pixels 701. Therefore, in order to reduce the intrusion of light into other adjacent pixels 701, it is preferable to also use the partition grooves 80 of the pixels 701 that reach the sapphire substrate 110.

[0079] The shape of the convex portion is not limited to a conical shape, but may be a polygonal pyramid, a hemispherical shape, or an irregularly uneven shape. The apex of the cone may be spherical. When the apex of the cone is spherical, the inclination angle of the slope of the convex portion with respect to the upper surface of the sapphire substrate is preferably 90-θc or more.

[0080] The partitioning grooves 80 of the semiconductor light-emitting element 1 may be provided with a light-absorbing material. The light-absorbing material may be a material that absorbs light emitted from the semiconductor light-emitting element 1, such as a metal complex dye, black silicone resin, black epoxy resin, or black paint. Note that, in order to improve color mixing, it is desirable not to place a light-absorbing material in the partitioning grooves 80.

[0081] The present invention is not limited to Example 1A and Example 2A described above and illustrated in the drawings. The following examples are also within the technical scope of the present invention. (1) Unlike the semiconductor light-emitting element 1 of Example 1A shown in FIG. 2 , the light-emitting layer supplied with power from the power supply layer may be divided so as not to be continuous with adjacent sub-pixels 71, as in the semiconductor light-emitting element 3 shown in FIG. 11 . In FIG. 11 , in one pixel 701, partition grooves 180 for the sub-pixels 71 are formed between the red light-emitting diode 71R and the green light-emitting diode 71G, and between the green light-emitting diode 71G and the blue light-emitting diode 71B. These partition grooves 180 are formed during the process of forming the exposed surfaces of the second n-type layer 304 of the green light-emitting diode 71G and the first n-type layer 301 of the blue light-emitting diode 71B, respectively. The bottom surfaces of the partition grooves 180 are flush with the second n-type layer 304 and the first n-type layer 301, and are deep enough not to expose the buffer layer 20. Even in this case, light can be exchanged between adjacent sub-pixels 71 via the buffer layer 20 and the epitaxial layer 30, and each sub-pixel 71 can radiate light generated internally and light incident from an adjacent sub-pixel 71 to the outside. Furthermore, by configuring the second light-emitting layer 30G and the first light-emitting layer 30B so that they are not continuous with adjacent sub-pixels 71, static lighting as well as dynamic lighting is possible. In Example 1A, the non-light-emitting portion 73 of the red light-emitting diode 71R and the light-emitting body portion 74 of the green light-emitting diode 71G, and the non-light-emitting portion 75 of the green light-emitting diode 71G and the light-emitting body portion 76 of the blue light-emitting diode 71B were electrically connected via the third n-type layer 307 and the second n-type layer 304. This is because these are insulated from each other. (2) The arrangement order of the red light-emitting diode, green light-emitting diode, and blue light-emitting diode in one pixel is not limited to the arrangement order in Example 1A. In particular, since red light and blue light are difficult to mix, it is preferable to place a red light emitting diode and a blue light emitting diode adjacent to each other. (3) The number of each of the red light emitting diode, the green light emitting diode, and the blue light emitting diode in one pixel does not have to be one. Furthermore, one pixel may be configured to include two of the red light emitting diode, the green light emitting diode, and the blue light emitting diode.That is, each pixel may include at least two of a red light-emitting diode, a green light-emitting diode, and a blue light-emitting diode. (4) The stacking order of the first, second, and third light-emitting layers is not limited to that of Example 1A. (5) Unlike Example 1A, the subpixels may be arranged in a direction intersecting one direction in which the subpixels extend. In other words, the arrangement of the subpixels is not limited to a direction perpendicular to one direction. (6) Unlike Example 1A, the depth of the partition grooves formed around the pixels only needs to reach the top surface of the buffer layer. In other words, the depth of the partition grooves formed around the pixels only needs to reach the sapphire substrate beyond the top surface of the buffer layer. (7) Unlike Example 1A, the semiconductor light-emitting element does not need to include a sapphire substrate. For example, the sapphire substrate may be removed by laser lift-off after the semiconductor light-emitting element is mounted on a mounting substrate. Even in this case, the same effect can be achieved because adjacent subpixels are continuous with each other through the high-refractive-index buffer layer and epitaxial layer.

[0082] Next, a semiconductor light-emitting device with a conductive via according to the first invention will be described. The semiconductor light-emitting device according to the first invention has an epitaxial layer, an electrode, and a conductive via. The epitaxial layer includes at least one light-emitting unit layer, and the light-emitting unit layer includes a p-type layer, a light-emitting layer, and an n-type layer, stacked in this order when viewed from the surface on which the electrode is provided. When multiple light-emitting unit layers are present, a tunnel junction layer is provided between the p-type layer and the n-type layer of adjacent light-emitting unit layers (in the stacking direction). Preferably, a tunnel junction layer adjacent to the p-type layer of the light-emitting unit layer and an n-type layer are stacked between the electrode and the light-emitting unit layer, and the electrode is provided on this n-type layer. The epitaxial layer is divided into a light-emitting portion and a non-light-emitting portion by a dividing groove that reaches the n-type layer and divides the light-emitting layer. A light-emitting portion-side electrode is provided as the electrode on the surface of the epitaxial layer facing the light-emitting portion, and a non-light-emitting portion-side electrode is provided as the electrode on the surface of the epitaxial layer facing the non-light-emitting portion. The conductive via is arranged to electrically connect the non-light-emitting portion-side electrode to the n-type layer of the light-emitting unit layer. This configuration makes it possible to easily align the electrode heights without using a mounting substrate with complex steps as described in Patent Document 1 or without varying the thickness of the electrodes for each sub-element. As a result, mounting of the semiconductor light-emitting element on the mounting substrate is facilitated, and stable mounting of fine sizes is possible.

[0083] Next, various embodiments of the semiconductor light-emitting element of the present invention and a semiconductor light-emitting device using the same will be described with reference to Figures 1, 12 to 21. In the following description, the same components as those in Examples 1A and 2A will be denoted by the same reference numerals, and detailed description thereof will be omitted. Furthermore, the materials and shapes of components and manufacturing processes related to the same components as those in Examples 1A and 2A will be applied mutatis mutandis to the descriptions in Examples 1A and 2A.

[0084] Example 1B The semiconductor light-emitting device of Example 1B is used in a display device such as VR goggles. As shown in FIG. 1 , the semiconductor light-emitting device used in VR goggles 200 is placed in front of a viewer's eye 202, with a lens 201 sandwiched between them. The distance between the semiconductor light-emitting device and the viewer's eye 202 is approximately 5 cm. As shown in FIG. 13 , the semiconductor light-emitting device of Example 1D includes a sapphire substrate 10, a buffer layer 20, and an epitaxial layer 30. The semiconductor light-emitting element 1 is placed on the sapphire substrate 10 so that the epitaxial layer 30 is on the opposite side from the viewer's eye 202. Light emitted from the epitaxial layer 30 passes through the sapphire substrate 10 and reaches the viewer's eye 202.

[0085] [Configuration of Sapphire Substrate and Plate Buffer Layer] The configurations of the sapphire substrate 10 and the buffer layer 20 are the same as those in Example 1A or Example 2A.

[0086] [Configuration of Epitaxial Layer] The epitaxial layer 30 is stacked on the upper surface of the buffer layer 20. As in Example 1A, the epitaxial layer 30 also includes a first n-type layer 301, a first light-emitting layer 30B (light-emitting layer), a first p-type layer 302, a first tunnel junction layer 303, a second n-type layer 304, a second light-emitting layer 30G (light-emitting layer), a second p-type layer 305, a second tunnel junction layer 306, a third n-type layer 307, a third light-emitting layer 30R (light-emitting layer), a third p-type layer 308, a third tunnel junction layer 309, and a fourth n-type layer 310, which are stacked in this order. The configuration of each layer is as described above for Example 1A. As described above, a set of the n-type layer, light-emitting layer, and p-type layer described above may be referred to as a "light-emitting unit layer." The epitaxial layer 30 is divided into a light-emitting portion and a non-light-emitting portion by dividing grooves (L) extending from the surface on which the electrode is provided to the n-type layer in the light-emitting unit layer including the light-emitting layer that emits light. The distance A between the first light-emitting layer 30B and the second light-emitting layer 30G and the distance B between the second light-emitting layer 30G and the third light-emitting layer 30R (light-emitting layer) may be the same or different. For example, to make the third light-emitting layer 30R in a good condition with few defects, the third n-type layer 307 may be several times thicker than the second n-type layer 304, and the distance B may be larger than the distance A.

[0087] [Pixel Configuration] FIG. 12 is a partially enlarged plan view of a pixel 703 of the semiconductor light-emitting device of Example 1B. The pixel 703 has a plurality of sub-pixels 71. In this example, the sub-pixels 71 are a red light-emitting diode 71R, a green light-emitting diode 71G, and a blue light-emitting diode 71B. In a plan view of the semiconductor light-emitting device 1 viewed from above, the pixel 703 is formed in a square shape. Each of the sub-pixels 71 of the red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B is formed to extend elongated in one direction. The red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B are formed adjacent to each other in a direction perpendicular to the one direction. Here, the red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B are each a semiconductor light-emitting element according to the first invention.

[0088] This display device is a self-luminous display in which, for example, 320 x 180 pixels are densely arranged in a dot matrix. The width of the pixels is less than 100 μm, for example, 60 μm or 12 μm.

[0089] FIG. 13 is a cross-sectional view of the pixel shown in FIG. 12 taken along lines A-A, B-B, and C-C. The cross-sectional view of line A-A in FIG. 13 is a cross-sectional view of a blue light-emitting diode 71B. The blue light-emitting diode 71B has a light-emitting main body portion 76 and a non-light-emitting portion 77. A dividing groove (L) 801 is provided between the light-emitting main body portion 76 and the non-light-emitting portion 77, leading to the n-type layer 301 in a predetermined light-emitting unit layer including the light-emitting layer 30B to be emitted. A positive electrode 31p and a negative electrode 31n, which are electrodes 31, are provided on the upper surface of the epitaxial layer 30 (fourth n-type layer 310). Specifically, a positive electrode 31p is laminated as a light-emitting portion-side electrode on the surface of the epitaxial layer 30 facing the light-emitting portion 76, and a negative electrode 31n is laminated as a non-light-emitting portion-side electrode on the surface facing the non-light-emitting portion 77. A conductive via 32n extending to the n-type layer 301 in the light-emitting unit layer including the light-emitting layer 30B to be emitted is connected to the negative electrode 31n, which is the non-light-emitting portion side electrode. A conductive via 32p extending to the n-type layer 304 located closer to the positive electrode 31p than the light-emitting unit layer including the light-emitting layer 30B to be emitted is connected to the positive electrode 31p, which is the light-emitting portion side electrode.

[0090] The cross-sectional view along line B-B in FIG. 13 is a cross-sectional view of a green light-emitting diode 71G. The green light-emitting diode 71G has a light-emitting main body portion 74 and a non-light-emitting portion 75. A dividing groove (L) 801 is provided between the light-emitting main body portion 74 and the non-light-emitting portion 75, leading to the n-type layer 304 in a predetermined light-emitting unit layer including the light-emitting layer 30G to be emitted. A positive electrode 31p and a negative electrode 31n, which are electrodes 31, are provided on the upper surface of the epitaxial layer 30 (fourth n-type layer 310). Specifically, the positive electrode 31p is laminated on the surface of the epitaxial layer 30 facing the light-emitting portion 74 as a light-emitting portion-side electrode, and the negative electrode 31n is laminated on the surface facing the non-light-emitting portion 75 as a non-light-emitting portion-side electrode. A conductive via 32n extending to the n-type layer 304 in the light-emitting unit layer including the light-emitting layer 30G to be emitted is connected to the negative electrode 31n, which is the non-light-emitting portion-side electrode. A conductive via 32p is connected to the positive electrode 31p, which is the light-emitting portion side electrode, and extends to the n-type layer 307 located closer to the positive electrode 31p than the light-emitting unit layer including the light-emitting layer 30G to be emitted.

[0091] The cross-sectional view along line CC in FIG. 13 is a cross-sectional view of a red light-emitting diode 71R. The red light-emitting diode 71R has a light-emitting main body portion 72 and a non-light-emitting portion 73. A dividing groove (L) 801 is provided between the light-emitting main body portion 72 and the non-light-emitting portion 73, leading to the n-type layer 307 in a predetermined light-emitting unit layer including the light-emitting layer 30R to be emitted. A positive electrode 31p and a negative electrode 31n, which are electrodes 31, are provided on the upper surface of the epitaxial layer 30 (fourth n-type layer 310). Specifically, the positive electrode 31p is laminated on the surface of the epitaxial layer 30 facing the light-emitting portion 72 as a light-emitting portion-side electrode, and the negative electrode 31n is laminated on the surface facing the non-light-emitting portion 73 as a non-light-emitting portion-side electrode. A conductive via 32n extending to the n-type layer 307 in the light-emitting unit layer including the light-emitting layer 30R to be emitted is connected to the negative electrode 31n, which is the non-light-emitting portion-side electrode. The positive electrode 31p of the red light-emitting diode 71R does not need to have a conductive via 32p because the fourth n-type layer 310, which is the only n-type layer between the red light-emitting diode 71R and the light-emitting layer 30R, is in direct contact with the positive electrode 31p. For example, as described below, conductive vias are provided in grooves formed in the epitaxial layer, and the grooves for the conductive vias 32n on the non-light-emitting portion 73 side are formed when the dividing grooves (L) 801 of the same subpixel are formed. The grooves for the conductive vias 32p on the light-emitting body portion 72 side are formed when the dividing grooves (L) 801 of the same depth are formed for different subpixels. The dividing grooves and conductive via grooves for the blue light-emitting diode 71B and the green light-emitting diode 71G may be formed in several steps, or grooves of the required depth may be formed all at once. For small-sized electrodes, it is preferable to form the conductive via grooves all at once, since it is not necessary to consider the tolerance of the resist mask multiple times.

[0092] As shown in FIG. 14, in Example 1B, the epitaxial layer 30 is partitioned into a red light emitting diode 71R, a green light emitting diode 71G, and a blue light emitting diode 71B by partition grooves (S) 802 that reach the substrate.

[0093] FIG. 15 schematically illustrates the principle of conduction in the semiconductor light-emitting device of Example 1B, using the green light-emitting diode 71G as an example. In FIG. 15, arrows indicate the flow of current. The current flows from the positive electrode 31p to the third n-type layer 307. Here, the conductive vias 32n and 32p have lower electrical resistance than the epitaxial layer 30, and the light-emitting layer 30G has a band gap. Therefore, the light-emitting layer on the electrode side of the light-emitting layer 30G does not emit light. The current diffuses in the plane direction in the third n-type layer 307. The current diffused in the plane direction is injected from the second tunnel junction layer 306 into the second p-type layer 305. This results in current uniformity in the p-type layer 305 and the light-emitting layer 30G. The entire surface of the light-emitting layer 30G on the light-emitting portion side emits light. The n-type layer has significantly lower resistivity and a thicker layer than the p-type layer. The tunnel junction layer also allows current to flow from the n-type semiconductor to the p-type semiconductor. If the second tunnel junction layer 306 were not provided and the conductive via 32p directly reached the second p-type layer 305, only a portion of the light-emitting layer 30G would emit light. That is, because the second p-type layer 305 has high resistance, there would be no diffusion in the surface direction. Therefore, current would flow only in the light-emitting layer 30G directly below the conductive via 32p. Thus, only the portion directly below the conductive via 32p would emit light. Furthermore, the current would flow from the light-emitting layer 30G to the second n-type layer 304, which is not divided by the dividing groove (L) 801, and then through the conductive via 32n to the negative electrode 31n.

[0094] With the above configuration, the blue light-emitting diode 71B, the green light-emitting diode 71G, and the red light-emitting diode 71R each have a positive electrode 31p and a negative electrode 31n provided on the upper surface of the epitaxial layer 30 (fourth n-type layer 310), forming a circuit that energizes the first light-emitting layer 30B, the second light-emitting layer 30G, and the third light-emitting layer 30R, respectively. The positive electrode 31p and the negative electrode 31n are both formed in the n-type semiconductor layer. Therefore, the positive electrode 31p and the negative electrode 31n are simultaneously formed by sputtering or vapor deposition using the same material and having the same thickness. The conductive vias 32p and the conductive vias 32n may also be formed simultaneously with the positive electrode 31p and the negative electrode 31n after groove formation. This configuration allows the mounting surfaces of the electrodes to be easily aligned in height. This facilitates mounting of the semiconductor light-emitting element on a mounting substrate and enables stable mounting of fine-sized elements.

[0095] [Conductive Vias] The material of the conductive vias 32n and 32p is not particularly limited as long as it is a conductive material with sufficient conductivity to form the above-described current-carrying circuit, and examples thereof include gold, aluminum, and copper. In Example 1B, the openings of the conductive vias 32n and 32p have a diameter of 3 μm. Their shapes are conical, including an inclined surface tapering from the electrode toward the n-type layer. More specifically, conical grooves are formed, including an inclined surface tapering from the electrode toward the n-type layer, and a conductive material is deposited on the surface of the groove simultaneously with the formation of the positive electrode 31p and the negative electrode 31n by sputtering or vapor deposition. The inclined surface shape of the groove is effective for stably depositing the conductive material on the side surface of the groove during sputtering or vapor deposition. The taper angle of the inclined surface of the groove is preferably such that the electrode-side opening of the conductive via is not excessively large for small-sized LEDs, and the conductive material can be stably deposited on the side surface of the inclined groove. For this reason, for example, the taper angle of the inclined surface of this groove is preferably 10° to 45°, and more preferably 20° to 40°. There are no particular limitations on the number and dimensions of the conductive vias 32n and 32p as long as the above-mentioned conditions are met. The shapes of the conductive vias 32n and 32p are not limited to the tapered shape described above and can take various other shapes. For example, the horizontal cross-sectional shapes of the conductive vias 32n and 32p can be various shapes, such as circular, elliptical, or polygonal. Specific examples of other conductive via shapes are shown in Figure 16. Figure 16(a) shows an example using cylindrical conductive vias 32n and conductive vias (Vp) 32p. As shown above, the grooves may have a shape without any inclination, or the grooves may be completely filled with conductive material. The conductive material in the grooves may be formed by plating or other processes in a separate process, rather than simultaneously with the electrodes. Figure 16(b) shows an example using a rectangular groove (slit-shaped groove) in a front view and conductive vias 32p with inclined surfaces. Long grooves are effective in stably placing conductive material on the side of the groove during sputtering or vapor deposition. Furthermore, when the groove is shaped like a slit, a resist mask with a width smaller than the diameter of a circle can be formed. Therefore, the slit shape can be used for smaller electrodes.The rectangular groove has an additional inclined surface. As described above, the conductive via 32n in FIG. 16(b) is a conical conductive via including a tapered inclined surface. FIG. 16(c) shows an example in which conductive vias 32n and 32p have rectangular grooves (slit-shaped grooves) in a cross direction when viewed from the front. The rectangular grooves in a cross direction are more effective for stably placing conductive material on the side surfaces of the grooves during sputtering or vapor deposition than rectangular grooves in one direction. FIG. 16(d) shows an example in which a wide rectangular conductive via 32n with rounded corners is used when viewed from the front, and a wide conductive via 32p has multiple rectangular grooves (slit-shaped grooves) in a cross direction when viewed from the front.

[0096] From the viewpoint of simultaneously and integrally forming the conductive vias and the electrodes, it is preferable that the conductive vias 32n and the conductive vias 32p have the above-mentioned inclined surface shape or a slit shape.

[0097] The semiconductor light-emitting element thus formed is mounted on a mounting substrate 90. Mounting can be performed in the same manner as in Example 1A. However, in Example 1B, the positive electrodes 31p and negative electrodes 31n of all sub-pixels are the same height, which facilitates mounting of the semiconductor light-emitting element on a mounting substrate and enables stable mounting of fine-sized elements. For example, when metal bumps 92 made of Au, Cu, or the like are used, uniform force can be easily applied to each metal bump 92 during bonding. This also stabilizes the electrical connection of each metal bump 92. Furthermore, when a bonding material such as a eutectic material that is melted and bonded is used, stable electrical connection is achieved and excess bonding of the bonding material can be suppressed. Furthermore, the entire surface of the electrode is easily brought into contact with the bonding material, which also strengthens the physical bond. The ability to stably mount multiple pixels is effective when removing the substrate of the semiconductor light-emitting element, as described below.

[0098] 16(a) to 16(d), similarly to Example 1A in which no conductive vias are provided, the outer width of the electrodes is made substantially equal to the widths of the light-emitting portion 74 and the non-light-emitting portion 75. Then, by matching the wiring portion of the mounting substrate on which the semiconductor light-emitting element 1 is mounted with the outer width of the electrodes of the semiconductor light-emitting element 1 and using a bonding material such as a eutectic material, the entire semiconductor light-emitting element 1 is firmly bonded. Furthermore, the self-alignment effect caused by the surface tension when the bonding material is melted allows for highly accurate mounting.

[0099] FIG. 17 shows an example of a semiconductor light-emitting device in which a semiconductor light-emitting element is mounted on a mounting substrate, with the substrate of the semiconductor light-emitting element removed. As shown in this example, when the sapphire substrate 10 is removed, the subpixels, i.e., the red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B, are completely separated and independent. In Example 1B, the electrodes of the subpixels 71R, 71G, and 71B are of the same height, and the electrodes of the subpixels 71R, 71G, and 71B are bonded to wiring 91 on the mounting substrate 90 at the same height, which facilitates mounting. Furthermore, the electrodes of the subpixels 71R, 71G, and 71B have approximately the same width as the width of the subpixels 71R, 71G, and 71B. The electrodes of the subpixels 71R, 71G, and 71B are bonded to wiring 91 on the mounting substrate 90 that has the same width as the electrodes. Because of this stable bonding, even when the sapphire substrate 10 is removed by laser lift-off, for example, the sapphire substrate 10 can be easily peeled off without damaging the structure of the semiconductor light-emitting device. A light-absorbing member (not shown) that absorbs light generated from the light-emitting layer may be installed in the partition grooves (S) 802. According to this configuration, the partition grooves (S) are provided to reach the substrate, and the light-absorbing member is further disposed in the partition grooves (S). This prevents light from reaching adjacent pixels via the buffer layer or epitaxial layer, while absorbing light irradiated onto the light-absorbing member in the partition grooves (S). This reduces false lighting. The partition grooves (S) 802 can be formed by etching them nearly vertically using the same technique as the groove formation etching process in Example 1A. The material, installation method, and effects of the light-absorbing member installed in the partition grooves (S) 802 are the same as those of the light-absorbing member installed in the partition grooves 80 described above.

[0100] Example 2B The semiconductor light-emitting device of Example 2B is similar to Example 1B, except that the partition grooves (S) 802 of the subpixels do not reach the sapphire substrate 10. Specifically, in Example 2B, as shown in FIG. 18( a), the partition grooves (S) 802 of the pixels reach the sapphire substrate 10. On the other hand, the partition grooves (S) 802 of the subpixels reach the buffer layer 20 but do not reach the sapphire substrate 10. In this case, the buffer layer and epitaxial layer, which have a refractive index higher than that of the sapphire substrate 10, cause a certain degree of light propagation between the subpixels, thereby exhibiting color mixing. Furthermore, the partition grooves (S) 802 of the subpixels enable, for example, a configuration in which the light-emitting layer to which power is supplied from the power supply layer is not continuous with the adjacent subpixels, thereby electrically isolating the adjacent subpixels, thereby enabling not only dynamic lighting but also static lighting. Furthermore, as shown in FIG. 18(b), when the sapphire substrate 10 is removed, the pixels are independent, but the sub-pixels, the red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B, are continuous. This further enhances color mixing. In other words, by forming grooves extending to the sapphire substrate 10, the pixels become independent in a medium with a refractive index of 2 or higher, such as the buffer layer or epitaxial layer. Furthermore, by peeling off the sapphire substrate 10, the pixels become independent in a medium with a refractive index of 1.7 or higher. Note that in Example 2B, the electrodes of the sub-pixels 71R, 71G, and 71B are at the same height, and the electrodes of the sub-pixels 71R, 71G, and 71B are bonded to the wiring 91 at the same height on the mounting substrate 90, making mounting easy. Furthermore, stable bonding is achieved. Therefore, the sapphire substrate 10 can be easily peeled off without damaging the structure of the semiconductor light-emitting device. In Example 2B, a light-absorbing member (not shown) that absorbs light generated from the light-emitting layer may also be installed in the partition groove (S) 802. With this configuration, the partition groove (S) that reaches the substrate is provided, and a light-absorbing member is further disposed in this partition groove (S). This makes it possible to absorb light irradiated onto the light-absorbing member in the partition groove (S) while preventing light from reaching adjacent pixels via the buffer layer or epitaxial layer. This makes it possible to suppress false lighting.In order to improve color mixing, it is desirable not to place a light absorbing member in the partition groove (S). The material, installation method, and effects of the light absorbing member are the same as those described in Example 2A.

[0101] 19 shows a schematic cross-sectional view of a semiconductor light-emitting device having a plurality of pixels shown in FIG. 18 on a mounting substrate 90, with a light-absorbing member between the pixels. In this example, a light-absorbing member 40 is applied to the partition grooves of the semiconductor light-emitting element in advance, and the semiconductor light-emitting element is mounted on the mounting substrate 90, and then the sapphire substrate 10 is removed. Alternatively, the semiconductor light-emitting element is mounted on the mounting substrate 90, and then the light-absorbing member 40 is filled in, and then the sapphire substrate 10 is removed. This makes it possible to easily manufacture a semiconductor light-emitting device in which each pixel is not covered with a light-absorbing member. The material, installation method, and effects of the light-absorbing member are the same as those described in Example 2A.

[0102] Example 3B The semiconductor light-emitting element of Example 3B is substantially similar to Example 1B, except that the heights of the installation surfaces of the positive electrode 31p and the negative electrode 31n are different. Specifically, as shown in Figure 20, in Example 3B, the positive electrodes 31p of the red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B are all provided on the same plane A and at the same height, and the negative electrodes 31n of the red light-emitting diode 71R, the green light-emitting diode 71G, and the blue light-emitting diode 71B are all provided on the same plane B and at the same height, but the plane A and the plane B are at different positions in the stacking direction 81 of the epitaxial layer 30. More specifically, all of the positive electrodes 31p are provided on the fourth n-type layer 310, and all of the negative electrodes 31n are provided on the third n-type layer 307. Due to this configuration, the mounting substrate used to mount the semiconductor light-emitting device of Example 3B only needs to have two steps to provide a surface for connecting the positive electrode 31p and a surface for connecting the negative electrode 31n. Unlike the mounting substrate described in Patent Document 1, there is no need to provide steps for each LED with a different emission wavelength. The red light-emitting diode 71R, green light-emitting diode 71G, and blue light-emitting diode 71B all have the third light-emitting layer 30R through the fourth n-type layer 310 removed in the non-light-emitting portion, exposing the third n-type layer 307. The negative electrode 31n is installed on this exposed surface. The method for exposing the third n-type layer 307 can be performed using a method similar to the pixel formation process in Example 1A. Due to the multilayer wiring structure of the anode and cathode wiring, the mounting substrate 90 has different heights for the positive electrode 31p connection surface and the negative electrode 31n connection surface. However, the heights of the positive electrode 31p connection surface of each light-emitting diode are the same. Furthermore, the heights of the negative electrode 31n connection surface of each light-emitting diode are the same. In the blue light-emitting diode 71B, the negative electrode 31n is connected to a conductive via 32n extending to the n-type layer 301 in the light-emitting unit layer including the light-emitting layer 30B that emits light. The negative electrode 31n is electrically connected to a wiring 91 provided on the connection surface of the negative electrode 31n, which is a convex portion of the mounting substrate.In addition, a conductive via 32p is connected to the positive electrode 31p, extending to an n-type layer 304 located closer to the positive electrode 31p than the light-emitting unit layer including the light-emitting layer 30B to be emitted. The positive electrode 31p is electrically connected to a wiring 91 provided in a region adjacent to the convex portion of the mounting substrate. In the green light-emitting diode 71G, a conductive via 32n is connected to the negative electrode 31n, extending to the n-type layer 304 in the light-emitting unit layer including the light-emitting layer 30G to be emitted. The negative electrode 31n is electrically connected to a wiring 91 provided on the negative electrode 31n connection surface, which is a convex portion of the mounting substrate. In addition, a conductive via 32p is connected to the positive electrode 31p, extending to an n-type layer 307 located closer to the positive electrode 31p than the light-emitting unit layer including the light-emitting layer 30G to be emitted. The positive electrode 31p is electrically connected to a wiring 91 provided in a region adjacent to the convex portion of the mounting substrate. In the red light-emitting diode 71R, the negative electrode 31n is disposed on the exposed n-type layer 307. The positive electrode 31p is disposed on the fourth n-type layer 310. With this configuration, the red light-emitting diode 71R does not require a conductive via because the positive electrode 31p and the negative electrode 31n form a circuit that conducts electricity to the third light-emitting layer 30R.

[0103] Example 4B The semiconductor light-emitting device of Example 4B is a monochromatic semiconductor light-emitting device having a single light-emitting layer, as shown in FIG. 21 . A specific description will be given below with reference to FIG. 21 . The semiconductor light-emitting device shown in FIG. 21 is a blue light-emitting diode 71B. The configurations of the sapphire substrate 10 and buffer layer 20 are the same as those of Example 1A or Example 2A. An epitaxial layer 230 is stacked on the upper surface of the buffer layer 20. The epitaxial layer 230 includes a first n-type layer 2301, a light-emitting layer 230B (light-emitting layer), a p-type layer 2302, a tunnel junction layer 2303, and a second n-type layer 2304, which are stacked in this order. The configuration of each layer is as described above for Example 1A. The epitaxial layer 230 is partitioned into a light-emitting portion 276 and a non-light-emitting portion 277 by a dividing groove (L) 801 extending from the surface on which the electrode is provided to the first n-type layer. A positive electrode 231p and a negative electrode 231n, which are electrodes 231, are provided on the upper surface of the epitaxial layer 230 (second n-type layer 304). Specifically, the positive electrode 231p is laminated as a light-emitting portion-side electrode on the surface of the epitaxial layer 30 on the light-emitting portion 276 side, and the negative electrode 231n is laminated as a non-light-emitting portion-side electrode on the surface of the non-light-emitting portion 277 side. A conductive via 232n extending to the first n-type layer 2301 is connected to the negative electrode 231n, which is the non-light-emitting portion-side electrode. The positive electrode 231p does not need to be provided with a conductive via because the second n-type layer 2304, which is the only n-type layer existing between the positive electrode 231p and the light-emitting layer 230R, is in direct contact with the positive electrode 231p. With the above-described configuration, in the blue light-emitting diode 71B, a circuit for conducting electricity to the light-emitting layer 230B is formed by the positive electrode 231p and the negative electrode 231n, both of which are provided on the upper surface of the epitaxial layer 230 (second n-type layer 2304). That is, the positive electrode 231p and the negative electrode 231n are provided on the same plane, and in this embodiment, the positive electrode 231p and the negative electrode 231n also have the same height. This configuration makes it easy to mount the semiconductor light-emitting element on a mounting substrate and ensure electrical continuity between the electrodes.

[0104] The blue light-emitting diode 71B thus formed is mounted on a mounting substrate 90. While FIG. 21 illustrates an example of a blue light-emitting diode, light-emitting diodes of other colors can be formed by employing light-emitting layers with different emission wavelengths. While the light-emitting unit layer has been described as including a single light-emitting layer, it may include multiple light-emitting layers with different emission colors. The tunnel junction layer 2303 and the second n-type layer 2304 may be omitted, and the electrodes 231, i.e., the positive electrode 231p and the negative electrode 231n, may be provided on the p-type layer 2302. However, providing the tunnel junction layer 2303 and the second n-type layer 2304 can reduce damage to the light-emitting layer and other components during processing of the epitaxial layer 230. Furthermore, forming the electrode 231 on an n-type semiconductor using a GaN-based material can more easily achieve ohmic characteristics.

[0105] The various aspects of the semiconductor light-emitting element and semiconductor light-emitting device of the present invention have been described above, and all of them can be suitably used in VR goggles that employ a dot-matrix display with a pixel width of less than 100 μm. Furthermore, they can also be applied to various display devices other than VR goggles.

[0106] DESCRIPTION OF SYMBOLS 1, 2, 3...Semiconductor light-emitting element 10, 110...Sapphire substrate 31...Electrode 20...Buffer layer 30...Epitaxial layer 30B...First light-emitting layer (light-emitting layer) 30G...Second light-emitting layer (light-emitting layer) 30R...Third light-emitting layer (light-emitting layer) 32...Conductive via 50...Stacking mask 80, 180...Partition groove 701, 702...Pixel 71...Sub-pixel 111...Convex portion 114...Upper surface of sapphire substrate 301...First n-type layer (power supply layer) 304...Second n-type layer (power supply layer) 307...Third n-type layer (power supply layer) 310...Fourth n-type layer (power supply layer)

Claims

1. A semiconductor light-emitting device comprising an epitaxial layer, an electrode, and a conductive via, wherein the epitaxial layer has at least one light-emitting unit layer in which a p-type layer, a light-emitting layer, and an n-type layer are stacked in that order when viewed from the surface on which the electrode is provided, and the epitaxial layer is divided into a light-emitting portion and a non-light-emitting portion by a dividing groove that reaches the n-type layer and divides the light-emitting layer, the electrodes are disposed on the epitaxial layer on the light-emitting portion side and the non-light-emitting portion side, and the conductive via is disposed so as to electrically connect the electrode on the non-light-emitting portion side and the n-type layer of the light-emitting unit layer.

2. The semiconductor light-emitting element according to claim 1, wherein the epitaxial layer is formed by stacking two or more of the light-emitting unit layers, a tunnel junction layer is provided between the p-type layer and the n-type layer of adjacent light-emitting unit layers, and the epitaxial layer is divided into a light-emitting portion and a non-light-emitting portion by a dividing groove that reaches the n-type layer and divides the light-emitting layer in a predetermined light-emitting unit layer, the electrodes are arranged on the same plane on the light-emitting portion side and also on the non-light-emitting portion side, and the conductive via is arranged to electrically connect the electrode on the light-emitting portion side to the tunnel junction layer on the p-type layer side of the predetermined light-emitting unit layer, and to electrically connect the electrode on the non-light-emitting portion side to the n-type layer of the predetermined light-emitting unit layer.

3. The semiconductor light-emitting element according to claim 1 or 2, wherein the epitaxial layer includes a tunnel junction layer adjacent to the p-type layer of the light-emitting unit layer and an n-type layer stacked between the electrode and the light-emitting unit layer.

4. The semiconductor light-emitting element according to claim 1 or 2, wherein the light-emitting portion side electrode and the non-light-emitting portion side electrode are all provided on the same surface.

5. The semiconductor light-emitting element according to claim 1 or 2, wherein the conductive via has a shape including an inclined surface that tapers from the electrode toward the n-type layer to which it is electrically connected.

6. The semiconductor light-emitting element according to claim 1 or 2, wherein the conductive via is slit-shaped.

7. The semiconductor element according to claim 1 or 2, wherein the electrode and the conductive via are formed from the same material.

8. The semiconductor light-emitting element according to claim 1 or 2, which has three or more light-emitting unit layers, and the spacing between the light-emitting layers in each light-emitting unit layer is different.

9. A semiconductor light-emitting device having an epitaxial layer, electrodes, and conductive vias, wherein the epitaxial layer comprises: a plurality of light-emitting unit layers having different light emission colors, each having a p-type layer, a light-emitting layer, and an n-type layer stacked in this order when viewed from the surface on which the electrodes are provided; and a tunnel junction layer stacked between the plurality of light-emitting unit layers; the semiconductor light-emitting device has a plurality of pixels each having a plurality of sub-pixels partitioned by partition grooves, each sub-pixel having the epitaxial layer; the sub-pixels having a light-emitting portion and a non-light-emitting portion divided by a dividing groove that divides the light-emitting layer; the electrodes are disposed on the epitaxial layer on the light-emitting portion side and the non-light-emitting portion side; and in the sub-pixels within the pixel, circuits are formed in the different light-emitting unit layers by the conductive via that electrically connects the electrode of the non-light-emitting portion and the n-type layer side of a predetermined light-emitting unit layer, and the conductive via that electrically connects the electrode on the light-emitting portion side and the tunnel junction layer on the p-type layer side of the predetermined light-emitting unit layer and the adjacent n-type layer side; In the plurality of pixels, the electrodes on the light-emitting portion side are all formed on the same surface, and the electrodes on the non-light-emitting portion side are all formed on the same surface.

10. The semiconductor light-emitting element according to claim 9, wherein the electrodes on the light-emitting portion side and the electrodes on the non-light-emitting portion side are all provided on the same surface, and the heights of all mounting surfaces are the same.

11. A semiconductor light emitting device in which the semiconductor light emitting element according to claim 9 is arranged on a mounting substrate so that the plurality of pixels are independently arranged.

12. The semiconductor light emitting device according to claim 11, wherein the subpixels in the pixel are not separated.

13. The semiconductor light-emitting device according to claim 11, wherein a light-absorbing member is disposed in the partition grooves of the pixels.

14. The semiconductor light-emitting device according to claim 9, which is a dot matrix display in which the pixel width is less than 100 μm.

15. A semiconductor light-emitting device comprising: a substrate; a buffer layer laminated on the substrate and having a higher refractive index than the substrate; and an epitaxial layer laminated on the buffer layer and having a plurality of light-emitting layers with different emission wavelengths, the epitaxial layer having a plurality of pixels partitioned by partition grooves that reach at least the buffer layer, each of the pixels having a plurality of sub-pixels with different emission wavelengths, each of the sub-pixels having a power supply layer that is exposed and has an electrode formed thereon, wherein a portion of the epitaxial layer is removed so as not to expose the buffer layer, and the sub-pixels radiate light generated inside and light incident from adjacent sub-pixels to the outside.

16. The semiconductor light-emitting element according to claim 15, wherein the partition grooves of the pixels reach the substrate, and each of the pixels is formed in an island shape on the substrate.

17. The semiconductor light-emitting element according to claim 15 or 16, wherein the light-emitting layer to which power is supplied from the power supply layer is continuous with the adjacent sub-pixel.

18. The semiconductor light-emitting element according to claim 15 or 16, wherein the light-emitting layer to which power is supplied from the power supply layer is not continuous with the adjacent sub-pixel.

19. A semiconductor light-emitting element comprising: a buffer layer; and an epitaxial layer stacked on the buffer layer and having a plurality of light-emitting layers with different emission wavelengths; the epitaxial layer has a plurality of pixels partitioned by partition grooves that reach at least the buffer layer; each of the pixels has a plurality of sub-pixels with different emission wavelengths; each of the sub-pixels has a portion of the epitaxial layer removed to the extent that the buffer layer is not exposed, and a power supply layer that supplies power to a predetermined one of the light-emitting layers is exposed and provided with an electrode; and each of the sub-pixels radiates light generated inside and light incident from an adjacent sub-pixel to the outside.

20. The semiconductor light-emitting element according to claim 9 or claim 19, wherein the pixels are independently arranged on a mounting substrate.

21. A method for manufacturing a semiconductor light-emitting element according to any one of claims 9, 15, and 19, wherein the partition grooves are formed in the stacking direction of the epitaxial layers by a groove formation etching process using a stack mask with an etching selectivity of 40 or more.

22. A method for manufacturing a semiconductor light-emitting element as described in claim 21, further comprising a layered mask formation step of forming the layered mask using a fluoride gas, wherein the layered mask is composed of a combination of an oxide film made of any of SiO2, Al2O3, and Si3N4 that is layered on the epitaxial layer, and a metal film made of any of Ni, Pt, and Cr that is layered on the oxide film.

Images