Power module, electric driving apparatus, and vehicle

Abstract

Embodiments of the present disclosure provide a power module, an electric driving apparatus, and a vehicle. The power module comprises an upper bridge chip group, a lower bridge chip group, an upper bridge metal layer, and a lower bridge metal layer; the upper bridge chip group and the lower bridge chip group each comprise IGBT chips, SIC chips, and FRD chips; the IGBT chips, the SIC chips, and the FRD chips of the upper bridge chip group are connected in parallel, and are respectively connected to the upper bridge metal layer; the IGBT chips, the SIC chips, and the FRD chips of the lower bridge chip group are connected in parallel, and are respectively connected to the lower bridge metal layer. The present disclosure is conducive to reducing the total occupied area of the chips in the power module while improving the power module to satisfy the current requirements for increasing large current and large power.

Description

Power module, electric drive device and vehicle

[0001] Cross-reference to related applications

[0002] The present application is based on and claims priority to Chinese Patent Application No. 202420726233.9, filed on April 9, 2024, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of vehicles, in particular to a power module, an electric drive device and a vehicle. BACKGROUND

[0004] With the increasing development of new energy vehicles, power modules are widely used in the technical field of new energy vehicles. At present, power modules have become important parts in the motor controller, inverter and new energy charging pile of new energy vehicles. At present, the relatively mature power module products on the market mainly include IGBT power modules (IGBT chips) or SIC power modules (SIC chips).

[0005] For large current, the switching loss of IGBT chips is large; the on-state voltage drop of SIC chips is lower, so that the switching loss of SIC chips is small, but since the area of SIC chips is smaller than the area of IGBT chips, the thermal resistance on SIC chips is large. Therefore, the current power module cannot meet the increasing demand for large current and large power. In addition, the IGBT chips in the IGBT power module are usually used in parallel with the FRD chips to ensure the normal turn-off of the IGBT chips, thereby increasing the total area occupied by the chips in the IGBT power module. SUMMARY

[0006] To solve the above technical problems, the present disclosure provides a power module, an electric drive device and a vehicle.

[0007] In a first aspect, the present disclosure provides a power module, comprising:

[0008] a substrate and an electrical structure located on the substrate, the electrical structure comprising an upper bridge chip set, a lower bridge chip set, an upper bridge metal layer and a lower bridge metal layer;

[0009] The upper bridge chip set and the lower bridge chip set each comprise an IGBT chip, an SIC chip and an FRD chip, the IGBT chip, the SIC chip and the FRD chip of the upper bridge chip set are connected in parallel and are connected with the upper bridge metal layer respectively, and the IGBT chip, the SIC chip and the FRD chip of the lower bridge chip set are connected in parallel and are connected with the lower bridge metal layer respectively.

[0010] In some embodiments, the IGBT chips, the SIC chips and the FRD chips in the upper bridge chip set are welded on the upper bridge metal layer; and / or,

[0011] The IGBT chips, the SIC chips and the FRD chips in the lower bridge chip set are welded on the lower bridge metal layer.

[0012] In some embodiments, the electrical architecture further comprises a positive copper bar, a negative copper bar and a phase copper bar;

[0013] The upper bridge metal layer is electrically connected with the positive copper bar, and the IGBT chips, the SIC chips and the FRD chips in the upper bridge chip set are electrically connected with the phase copper bar through the side away from the upper bridge metal layer;

[0014] The IGBT chips, the SIC chips and the FRD chips in the lower bridge chip set are electrically connected with the negative copper bar through the side away from the lower bridge metal layer, and the lower bridge metal layer is further electrically connected with the phase copper bar.

[0015] In some embodiments, the power module further comprises:

[0016] First bonding wires and second bonding wires;

[0017] The IGBT chips, the SIC chips and the FRD chips in the upper bridge chip set are electrically connected with the phase copper bar through the side away from the upper bridge metal layer by the first bonding wires, and the first bonding wires are further electrically connected with the lower bridge metal layer;

[0018] The IGBT chips, the SIC chips and the FRD chips in the lower bridge chip set are electrically connected with the negative copper bar through the side away from the lower bridge metal layer by the second bonding wires.

[0019] In some embodiments, the IGBT chips and the FRD chips in the upper bridge chip set are arranged one by one in correspondence; and the IGBT chips and the FRD chips in the lower bridge chip set are arranged one by one in correspondence.

[0020] The upper bridge chip set comprises a first chip set, a second chip set and a third chip set, the first chip set comprises one IGBT chip and one FRD chip, the second chip set comprises one IGBT chip and one FRD chip, and the third chip set comprises two SIC chips;

[0021] The lower bridge chip set includes a fourth chip set, a fifth chip set and a sixth chip set, the fourth chip set includes an IGBT chip and an FRD chip, the fifth chip set includes an IGBT chip and an FRD chip, and the sixth chip set includes two SIC chips.

[0022] In some embodiments, the upper bridge metal layer includes a first region, a second region and a third region arranged side by side along a first direction, the third region is located in the middle position between the first region and the second region, the first chip set is located in the first region, the second chip set is located in the second region, and the third chip set is located in the third region.

[0023] The lower bridge metal layer includes a fourth region, a fifth region and a sixth region arranged side by side along a first direction, the sixth region is located in the middle position between the fourth region and the fifth region, the fourth chip set is located in the fourth region, the fifth chip set is located in the fifth region, and the sixth chip set is located in the sixth region.

[0024] In some embodiments, the first region and the fourth region are arranged side by side in a second direction, the second region and the fifth region are arranged side by side in the second direction, and the third region and the sixth region are arranged side by side in the second direction; the first direction is perpendicular to the second direction.

[0025] In some embodiments, the distance between the two SIC chips in the third chip set is greater than a first distance.

[0026] In some embodiments, the distance between the two SIC chips in the sixth chip set is greater than a second distance.

[0027] In a second aspect, the disclosure also provides an electric drive device, including the power module as described in the first aspect.

[0028] In a third aspect, the disclosure also provides a vehicle, including the electric drive device as described in the second aspect.

[0029] Compared with the prior art, the technical scheme provided by the embodiments of the disclosure has the following advantages:

[0030] The power module provided by the embodiment of the present disclosure comprises a substrate and an electrical structure on the substrate, and the electrical structure comprises an upper bridge chip set, a lower bridge chip set, an upper bridge metal layer and a lower bridge metal layer; the upper bridge chip set and the lower bridge chip set each comprise an IGBT chip, an SIC chip and an FRD chip, the IGBT chip, the SIC chip and the FRD chip of the upper bridge chip set are connected with the upper bridge metal layer in parallel, and the IGBT chip, the SIC chip and the FRD chip of the lower bridge chip set are connected with the lower bridge metal layer in parallel. In this way, the IGBT chip, the SIC chip and the FRD chip are arranged in parallel in the upper bridge chip set and the lower bridge chip set. The IGBT chip and the SIC chip are mixedly applied, when the power module works normally, the advantages of small loss when the SIC chip is turned on and off and low small-current conduction loss can be exerted. At the same time, when the current is large, the advantages of small conduction loss pressure drop of the large-current SIC chip can be exerted, and the IGBT chip can bear more current, and the area of the IGBT chip is relatively large compared with the area of the SIC chip, which is beneficial to reduce the heat dissipation and further reduce the temperature of the power module when the current is large, and is beneficial to improve the demand of the power module for the current increasing large current and large power. In addition, while improving the demand of the power module for the current increasing large current and large power, the total occupied area of the chips in the power module is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0031] The drawings incorporated into the specification and forming a part thereof, illustrate embodiments consistent with the present disclosure and, together with the specification, serve to explain the principles of the present disclosure.

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced below. Obviously, for those skilled in the art, other drawings can also be obtained from these drawings without creative labor, wherein:

[0033] FIG. 1 is a structural schematic diagram of a power module provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] The embodiments of the present disclosure will be described in more detail below with reference to the drawings. Although some embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms, and should not be interpreted as being limited to the embodiments described herein, but rather, these embodiments are provided to more thoroughly and completely understand the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes, and are not intended to limit the protection scope of the present disclosure.

[0035] The term "including" and its variations used in this document are open inclusions, that is, "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one other embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the description below. It should be noted that the concepts of "first", "second", etc. mentioned in this disclosure are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units.

[0036] It should be noted that the modifications of "one" and "multiple" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, they should be understood as "one or more".

[0037] The power module provided by the embodiment of the present disclosure is configured by arranging an IGBT chip, a SIC chip and an FRD chip in parallel in the upper bridge chipset, and an IGBT chip, a SIC chip and an FRD chip in parallel in the lower bridge chipset. The mixed application of the IGBT chip and the SIC chip can take advantage of the low loss when turning on and off the SIC chip and the low conduction loss at low current when the power module is operating normally. At the same time, under high current conditions, the advantage of the low conduction loss voltage drop of the high current SIC chip can be taken advantage of, and the use of the IGBT chip can bear more current. At the same time, the area of ​​the IGBT chip is larger than that of the SIC chip, which is conducive to reducing heat resistance and further reducing the temperature of the power module when working at high current, which is conducive to improving the power module's demand for currently growing high current and high power. In addition, while improving the power module's demand for currently growing high current and high power, it is conducive to reducing the total occupied area of ​​the chip in the power module.

[0038] The power module provided by the embodiments of the present disclosure is exemplarily described below with reference to the accompanying drawings.

[0039] FIG1 is a schematic diagram of the structure of a power module provided by an embodiment of the present disclosure. As shown in FIG1 , the power module includes: a substrate 10 and an electrical structure located on substrate 10, the electrical structure comprising an upper bridge chipset, a lower bridge chipset, an upper bridge metal layer 16, and a lower bridge metal layer 17. The upper bridge chipset and the lower bridge chipset respectively include an IGBT chip 11, a SIC chip 13, and an FRD chip 12. The IGBT chip 11, SIC chip 13, and FRD chip 12 of the upper bridge chipset are connected in parallel and are respectively connected to the upper bridge metal layer 16. The IGBT chip 11, SIC chip 13, and FRD chip 12 of the lower bridge chipset are connected in parallel and are respectively connected to the lower bridge metal layer 17.

[0040] Specifically, the manner in which the IGBT chip 11, the SIC chip 13, and the FRD chip 12 of the upper bridge chip set are connected to the upper bridge metal layer 16 is not limited.

[0041] For example, the IGBT chip 11, the SIC chip 13, and the FRD chip 12 of the upper bridge chip set are soldered on the upper bridge metal layer 16.

[0042] The manner in which the IGBT chip 11, the SIC chip 13, and the FRD chip 12 of the lower bridge chip set are connected to the lower bridge metal layer 17 is not limited.

[0043] For example, the IGBT chip 11, the SIC chip 13, and the FRD chip 12 of the lower bridge chip set are soldered on the lower bridge metal layer 17.

[0044] The structural type of the electrical structure is not limited.

[0045] Illustratively, the electrical structure further includes a positive copper bar 14, a negative copper bar 15, and a phase copper bar 18; the upper bridge metal layer 16 is electrically connected to the positive copper bar 14, the upper surface of the IGBT chip 11, the SIC chip 13, and the FRD chip 12 in the upper bridge chip set, which is away from the upper bridge metal layer 16, is electrically connected to the phase copper bar 18; the upper surface of the IGBT chip 11, the SIC chip 13, and the FRD chip 12 in the lower bridge chip set, which is away from the lower bridge metal layer 17, is electrically connected to the negative copper bar 15, and the lower bridge metal layer 17 is also electrically connected to the phase copper bar 18.

[0046] Specifically, the metal regions shown in FIG. 1, i.e., the upper bridge metal layer 16, the lower bridge metal layer 17, the positive copper bar 14, the negative copper bar 15, and the phase copper bar 18, are formed by etching the copper layer on the substrate 10. A plurality of chips are arranged on the upper bridge metal layer 16 to form the upper bridge chip set, and a plurality of chips are arranged on the lower bridge metal layer 17 to form the lower bridge chip set. The upper bridge metal layer 16 is electrically connected to the positive copper bar 14, and the upper bridge metal layer 16 is electrically connected to the phase copper bar 18 through the chips arranged on the upper bridge metal layer 16; the lower bridge metal layer 17 is electrically connected to the negative copper bar 15, and the lower bridge metal layer 17 is electrically connected to the phase copper bar 18 through the chips arranged on the lower bridge metal layer 17.

[0047] IGBT chip 11, SIC chip 13 and FRD chip 12 in the upper bridge chip set are all welded on the upper bridge metal layer 16. Specifically, the welding surface (including the collector) of the IGBT chip 11 in the upper bridge chip set is welded on the upper bridge metal layer 16, the welding surface (including the drain) of the SIC chip 13 in the upper bridge chip set is welded on the upper bridge metal layer 16, and the welding surface (including the cathode) of the FRD chip 12 in the upper bridge chip set is welded on the upper bridge metal layer 16. The emitter on the upper surface of the IGBT chip 11, the anode on the upper surface of the FRD chip 12, and the source on the upper surface of the SIC chip 13 in the upper bridge chip set are all electrically connected with the positive copper bar 18.

[0048] IGBT chip 11, SIC chip 13 and FRD chip 12 in the lower bridge chip set are all welded on the lower bridge metal layer 17. Specifically, the welding surface (including the collector) of the IGBT chip 11 in the lower bridge chip set is welded on the lower bridge metal layer 17, the welding surface (including the drain) of the SIC chip 13 in the lower bridge chip set is welded on the lower bridge metal layer 17, and the welding surface (including the cathode) of the FRD chip 12 in the lower bridge chip set is welded on the lower bridge metal layer 17. The emitter on the upper surface of the IGBT chip 11, the anode on the upper surface of the FRD chip 12, and the source on the upper surface of the SIC chip 13 in the bridge chip set are all electrically connected with the negative copper bar 15.

[0049] In the working of the power module, the specific working process of the upper bridge chip set is as follows. Specifically, the positive electrode of the power supply flows into the current through the positive copper bar 14, the current flows into the upper bridge metal layer 16 electrically connected with the positive copper bar 14, the current in the upper bridge metal layer 16 flows into the collector on the lower surface of the IGBT chip 11 and flows out of the emitter on the upper surface of the IGBT chip 11 to the phase copper bar 18, the current in the upper bridge metal layer 16 flows into the drain on the lower surface of the SIC chip 13 and flows out of the source on the upper surface of the SIC chip 13 to the phase copper bar 18, and the current in the upper bridge metal layer 16 flows into the cathode on the lower surface of the FRD chip 12 and flows out of the anode on the upper surface of the FRD chip 12 to the phase copper bar 18. Thus, the current in the upper bridge metal layer 16 flows into the upper bridge chip set through the welding surface, i.e. the lower surface, of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the upper bridge chip set, and then flows out through the side, i.e. the upper surface, of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the upper bridge chip set away from the welding surface. Thus, when the upper bridge chip set is working, the current flowing into the upper bridge metal layer 16 through the positive copper bar 14 flows into the lower surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 welded in the upper bridge metal layer 16 in the vertical direction, flows out through the upper surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 to the phase copper bar 18, and then flows out through the phase copper bar 18.

[0050] Exemplarily, the first bonding wire 19 can be provided in the power module, and the first bonding wire 19 can be a Bonding wire. The upper surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the upper bridge chip set is electrically connected with the phase copper bar 18 through the first bonding wire 19, so that the upper surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the upper bridge chip set can be electrically connected with the phase copper bar 18 by providing the first bonding wire 19. At the same time, the first bonding wire 19 is electrically connected with the lower bridge metal layer 17.

[0051] In the working process of the power module, the specific working process of the lower bridge chip set is as follows. Specifically, the current in the phase copper bar 18 flows into the lower bridge metal layer 17 through the first bonding wire 19, the current in the lower bridge metal layer 17 flows into the collector on the lower surface of the IGBT chip 11 and flows out of the emitter on the upper surface of the IGBT chip 11 to the negative copper bar 15, the current in the lower bridge metal layer 17 flows into the drain on the lower surface of the SIC chip 13 and flows out of the source on the upper surface of the SIC chip 13 to the negative copper bar 15, and the current in the lower bridge metal layer 17 flows into the cathode on the lower surface of the FRD chip 12 and flows out of the anode on the upper surface of the FRD chip 12 to the negative copper bar 15. Thus, the current flowing into the lower bridge metal layer 17 flows in through the lower surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the lower bridge chip set, and then flows out through the upper surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the lower bridge chip set. Thus, when the lower bridge chip set is working, the current flowing into the lower bridge metal layer 17 through the phase copper bar 18 flows in along the vertical direction from the lower surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 welded in the lower bridge metal layer 17, flows out through the upper surface of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 to the negative copper bar 15 electrically connected to the IGBT chip 11, the SIC chip 13 and the FRD chip 12, and then flows into the power supply negative electrode through the negative copper bar 15.

[0052] Exemplarily, the second bonding wire 20 can be provided in the power module, the second bonding wire 20 can be a Bonding wire, and the upper surfaces of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the lower bridge chip set are electrically connected to the negative copper bar 15 through the second bonding wire 20. Thus, by providing the second bonding wire 20, the upper surfaces of the IGBT chip 11, the SIC chip 13 and the FRD chip 12 in the lower bridge chip set can be electrically connected to the negative copper bar 15.

[0053] Next, the beneficial effects of the power module provided by the embodiments of the present disclosure are exemplarily described in combination with the IGBT power module or SIC power module in the prior art, when the same number of IGBT chips and / or SIC chips are provided.

[0054] Exemplarily, the IGBT power module in the prior art provides four parallel IGBT chips in the upper bridge chip set and four parallel IGBT chips in the lower bridge chip set, and four FRD chips are required to match the upper bridge chip set and four FRD chips are required to match the lower bridge chip set. Exemplarily, the SIC power module in the prior art provides four parallel SIC chips in the upper bridge chip set and four parallel SIC chips in the lower bridge chip set.

[0055] Exemplarily, the embodiment of the present application can set the upper bridge chip set to include two IGBT chips and two SIC chips, and set the lower bridge chip set to include two IGBT chips and two SIC chips, while the upper bridge chip set needs to be matched with two FRD chips, and the lower bridge chip set needs to be matched with two FRD chips.

[0056] Therefore, compared with the prior art IGBT power module which sets four IGBT chips in the upper and lower bridge chip sets respectively, the power module provided by the embodiment of the present application sets two IGBT chips and two SIC chips in the upper and lower bridge chip sets respectively, since the area of the SIC chip is smaller than the area of the IGBT chip, and the number of FRD chips used in the embodiment of the present application is less than the number of FRD chips in the IGBT power module, thereby facilitating the reduction of the total area occupied by the chips. In addition, since the switching loss of the SIC chip is small, compared with the prior art IGBT power module which sets four IGBT chips in the upper and lower bridge chip sets respectively, the embodiment of the present application sets two IGBT chips and two SIC chips in the upper and lower bridge chip sets respectively, thereby facilitating the reduction of the switching loss.

[0057] Compared with the prior art SIC power module which sets four SIC chips in the upper and lower bridge chip sets respectively, the power module provided by the embodiment of the present application sets two IGBT chips and two SIC chips in the upper and lower bridge chip sets respectively, which can take advantage of the IGBT chip to bear more current, thereby facilitating the improvement of the current capacity, and at the same time, facilitating the reduction of the thermal resistance caused by the small area of the SIC chip. In addition, since the SIC chip is expensive, the power module provided by the embodiment of the present application can facilitate the reduction of the cost compared with the prior art SIC power module.

[0058] Therefore, the power module provided by the embodiment of the present application sets the IGBT chip, the SIC chip and the FRD chip in parallel in the upper bridge chip set, and sets the IGBT chip, the SIC chip and the FRD chip in parallel in the lower bridge chip set. The mixed application of the IGBT chip and the SIC chip can take advantage of the small loss when the SIC chip is turned on and off, and the low small-current conduction loss when the SIC chip is turned on. At the same time, in the large-current working condition, the large-current SIC chip can take advantage of the small conduction loss pressure drop, and the IGBT chip can bear more current, while the area of the IGBT chip is relatively larger than the area of the SIC chip, thereby facilitating the reduction of the heat resistance, further reducing the temperature of the power module in the large-current working condition, and facilitating the improvement of the demand of the power module for the current increasing large current and large power. In addition, while improving the demand of the power module for the current increasing large current and large power, the total area occupied by the chips in the power module can be reduced.

[0059] In some embodiments, as shown in FIG. 1, the IGBT chips 11 and the FRD chips 12 in the upper bridge chip set are arranged one-to-one, and the IGBT chips 11 and the FRD chips 12 in the lower bridge chip set are arranged one-to-one.

[0060] Specifically, the IGBT chips 11 and the FRD chips 12 are arranged one-to-one to ensure the normal turn-off of the IGBT chips 11. As shown in FIG. 1, the upper bridge chip set is exemplarily shown to include two IGBT chips 11, and correspondingly includes two FRD chips 12. In addition, the lower bridge chip set is exemplarily shown to include two IGBT chips 11, and correspondingly includes two FRD chips 12. The FRD chip 12 serves as a current discharge loop when the power module is turned off, and is used in conjunction with the IGBT chip 11 to provide freewheeling protection for the IGBT chip 11.

[0061] In some embodiments, continuing to refer to FIG. 1, the upper bridge chip set includes a first chip set 01, a second chip set 02, and a third chip set 03, the first chip set 01 includes an IGBT chip 11 and an FRD chip 12, the second chip set 02 includes an IGBT chip 11 and an FRD chip 12, and the third chip set 03 includes two SIC chips 13; the lower bridge chip set includes a fourth chip set 04, a fifth chip set 05, and a sixth chip set 06, the fourth chip set 04 includes an IGBT chip 11 and an FRD chip 12, the fifth chip set 05 includes an IGBT chip 11 and an FRD chip 12, and the sixth chip set 06 includes two SIC chips 13.

[0062] Specifically, as shown in FIG. 1, the upper bridge chip set includes two IGBT chips 11, two SIC chips 13, and two FRD chips 12. Among them, one IGBT chip 11 and one FRD chip 12 in the upper bridge chip set can constitute the first chip set 01, the other IGBT chip 11 and the other FRD chip 12 can constitute the second chip set 02, and the two SIC chips 13 can constitute the third chip set 03.

[0063] Specifically, as shown in FIG. 1, the lower bridge chip set includes two IGBT chips 11, two SIC chips 13, and two FRD chips 12. Among them, one IGBT chip 11 and one FRD chip 12 in the lower bridge chip set can constitute the fourth chip set 04, the other IGBT chip 11 and the other FRD chip 12 can constitute the fifth chip set 05, and the two SIC chips 13 can constitute the sixth chip set 06.

[0064] It should be noted that the number of IGBT chips 11 and SIC chips 13 in the upper bridge chip set is not limited, and the number of IGBT chips 11 and SIC chips 13 in the upper bridge chip set is not limited.

[0065] In some embodiments, continuing to refer to FIG. 1, the upper bridge metal layer 16 includes a first area 011, a second area 012 and a third area 013 arranged side by side along the first direction (X direction in the figure). The third area 013 is located in the middle position between the first area 011 and the second area 012.

[0066] Specifically, in combination with the above, the first chip set 01 is arranged in the first area 011, the second chip set 02 is arranged in the second area 012, and the third chip set 03 is arranged in the third area 013. The third area 013 is located in the middle between the first area 011 and the second area 012.

[0067] Therefore, the two SIC chips 13 in the upper bridge chip set are placed in the middle of the two IGBT chips 11, which can realize that the two IGBT chips 11 are located on both sides of the SIC chip 13, so as to ensure that the two IGBT chips 11 in the upper bridge chip set maintain a relatively far distance, which is beneficial to reduce the thermal coupling between the two IGBT chips 11, and further reduce the maximum junction temperature of the IGBT chip 11 under large current working conditions.

[0068] In some embodiments, continuing to refer to FIG. 1, the lower bridge metal layer 17 includes a fourth area 014, a fifth area 015 and a sixth area 016 arranged side by side along the first direction (X direction in the figure). The fourth area 014 and the fifth area 015 are located on opposite sides of the lower bridge metal layer 17, and the sixth area 016 is located in the middle position between the fourth area 014 and the fifth area 015.

[0069] Specifically, in combination with the above, the fourth chip set 04 is arranged in the fourth area 014, the fifth chip set 05 is arranged in the fifth area 015, and the sixth chip set 06 is arranged in the sixth area 016. The sixth area 016 is located in the middle position between the fourth area 014 and the fifth area 015.

[0070] Therefore, the two SIC chips 13 in the lower bridge chip set can be placed in the middle of the two IGBT chips 11, which can realize that the two IGBT chips 11 are located on both sides of the SIC chip 13, so as to ensure that the two IGBT chips 11 in the upper bridge chip set maintain a relatively far distance, which is beneficial to reduce the thermal coupling between the two IGBT chips 11, and further reduce the maximum junction temperature of the IGBT chip 11 under large current working conditions.

[0071] In some embodiments, continuing to refer to FIG. 1, the first region 011 and the fourth region 014 are arranged side by side along the second direction (shown as the Y direction in the figure), the second region 012 and the fifth region 015 are arranged side by side along the second direction (shown as the Y direction in the figure), and the third region 013 and the sixth region 016 are arranged side by side along the second direction (shown as the Y direction in the figure). The first direction is perpendicular to the second direction.

[0072] Specifically, the chips in the first region 011 and the chips in the fourth region 014 are arranged in the same direction, the chips in the second region 012 and the chips in the fifth region 015 are arranged in the same direction, and the chips in the third region 013 and the chips in the sixth region 016 are arranged in the same direction. Such arrangement of the IGBT chips 11, the SIC chips 13, and the FRD chips 12 in the upper bridge chip set and the lower bridge chip set is conducive to optimizing the layout space and optimizing the layout of the power module.

[0073] In addition, the chips of the same type in the first region 011 and the fourth region 014 are symmetrically arranged along the second direction, and the chips of the same type in the third region 013 and the sixth region 016 are symmetrically arranged along the second direction.

[0074] For example, as shown in FIG. 1, one IGBT chip 11 in the first region 011 and one IGBT chip 11 in the fourth region 014 are symmetrically arranged, and one FRD chip 12 in the first region 011 and one FRD chip 12 in the fourth region 014 are symmetrically arranged; one IGBT chip 11 in the second region 012 and one IGBT chip 11 in the fifth region 015 are symmetrically arranged, and one FRD chip 12 in the second region 012 and one FRD chip 12 in the fifth region 015 are symmetrically arranged.

[0075] The distance between the two SIC chips 13 in the third chip set 03 is greater than the first distance, and the distance between the two SIC chips 13 in the sixth chip set 06 is greater than the second distance.

[0076] Specifically, the distance between the two SIC chips 13 in the third chip set 03 is greater than the first distance, so that the distance between the two SIC chips 13 in the third chip set 03 is kept as far as possible, and the thermal coupling between the two SIC chips 13 in the third chip set 03 is reduced.

[0077] Specifically, the distance between the two SIC chips 13 in the sixth chip set 06 is greater than the second distance, so that the distance between the two SIC chips 13 in the sixth chip set 06 is kept as far as possible, and the thermal coupling between the two SIC chips 13 in the sixth chip set 06 is reduced.

[0078] The first distance and the second distance can be equal or not equal, and the specific setting data of the first distance and the second distance can be set according to the layout of the power module provided in the embodiments of the present disclosure, which is not limited herein.

[0079] It should be noted that the power module provided in the embodiments of the present disclosure mainly relies on the FRD chip 12 and the SIC chip 13 to freewheel when encountering reverse freewheeling conditions, power generation conditions and locked-rotor conditions. Among them, the FRD chip 12 and the SIC chip 13 are connected in parallel to further reduce the voltage drop in the power generation and freewheeling stages, and at the same time improve the current capacity in the locked-rotor condition.

[0080] On the basis of the above-mentioned embodiments, the present disclosure further provides an electric drive device comprising the power module as described in the above-mentioned embodiments, thus having the same or similar beneficial effects, which will not be described herein.

[0081] On the basis of the above-mentioned embodiments, the present disclosure further provides a vehicle comprising the electric drive device as described in the above-mentioned embodiments, thus having the same or similar beneficial effects, which will not be described herein.

[0082] In other embodiments, the vehicle can further include a cockpit system, a drive system, and other structural or functional systems or components, which will not be described herein and are not limited.

[0083] It should be noted that in this document, relational terms such as "first" and "second", and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the statement "comprising a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0084] The above is only a specific implementation of the present disclosure, enabling those skilled in the art to understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to these embodiments described herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power module comprising a substrate and an electrical structure located on the substrate, wherein the electrical structure comprises an upper bridge chipset, a lower bridge chipset, an upper bridge metal layer, and a lower bridge metal layer; The upper bridge chipset and the lower bridge chipset respectively include an IGBT chip, a SIC chip and an FRD chip. The IGBT chip, the SIC chip and the FRD chip of the upper bridge chipset are connected in parallel and are respectively connected to the upper bridge metal layer. The IGBT chip, the SIC chip and the FRD chip of the lower bridge chipset are connected in parallel and are respectively connected to the lower bridge metal layer.

2. The power module according to claim 1, wherein the IGBT chip, the SIC chip, and the FRD chip in the upper bridge chipset are soldered on the upper bridge metal layer; and / or The IGBT chip, the SIC chip, and the FRD chip in the lower bridge chipset are welded on the lower bridge metal layer.

3. The power module according to claim 1 or 2, wherein the electrical structure further comprises: Positive copper busbar, negative copper busbar and phase copper busbar; The upper bridge metal layer is electrically connected to the positive copper busbar, and the IGBT chip, the SIC chip, and the FRD chip in the upper bridge chipset are electrically connected to the phase copper busbar on a side away from the upper bridge metal layer; The IGBT chip, the SIC chip and the FRD chip in the lower bridge chipset are electrically connected to the negative copper busbar on one side away from the lower bridge metal layer, and the lower bridge metal layer is also electrically connected to the phase copper busbar.

4. The power module according to claim 3, further comprising: a first bond wire and a second bond wire; The IGBT chip, the SIC chip, and the FRD chip in the upper bridge chipset are electrically connected to the phase copper busbar via the first bonding wire on a side away from the upper bridge metal layer, and the first bonding wire is also electrically connected to the lower bridge metal layer; A side of the IGBT chip, the SIC chip, and the FRD chip in the lower bridge chipset away from the lower bridge metal layer is electrically connected to the negative copper busbar through the second bonding wire.

5. The power module according to any one of claims 1 to 4, wherein the IGBT chip and the FRD chip in the upper bridge chipset are arranged in a one-to-one correspondence; and the IGBT chip and the FRD chip in the lower bridge chipset are arranged in a one-to-one correspondence.

6. The power module according to any one of claims 1 to 5, wherein the upper bridge chipset comprises a first chipset, a second chipset, and a third chipset, the first chipset comprises an IGBT chip and an FRD chip, the second chipset comprises an IGBT chip and an FRD chip, and the third chipset comprises two SIC chips; The lower bridge chipset includes a fourth chipset, a fifth chipset, and a sixth chipset. The fourth chipset includes an IGBT chip and an FRD chip. The fifth chipset includes an IGBT chip and an FRD chip. The sixth chipset includes two SIC chips.

7. The power module according to claim 6, wherein the upper bridge metal layer comprises a first area, a second area, and a third area arranged side by side along a first direction, the third area is located in the middle between the first area and the second area, the first chipset is located in the first area, the second chipset is located in the second area, and the third chipset is located in the third area; The lower bridge metal layer includes a fourth area, a fifth area and a sixth area arranged side by side along a first direction, the sixth area is located in the middle position between the fourth area and the fifth area, the fourth chipset is located in the fourth area, the fifth chipset is located in the fifth area, and the sixth chipset is located in the sixth area.

8. The power module according to claim 7, wherein the first area and the fourth area are located side by side in the second direction, the second area and the fifth area are located side by side in the second direction, and the third area and the sixth area are located side by side in the second direction; and the first direction is perpendicular to the second direction. 9 . The power module according to claim 7 , wherein the distance between the two SIC chips in the third chipset is greater than the first distance. 10 . The power module according to claim 7 , wherein the distance between two SIC chips in the sixth chipset is greater than the second distance.

11. An electric drive device comprising the power module according to any one of claims 1 to 10.

12. A vehicle comprising the electric drive device according to claim 11.

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