Pulse machining control device

Abstract

Provided is a pulse machining control device for controlling machining performed by a plurality of periodic pulse-shaped outputs in synchronization with a clock pulse, the pulse machining control device comprising: an output setting value acquisition unit that acquires a plurality of output setting values for respectively determining the frequency or period of the plurality of pulse-shaped outputs; a clock cycle acquisition unit that acquires the cycle of the clock pulses; a relationship determination unit that determines a numerical relationship between the plurality of output setting values; and a count number determination unit that determines a plurality of clock counts, which are the number of clock pulses for one cycle of the pulse-shaped output according to the output setting values, so as to satisfy the numerical relationship.

Description

Pulse processing control device

[0001] The present invention relates to a pulse processing control device.

[0002] Techniques for processing metals using multiple outputs, each output in a pulsed form, are known. For example, one technique improves processing efficiency by superimposing and irradiating multiple laser beams with different wavelengths or intensity distributions (see, for example, Patent Document 1). As a specific example, a pulsed laser beam with a wavelength easily absorbed by a solid metal material is used to form a molten metal pool on the material surface, and then pulsed laser beams with wavelengths easily absorbed by the molten metal material are used to further heat the molten metal material, thereby efficiently welding, cutting, and other processing of the metal material. As another example, some plasma processing devices have a main pulsed power supply for generating a processing arc discharge and a plasma pulsed power supply for generating plasma, which are independent of each other.

[0003] JP 2008-44000 A

[0004] When using multiple pulse outputs, it may be desirable to synchronize the starting points of the output cycles of the multiple pulses, i.e., to maintain a constant time offset between the outputs of the multiple pulses. Generally, a control device operates in synchronization with a clock pulse, and the pulse output is turned on and off when the clock pulse count reaches a set value. When the output frequency is set in the control device, a fractional part may be generated when converting one output cycle into the number of clock pulses, and the set value for the clock pulse count may be rounded up or down. This rounding error of less than one clock pulse accumulates as the output cycle is repeated, and may cause a non-negligible offset relative to other output cycles. Therefore, a technology for preventing timing offsets between multiple pulse outputs is desired.

[0005] A pulse processing control device according to one embodiment of the present disclosure is a pulse processing control device that controls processing performed by a plurality of periodic pulsed outputs in synchronization with a clock pulse, and includes an output setting value acquisition unit that acquires a plurality of output setting values ​​that respectively determine the frequency or period of the plurality of pulsed outputs, a clock period acquisition unit that acquires the period of the clock pulse, a relationship determination unit that determines the numerical relationship between the plurality of output setting values, and a count number determination unit that determines a plurality of clock count numbers, which are the number of clock pulses for one period of the pulsed output that each conform to the output setting value, so as to satisfy the numerical relationship.

[0006] It is a block diagram showing the configuration of a pulse processing control device according to an embodiment of the present disclosure.It is a flowchart showing the flow of control by the pulse processing control device of Figure 1. It is a flowchart showing the flow of an alternative control by the pulse processing control device of Figure 1.

[0007] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will now be described with reference to the accompanying drawings. Fig. 1 is a block diagram showing the configuration of a pulse processing control device 1 according to an embodiment of the present disclosure.

[0008] The pulse processing control device 1 controls processing performed by a plurality of periodic pulsed outputs synchronized with a clock pulse. The plurality of pulsed outputs may be, for example, a plurality of coaxially irradiated laser outputs with different wavelengths or output profiles. In other words, the pulse processing control device 1 may control a laser processing device.

[0009] The pulse processing control device 1 can be realized by one or more computers having a memory, a processor, an input / output interface, etc., and executing an appropriate control program. The pulse processing control device 1 includes an output set value acquisition unit 11, a clock period acquisition unit 12, a relationship determination unit 13, a count number determination unit 14, and an output command generation unit 15. Each component of the pulse processing control device 1 categorizes the function of the pulse processing control device 1, and does not necessarily have to be clearly distinguishable in terms of physical configuration and program configuration.

[0010] The output set value acquisition unit 11 acquires a plurality of output set values ​​that respectively define the frequencies or periods of the plurality of pulse outputs. The output set value acquisition unit 11 may be configured to accept input of the output set values ​​via an input device or a communication line. Alternatively, the output set value acquisition unit 11 may be configured to analyze a machining program that describes the details of the machining to be performed and set the plurality of output set values.

[0011] The output set value acquisition unit 11 may set each output set value using one reference value and a set value ratio to the reference value. By setting each output set value as a ratio to the reference value, the relationship between multiple output set values ​​becomes clear. Note that the reference value may be any of the output set values.

[0012] The clock cycle acquisition unit 12 acquires the cycle of the clock pulse. The clock cycle acquisition unit 12 may calculate the reciprocal of the clock frequency, or may refer to a clock cycle stored in advance.

[0013] The relationship determination unit 13 determines a numerical relationship between the multiple output setting values ​​set by the output setting value acquisition unit 11. The numerical relationship is preferably expressed by an integer having fewer significant digits than the output setting values. For example, the relationship determination unit 13 may be configured to calculate a multiple of each output setting value relative to a reference value. When the output setting values ​​are set by a reference value and a setting value ratio, the relationship determination unit 13 may be configured to acquire the setting value ratio. The reference value may be a fixed value, a value input by a user, or a value calculated based on the output setting value and other machining conditions. The relationship determination unit 13 may be configured to use one of the output setting values ​​as a reference value and calculate a multiple of another output setting value relative to one reference output setting value. For example, the reference value may be an output setting value of a predetermined pulsed output, the minimum value of multiple output setting values, or the like.

[0014] Furthermore, the relationship determination unit 13 may calculate the least common multiple or greatest common divisor of the plurality of output setting values ​​as a value representing the numerical relationship between the plurality of output setting values. In addition, the relationship determination unit 13 may calculate a multiple or divisor of the least common multiple or greatest common divisor of the plurality of output setting values. In particular, it is preferable that the relationship determination unit 13 calculates the least common multiple of the frequencies indicated by the plurality of output setting values ​​and respective scaling factors of this least common multiple with respect to the frequencies indicated by the plurality of output setting values.

[0015] The count number determination unit 14 determines a plurality of clock count numbers, each of which is the number of clock pulses for one cycle of the pulsed output according to the output set value, so as to satisfy the numerical relationship determined by the relationship determination unit 13. As a result, the reset timings of the clock count numbers frequently coincide while counting the plurality of clock count numbers is repeated.

[0016] The count number determination unit 14 may be configured to calculate multiple original count numbers by dividing one period indicated by the multiple output setting values ​​by the period of the clock pulse, and then to obtain multiple clock count numbers by correcting the original count numbers so as to satisfy the numerical relationship determined by the relationship determination unit 13.

[0017] 2 shows a procedure for determining the clock count number in the pulse processing control device 1 when the count number determination unit 14 determines the clock count number by calculating and correcting the original count number. The procedure for determining the clock count number in Fig. 2 includes a step of acquiring an output set value (step S01), a step of acquiring a clock period (step S02), a step of determining a numerical relationship (step S03), a step of calculating the original count number (step S04), a step of checking whether the relationship between the original counts satisfies the numerical relationship (step S05), and a step of correcting the original count number (step S06).

[0018] In step S01, the process of acquiring the output set values, the output set value acquiring unit 11 acquires the output set value 1 and the output set value 2, which respectively determine the frequencies of the two pulse outputs. Note that the output set value 1 is smaller than the output set value 2. In this example, the description will be given assuming that the output set value 1 is 1000 [Hz] and the output set value 2 is 3000 [Hz].

[0019] In the process of acquiring the clock period in step S02, the period of the clock pulse is acquired by the clock period acquisition unit 12. Here, the clock period is 1.0 μsec (1×10 －６ sec).

[0020] In the process of determining the numerical relationship in step S03, the multiple of the output setting value 2 relative to the output setting value 1 is calculated as the numerical relationship. The multiple is 3000 / 1000=3.

[0021] In the process of calculating the original count number in step S04, the original count number 1 and the original count number 2 are calculated from the output setting value 1, the output setting value 2, and the clock period. The original count number 1 is calculated as (1 / 1000) / (1×10 －６ ) = 1000, the original count number 2 is (1 / 3000) / (1 x 10 －６ ) = 333 (rounded down).

[0022] In step S05, a step of checking whether the relationship between the original counts satisfies the numerical relationship, it is checked whether the multiple of original count 2 relative to original count 1 satisfies the numerical relationship. In other words, it is checked whether (original count 1) and (original count 2) x (multiple) match. In this example, 333 x 3 = 999 ≠ 1000, so the numerical relationship is not satisfied.

[0023] If the relationship between original count number 1 and original count number 2 satisfies the numerical relationship in step S05, original count number 1 and original count number 2 are set as clock count number 1 and clock count number 2 to be used for actual control. If the relationship between original count number 1 and original count number 2 does not satisfy the numerical relationship in step S05, original count number 1 is corrected in step S06 to obtain clock count number 1.

[0024] In the process of correcting the original count number in step S06, the value of clock count number 1 is changed to a value obtained by multiplying original count number 2 by a multiple. In this example, the value of clock count number 1 is corrected to 333 x 3 = 999. As a result, one cycle of the pulsed output according to output setting value 1 and three cycles of the pulsed output according to output setting value 2 perfectly match with each other, without a deviation of even one clock pulse.

[0025] 2, the count number determination unit 14 may directly calculate a plurality of clock count numbers that satisfy a numerical relationship based on a plurality of output setting values ​​and count periods. As a specific example, the count number determination unit 14 may calculate a base count number that corresponds to one period of the least common multiple of the frequencies indicated by the plurality of output setting values, and multiply the base count number by each magnification factor for the least common multiple of the plurality of output setting values ​​to determine each clock count.

[0026] 3 shows a procedure for determining the count number in the pulse processing control device 1 when the least common multiple is used as the numerical relationship. The procedure for determining the clock count number in FIG. 3 includes a step of acquiring an output set value (step S11), a step of acquiring a clock period (step S12), a step of determining the numerical relationship (step S13), and a step of calculating the clock count number (step S14).

[0027] In step S11, the process of acquiring the output set values, output set value 1 and output set value 2, which respectively determine the frequencies of the two pulse output signals, are acquired by the output set value acquisition unit 11. In this example, the output set value 1 is 800 [Hz] and the output set value 2 is 600 [Hz].

[0028] In the step of acquiring the clock period in step S12, the period of the clock pulse is acquired by the clock period acquisition unit 12. Here, the clock period is 1.0 μsec (1×10 －６ sec).

[0029] In the process of determining the numerical relationship in step S13, the least common multiple of the output setting value 1 and the output setting value 2 and the scaling factor of the least common multiple for the output setting value 1 and the output setting value 2 are calculated as the numerical relationship. In this example, the least common multiple is 2400 [Hz], the scaling factor of the least common multiple for the output setting value 1 is 3, and the scaling factor for the output setting value 1 is 4.

[0030] In the step of calculating the clock count number in step S14, first, a base count number corresponding to one cycle of the least common multiple frequency is calculated, and the value obtained by multiplying this base count number by the multiple is set as each clock count number. In this example, the base count number corresponding to one cycle of the least common multiple 2400 [Hz] is (1 / 2400) / (1×10 －６ ) = 416 (fractions rounded down). Clock count number 1 corresponding to output setting value 1 is 416 x 3 = 1248, and clock count number 2 corresponding to output setting value 2 is 416 x 4 = 1664. Note that the base count may be rounded up to 417, with clock count number 1 being 1251 and clock count number 2 being 1668. This ensures that three periods of the pulsed output according to output setting value 1 and four periods of the pulsed output according to output setting value 2 perfectly match.

[0031] The output command generator 15 generates a plurality of output commands that respectively specify the output states of a plurality of pulse-like outputs. The output command generator 15 counts clock pulses and repeatedly changes the value of the output command for each corresponding clock count number.

[0032] As described above, the pulse processing control device 1 determines the numerical relationship of the multiple clock count numbers that switch the state of the multiple pulsed outputs in accordance with the numerical relationship of the output setting values, so even if the output cycle of the pulsed outputs is repeated, no phase shift occurs between the pulsed outputs, and therefore the intended processing can be performed accurately.

[0033] The following supplementary note is further disclosed regarding the above-described embodiment and modified examples: (Supplementary Note 1) A pulse processing control device (1) controls processing performed by a plurality of periodic pulsed outputs in synchronization with clock pulses, and includes an output set value acquisition unit (11) that acquires a plurality of output set values ​​that respectively determine the frequencies or periods of the plurality of pulsed outputs, a clock period acquisition unit (12) that acquires the periods of the clock pulses, a relationship determination unit (13) that determines a numerical relationship between the plurality of output set values, and a count number determination unit (14) that determines a plurality of clock count numbers, each of which is the number of clock pulses for one period of the pulsed output according to the output set values, so as to satisfy the numerical relationship.

[0034] (Supplementary Note 2) In the pulse processing control device (1) of Supplementary Note 1, the count number determination unit (14) may calculate a plurality of original count numbers by dividing one period indicated by a plurality of output setting values ​​by the period of the clock pulse, and then correct the original count numbers to obtain a plurality of clock count numbers.

[0035] (Supplementary Note 3) In the pulse processing control device (1) of Supplementary Note 1 or 2, the output set value acquisition unit (11) may calculate each output set value using one reference value and a set value ratio to the reference value.

[0036] (Supplementary Note 4) In the pulse processing control device (1) of Supplementary Notes 1 to 3, the relationship determining unit (13) may calculate a multiple of one reference output set value with respect to another output set value.

[0037] (Supplementary Note 5) In the pulse processing control device (1) of Supplementary Notes 1 to 3, the relationship determining unit (13) may calculate the least common multiple or greatest common divisor of a plurality of output set values.

[0038] (Supplementary Note 6) In the pulse processing control device (1) of Supplementary Notes 1 to 3, the relationship determination unit (13) may calculate the least common multiple of the frequencies indicated by the plurality of output setting values ​​and respective scaling factors of the least common multiples with respect to the frequencies indicated by the plurality of output setting values.

[0039] (Supplementary Note 7) In the pulse processing control device (1) of Supplementary Notes 1 to 6, each of the plurality of pulsed outputs may be a laser output.

[0040] Although the present disclosure has been described in detail above, the present disclosure is not limited to the individual embodiments described above. Various additions, substitutions, modifications, partial deletions, etc. are possible in these embodiments without departing from the gist of the present disclosure or the spirit of the present disclosure derived from the content of the claims and their equivalents. These embodiments can also be implemented in combination. For example, in the above-described embodiments, the order of each operation and the order of each process are shown as examples and are not limited to these. The same applies when numerical values ​​or mathematical expressions are used in the description of the above-described embodiments.

[0041] REFERENCE SIGNS LIST 1 Pulse processing control device 11 Output set value acquisition unit 12 Clock period acquisition unit 13 Relationship determination unit 14 Count number determination unit 15 Output command generation unit

Claims

1. A pulse processing control device that controls processing performed by a plurality of periodic pulsed outputs in synchronization with a clock pulse, comprising: an output set value acquisition unit that acquires a plurality of output set values ​​that respectively determine the frequency or period of the plurality of pulsed outputs; a clock period acquisition unit that acquires the periods of the clock pulses; a relationship determination unit that determines the numerical relationship between the plurality of output set values; and a count number determination unit that determines a plurality of clock count numbers, which are the number of clock pulses for one period of the pulsed output that each conform to the output set value, so as to satisfy the numerical relationship.

2. The pulse processing control device according to claim 1, wherein the count number determination unit calculates a plurality of original count numbers by dividing one period indicated by the plurality of output setting values ​​by the period of the clock pulse, and then obtains the plurality of clock count numbers by correcting the original count numbers.

3. A pulse processing control device as described in claim 1 or 2, wherein the output set value acquisition unit calculates each output set value based on one reference value and a set value ratio relative to said reference value.

4. A pulse processing control device according to any one of claims 1 to 3, wherein the relationship determining unit calculates a multiple of one of the reference output set values ​​relative to another of the output set values.

5. A pulse processing control device according to any one of claims 1 to 3, wherein the relationship determining unit calculates the least common multiple or greatest common divisor of the plurality of output setting values.

6. A pulse processing control device as described in any one of claims 1 to 3, wherein the relationship determination unit calculates the least common multiple of the frequencies indicated by the multiple output setting values ​​and the respective multiplication factors of the least common multiples with respect to the frequencies indicated by the multiple output setting values.

7. A pulse processing control device according to any one of claims 1 to 6, wherein each of the plurality of pulsed outputs is a laser output.

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