Semiconductor power connection provided through discrete isolated heatsinks

Abstract

An inverter includes a PCB and multiple semiconductors attached thereto. The semiconductors have a pad that is electrically and thermally conductive. Heatsinks are attached to the pad for dispersing heat generated by the semiconductors. The heatsinks also conduct current from the DC power source and transfer current to the various motor phases depending on the control of the semiconductors. The collector terminal of the high side semiconductors is unused. The collector terminal of the low side semiconductors is connected to the emitter terminal of the high side semiconductor, and the current received at the low side collector terminal flows into the pad and into the heat sink attached to the low side semiconductors. Each of the pads of the high side semiconductors may be attached to the same heatsink, or separate heat sinks for the high side semiconductor sets may be connected to the DC power source in parallel.

Description

SEMICONDUCTOR POWER CONNECTION PROVIDED THROUGHDISCRETE ISOLATED HEATSINKSCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This PCT International Application claims the benefit of U.S. Provisional Patent Application No. 63 / 634,992, filed April 17, 2024, the entire content of which is hereby incorporated by reference in its entirety.FIELD

[0002] The present disclosure relates to a heat sink for a power semiconductor device which is utilized to conduct heat away from the semiconductor and to transmit electrical power to or from the semiconductor.BACKGROUND

[0003] This section provides background information related to the present disclosure which is not necessarily prior art.

[0004] To provide power to electric motors, an inverter is used for receiving direct current (DC) from a source, typically a battery, and provides alternating current (AC) to an electric motor to drive the motor in a controllable manner. The inverter includes a plurality of parallel pairs of semiconductor switches, where pairs of the semiconductor switches are configured to apply an alternating current (AC) to the electric motor based on the switching frequency of the semiconductor switches, resulting in variable motor rotational speed and control of the power provided by the motor. Many three-phase inverters use insulated gate bipolar transistors (IGBTs) in applications to provide the variable frequency output to control the motor. Each phase of a three-phase inverter may use six semiconductor switches in total, with two per phase, or may utilize two high-side and two low-side IGBT semiconductors for twelve total semiconductors to apply an alternating positive and negative voltage to the motor coils. In the example provided in the present disclosure, an inverter utilizing four semiconductors per phase is provided, but the aspects of the present disclosure may be applied to either arrangement (two semiconductors per phase or four semiconductors per phase), and other arrangements in a similar manner. Pulse-width modulation (PWM) is utilized to control the output current.

[0005] An insulated-gate bipolar transistor (IGBT) is a three-terminal power semiconductor device primarily forming an electronic switch. The IGBT has collector and emitter terminals, where the actual current flows, and an insulated gate terminal for controlling the device on and off. Heat generation occurs in the semiconductor due to device-on resistance and switching characteristics. A significant amount of heat may be generated due to handling high currents by the IGBTs. These IGBTs are mounted to a printed circuit board (PCB), where electrical traces are provided in the PCB to electrically connect to the terminals. Prior solutions for providing the electrical connections from the PCB to the IGBT include routing respective PCB traces in convenient locations on the PCB and attaching (by soldering or other method) the IGBT terminals to the PCB. The PCB may further include features to mechanically attach a high-voltage DC+ connection and U / V / W eMotor phase connections. These connections may be achieved by assembling the cable lug onto the mechanical PCB attachment. The arrangement of the PCB must be carefully designed to ensure that signals are electrically isolated from one another. This is typically accomplished by using appropriate creepage and clearance design parameters within the PCB itself, and high-voltage isolation paper or interface materials for the cables or other components external to the PCB traces.

[0006] To dissipate the heat created by the switching and transferring high current, the inverter switches are typically connected to a heatsink via their TAB connection (which is electrically equivalent to the collector pin). The TAB connection is an electrically and thermally conductive surface on one face of the semiconductor body. These switches need to be kept electrically isolated from one another, and therefore often use an electrically isolating interface material between each switch’s TAB connection and the chosen heatsink (if the heatsink is shared among other switches, e.g. housing wall, cold plate, heat spreader, etc.). The semiconductor switches rely on the TAB connection to the heatsink in order to dissipate heat. When there is another component placed between these surfaces (e.g. electrically-isolating thermal interface material “TIM”), to provide the electrical isolation then the cooling performance is reduced, leading to reduction in total current transmitted to the electric motor.

[0007] Such a traditional arrangement may result in a larger PCB package size due to the need for routing all of the signals within the PCB towards a proper location for mechanical joining of electrical connections to motor phases or battery power via cables or busbars. The traces for these high current transmitting signals are the largest ones on the PCB, both wider and containing more layers, and must also be separated from one another according to creepage and clearance specifications, requiring extra routing space and an increased footprint, thereby increasing the space required and overall cost due to additional material usage. As an example, additional copper may be required in the PCB for properly laying out the traces and sizing them for the power requirements. When longer leads are required to bring the traces to an acceptable location for the mechanical attachments, this increased length increases parasitic inductance. Increased parasitic inductance causes an increase in voltage overshoot and ringing at the switches. When overshoot exceeds the switches acceptable range, the switch will fail. To prevent this failure, overshoot canbe reduced by decreasing switching speed. However, reducing switching speed will increase switching losses, and therefore increases the thermal loading. This results in a reduction in total current transmitted to the electric motor.

[0008] Reduction in overall PCB size, reduction of the quantity of components for the mechanical attachment of each signal to the PCB, elimination of isolation paper for each switch, and a larger or higher-efficiency thermal management device or heatsink are areas of optimization provided by the present disclosure.SUMMARY

[0009] This section provides a general summary of the many aspects associated with the inventive concepts embodied in the teachings of the present disclosure and is not intended to be considered a complete listing of its full scope of protection nor all of its features and advantages.

[0010] The heat sink of the present disclosure is directly connected to the semiconductor device on an external electrically and thermally conductive surface of the semiconductor. An arrangement of heat sinks is utilized to provide an electrical connection for high-voltage DC positive power and U / V / W eMotor phases, via mechanical connections through the heatsink, while providing the required electrical isolation between the separate heatsinks and connections. The aspects of the present disclosure achieve an optimized printed circuit board and inverter arrangement due to reduced complexity by using heat sinks with dual functionality. Multiple embodiments of a three-phase inverter arrangement utilizing the heat sink of the present disclosure will be provided.

[0011] It is an aspect of the present disclosure to provide a heat sink for a power semiconductor device which is utilized to conduct heat away from the semiconductor and also utilized to transmit electrical power to or from the semiconductor.

[0012] In another aspect, the heat sink is directly connected to the semiconductor device on an externally electrically and thermally conductive surface of the semiconductor.

[0013] In another aspect, the electrical connections for high-voltage DC power and U / V / W eMotor phase connections are directly connected to the heatsink.

[0014] It is a related aspect of the present disclosure to provide a three-phase inverter with high- and low-side IGBTs, where heat sinks are arranged to provide thermal and electrical conductivity between connections while providing isolation to separate the high-voltage DC power and the U / V / W eMotor phase connections made to the heat sinks.

[0015] In another aspect, the heat sink is made of a thermally and electrically conductive material such as aluminum or copper or an assembly of differing materials.

[0016] It is an aspect of the present disclosure to provide a three-phase inverter arrangement utilizing the proposed heat sink, where a single heat sink is provided for the high side voltage DC power connection and the high side semiconductors, and three individual heat sinks for the U / V / W eMotor phase connections and respective low side semiconductors in a row aligned configuration.

[0017] It is an aspect of the present disclosure to provide a three-phase inverter arrangement utilizing the proposed heat sink, where three separate heat sinks for the high-voltage DC power connection and semiconductors are provided, and three additional individual heat sinks for the U / V / W eMotor phase connections and semiconductors are arranged in a column configuration.

[0018] The present disclosure provides improvements to the overall PCB package size, because traces within the PCB may be eliminated and optimized. Traces traditionally provided to connect the switches to an acceptable location for mechanical attachment of the signals, cables, or busbars are eliminated. Conductor traces within the PCB are also eliminated. This elimination of these connection is achieved because these connections are now made directly to the heatsink, which is electrically connected to the semiconductor body. Without the additional traces, the PCB will contain less copper, thereby reducing material and manufacturing cost. With the reduced traces in the PCB, there is less parasitic inductance and therefore improved switching characteristics for the overall arrangement. The arrangement of the present disclosure allows for faster switching speed and therefore fewer switching losses, which further improves cooling performance. Because the connections for DC voltage and motor phases are made via the heatsink, which is an already required and existing component, no additional components are needed on the PCB for mechanical attachment. With the elimination of isolation between the semiconductors and the heatsink, a smaller or less efficient heatsink can be used for equivalent performance.

[0019] The heatsink of the present disclosure may include designs or additional components to reduce electrical resistance between the cables or busbars and the switches, such as a copper core for electrical conduction that is encased in aluminum for thermal dissipation. The heatsink sections or general shape or size can be in various arrangements according to the specific PCB layout of the semiconductors themselves dependent on where the corresponding phases and high and low side semiconductors are located on the board, as well as thermal requirements. The heatsink may itself be, may contain, or may be part of, various topologies such as a cold plate, heat spreader, heat pipes, fluid passage, finned heatsink, etc.

[0020] These and other features and advantages of the present invention will become more readily appreciated when considered in connection with the following detailed description and appending drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings described herein are for illustrative purposes only of selected embodiments and are not intended to limit the scope of the present disclosure. The inventive concepts associated with the present disclosure will be more readily understood by reference to the following description in combination with the accompanying drawings wherein:

[0022] FIGs. 1A and IB are examples of the insulated-gate bipolar transistor (IGBT) semiconductor package.

[0023] FIG. 2 is a top view of the first embodiment of a three phase inverter arrangement utilizing a heatsink arrangement according to the present disclosure.

[0024] FIG. 3 is an isometric view of the first embodiment of the three phase inverter arrangement utilizing the heatsink of the present disclosure.

[0025] FIG. 4 is a top view of a second embodiment of a three phase inverter arrangement utilizing a heatsink of the present disclosure.DETAILED DESCRIPTION

[0026] FIGs. 1 A and IB provide examples of a power semiconductor device 20 in the form of an insulated-gate bipolar transistor (IGBT). FIG. 1 A is a view of the top side 22 of the IGBT semiconductor 20. FIG. IB provides a view of the opposite, bottom side 24 of the same IGBT 20. The IGBT 20 includes three terminals 26 extending from a side surface 28 from the body 30. Thesethree terminals 26 provide electrical connections into or out of the IGBT 20 as required for functionality. Terminals 26 include an emitter 26E, a collector 26C, and a gate 26G. The collector terminal 26C and the emitter terminal 26E are associated with the conductance path which passes current thru IGBT 20, while the gate terminal 26G controls the semiconductor switch operation. The example construction of IGBT 20 shown is a TO-247 package. The body 30 is predominantly made of a nonconductive material surrounding, encapsulating or overmolded onto most sides of the internal components of the IGBT 20, including portions of terminals 26, providing electrical and thermal isolating properties to the surrounding environment. On the bottom side 24, the entire surface is nonconductive material. On the top side 22, a significant portion is conductive, as represented by pad 32. Pad 32 may also be referred to as TAB in the industry. Pad 32 may be arranged in a manner to extend slightly from the top side 22 of body 30 to be proud of the nonconductive portion of body 30. Pad 32 is made of a conductive material and provides an electrical connection equivalent to the collector terminal 26C extending from the side 28. An aperture 34 may optionally be provided in body 30 to mount or fix IGBT 20 to a printed circuit board PCB (not shown) in a manner where bottom side 24 is mounted flat against the PCB. Mounting traditionally may be achieved by fastener or rivet or if without aperture 34 via clip connecting IGBT 20 to the PCB.

[0027] According to an aspect of the present disclosure, collector terminal 26C may not be utilized to carry electrical current in some instances, such as for the high side of the arrangement, as further described below. Instead, in these instances, current (such as from Vdc+) is provided to the IGBT 20 via a conductive pad 32, which has an equivalent electrical circuitry connection as collector terminal 26C. To maintain usage of a standard semiconductor 20, no modifications of collector terminal 26C are necessary for utilization in the present disclosure. However, it will beappreciated that, in accordance with the aspects of the present disclosure, the collector terminal 26C may be excluded, removed, not provided, etc., with the functionality of the collector terminal being exclusively provided via the pad 32 for these uses. When the collector terminal 26C is present, the terminal may go unused, and may be referred to as unused, inactive, as a “dummy” terminal, or the like. It may be beneficial to use the same IGBT 20 for both the high side and the low side of the arrangement. In the case of the low side, each terminal may be used, including the collector terminal 26C, as further described below. Thus, while the same IGBT 20 may be used on both the high side and the low side, the usage of the terminals may be different, where the collector terminal 26C goes unused on the high side, but is used on the low side.

[0028] Referring to FIG. 2, a first embodiment of three phase inverter arrangement 42 utilizing a heatsink arrangement of the present disclosure is shown as viewed from the top side. It will be appreciated that terms such as top and bottom are relative terms, are not limiting as to the actually arranged and orientation of the overall structure when installed or used in a corresponding environment or system. This first embodiment depicts a plurality of parallel pairs of semiconductor switches, in a row arrangement of six IGBT semiconductor 20 on a high side 44 and six IGBT semiconductors 20 on a low side 46. Each phase of a three-phase inverter uses pairs of high- and low-side IGBT semiconductors to apply an alternating voltage to the motor coils U, V, and W. In the embodiment shown, two high-side semiconductors are paired with two low-side semiconductors for each phase U, V, W. However a single high-side semiconductor may be paired with a single low-side semiconductor.

[0029] Each of the IGBTs 20 is mounted to a printed circuit board (PCB) 48. Note eachIGBT 20 is mounted in a manner where the top side 22 is facing upwards, exposing pad 32, which can accordingly function as the collector such that collector terminal 26C goes unused on the highside. Mounting of the IGBT 20 to PCB 48 may be any manner to provide a mechanically secure connection. Each IGBT 20 is also electrically connected to PCB 48 via at least one of the terminals 26. Specifically, gate terminal 26G and emitter terminal 26E are connected to traces 50 within PCB 48 by soldering or other method. Not all of the traces are explicitly shown in the figures. Traces 50 are a highly conductive track that is used to connect components electrically together on printed circuit board 48. The traces 50 are commonly made of copper and are fabricated during the etching process of a PCB 48. In this example, a trace 50 is shown connecting the emitter terminal 26E of a high side 44 IGBT 20 to the collector terminal 26C of a low side 46 IGBT 20. Thus, the low side 46 IGBT 20 has its collector terminal 26C being used. Multiple other traces 50 will also connect to gate terminal 26G of each IGBT. Additional traces may be provided in the PCB

[0030] No trace 50 or electrical connection are made to the collector terminal 26C on the high side 44 IGBT 20. This is due to the arrangement of heat sinks 40 that are provided according to the present disclosure, which are electrically connected to pad 32 of IGBTs 20 to provide the electrical connection for the collector circuit. No electrically isolating thermal interface material (TIM) is provided between pad 32 and heat sink 40 in the proposed arrangements.

[0031] Four separate heat sinks are used in this first embodiment of FIG. 2. A high side heat sink 40H spans across the three sets of high-side IGBTs 20 as arranged in a row, where pad 32 of each of the IGBTs 20 on the high-side 44 are in electrical and thermal conductive contact with the single, common high-side heat sink 40H. A mechanical connection 52 providing electrical continuity for high-voltage DC power is provided directly to heat sink 40H to transmit electrical power to the IGBTs 20, via heat sink 40H, from connection 52. The connection 52 may be in any orientation or location relative to heat sink 40H, as long as the connection 52 is electrically isolatedfrom surrounding components. As shown, the connection is approximately in the middle of the common heatsink 40H. The connection 52 may be directly attached to further busbars, cables or the like to receive power to be provided into the high-side of the inverter 42.

[0032] Continuing to refer to FIG. 2, with attention now to the low-side 46 connections, three low side heat sinks 40L are provided, one for each phase U, V, W. Each motor phase U, V, and W are powered via a set of two IGBTs 20. Each set of IGBTs 20 has a dedicated heat sink, 40LU, 40LV, 40LW for each phase to cool the respective set of IGBTs 20. Similar to the high- side arrangement, IGBTs 20 are arranged with pad 32 facing toward the heat sinks. Each heat sink 40LU, 40LV, 40LW is electrically and thermally conducted to a pair of IGBTs 20 for each motor phase. U / V / W eMotor phase connections 54 are made through the heatsink 54U, 54V, and 54W respectively.

[0033] As discussed above, the high side emitters 26E connected to the low side collectors 26C via traces 50 in the PCB. Because the pads 32 of the 1GBT are in electrical communication with the collector terminals 26C, the current passing from high side emitters 26E into low side collectors 26C passes via pads 32 into the corresponding heatsinks 40LU, 40LV, 40 LW for each motor phase. Thus, for each of the IGBTs 20 being used in the inverter 42 only the high side collector terminals 26C are unused.

[0034] Each of the gate terminals 26G (both high side and low side) are connected to the low voltage PCB for receiving control signals via the PCB in a manner known in the art. The low side 46 IGBTs 20 have their emitter terminals 26E connected to the DC (Vdc negative / HV ground) circuit via traces 50 in the PCB to complete the Vdc circuit.

[0035] Thus, for each of the IGBTs 20 being used in the inverter 42 only the high side collector terminals 26C are unused.

[0036] Note that electrical and thermal isolation 56A, 56B, 56C (shown in FIG. 3) is provided between heat sinks 40H, 40LU, 40LV, and 40LW due to the different electrical connections that are made through each heat sink. The isolation 56A, 56B, 56C may be in the form of a nonconductive material inserted between the heat sinks, or a space may be provided without material that has a significant air gap to prevent arcing between the heat sinks 40 and the current passing through them.

[0037] FIG. 3 provides an isometric view of the first embodiment to better depict the arrangement of three phase inverter arrangement 42 with heat sinks 40, IGBTs 20, printed circuit board 48, and the isolation between the heat sinks. Here isolation can be seen located between the vertical surfaces of heat sinks 40H, 40LU, 40LV, 40LW. Isolation 56A is provided along the length of heat sink 40H separating heat sink 40H from low side heat sinks 40LU, 40LV, and 40LW. Further isolation is provided between each of the low side heat sinks 40LU, 40LV, 40LW, with isolation 56B between heat sink 40LU and 40LV, and isolation 56C is provided to separate heat sink 40LV from 40LW. If the isolation is plastic or other nonconductive and insulating material, it is proposed to expose significant portions of heat sink 40, as shown, to allow heat transfer to a surrounding medium including, but not limited to, air or liquid directly or indirectly.

[0038] FIG. 4 provides a second embodiment of a three-phase inverter arrangement 142 utilizing a heatsink electrical connection of the present disclosure in an alternative arrangement. In this arrangement, the six IGBT 20 semiconductor pairs are arranged in a column like configuration where the plurality of parallel pairs of semiconductor switches are provided in an alternating arrangement of DC voltage and U / V / W eMotor phase connections across the PCB 48 for an alternative packaging arrangement. Such an arrangement has many of the same characteristics of the first embodiment, including mounting of the IGBT 20 to the PCB 48 in amanner where the bottom side 24 is in contact with the PCB 48 while the top side 22 and pad 32 are exposed towards the heat sink for thermal and electrical connection to pad 32.

[0039] The arrangement of FIG. 4 may result in further simplicity of traces 50 and reduced PCB 48 overall size. Heat sinks in this three-phase inverter arrangement 142 still continues to utilize a separate low-side heat sinks 40LU, 40LV, 40LW for each pair of IGBTs 20 for motor phases U, V, and W. Dedicated heat sinks 40LU, 40LV, 40LW are used for each phase to cool low-side IGBT 20 and also electrically connect the pairs of low-side IGBT 20 to further electrical connections reaching each motor phase via connections 54U, 54V, and 54W in a similar manner to the previous embodiment. Heat sinks 40LU, 40LV, 40LW are of a different arrangement, because now the sets of high-side and low-side IGBTs 20 are in a column arrangement versus a row like arrangement of inverter 42. However, similar to the present embodiment, the low side heat sinks span between a set of two low side IGBTs 20 in the case where 12 IGBTs 20 are used.

[0040] As in the other embodiment, the high side collectors 26C are unused. The high side emitter 26E connect to the low side collector 26C via traces 50. The other connections between the terminals of the high side IGBTs 20 and the low side IGBTs 20 are also the same.

[0041] For the high-side, the singular common heat sink 40H utilized in the embodiment of FIG. 3 for the high-side DC voltage is instead arranged into three separate heat sinks 40HA, 40HB, 40HC, where each heat sink is in contact with only one set of two high-side IGBTs 20. The heat sinks 40HA, 40HB, 40HC have a similar shape to the low-side heat sinks of this embodiment, because only two high-side IGBTs 20 are in contact with each heat sink, as is the case of the low- side heat sinks. This arrangement may be advantageous to utilize the same heat sink dimensional configuration for cost savings, and may furthermore improve the heat transfer as further surfacearea is provided relative to the large singular heat sink 40H for the high side 44 of inverter 42 of FIG. 2.

[0042] Isolation 56 is provided between each of the sets of heat sinks 40 (up and down in FIG. 4) and along the length and outer perimeter of the six heat sinks. Insulation 56 may be plastic or other nonconductive and insulating material. High-voltage DC connection 52 may be provided as a separate connections at each heat sink 40HA, 40HB, 40HC or may utilize an additional bus bar (not shown) to electrically join each heat sink together with a singular high-voltage DC connection 52 on the busbar. In each case, the connections 52 to each of the high-side heatsinks is in parallel, such that each may receive voltage from the same power source. The low-side heat sinks and their outputs are electrically isolated from each other, and provide isolated outputs. High voltage DC connection 52 to the high-side heat sinks and the motor phase connections 54U, 54V, 54W may be located on any portion of respective heat sink, and the locations shown are understood as examples of potential placement.

[0043] Similar to the other embodiment, the high side heat sinks receive the Vdc positive current as part of the DC circuit. Here, the separate high side heat sinks are connected in parallel, with each having a DC connection 52 that receives the current. The low side emitters 26e of each of the low side IGBTs 20 connect to the Vdc negative side of the DC circuit.

[0044] For packaging and efficiency reasons, the high side heat sinks may be arranged side by side or adjacent the corresponding low side heat sink for each motor phase. Put another way, four IGBTs for each motor phase may be grouped together on the PCB 48. However, the heat sinks could also be arranged away from each other or remote from each, and connected via different and / or longer traces, or in other arrangements, while still benefitting from the benefits ofthe combined electrical connection and heat sink provided by the high side and low side heat sinks described herein.

[0045] It will be appreciated that a six IGBT arrangement may also be used, with two IGBTs being used for each phase rather than four, having the same general arrangement, but with a corresponding smaller heat sink to account for the reduction in the number of IGBTs.

[0046] The foregoing description of the embodiments has been provided for purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment, but, where applicable, are interchangeable and can be used in a selected embodiment, even if not specifically shown or described. The same may also be varies in many ways. Such variations are not to be regarded as a departure from the disclosure, and all such modifications are intended to be included within the scope of disclosure.

Claims

CLAIMS1. An inverter comprising: at least one semiconductor having a pad that includes an electrically and thermally conductive surface, wherein the at least one semiconductor is mounted and electrically connected to a printed circuit board (PCB), at least one electrical connection provided between the PCB and the at least one semiconductor, at least one heat sink attached to the at least one semiconductor that dissipates heat developed by the semiconductor; wherein the heat sink is in direct contact with the electrically and thermally conductive surface of the at least one semiconductor; and wherein the heat sink provides an electrical power connection to the at least one semiconductor.

2. The inverter of claim 1, wherein the semiconductor has a top side, a bottom side, and a side surface, wherein the top side includes the pad having the electrically and thermally conductive surface.

3. The inverter of claim 2, wherein the semiconductor includes a plurality of terminals, including a collector terminal, an emitter terminal, and a gate terminal, wherein the collector terminal projects from the side surface and is in electrical communication with the pad having the electrically and thermally conductive surface disposed on the top side.

4. The inverter of claim 3, wherein the emitter terminal provides current from the semiconductor.

5. The inverter of claim 4, wherein both the collector terminal and the pad are configured to receive and conduct current through the semiconductor.

6. The inverter of claim 1, wherein the invertor includes a high side and a low side, wherein the at least semiconductor comprises, on the high side, a plurality of sets of high side semiconductors; wherein the at least one heat sink, on the high side, includes at least one high side heat sink attached to the pad of each of the sets high side semiconductors; wherein the at least semiconductor comprises, on the low side, a plurality of sets of low side semiconductors; wherein the at least one heat sink, on the low side, includes separate low side heat sinks attached to the pad of each of the sets low side semiconductors; wherein each set of low side semiconductors is configured to activate a respective phase of an electric motor; wherein each of the low side heat sinks is assigned to the respective phase of the electric motor.

7. The inverter of claim 6, wherein the at least one high side heat sink is a single common heat sink connected to a single DC power source, wherein each of the pads of the high side semiconductors is attached to the single common heat sink.

8. The inverter of claim 6, wherein the at least one high side heat sink comprises multiple separate high side heat sinks, wherein each high side heat sink is connected in parallel to a single DC power source.

9. The inverter of claim 6, wherein each set of high side semiconductors includes two high side semiconductors, and each set of low side semiconductors includes two low side semiconductors.

10. The inverter of claim 6, wherein each set of high side semiconductors includes only one high side semiconductor, and each set of low side semiconductors includes only one low side semiconductor.

11. The inverter of claim 7, wherein the high side semiconductors are arranged in a first row extending across a top surface of the PCB, and the low side semiconductors are arranged in a second row extending across the top surface of the PCB, wherein the first row and the second row are adjacent and generally parallel to each other.

12. The inverter of claim 11, wherein each set of high side semiconductors is arranged adjacent a corresponding set of low side semiconductors to define paired sets, wherein each paired set is assigned to one of the respective phases of the electric motor.

13. The inverter of claim 12, wherein a first electrical isolation is provided between the first row and the second row that blocks arcing between the at least one high side heat sink in the first row and the low side heat sinks in the second row, wherein additional electrical isolations are provided between adjacent sets of low side heat sinks to block arcing between adjacent sets of low side heat sinks.

14. The inverter of claim 8, wherein the sets of high side semiconductors are arranged in three high side columns extending across a top surface of the PCB, and the sets of low side semiconductors are arranged in three low side columns extending across the top surface of the PCB, wherein the high side columns and low side columns are generally parallel to each other.

15. The inverter of claim 14, wherein the high side columns alternate with the low side columns across the top surface of the PCB, wherein three adjacent pairs of high side and low side columns are assigned to a respective motor phase.

16. The inverter of claim 15, wherein an electrical isolation is provided between adjacent columns of the high side and low side columns.

17. The inverter of claim 6, wherein each of the high side and low side semiconductors includes a gate terminal, a collector terminal, and an emitter terminal, wherein the pad is electrically conductive with the collector terminal, wherein the collector terminals of the high side semiconductors are unused and not connected to further terminals, traces and power sources.

18. The inverter of claim 17, wherein for each high side semiconductor and low side semiconductor, the emitter terminals of the high side semiconductors is electrically connected to a corresponding collector terminal of the low side semiconductor, the gate terminals of the high side and low side semiconductor are connected to the PCB for receiving signals, and the emitter terminal of the low side semiconductor is connected to the negative side of the DC circuit.

19. The inverter of claim 18, wherein for each motor phase, when activated, current flows from DC circuit into the high side heat sink into pad of the high side semiconductor, through the high side emitter terminal and into the corresponding low side collector terminal, and from the low side collector terminal through the pad of the semiconductor to the corresponding low side heat sink and to the electric motor, wherein the emitter of the low side semiconductor completes the DC circuit.

20. The inverter of claim 14, wherein each of the high side heat sinks and the low side heat sinks are the same size and have the same surface area.

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