Amplifier

Abstract

This amplifier comprises: a transistor which amplifies a high-frequency signal; a transistor which is connected to the transistor, and the on-off state of which is controlled by a bias signal; a transistor which is connected to the transistor, and the on-off state of which is controlled by a bias signal; a resistor which is connected to the transistor; a resistor which is connected to the transistor; an output terminal which is connected to a connection part between the transistor and the resistor; and an output terminal which is connected to a connection point between the transistor and the resistor.

Description

amplifier

[0001] This application claims priority from Japanese Patent Application No. 2024-084903, filed May 24, 2024, the contents of which are incorporated herein by reference.

[0002] Amplifiers, which increase the amplitude or energy of an input electrical signal and output it, are used in a variety of applications. Such amplifiers may be required to selectively output the amplified signal to different paths. For example, Patent Document 1 below discloses an amplifier circuit including a first operational amplifier, second and third operational amplifiers whose input terminals are connected to the output terminal of the first operational amplifier, and two switches provided in paths between the output terminal of the first operational amplifier and the input terminals of the second and third operational amplifiers. In this amplifier circuit, the switches select whether to connect the input terminal of the second operational amplifier or the input terminal of the third operational amplifier to the output terminal of the first operational amplifier.

[0003] Japanese Patent Application Publication No. 2021-145315

[0004] In the above-described amplifier circuit, two switches are required in the path between the output terminal of the first operational amplifier and the input terminals of the second and third operational amplifiers in order to selectively output the signal amplified by the first operational amplifier to either the second or third operational amplifier. This increases the circuit size, which leads to a problem of increased circuit scale. The increased circuit size increases the size of the semiconductor chip on which the amplifier circuit is mounted, resulting in increased costs.

[0005] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an amplifier that can selectively output an amplified signal to different paths without increasing the circuit size.

[0006] In order to solve the above problem, an amplifier according to a first aspect of the present invention includes: a first amplifying transistor that amplifies a first input signal; a first electronic switch having one end connected to an output end of the first amplifying transistor and an open / close state controlled by a first control signal; a second electronic switch having one end connected to the output end of the first amplifying transistor and an open / close state controlled by a second control signal; a first resistor having one end connected to the other end of the first electronic switch; a second resistor having one end connected to the other end of the second electronic switch; a first output terminal connected to a connection portion between the other end of the first electronic switch and one end of the first resistor; and a second output terminal connected to a connection portion between the other end of the second electronic switch and one end of the second resistor.

[0007] In the amplifier according to the first aspect of the present invention, a first electronic switch is provided between a first amplifying transistor and a first resistor, and a second electronic switch is provided between the first amplifying transistor and a second resistor. The open / close states of the first electronic switch and the second electronic switch are controlled by a first control signal and a second control signal. This makes it possible to selectively output an amplified signal to different paths without increasing the circuit size.

[0008] In the amplifier according to the second aspect of the present invention, in the amplifier according to the first aspect of the present invention, the first resistor and the second resistor may have different resistance values.

[0009] An amplifier according to a third aspect of the present invention may be the amplifier according to the first aspect of the present invention, further comprising: a second amplifying transistor that amplifies a second input signal; a third electronic switch having one end connected to the output terminal of the second amplifying transistor and an open / closed state controlled by the first control signal; a fourth electronic switch having one end connected to the output terminal of the second amplifying transistor and an open / closed state controlled by the second control signal; a third resistor having one end connected to the other end of the third electronic switch; a fourth resistor having one end connected to the other end of the fourth electronic switch; a third output terminal connected to a connection portion between the other end of the third electronic switch and one end of the third resistor; and a fourth output terminal connected to a connection portion between the other end of the fourth electronic switch and one end of the fourth resistor.

[0010] An amplifier according to a fourth aspect of the present invention may be the amplifier according to the third aspect of the present invention, wherein the first resistor and the third resistor have the same resistance value, the second resistor and the fourth resistor have the same resistance value, and the first resistor and the third resistor and the second resistor and the fourth resistor have different resistance values.

[0011] An amplifier according to a fifth aspect of the present invention may be the amplifier according to the third or fourth aspect of the present invention, wherein the first input signal and the second input signal are differential signals, and the first output terminal and the third output terminal, or the second output terminal and the fourth output terminal, may be a pair of output terminals from which the differential signal amplified by the first amplifying transistor and the second amplifying transistor is output.

[0012] According to the present invention, it is possible to selectively output an amplified signal to different paths without increasing the circuit scale.

[0013] 1 is a circuit diagram showing the configuration of a main part of an amplifier according to a first embodiment of the present invention, and FIG. 2 is a circuit diagram showing the configuration of a main part of an amplifier according to a second embodiment of the present invention.

[0014] Hereinafter, amplifiers according to embodiments of the present invention will be described in detail with reference to the drawings.

[0015] 1 is a circuit diagram showing the main configuration of an amplifier according to a first embodiment of the present invention. As shown in Fig. 1, the amplifier 1 of this embodiment includes a transistor 11 (first amplifying transistor), a transistor 21 (first electronic switch), a transistor 22 (second electronic switch), a resistor 31 (first resistor), a resistor 32 (second resistor), an input terminal T1, an output terminal T11 (first output terminal), an output terminal T12 (second output terminal), a bias terminal T21, and a bias terminal T22.

[0016] Such an amplifier 1 amplifies a high-frequency signal (first input signal) input from the input terminal T1 and outputs the amplified high-frequency signal from the output terminal T11 or the output terminal T12. Whether the amplifier 1 outputs the amplified high-frequency signal from the output terminal T11 or T12 can be controlled by a bias signal B1 (first control signal) input to the bias terminal T21 and a bias signal B2 (second control signal) input to the bias terminal T22.

[0017] The transistor 11 is an amplifying transistor that functions as an amplifying element. The transistor 11 is, for example, an NPN bipolar transistor. The base terminal of the transistor 11 is connected to the input terminal T1, the emitter terminal is grounded, and the collector terminal is connected to the transistors 21 and 22. The collector terminal of the transistor 11 is the output terminal of the transistor 11.

[0018] The transistor 21 functions as an electronic switch. The transistor 21 is, for example, an N-type MOS (Metal Oxide Semiconductor) transistor. The gate terminal of the transistor 21 is connected to the bias terminal T21, the source terminal (one end) is connected to the collector terminal (output end) of the transistor 11, and the drain terminal is connected to one end of the resistor 31. The open / close state of the transistor 21 is controlled by a bias signal B1 input to the bias terminal T21. For example, the transistor 21 is in a closed state (on state) when the bias signal B1 input to the bias terminal T21 is equal to the power supply voltage, and is in an open state (off state) when the bias signal B1 is equal to the ground voltage.

[0019] Like the transistor 21, the transistor 22 is a transistor that functions as an electronic switch, and is, for example, an N-type MOS transistor. The gate terminal of the transistor 22 is connected to the bias terminal T22, the source terminal (one end) is connected to the collector terminal (output end) of the transistor 11, and the drain terminal is connected to one end of the resistor 32. The open / close state of the transistor 22 is controlled by a bias signal B2 input to the bias terminal T22. For example, the transistor 22 is in a closed state (on state) when the bias signal B2 input to the bias terminal T22 has a voltage equal to the power supply voltage, and in an open state (off state) when the bias signal B2 has a voltage equal to the ground voltage.

[0020] The resistor 31 is provided to adjust the gain (amplification factor) and output impedance of the amplifier 1. One end of the resistor 31 is connected to the drain terminal (other end) of the transistor 21, and the other end is connected to a power supply. The output terminal T11 is connected to the connection point between the one end of the resistor 31 and the drain terminal (other end) of the transistor 21.

[0021] Similar to the resistor 31, the resistor 32 is provided to adjust the gain and output impedance of the amplifier 1. One end of the resistor 32 is connected to the drain terminal (other end) of the transistor 22, and the other end is connected to the power supply. The output terminal T12 is connected to the connection point between the one end of the resistor 32 and the drain terminal (other end) of the transistor 22.

[0022] The resistance value R1 of resistor 31 and the resistance value R2 of resistor 32 can be set to the same value (R1 = R2) or to different values ​​(R1 ≠ R2). When they are set to the same value, the gain and output impedance can be made the same when the amplified high-frequency signal is output from output terminal T11 and when it is output from output terminal T12. On the other hand, when they are set to different values, the gain and output impedance can be made different when the amplified high-frequency signal is output from output terminal T11 and when it is output from output terminal T12.

[0023] In the above configuration, assume that bias signals B1 and B2 that open both transistors 21 and 22 are input to bias terminals T21 and T22, respectively. For example, assume that voltages equal to the ground voltage are input to bias terminals T21 and T22 as bias signals B1 and B2. In this case, both transistors 21 and 22 are in a high impedance state. Therefore, even if a high-frequency signal is input to input terminal T1, almost no current flows through resistors 31 and 32. Therefore, no signal is output from output terminals T11 and T12.

[0024] Next, assume that a bias signal B1 that closes transistor 21 is input to bias terminal T21, and a bias signal B2 that opens transistor 22 is input to bias terminal T22. For example, assume that a voltage equal to the power supply voltage is input to bias terminal T21 as bias signal B1, and a voltage equal to the ground voltage is input to bias terminal T22 as bias signal B2. In this state, transistor 21 is in a low impedance state, and transistor 22 is in a high impedance state. Therefore, when a high-frequency signal is input to input terminal T1, most of the current amplified by transistor 21 flows through resistor 31, and almost no current flows through resistor 32. Therefore, a signal (an amplified high-frequency signal) generated by the current flowing through resistor 31 is output from output terminal T11, and no signal is output from output terminal T12.

[0025] Next, assume that a bias signal B1 that opens transistor 21 is input to bias terminal T21, and a bias signal B2 that closes transistor 22 is input to bias terminal T22. For example, assume that a voltage equal to the ground voltage is input to bias terminal T21 as bias signal B1, and a voltage equal to the power supply voltage is input to bias terminal T22 as bias signal B2. At this time, transistor 21 is in a high impedance state, and transistor 22 is in a low impedance state. Therefore, when a high-frequency signal is input to input terminal T1, most of the current amplified by transistor 21 flows through resistor 32, and almost no current flows through resistor 31. Therefore, a signal (an amplified high-frequency signal) generated by the current flowing through resistor 32 is output from output terminal T12, and no signal is output from output terminal T11.

[0026] In this embodiment, the bias signals B1 and B2 that turn both the transistors 21 and 22 to the closed state are not input to the bias terminals T21 and T22 because the current amplified by the transistor 11 would flow through both the resistors 31 and 32, making it impossible to obtain the desired gain and output impedance.

[0027] As described above, in this embodiment, the transistor 21 is provided between the transistor 11 that amplifies the high-frequency signal and the resistor 31, and the transistor 22 is provided between the transistor 11 and the resistor 32. The open / close states of the transistors 21 and 22 are controlled by the bias signals B1 and B2. As a result, in this embodiment, the high-frequency signal amplified by the amplifier 1 can be output from the output terminal T11 or the output terminal T12. That is, the amplified signal can be selectively output to different paths. Furthermore, in this embodiment, the selection of the path to output the amplified signal is performed by the transistors 21 and 22, so there is no increase in circuit size. Since there is no increase in circuit size, there is no increase in the chip size of the semiconductor chip on which the amplifier 1 is provided, and there is no increase in cost.

[0028] Furthermore, in this embodiment, the resistance values ​​of the resistors 31 and 32 can be set to set the same or different gain and output impedance when the amplified high-frequency signal is output from the output terminal T11 and when it is output from the output terminal T12, depending on whether they are set to the same or different values. For example, if the resistance value R1 of the resistor 31 is set to be greater than the resistance value R2 of the resistor 32 (R1 > R2), the gain and output impedance when the amplified high-frequency signal is output from the output terminal T11 can be greater than when it is output from the output terminal T12. Conversely, if the resistance value R1 of the resistor 31 is set to be smaller than the resistance value R2 of the resistor 32 (R1 < R2), the gain and output impedance when the amplified high-frequency signal is output from the output terminal T12 can be greater than when it is output from the output terminal T11.

[0029] Second Embodiment Fig. 2 is a circuit diagram showing the main configuration of an amplifier according to a second embodiment of the present invention. In Fig. 2, the same components as those shown in Fig. 1 are denoted by the same reference numerals. As shown in Fig. 2, the amplifier 2 of this embodiment is configured by adding a transistor 12 (second amplifying transistor), a transistor 23 (third electronic switch), a transistor 24 (fourth electronic switch), a resistor 33 (third resistor), a resistor 34 (fourth resistor), an input terminal T2, an output terminal T13 (third output terminal), an output terminal T14 (fourth output terminal), and a current source 40 to the amplifier 1 shown in Fig. 1.

[0030] 1 is configured to amplify a high-frequency signal (first input signal) input from an input terminal T1 and output the amplified high-frequency signal from an output terminal T11 or an output terminal T12. In contrast, the amplifier 2 of this embodiment is configured to amplify a high-frequency signal (first input signal) input from an input terminal T1 and a high-frequency signal (second input signal) input from an input terminal T2 and output the amplified high-frequency signals from output terminals T11 and T13 or output terminals T12 and T14.

[0031] Here, the high-frequency signals input from the input terminals T1 and T2 are, for example, differential signals. When a differential signal is input to the input terminals T1 and T2, the amplifier 2 of this embodiment amplifies the differential signals input from the input terminals T1 and T2 and outputs the amplified differential signals from the output terminals T11 and T13 or the output terminals T12 and T14. In other words, the output terminals T11 and T13 are a pair of output terminals from which the differential signals amplified by the transistors 11 and 12 are output, and the output terminals T12 and T14 are also a pair of output terminals from which the differential signals amplified by the transistors 11 and 12 are output.

[0032] Whether the amplifier 2 outputs the amplified high frequency signal from the output terminals T11 and T13 or from the output terminals T12 and T14 can be controlled by a bias signal B1 (first control signal) input to the bias terminals T21 and T23 and a bias signal B2 (second control signal) input to the bias terminals T22 and T24.

[0033] The transistor 12 is an amplifying transistor that functions as an amplifying element, similar to the transistor 11, and is, for example, an NPN bipolar transistor. The base terminal of the transistor 12 is connected to the input terminal T2, the emitter terminal is connected to the emitter terminal of the transistor 11, and the collector terminal is connected to the transistors 23 and 24. The emitter terminals of the transistors 11 and 12 are connected to the current source 40. The collector terminal of the transistor 12 is the output terminal of the transistor 12.

[0034] The transistor 23 functions as an electronic switch. The transistor 23 is, for example, an N-type MOS transistor. The gate terminal of the transistor 23 is connected to the bias terminal T21, the source terminal (one end) is connected to the collector terminal (output terminal) of the transistor 12, and the drain terminal is connected to one end of the resistor 33. The open / close state of the transistor 23 is controlled by a bias signal B1 input to the bias terminal T21. For example, the transistor 23 is in a closed state (on state) when the bias signal B1 input to the bias terminal T21 is equal to the power supply voltage, and is in an open state (off state) when the bias signal B1 is equal to the ground voltage.

[0035] Like the transistor 23, the transistor 24 is a transistor that functions as an electronic switch, and is, for example, an N-type MOS transistor. The gate terminal of the transistor 24 is connected to the bias terminal T22, the source terminal (one end) is connected to the collector terminal (output terminal) of the transistor 12, and the drain terminal is connected to one end of the resistor 34. The open / close state of the transistor 24 is controlled by a bias signal B2 input to the bias terminal T22. For example, the transistor 24 is in a closed state (on state) when the bias signal B2 input to the bias terminal T22 is equal to the power supply voltage, and in an open state (off state) when the bias signal B2 is equal to the ground voltage.

[0036] The resistor 33 is provided to adjust the gain and output impedance of the amplifier 2. One end of the resistor 33 is connected to the drain terminal (other end) of the transistor 23, and the other end is connected to the power supply. The output terminal T13 is connected to the connection point between one end of the resistor 33 and the drain terminal (other end) of the transistor 23.

[0037] The resistor 34, like the resistor 33, is provided to adjust the gain and output impedance of the amplifier 2. One end of the resistor 34 is connected to the drain terminal (other end) of the transistor 24, and the other end is connected to the power supply. The output terminal T14 is connected to the connection point between one end of the resistor 34 and the drain terminal (other end) of the transistor 24.

[0038] The resistance value R1 of the resistor 31 and the resistance value R3 of the resistor 33 are set to the same value (R1 = R3). The resistance value R2 of the resistor 32 and the resistance value R4 of the resistor 34 are set to the same value (R1 = R4). The resistance value R1 of the resistor 31 and the resistance value R3 of the resistor 33, and the resistance value R2 of the resistor 32 and the resistance value R4 of the resistor 34 can be set to the same value ((R1 = R2) = (R3 = R4)) or can be set to different values ​​((R1 = R3) ≠ (R2 = R4)). Setting them to the same value makes it possible to make the gain and output impedance the same when the amplified high-frequency signal is output from the output terminals T11 and T13 and when it is output from the output terminals T12 and T14. On the other hand, if they are set to different values, the gain and output impedance can be made different when the amplified high frequency signal is output from the output terminals T11 and T13 and when it is output from the output terminals T12 and T14.

[0039] In the above configuration, assume that bias signals B1 and B2 that open all of transistors 21 to 24 are input to bias terminals T21 and T22, respectively. For example, assume that voltages equal to the ground voltage are input to bias terminals T21 and T22 as bias signals B1 and B2. In this case, all of transistors 21 to 24 are in a high impedance state. Therefore, even if a high-frequency signal (differential signal) is input to input terminals T1 and T2, almost no current flows through resistors 31 to 34. Therefore, no signal is output from output terminals T11 to T14.

[0040] Next, assume that a bias signal B1 that closes transistors 21 and 23 is input to bias terminal T21, and a bias signal B2 that opens transistors 22 and 24 is input to bias terminal T22. For example, assume that a voltage equal to the power supply voltage is input to bias terminal T21 as bias signal B1, and a voltage equal to the ground voltage is input to bias terminal T22 as bias signal B2. In this state, transistors 21 and 23 are in a low impedance state, and transistors 22 and 24 are in a high impedance state. Therefore, when a high-frequency signal (differential signal) is input to input terminals T1 and T2, most of the current amplified by transistor 11 flows through resistor 31, and almost no current flows through resistor 32. Furthermore, most of the current amplified by transistor 12 flows through resistor 33, and almost no current flows through resistor 34. Therefore, a signal (an amplified high frequency signal (differential signal)) generated by the current flowing through the resistors 31 and 33 is output from the output terminals T11 and T13, and no signal is output from the output terminals T12 and T14.

[0041] Next, assume that a bias signal B1 that opens transistors 21 and 23 is input to bias terminal T21, and a bias signal B2 that closes transistors 22 and 24 is input to bias terminal T22. For example, assume that a voltage equal to the ground voltage is input to bias terminal T21 as bias signal B1, and a voltage equal to the power supply voltage is input to bias terminal T22 as bias signal B2. At this time, transistors 21 and 23 are in a high impedance state, and transistors 22 and 24 are in a low impedance state. Therefore, when a high-frequency signal (differential signal) is input to input terminals T1 and T2, most of the current amplified by transistor 11 flows through resistor 32, and almost no current flows through resistor 31. Furthermore, most of the current amplified by transistor 12 flows through resistor 34, and almost no current flows through resistor 33. Therefore, a signal (an amplified high frequency signal (differential signal)) generated by the current flowing through the resistors 32 and 34 is output from the output terminals T12 and T14, and no signal is output from the output terminals T11 and T13.

[0042] In this embodiment as well, the bias signals B1 and B2 that turn both the transistors 21 and 23 and the transistors 22 and 24 to the closed state are not input to the bias terminals T21 and T22, respectively. This is because the current amplified by the transistor 11 flows through both the resistors 31 and 32, and the current amplified by the transistor 12 flows through both the resistors 33 and 34, making it impossible to obtain the desired gain and output impedance.

[0043] As described above, in this embodiment, the transistor 21 is provided between the transistor 11 that amplifies the high-frequency signal and the resistor 31, and the transistor 22 is provided between the transistor 11 and the resistor 32. Furthermore, the transistor 23 is provided between the transistor 12 that amplifies the high-frequency signal and the resistor 33, and the transistor 24 is provided between the transistor 12 and the resistor 34. The open / closed states of the transistors 21 and 23 and the transistors 22 and 24 are controlled by the bias signals B1 and B2.

[0044] As a result, in this embodiment, the high-frequency signal amplified by the amplifier 2 can be output from the output terminals T11 and T13, or from the output terminals T12 and T14. In other words, the amplified signal can be selectively output to different paths. Furthermore, in this embodiment, the selection of the path to output the amplified signal is performed by the transistors 21 to 24, so there is no increase in the circuit size, as in the first embodiment. Since there is no increase in the circuit size, the chip size of the semiconductor chip on which the amplifier 2 is provided does not increase, and there is no increase in cost.

[0045] Furthermore, in this embodiment, the gain and output impedance can be made the same or different when the amplified high-frequency signal is output from the output terminals T11, T13 and when it is output from the output terminals T12, T14 by setting the resistance values ​​of the resistors 31 to 34. For example, if the resistance value R1 of the resistor 31 and the resistance value R3 of the resistor 33 are set to be larger than the resistance value R2 of the resistor 32 and the resistance value R4 of the resistor 34 ((R1=R3)>(R2=R4)), the gain and output impedance can be made larger when the amplified high-frequency signal is output from the output terminals T11, T13 than when it is output from the output terminals T12, T14. Conversely, if the resistance value R1 of resistor 31 and the resistance value R3 of resistor 33 are set to be smaller than the resistance value R2 of resistor 32 and the resistance value R4 of resistor 34 ((R1=R3)<(R2=R4)), the gain and output impedance can be made larger when the amplified high-frequency signal is output from the output terminals T12 and T14 than when it is output from the output terminals T11 and T13.

[0046] Although the amplifier according to the embodiment of the present invention has been described above, the present invention is not limited to the above embodiment and can be freely modified within the scope of the present invention. For example, in the above embodiment, an example was described in which transistors 11 and 12 are NPN-type bipolar transistors and transistors 21 to 24 are N-type MOS transistors, but the present invention is not limited to this. As long as it does not result in an increase in circuit size, transistors 11 and 12 may be N-type MOS transistors and transistors 21 to 24 may be NPN-type bipolar transistors. Furthermore, transistors 11 and 12 and transistors 21 to 24 may be transistors of other types.

[0047] According to the present invention, it is possible to selectively output an amplified signal to different paths without increasing the circuit scale.

[0048] 1, 2... amplifier, 11, 12... transistor, 21 to 24... transistor, 31 to 34... resistor, B1, B2... bias signal, T11 to T14... output terminal

Claims

1. An amplifier comprising: a first amplifying transistor that amplifies a first input signal; a first electronic switch having one end connected to the output end of the first amplifying transistor and whose open / close state is controlled by a first control signal; a second electronic switch having one end connected to the output end of the first amplifying transistor and whose open / close state is controlled by a second control signal; a first resistor having one end connected to the other end of the first electronic switch; a second resistor having one end connected to the other end of the second electronic switch; a first output terminal connected to a connection between the other end of the first electronic switch and one end of the first resistor; and a second output terminal connected to a connection between the other end of the second electronic switch and one end of the second resistor.

2. The amplifier according to claim 1, wherein said first resistor and said second resistor have different resistance values.

3. The amplifier according to claim 1, further comprising: a second amplifying transistor that amplifies a second input signal; a third electronic switch having one end connected to the output end of the second amplifying transistor and whose open / close state is controlled by the first control signal; a fourth electronic switch having one end connected to the output end of the second amplifying transistor and whose open / close state is controlled by the second control signal; a third resistor having one end connected to the other end of the third electronic switch; a fourth resistor having one end connected to the other end of the fourth electronic switch; a third output terminal connected to the connection between the other end of the third electronic switch and one end of the third resistor; and a fourth output terminal connected to the connection between the other end of the fourth electronic switch and one end of the fourth resistor.

4. The amplifier according to claim 3, wherein the first resistor and the third resistor have the same resistance value, the second resistor and the fourth resistor have the same resistance value, and the first resistor and the third resistor and the second resistor and the fourth resistor have different resistance values.

5. An amplifier according to claim 3 or claim 4, wherein the first input signal and the second input signal are differential signals, and the first output terminal and the third output terminal, or the second output terminal and the fourth output terminal, are a pair of output terminals from which the differential signals amplified by the first amplifying transistor and the second amplifying transistor are output.

Images