Circuit board and semiconductor package

Abstract

This circuit board comprises: an insulating layer; a via electrode penetrating the insulating layer; and a pad part disposed on the surface of the insulating layer and connected to the via electrode, wherein a protrusion portion formed so as to protrude more outward than other regions of the pad part is disposed on a side surface.

Description

Circuit boards and semiconductor packages

[0001] This embodiment relates to a circuit board and a semiconductor package.

[0002]

[0003] Recently, electronic product technology has been moving toward multifunctionality and high-speed operation, and to respond to this trend, semiconductor chip manufacturing technology is also developing at a rapid pace.

[0004] In particular, the thickness of circuit boards applied for miniaturization of finished electronic products is also decreasing, and technologies related to multilayer circuit boards that configure more circuit layers within a circuit board of the same thickness are being actively researched.

[0005] A circuit board is a substrate made by printing a circuit line pattern with a conductive material, such as copper, onto an electrically insulating substrate. It is a general term for a board immediately before electronic components are mounted. To densely mount numerous electronic components on a flat surface, the mounting locations of each component are determined, and the circuit patterns connecting the components are printed and secured onto the flat surface.

[0006] A circuit board comprises a plurality of insulating layers arranged vertically, circuit patterns arranged on the surfaces of the insulating layers, and via holes arranged to penetrate the insulating layers. As described above, since circuit patterns are formed on the surface of the circuit board to determine the mounting positions of each component and to connect the components, factors such as securing a separation distance between different regions within the circuit patterns and securing the length of the pad area based on the via holes must be considered.

[0007]

[0008] The present embodiment provides a circuit board and semiconductor package that can prevent short circuits between different areas or eccentricity defects of pads based on via holes by correcting the shape of a circuit pattern.

[0009]

[0010] A circuit board according to the present embodiment includes an insulating layer; a via electrode penetrating the insulating layer; and a pad portion disposed on a surface of the insulating layer and connected to the via electrode, and a protrusion having a shape that protrudes outward more than other areas is disposed on a side surface of the pad portion.

[0011] The pad portion may include a first region that vertically overlaps the via electrode, and a second region that is disposed outside the first region and does not vertically overlap the via electrode, and the protrusion may be disposed on a side surface of the second region.

[0012] The side surface of the pad portion includes a first side surface and a second side surface adjacent to the first side surface, and the protrusion may be arranged in an area having the shortest straight-line distance from the edge of the first area to the first side surface or the second side surface.

[0013] The first side and the second side are mutually perpendicular, and the shortest straight-line distance from the edge of the first region to the side of the protrusion may be shorter than the straight-line distance from the edge of the first region to the corner surface where the first side and the second side meet.

[0014] The first side and the second side may be flat, and the side of the protrusion may be curved.

[0015] The first pad portion has a first curved area and a first plane area arranged on a side surface, the second pad portion has a second curved area and a second plane area arranged on a side surface, and the first plane area and the second plane area can face each other in a horizontal direction.

[0016] The first plane region and the second plane region may be arranged in a region where the horizontal distance between the side surface of the first pad portion and the side surface of the second pad portion is formed as the shortest distance.

[0017] The above via electrode may have a shape in which the horizontal width decreases as it goes downward.

[0018] A semiconductor package according to the present embodiment includes a first substrate; a second substrate disposed on the first substrate; and an electronic component disposed on the second substrate, wherein one of the first substrate and the second substrate includes an insulating layer; a via electrode penetrating the insulating layer; and a pad portion disposed on a surface of the insulating layer and connected to the via electrode, and a protrusion portion having a shape that protrudes outward more than other regions is disposed on a side surface of the pad portion.

[0019]

[0020] Through this embodiment, there is an advantage in that the horizontal width or cross-sectional area of ​​the pad portion can be sufficiently secured compared to the conventional one through the protrusion.

[0021] In addition, there is an advantage in that a sufficient distance between different pads can be secured through the flat area.

[0022]

[0023] Figure 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.

[0024] Figure 2 is a plan view showing one side of a circuit board according to a comparative example.

[0025] Figure 3 is a cross-sectional view showing the arrangement structure of the insulating layer and pad portion according to a comparative example.

[0026] Figure 4 is a plan view showing one side of a circuit board according to an embodiment of the present invention.

[0027] Figure 5 is a cross-sectional view showing the arrangement structure of an insulating layer and a pad portion according to an embodiment of the present invention.

[0028] Fig. 6 is a plan view showing the arrangement structure of multiple pad portions on the surface of an insulating layer according to a comparative example.

[0029] Figure 7 is a cross-sectional view for explaining the spacing distance between multiple pad parts according to a comparative example.

[0030] Figure 8 is a plan view showing the arrangement structure of multiple pad portions on the surface of an insulating layer according to an embodiment of the present invention.

[0031] Figure 9 is a cross-sectional view for explaining the spacing distance of multiple pad parts according to an embodiment of the present invention.

[0032] Fig. 10 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

[0033]

[0034] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the attached drawings.

[0035] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0036] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0037] In addition, the terms used in the embodiments of the present invention are for the purpose of describing the embodiments and are not intended to limit the present invention. In this specification, the singular may also include the plural unless specifically stated in the phrase, and when it is described as "A and / or at least one (or more) of B, C," it may include one or more of all combinations that can be combined with A, B, and C.

[0038] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used.

[0039] These terms are intended only to distinguish one component from another, and are not intended to limit the nature, order, or sequence of the component.

[0040] And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, it may include not only cases where the component is directly connected, coupled or connected to the other component, but also cases where the component is 'connected', 'coupled' or 'connected' by another component between the component and the other component.

[0041] Additionally, when it is described as being formed or arranged "above or below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Also, when it is expressed as "above" or "below", it can include the meaning of the downward direction as well as the upward direction based on one component.

[0042] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention, FIG. 2 is a plan view showing one side of a circuit board according to a comparative example, FIG. 3 is a cross-sectional view showing the arrangement structure of an insulating layer and a pad portion according to a comparative example, FIG. 4 is a plan view showing one side of a circuit board according to an embodiment of the present invention, and FIG. 5 is a cross-sectional view showing the arrangement structure of an insulating layer and a pad portion according to an embodiment of the present invention.

[0043] Referring to FIGS. 1, 4, and 5, the circuit board (10) may include a plurality of insulating layers. For example, the circuit board (10) may have a five-layer structure based on the number of insulating layers, but is not limited thereto. The circuit board (10) may have four or fewer layers based on the number of insulating layers, or alternatively, may have six or more layers.

[0044] The insulating layer of the circuit board (10) includes a first insulating layer (111), a second insulating layer (112), a third insulating layer (113), a fourth insulating layer (114), and a fifth insulating layer (115). When the circuit board (10) has four or fewer layers, at least one insulating layer among the second insulating layer (112), the third insulating layer (113), the fourth insulating layer (114), and the fifth insulating layer (115) may be omitted. In addition, when the circuit board (10) has six or more layers, an additional insulating layer may be arranged between the second insulating layer (112) and the third insulating layer (113) or between the fourth insulating layer (114) and the fifth insulating layer (115).

[0045] The first insulating layer (111) may include a first insulating material. For example, the first insulating layer (111) may include a first insulating material including a reinforcing member. Accordingly, the first insulating layer (111) may be an insulating layer having a rigidity of a certain level or higher. For example, the first insulating layer (111) may be an insulating layer having copper foil laminated on both sides. The first insulating layer (111) may be a copper clad laminate (CCL).

[0046] A copper-clad laminate is generally a raw material on which circuit boards are manufactured, and is a laminate in which copper foil is laminated on an insulating layer. Depending on the application, the copper-clad laminate may include a glass / epoxy copper-clad laminate, a heat-resistant resin copper-clad laminate, a paper / phenol copper-clad laminate, a high-frequency copper-clad laminate, a flexible copper-clad laminate (e.g., polyimide film), and a composite copper-clad laminate. In this case, the first insulating layer (111) of the embodiment may use a glass / epoxy copper-clad laminate for the manufacture of a double-sided circuit board and a multilayer circuit board, but is not limited thereto.

[0047] A plurality of insulating layers may be arranged above and below the first insulating layer (111).

[0048] A second insulating layer (112) may be arranged on the first insulating layer (111). A third insulating layer (113) may be arranged on the second insulating layer (112). A fourth insulating layer (114) may be arranged under the first insulating layer (111). In addition, a fifth insulating layer (115) may be arranged under the fourth insulating layer (114).

[0049] The second insulating layer (112), the third insulating layer (113), the fourth insulating layer (114), and the fifth insulating layer (115) may include a second insulating material different from the first insulating layer (111). The second insulating layer (112), the third insulating layer (113), the fourth insulating layer (114), and the fifth insulating layer (115) may include a second insulating material that does not include a reinforcing member included in the first insulating layer (111). For example, the second insulating layer (112), the third insulating layer (113), the fourth insulating layer (114), and the fifth insulating layer (115) may include an organic material that does not include a reinforcing member. For example, the second insulating layer (112), the third insulating layer (113), the fourth insulating layer (114), and the fifth insulating layer (115) may include ABF (Ajinomoto Build-up Film), PI, and PID. However, the embodiment is not limited thereto. For example, the second insulating layer (112), the third insulating layer (113), the fourth insulating layer (114), and the fifth insulating layer (115) may be prepreg (PPG).

[0050] The thickness of each of the second insulating layer (112), the third insulating layer (113), the fourth insulating layer (114), and the fifth insulating layer (115) may be smaller than the thickness of the first insulating layer (111).

[0051] The circuit board (10) may include a circuit pattern. The circuit pattern may include a pad portion arranged on the surface of an insulating layer and a via electrode penetrating the insulating layer.

[0052] The pad portion may include a first pad portion (121) disposed on the upper surface of the first insulating layer (111), a second pad portion (124) disposed on the lower surface of the first insulating layer (111), a third pad portion (122) disposed on the upper surface of the second insulating layer (112), a fourth pad portion (123) disposed on the upper surface of the third insulating layer (113), a fifth pad portion (125) disposed on the lower surface of the fourth insulating layer (114), and a sixth pad portion (126) disposed on the lower surface of the fifth insulating layer (115).

[0053] The via electrode may include a first via electrode (131) penetrating the first insulating layer (111) and electrically connecting the first pad portion (121) and the second pad portion (124), a second via electrode (132) penetrating the second insulating layer (112) and electrically connecting the first pad portion (121) and the third pad portion (122), a third via electrode (133) penetrating the third insulating layer (113) and electrically connecting the third pad portion (122) and the fourth pad portion (123), a fourth via electrode (134) penetrating the fourth insulating layer (114) and electrically connecting the second pad portion (124) and the fifth pad portion (125), and a fifth via electrode (135) penetrating the fifth insulating layer (115) and electrically connecting the fifth pad portion (125) and the sixth pad portion (126).

[0054] The second via electrode (132) and the third via electrode (133) may each have a shape in which the horizontal width decreases as it goes downward.

[0055] The fourth via electrode (134) and the fifth via electrode (135) may each have a shape in which the horizontal width decreases as it goes upward.

[0056] The circuit board (10) includes an insulating member (140), and the insulating member (140) can be arranged to penetrate the first insulating layer (1110). The insulating member (140) can be filled inside a hole penetrating the first insulating layer (111) together with the first via electrode (131).

[0057] The circuit board (10) may include a first protective layer (116) and a second protective layer (117). The first protective layer (116) may be disposed on the upper surface of the circuit board (10). The first protective layer (116) may be disposed on the upper surface of the third insulating layer (113). The second protective layer (117) may be disposed on the lower surface of the circuit board (10). The second protective layer (117) may be disposed on the lower surface of the fifth insulating layer (115).

[0058] The first protective layer (116) and the second protective layer (117) can prevent short circuits between solders due to low wettability with solder when semiconductor elements are arranged on the surface of the circuit board (10) using a material such as solder. The first protective layer (116) and the second protective layer (117) can each use a photocurable insulating material. For example, the first protective layer (116) and the second protective layer (117) can use a solder resist. The first protective layer (116) can include a through hole for exposing the fourth pad portion (123) upward. The first protective layer (116) can be arranged so that at least a portion covers the upper surface of the fourth pad portion (123). The second protective layer (117) can include a through hole for exposing the sixth pad portion (126) downward. The second protective layer (117) can be arranged so that at least a portion of it covers the lower surface of the sixth pad portion (126).

[0059] Hereinafter, the shape of the circuit pattern according to an embodiment of the present invention will be described. The insulating layer (150, see FIG. 4) of the circuit board (10) described below may be any one or more of the first to fifth insulating layers (111, 112, 113, 114, 115). The pad portion (156, see FIG. 4) of the circuit board (10) described below may be any one or more of the first to sixth pad portions (121, 124, 122, 123, 125, 126). The via electrode (158, see FIG. 4) of the circuit board (10) described below may be any one or more of the first to fifth via electrodes (131, 132, 133, 134, 135).

[0060] Referring to FIGS. 4 and 5, the insulating layer (150) may include a via hole (154). The via hole (154) may have a shape in which the horizontal width decreases as it goes downward. A via electrode (158) may be arranged in the via hole (154).

[0061] The circuit pattern may include a pad portion (156) disposed on the upper surface of the insulating layer (150), and a via electrode (158) having a shape protruding downward from the lower surface of the pad portion (156) and disposed within a via hole (154). The via electrode (158) may have a shape in which the horizontal width decreases as it goes downward.

[0062] The pad portion (156) may include a first region (156a) that vertically overlaps with a via hole (154) or a via electrode (158), and a second region (156b) that is positioned outside the first region (156a) and does not vertically overlap with the via hole (154) or the via electrode (158).

[0063] The pad portion (156) may include a lower surface facing the upper surface of the insulating layer (150), an upper surface facing the lower surface, and a side surface connecting the upper surface and the lower surface. A plurality of pad portions (156) may be provided and arranged on the insulating layer (150). In this case, the side surfaces of the plurality of pad portions (156) may be spaced apart from each other in the horizontal direction.

[0064] The side of the pad portion (156) may include a first side (151) and a second side (152). The first side (151) may have a longitudinal direction in a first direction. The second side (152) may have a longitudinal direction in a second direction perpendicular to the first direction.

[0065] The first side (151) and the second side (152) may be arranged in the second region (156b) of the pad portion (156) that does not vertically overlap with the via hole (154) or the via electrode (158), respectively. The first side (151) and the second side (152) may each be a flat surface. The first side (152) and the second side (152) may each be a plane. The first side (151) and the second side (152) may be perpendicular to each other. The first side (152) and the second side (152) may each be arranged to face the side surface of the adjacent pad portion in the horizontal direction.

[0066] The pad portion (156) may include a protrusion (159). The protrusion (159) may have a shape that protrudes horizontally outward from the side surface of the pad portion (156). The protrusion (159) may be arranged on at least one of the first side surface (151) and the second side surface (152). The side surface of the protrusion (159) may have a rounded shape. The side surface of the protrusion (159) may be a curved surface. Accordingly, the side surface of the pad portion (156) may include a flat area defined by the first side surface (151) and the second side surface (152), and a curved area defined by the side surface of the protrusion (159).

[0067] The protrusion (159) may be arranged in an area having the shortest distance in the second direction from the edge of the first region (156a) to the first side (151), and the shortest distance in the first direction from the edge of the first region (156a) to the second side (162). The protrusion (159) may be arranged in an area having the shortest distance in the straight line from the edge of the first region (156) to the first side (151) or the second side (152). Accordingly, the shortest distance from the first region (156a) to the side of the pad portion (156) may be increased by the protrusion (159).

[0068] In detail, as illustrated in FIGS. 2 and 3, in the circuit board (10) according to the prior art, since the shortest straight distance from the edge of the first area of ​​the pad portion (26) overlapping the via electrode (28) to the first side or the second side is formed as L1, the horizontal width of the pad portion (26) arranged on the surface of the insulating layer (20) is insufficient, so that the bonding force of the pad portion (26) within the surface of the insulating layer (20) is reduced, and there is a possibility of the pad portion (26) coming off. In addition, the cross-sectional area of ​​the pad portion (26) is also insufficient compared to the cross-sectional area of ​​the via electrode (28), so that there is a problem that the reliability of the electrical connection with the adjacent via electrode or electronic device is reduced.

[0069] Accordingly, the circuit board (10) according to the present embodiment has the advantage of being able to sufficiently secure the horizontal width or cross-sectional area of ​​the pad portion (156) compared to the conventional one by forming the shortest straight-line distance from the edge of the first region (156a) to the first side (151) or the second side (152) as L2, which is larger than L1, through the protrusion (159).

[0070] The straight-line distance L2 from the edge of the first region (156a) to the side of the protrusion (159) may be 20 μm or more. Accordingly, the problem caused by the horizontal width reduction of the pad portion (26) according to the comparative example described above can be resolved.

[0071] Meanwhile, the straight-line distance L2 from the edge of the first region (156a) to the side surface of the protrusion (159) may be smaller than the straight-line distance L3 from the edge of the first region (156a) to the corner surface where the first side surface (151) and the second side surface (152) meet. This is in consideration of the fact that it becomes difficult to secure an area for arranging the pad portion (156) on the surface of the insulating layer (150) as the cross-sectional area of ​​the pad portion (156) excessively increases.

[0072] FIG. 6 is a plan view illustrating the arrangement structure of multiple pad parts on the surface of an insulating layer according to a comparative example, FIG. 7 is a cross-sectional view illustrating the spacing distance of multiple pad parts according to a comparative example, FIG. 8 is a plan view illustrating the arrangement structure of multiple pad parts on the surface of an insulating layer according to an embodiment of the present invention, and FIG. 9 is a cross-sectional view illustrating the spacing distance of multiple pad parts according to an embodiment of the present invention.

[0073] Referring to FIGS. 8 and 9, a circuit board (10) according to an embodiment of the present invention may include an insulating layer (160) and a plurality of pad portions (162, 164).

[0074] The insulating layer (160) may be at least one of the first to fifth insulating layers (111, 112, 113, 114, 115). The plurality of pad portions (162, 164) may be arranged together on the surface of at least one of the first to fifth insulating layers (111, 112, 113, 114, 115). The plurality of pad portions (162, 164) may be at least one of the first to sixth pad portions (121, 124, 122, 123, 125, 126).

[0075] In this case, the pad portion (156) illustrated in FIGS. 4 and 5 may be any one of a plurality of pad portions (162, 164).

[0076] The plurality of pad portions (162, 164) may include a first pad portion (162) and a second pad portion (164). The first pad portion (162) and the second pad portion (164) may be arranged on the surface of the insulating layer (160).

[0077] The first pad portion (162) may have a circular cross-sectional shape. The side surface of the first pad portion (162) may include a first curved area (161) and a first flat area (163). In the first curved area (161), the side surface of the first pad portion (162) may have a curved shape having a predetermined curvature. In the first flat area (163), the side surface of the first pad portion (162) may have a flat shape.

[0078] The first pad portion (162) may have a circular cross-sectional shape with a portion of the outer surface being flat due to the first plane area (163).

[0079] The second pad portion (164) may be arranged to be spaced apart from the first pad portion (162) in the horizontal direction. The side surface of the second pad portion (164) may include a second curved area (166) and a second flat area (165). In the second curved area (166), the side surface of the second pad portion (164) may have a curved shape having a predetermined curvature. In the second flat area (165), the side surface of the second pad portion (164) may have a flat shape.

[0080] The first plane region (163) and the second plane region (165) can each be placed in a region where the horizontal separation distance between the side surface of the first pad portion (162) and the side surface of the second pad portion (164) is formed as the shortest distance.

[0081] In detail, as shown in FIGS. 6 and 7, when a plurality of pad portions (32, 34) according to the prior art are arranged together on the surface of the insulating layer (30), different pad portions (32, 34) can be arranged relatively close to each other due to the curved shape of the side surface arranged in the area forming the shortest distance (g1) in the horizontal direction. Accordingly, there is a problem that an electrical short occurs between different pad portions (32, 34) or that coupling with adjacent via electrodes or electronic elements is difficult.

[0082] Accordingly, according to the present embodiment, by forming a planar region (163, 165) as an avoidance region to increase the separation distance on each side of the region forming the shortest distance in the horizontal direction within the first pad portion (162) and the second pad portion (164), there is an advantage in that an electrical short between different pad portions can be prevented, and also coupling with a via electrode or an electronic element can be easily achieved. That is, the shortest distance (g2) in the horizontal direction between the first pad portion (162) and the second pad portion (164) can be longer than the shortest distance (g1) in the horizontal direction between different pad portions (32, 34) according to the comparative example.

[0083] Fig. 10 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

[0084] Referring to FIG. 10, a semiconductor package according to an embodiment of the present invention may include a first substrate (1100), a second substrate (1200), and an electronic component (1300).

[0085] A second substrate (1200) may be placed on a first substrate (1100). The second substrate (1200) may be electrically and physically connected to the first substrate (1100) via a first connecting member (1410).

[0086] The second substrate (1200) may be an interposer.

[0087] The electronic component (1300) can be placed on a second substrate (1200). The electronic component (1300) can be electrically and physically connected to the second substrate (1200) through a second connecting member (1420).

[0088] The electronic components (1300) may be provided in multiple numbers and mounted on the second substrate (1200). The multiple electronic components (1300) may include a first electronic component (1310) and a second electronic component (1320).

[0089] A third connecting member (1430) may be arranged on the lower surface of the first substrate (1100), and the first substrate (1100) may be electrically and physically connected to another substrate through the third connecting member (1430).

[0090] The circuit board (10) according to the embodiment of the present invention illustrated in FIGS. 1, 4, 5, 8, and 9 may mean either the first substrate (1100) or the second substrate (1200) included in the semiconductor package.

[0091] Although all components constituting the embodiments of the present invention have been described above as being combined or operating in combination, the present invention is not necessarily limited to these embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined and operated one or more times. In addition, terms such as "include," "comprise," or "have" described above, unless specifically stated to the contrary, mean that the corresponding component may be inherent, and therefore should be interpreted as including other components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as terms defined in a dictionary, should be interpreted as being consistent with the contextual meaning of the related technology, and shall not be interpreted in an ideal or excessively formal sense, unless explicitly defined in the present invention.

[0092] The above description is merely an illustrative description of the technical idea of ​​the present invention, and those skilled in the art will appreciate that various modifications and variations may be made without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the technical idea of ​​the present invention, and the scope of the technical idea of ​​the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of the rights of the present invention.

[0093] Meanwhile, when a circuit board having the characteristics of the invention described above is used in IT devices such as smartphones, server computers, TVs, or home appliances, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the characteristics of the invention performs a semiconductor package function, it can safely protect semiconductor chips from external moisture or contaminants, and can solve problems such as leakage current or electrical shorts between terminals, or electrical open circuits in terminals supplying semiconductor chips. Furthermore, when it performs a signal transmission function, it can solve noise problems. Through this, the circuit board having the characteristics of the invention described above can maintain the stable function of IT devices or home appliances, thereby enabling the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability with each other.

[0094] When a circuit board having the characteristics of the invention described above is used in a transportation device such as a vehicle, it can solve the problem of signal distortion transmitted to the transportation device, safely protect the semiconductor chip controlling the transportation device from external sources, and solve the problem of leakage current or electrical short circuit between terminals, or electrical open of the terminal supplying the semiconductor chip, thereby further improving the stability of the transportation device. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

Claims

1. Insulating layer; a via electrode penetrating the insulating layer; and It is disposed on the surface of the insulating layer and includes a pad portion connected to the via electrode, A circuit board having a protrusion that protrudes outward from other areas on the side of the above pad portion.

2. In paragraph 1, The pad portion includes a first region that vertically overlaps the via electrode, and a second region that is positioned outside the first region and does not vertically overlap the via electrode. A circuit board in which the protrusion is arranged on the side of the second region.

3. In paragraph 2, The side surface of the above pad portion includes a first side surface and a second side surface adjacent to the first side surface, A circuit board in which the protrusion is arranged in an area having the shortest straight-line distance from the edge of the first area to the first side or the second side.

4. In paragraph 3, The first side and the second side are mutually perpendicular, A circuit board in which the shortest straight-line distance from the edge of the first region to the side surface of the protrusion is shorter than the straight-line distance from the edge of the first region to the corner surface where the first side surface and the second side surface meet.

5. In paragraph 3, The above first side and the above second side are planes, A circuit board having a curved side surface of the above protrusion.

6. In paragraph 1, The above pad portion includes a first pad portion and a second pad portion adjacent to the first pad portion, A circuit board in which the first pad portion and the second pad portion face each other in a horizontal direction and are flat.

7. In paragraph 6, The first pad portion has a first curved area and a first flat area arranged on the side, The second pad portion has a second curved area and a second flat area arranged on the side, A circuit board in which the first plane area and the second plane area face each other in a horizontal direction.

8. In paragraph 1, A circuit board in which the first plane region and the second plane region are arranged in a region where the horizontal distance between the side surface of the first pad portion and the side surface of the second pad portion is formed as the shortest distance.

9. In paragraph 1, The above via electrode is a circuit board having a shape in which the horizontal width decreases as it goes downward.

10. First substrate; A second substrate disposed on the first substrate; and Including an electronic component arranged on the second substrate, Either one of the first substrate and the second substrate, insulation layer; a via electrode penetrating the insulating layer; and It is disposed on the surface of the insulating layer and includes a pad portion connected to the via electrode, A semiconductor package in which a protrusion having a shape that protrudes outward more than other areas is arranged on the side of the above pad portion.

Images